From fb41cf077e4563233489ea58cf16a77e33daa121 Mon Sep 17 00:00:00 2001 From: YangWen Huang Date: Tue, 3 Dec 2024 09:00:57 +0800 Subject: [PATCH] Update gfx942_80cu TN/NN bf16 gridbased --- ...ilk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml | 156990 ++++++----- ...lik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml | 202378 +++++++++------ 2 files changed, 207902 insertions(+), 151466 deletions(-) diff --git a/library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_80cu/GridBased/aquavanjaram_Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml b/library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_80cu/GridBased/aquavanjaram_Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml index a6ed06413a..c10a8401f7 100644 --- a/library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_80cu/GridBased/aquavanjaram_Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml +++ b/library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_80cu/GridBased/aquavanjaram_Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml @@ -268398,7 +268398,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -268411,10 +268411,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 12 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -268425,20 +268425,20 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_PLR1_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 51200 LdsNumElementsAlignedA: 32768 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 @@ -268452,41 +268452,41 @@ LdsOffsetMetadata: 51200 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -268499,8 +268499,8 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -268593,7 +268593,7 @@ ScheduleIterAlg: 3 ScheduleLocalWrite: 1 SolutionIndex: 1028 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU12_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -268601,16 +268601,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -268622,21 +268622,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 12] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -268672,7 +268672,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 12 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -268686,32 +268686,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 8 + LSPA: 16 LSPB: 32 - LVCA: 32 + LVCA: 16 LVCB: 8 - LVPA: 1 + LVPA: 2 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 32768 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -268723,7 +268723,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -268731,14 +268731,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 128 MacroTile1: 128 - MacroTileA: 256 + MacroTileA: 128 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -268760,13 +268760,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -268854,7 +268854,7 @@ ScheduleIterAlg: 3 ScheduleLocalWrite: 1 SolutionIndex: 1029 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU12_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -268863,16 +268863,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 2 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -268889,11 +268889,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 12] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -268933,7 +268933,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -268947,7 +268947,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -268960,9 +268960,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -268971,7 +268971,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 @@ -268984,7 +268984,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -268993,14 +268993,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -269021,14 +269021,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -269115,7 +269115,7 @@ ScheduleIterAlg: 3 ScheduleLocalWrite: 1 SolutionIndex: 1030 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -269131,9 +269131,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 2 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 2 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -269154,7 +269154,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 10] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -269194,7 +269194,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 10 + GlobalSplitU: 17 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -269208,32 +269208,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 + LSPA: 8 LSPB: 32 - LVCA: 16 + LVCA: 32 LVCB: 8 - LVPA: 2 + LVPA: 1 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -269253,15 +269253,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -269282,14 +269282,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -269376,7 +269376,7 @@ ScheduleIterAlg: 3 ScheduleLocalWrite: 1 SolutionIndex: 1031 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWB8_GSU17_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -269385,16 +269385,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -269411,272 +269411,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false - _VectorStore: 1 - _WorkspaceSizePerElemBias: 0 - _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 - ActivationAlt: false - ActivationFuncCall: true - ActivationFused: true - AssertFree0ElementMultiple: 1 - AssertFree1ElementMultiple: 1 - AssertSummationElementMultiple: 1 - AssignedDerivedParameters: true - AssignedProblemIndependentDerivedParameters: true - BufferLoad: true - BufferStore: true - CUCount: null - ClusterLocalRead: 1 - CodeObjectVersion: default - ConvertAfterDS: false - CustomKernelName: '' - DepthU: 64 - DirectToLds: false - DirectToLdsA: false - DirectToLdsB: false - DirectToVgprSparseMetadata: false - EdgeType: ShiftPtr - EnableF32XdlMathOp: false - EnableMatrixInstruction: true - ExpandPointerSwap: 0 - ForceDisableShadowInit: false - GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 17 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 - GroupLoadStore: false - GuaranteeNoPartialA: false - GuaranteeNoPartialB: true - GuaranteeNoPartialMetadata: true - ISA: [9, 4, 2] - InnerUnroll: 1 - InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} - KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 - LdsBlockSizePerPadMetadata: 0 - LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 - LdsNumElementsAlignedMetadata: 0 - LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 - LdsOffsetBias: 0 - LdsOffsetBiasGSU: 0 - LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 - LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 - LocalWritePerMfma: -1 - LocalWriteUseSgprA: false - LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 - MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] - MIInputPerThread: 4 - MIInputPerThreadA: 4 - MIInputPerThreadB: 4 - MIInputPerThreadMetadata: 4 - MIOutputVectorWidth: 4 - MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 - MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 - MagicDivAlg: 2 - MatrixInstB: 1 - MatrixInstBM: 1 - MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] - MaxOccupancy: 40 - NoLdsWriteCode: false - NoReject: false - NoTailLoop: false - NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 - NonTemporalE: 0 - NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 - NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 - NumThreads: 256 - OptNoLoadLoop: 1 - PackedC0IdxChars: [I] - PackedC0IndicesX: [0] - PackedC1IdxChars: [J] - PackedC1IndicesX: [1] - PrefetchGlobalRead: 2 - PrefetchLocalRead: 1 - PreloadKernArgs: true - ProblemType: - Activation: true - ActivationComputeDataType: 0 - ActivationNoGuard: false - ActivationType: hipblaslt_all - AllowNoFreeDims: false - AssignedDerivedParameters: true - Batched: true - BetaOnlyUseBias: false - BiasDataTypeList: [0, 4] - BiasSrc: D - ComplexConjugateA: false - ComplexConjugateB: false - ComputeDataType: 0 - DataType: 4 - DataTypeA: 4 - DataTypeB: 4 - DataTypeE: 4 - DestDataType: 4 - F32XdlMathOp: 0 - Gradient: false - GroupedGemm: false - HighPrecisionAccumulate: true - Index0: 0 - Index01A: 0 - Index01B: 1 - Index1: 1 - IndexAssignmentsA: [0, 3, 2] - IndexAssignmentsB: [3, 1, 2] - IndexAssignmentsLD: [4, 5, 6, 7] - IndexAssignmentsMetadata: [3, 0, 2] - IndexUnroll: 3 - IndexUnrollA: 1 - IndexUnrollB: 0 - IndexUnrollM: 0 - IndicesBatch: [2] - IndicesFree: [0, 1] - IndicesSummation: [3] - MirrorDimsA: [] - MirrorDimsB: [] - MirrorDimsMetadata: [] - NumIndicesBatch: 1 - NumIndicesC: 3 - NumIndicesFree: 2 - NumIndicesLD: 4 - NumIndicesSummation: 1 - OperationType: GEMM - SetConstStrideA: [] - SetConstStrideB: [] - SetConstStrideBias: [] - SilentHighPrecisionAccumulate: false - Sparse: 0 - StochasticRounding: false - StridedBatched: true - SupportUserArgs: true - TLUA: true - TLUB: false - Tensor0: 0 - Tensor1: 1 - TileA: 0 - TileAwareSelection: false - TileB: 1 - TotalIndices: 4 - TransposeA: false - TransposeB: false - UseBeta: true - UseBias: 1 - UseE: false - UseInitialStridesAB: false - UseInitialStridesCD: false - UseScaleAB: '' - UseScaleAlphaVec: 1 - UseScaleCD: false - ScheduleGlobalRead: 1 - ScheduleIterAlg: 3 - ScheduleLocalWrite: 1 - SolutionIndex: 1032 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWB8_GSU17_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 - SourceSwap: 1 - StaggerU: 0 - StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 - StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 - SuppressNoLoadLoop: false - ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 - TransposeLDS: 1 - TransposeLDSMetadata: true - UnrollMajorLDSA: false - UnrollMajorLDSB: true - UnrollMajorLDSMetadata: true - Use64bShadowLimit: 1 - UseInstOffsetForGRO: 0 - UseSgprForGRO: -1 - Valid: true - VectorStore: -1 - VectorWidthA: 2 - VectorWidthB: 1 - WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 - WaveSeparateGlobalReadMetadata: 0 - WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 - WorkGroupReduction: false - WorkspaceCheck: [4, 0, 17] + WorkspaceCheck: [4, 0, 17] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -269897,7 +269636,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1033 + SolutionIndex: 1032 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -270158,7 +269897,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1034 + SolutionIndex: 1033 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU12_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -270419,7 +270158,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1035 + SolutionIndex: 1034 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_CLR1_GRVWB8_GSU3_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_2_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -270680,7 +270419,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1036 + SolutionIndex: 1035 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_CLR1_GRVWB8_GSU14_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -270941,7 +270680,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1037 + SolutionIndex: 1036 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWB8_GSU12_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -271202,7 +270941,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1038 + SolutionIndex: 1037 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -271463,7 +271202,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1039 + SolutionIndex: 1038 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU9_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -271724,7 +271463,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1040 + SolutionIndex: 1039 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -271985,7 +271724,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1041 + SolutionIndex: 1040 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -272246,7 +271985,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1042 + SolutionIndex: 1041 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -272507,7 +272246,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1043 + SolutionIndex: 1042 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_CLR1_GRVWB8_GSU8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -272768,7 +272507,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1044 + SolutionIndex: 1043 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWB8_GSU9_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -273029,7 +272768,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1045 + SolutionIndex: 1044 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -273290,7 +273029,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1046 + SolutionIndex: 1045 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -273551,7 +273290,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1047 + SolutionIndex: 1046 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU9_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_8_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -273812,7 +273551,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1048 + SolutionIndex: 1047 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -274073,7 +273812,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1049 + SolutionIndex: 1048 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU7_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_8_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -274334,7 +274073,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1050 + SolutionIndex: 1049 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -274595,7 +274334,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1051 + SolutionIndex: 1050 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -274856,7 +274595,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1052 + SolutionIndex: 1051 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -275117,7 +274856,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1053 + SolutionIndex: 1052 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -275378,7 +275117,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1054 + SolutionIndex: 1053 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -275639,7 +275378,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1055 + SolutionIndex: 1054 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -275900,7 +275639,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1056 + SolutionIndex: 1055 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -276161,7 +275900,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1057 + SolutionIndex: 1056 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI32x32x1_SN_GRVWB2_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_5_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -276422,7 +276161,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1058 + SolutionIndex: 1057 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -276683,7 +276422,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1059 + SolutionIndex: 1058 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -276944,7 +276683,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1060 + SolutionIndex: 1059 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -277205,7 +276944,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1061 + SolutionIndex: 1060 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -277466,7 +277205,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1062 + SolutionIndex: 1061 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -277727,7 +277466,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1063 + SolutionIndex: 1062 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_8_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -277988,7 +277727,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1064 + SolutionIndex: 1063 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -278249,7 +277988,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1065 + SolutionIndex: 1064 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA3072_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTA4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -278510,7 +278249,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1066 + SolutionIndex: 1065 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -278771,7 +278510,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1067 + SolutionIndex: 1066 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -279032,7 +278771,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1068 + SolutionIndex: 1067 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -279293,7 +279032,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1069 + SolutionIndex: 1068 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -279554,7 +279293,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1070 + SolutionIndex: 1069 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -279815,7 +279554,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1071 + SolutionIndex: 1070 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_7_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -280076,7 +279815,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1072 + SolutionIndex: 1071 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA2560_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NTA0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -280337,7 +280076,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1073 + SolutionIndex: 1072 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTA0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -280598,7 +280337,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1074 + SolutionIndex: 1073 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -280859,7 +280598,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1075 + SolutionIndex: 1074 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -281120,7 +280859,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1076 + SolutionIndex: 1075 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_4_NTA4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -281381,7 +281120,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1077 + SolutionIndex: 1076 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -281642,7 +281381,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1078 + SolutionIndex: 1077 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTA4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -281903,7 +281642,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1079 + SolutionIndex: 1078 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTA0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -282164,7 +281903,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1080 + SolutionIndex: 1079 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x64x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -282425,7 +282164,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1081 + SolutionIndex: 1080 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -282686,7 +282425,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1082 + SolutionIndex: 1081 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -282947,7 +282686,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1083 + SolutionIndex: 1082 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -283208,7 +282947,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1084 + SolutionIndex: 1083 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NTA4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -283469,7 +283208,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1085 + SolutionIndex: 1084 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_10_NTA0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -283730,7 +283469,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1086 + SolutionIndex: 1085 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x64x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTA0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -283991,7 +283730,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1087 + SolutionIndex: 1086 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTA0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -284252,7 +283991,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1088 + SolutionIndex: 1087 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTA4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -284513,7 +284252,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1089 + SolutionIndex: 1088 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTA0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -284774,7 +284513,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1090 + SolutionIndex: 1089 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTA4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -285035,7 +284774,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1091 + SolutionIndex: 1090 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NTA4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -285296,7 +285035,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1092 + SolutionIndex: 1091 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTA0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -285557,7 +285296,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1093 + SolutionIndex: 1092 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTA0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -285818,7 +285557,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1094 + SolutionIndex: 1093 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTA0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -286079,7 +285818,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1095 + SolutionIndex: 1094 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTA4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -286340,7 +286079,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1096 + SolutionIndex: 1095 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTA0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -286601,7 +286340,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1097 + SolutionIndex: 1096 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_7_NTA0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -286862,7 +286601,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1098 + SolutionIndex: 1097 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x64x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTA0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -287123,7 +286862,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1099 + SolutionIndex: 1098 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_5_NTA0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -287384,7 +287123,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1100 + SolutionIndex: 1099 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NTA0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -287645,7 +287384,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1101 + SolutionIndex: 1100 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NTA0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WSGRA0_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -287906,7 +287645,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1102 + SolutionIndex: 1101 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTA0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -288167,7 +287906,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1103 + SolutionIndex: 1102 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTA4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -288428,7 +288167,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1104 + SolutionIndex: 1103 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTA4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -288689,7 +288428,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1105 + SolutionIndex: 1104 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTA4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WSGRA0_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -288950,7 +288689,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1106 + SolutionIndex: 1105 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTA4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WSGRA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -289211,7 +288950,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1107 + SolutionIndex: 1106 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NTA0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -289472,7 +289211,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1108 + SolutionIndex: 1107 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTA0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -289733,7 +289472,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1109 + SolutionIndex: 1108 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTA4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -289994,7 +289733,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1110 + SolutionIndex: 1109 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTA0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -290255,7 +289994,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1111 + SolutionIndex: 1110 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTA4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WSGRA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -290516,7 +290255,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1112 + SolutionIndex: 1111 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTA4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WSGRA0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -290777,7 +290516,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1113 + SolutionIndex: 1112 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NTA0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA0_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -291038,7 +290777,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1114 + SolutionIndex: 1113 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTA0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -291299,7 +291038,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1115 + SolutionIndex: 1114 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NTA0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -291560,7 +291299,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1116 + SolutionIndex: 1115 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTA0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -291821,7 +291560,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1117 + SolutionIndex: 1116 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB4_LRVW4_MIWT12_5_NTA0_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WSGRA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -292082,7 +291821,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1118 + SolutionIndex: 1117 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_10_NTA4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -292343,7 +292082,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1119 + SolutionIndex: 1118 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTA4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -292604,7 +292343,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1120 + SolutionIndex: 1119 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU11_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -292865,7 +292604,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1121 + SolutionIndex: 1120 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU22_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -293126,7 +292865,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1122 + SolutionIndex: 1121 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU11_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -293387,7 +293126,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1123 + SolutionIndex: 1122 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -293648,7 +293387,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1124 + SolutionIndex: 1123 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU11_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -293909,7 +293648,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1125 + SolutionIndex: 1124 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU24_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -294170,7 +293909,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1126 + SolutionIndex: 1125 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU10_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -294431,7 +294170,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1127 + SolutionIndex: 1126 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -294692,7 +294431,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1128 + SolutionIndex: 1127 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU4_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -294953,7 +294692,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1129 + SolutionIndex: 1128 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -295214,7 +294953,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1130 + SolutionIndex: 1129 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU11_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -295475,7 +295214,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1131 + SolutionIndex: 1130 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU20_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -295736,7 +295475,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1132 + SolutionIndex: 1131 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -295997,7 +295736,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1133 + SolutionIndex: 1132 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -296258,7 +295997,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1134 + SolutionIndex: 1133 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU14_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -296519,7 +296258,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1135 + SolutionIndex: 1134 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_2_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -296780,7 +296519,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1136 + SolutionIndex: 1135 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU7_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -297041,7 +296780,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1137 + SolutionIndex: 1136 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU14_LBSPPA1536_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -297302,7 +297041,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1138 + SolutionIndex: 1137 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU6_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -297563,7 +297302,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1139 + SolutionIndex: 1138 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_1_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -297824,7 +297563,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1140 + SolutionIndex: 1139 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -298085,7 +297824,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1141 + SolutionIndex: 1140 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU14_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -298346,7 +298085,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1142 + SolutionIndex: 1141 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU14_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -298607,7 +298346,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1143 + SolutionIndex: 1142 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU28_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -298868,7 +298607,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1144 + SolutionIndex: 1143 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU28_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -299129,7 +298868,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1145 + SolutionIndex: 1144 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -299390,7 +299129,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1146 + SolutionIndex: 1145 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU5_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -299651,7 +299390,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1147 + SolutionIndex: 1146 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU14_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -299912,7 +299651,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1148 + SolutionIndex: 1147 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU7_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -300173,7 +299912,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1149 + SolutionIndex: 1148 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU5_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_2_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -300434,7 +300173,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1150 + SolutionIndex: 1149 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU14_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -300695,7 +300434,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1151 + SolutionIndex: 1150 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU5_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -300956,7 +300695,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1152 + SolutionIndex: 1151 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x64_MI32x32x1_SN_LDSB0_CLR1_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_1_NLCA1_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -301217,7 +300956,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1153 + SolutionIndex: 1152 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_CLR1_GRVWB8_GSU17_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -301478,7 +301217,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1154 + SolutionIndex: 1153 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -301739,7 +301478,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1155 + SolutionIndex: 1154 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_LDSB1_CLR1_GRVWB8_GSU7_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -302000,7 +301739,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1156 + SolutionIndex: 1155 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_LDSB1_CLR1_GRVWB8_GSU17_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -302261,7 +302000,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1157 + SolutionIndex: 1156 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_CLR1_GRVWB8_GSU8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -302522,7 +302261,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1158 + SolutionIndex: 1157 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_LDSB1_CLR1_GRVWB8_GSU17_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -302783,7 +302522,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1159 + SolutionIndex: 1158 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_LDSB1_CLR1_GRVWB8_GSU5_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -303044,7 +302783,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1160 + SolutionIndex: 1159 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_LDSB1_CLR1_GRVWB2_GSU23_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_8_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -303305,7 +303044,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1161 + SolutionIndex: 1160 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB0_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -303566,7 +303305,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1162 + SolutionIndex: 1161 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x32_MI32x32x1_SN_LDSB0_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -303827,7 +303566,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1163 + SolutionIndex: 1162 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_CLR1_GRVWB8_GSU14_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -304088,7 +303827,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1164 + SolutionIndex: 1163 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -304349,7 +304088,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1165 + SolutionIndex: 1164 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_LDSB1_CLR1_GRVWB2_GSU23_LBSPPA2560_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -304610,7 +304349,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1166 + SolutionIndex: 1165 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_CLR1_GRVWB8_GSU12_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -304871,7 +304610,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1167 + SolutionIndex: 1166 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_CLR1_GRVWB8_GSU4_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -305132,7 +304871,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1168 + SolutionIndex: 1167 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_LDSB1_CLR1_GRVWB8_GSU17_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -305393,7 +305132,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1169 + SolutionIndex: 1168 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -305654,7 +305393,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1170 + SolutionIndex: 1169 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -305915,7 +305654,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1171 + SolutionIndex: 1170 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -306176,7 +305915,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1172 + SolutionIndex: 1171 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU12_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_6_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -306437,7 +306176,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1173 + SolutionIndex: 1172 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -306698,7 +306437,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1174 + SolutionIndex: 1173 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_CLR1_GRVWB8_GSU18_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -306959,7 +306698,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1175 + SolutionIndex: 1174 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_CLR1_GRVWB2_GSU12_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -307220,7 +306959,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1176 + SolutionIndex: 1175 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -307481,7 +307220,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1177 + SolutionIndex: 1176 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -307742,7 +307481,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1178 + SolutionIndex: 1177 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_CLR1_GRVWB8_GSU18_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -308003,7 +307742,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1179 + SolutionIndex: 1178 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -308264,7 +308003,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1180 + SolutionIndex: 1179 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_CLR1_GRVWB2_GSU12_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -308525,7 +308264,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1181 + SolutionIndex: 1180 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU12_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -308786,7 +308525,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1182 + SolutionIndex: 1181 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU7_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -309047,7 +308786,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1183 + SolutionIndex: 1182 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_CLR1_GRVWB2_GSU6_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -309308,7 +309047,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1184 + SolutionIndex: 1183 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_CLR1_GRVWB8_GSU12_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -309569,7 +309308,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1185 + SolutionIndex: 1184 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -309830,7 +309569,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1186 + SolutionIndex: 1185 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -310091,7 +309830,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1187 + SolutionIndex: 1186 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -310352,7 +310091,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1188 + SolutionIndex: 1187 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_6_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -310613,7 +310352,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1189 + SolutionIndex: 1188 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -310874,7 +310613,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1190 + SolutionIndex: 1189 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_6_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -311135,7 +310874,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1191 + SolutionIndex: 1190 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -311396,7 +311135,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1192 + SolutionIndex: 1191 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -311657,7 +311396,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1193 + SolutionIndex: 1192 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -311918,7 +311657,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1194 + SolutionIndex: 1193 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -312179,7 +311918,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1195 + SolutionIndex: 1194 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_12_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -312440,7 +312179,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1196 + SolutionIndex: 1195 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -312701,7 +312440,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1197 + SolutionIndex: 1196 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -312962,7 +312701,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1198 + SolutionIndex: 1197 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -313223,7 +312962,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1199 + SolutionIndex: 1198 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -313484,7 +313223,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1200 + SolutionIndex: 1199 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -313745,7 +313484,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1201 + SolutionIndex: 1200 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -314006,7 +313745,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1202 + SolutionIndex: 1201 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -314267,7 +314006,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1203 + SolutionIndex: 1202 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_7_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -314528,7 +314267,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1204 + SolutionIndex: 1203 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -314789,7 +314528,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1205 + SolutionIndex: 1204 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_7_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -315050,7 +314789,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1206 + SolutionIndex: 1205 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -315311,7 +315050,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1207 + SolutionIndex: 1206 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -315572,7 +315311,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1208 + SolutionIndex: 1207 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -315833,7 +315572,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1209 + SolutionIndex: 1208 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -316094,7 +315833,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1210 + SolutionIndex: 1209 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -316355,7 +316094,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1211 + SolutionIndex: 1210 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -316616,7 +316355,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1212 + SolutionIndex: 1211 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -316877,7 +316616,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1213 + SolutionIndex: 1212 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -317138,7 +316877,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1214 + SolutionIndex: 1213 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -317399,7 +317138,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1215 + SolutionIndex: 1214 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -317660,7 +317399,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1216 + SolutionIndex: 1215 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x80x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIAV0_MIWT8_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -317921,7 +317660,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1217 + SolutionIndex: 1216 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -318182,7 +317921,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1218 + SolutionIndex: 1217 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -318443,7 +318182,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1219 + SolutionIndex: 1218 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -318704,7 +318443,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1220 + SolutionIndex: 1219 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -318965,7 +318704,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1221 + SolutionIndex: 1220 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -319226,7 +318965,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1222 + SolutionIndex: 1221 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -319487,7 +319226,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1223 + SolutionIndex: 1222 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x64x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -319748,7 +319487,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1224 + SolutionIndex: 1223 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x64x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -320009,7 +319748,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1225 + SolutionIndex: 1224 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB4_LRVW4_MIAV0_MIWT12_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -320270,7 +320009,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1226 + SolutionIndex: 1225 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -320531,7 +320270,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1227 + SolutionIndex: 1226 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -320792,7 +320531,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1228 + SolutionIndex: 1227 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -321053,7 +320792,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1229 + SolutionIndex: 1228 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x80x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -321314,7 +321053,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1230 + SolutionIndex: 1229 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -321575,7 +321314,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1231 + SolutionIndex: 1230 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -321836,7 +321575,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1232 + SolutionIndex: 1231 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -322097,7 +321836,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1233 + SolutionIndex: 1232 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -322358,7 +322097,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1234 + SolutionIndex: 1233 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -322619,7 +322358,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1235 + SolutionIndex: 1234 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -322880,7 +322619,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1236 + SolutionIndex: 1235 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -323141,7 +322880,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1237 + SolutionIndex: 1236 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -323402,7 +323141,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1238 + SolutionIndex: 1237 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -323663,7 +323402,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1239 + SolutionIndex: 1238 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -323924,7 +323663,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1240 + SolutionIndex: 1239 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -324185,7 +323924,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1241 + SolutionIndex: 1240 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -324446,7 +324185,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1242 + SolutionIndex: 1241 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -324707,7 +324446,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1243 + SolutionIndex: 1242 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_7_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -324968,7 +324707,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1244 + SolutionIndex: 1243 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -325229,7 +324968,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1245 + SolutionIndex: 1244 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -325490,7 +325229,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1246 + SolutionIndex: 1245 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -325751,7 +325490,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1247 + SolutionIndex: 1246 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -326012,7 +325751,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1248 + SolutionIndex: 1247 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -326273,7 +326012,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1249 + SolutionIndex: 1248 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -326534,7 +326273,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1250 + SolutionIndex: 1249 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -326795,7 +326534,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1251 + SolutionIndex: 1250 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_7_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -327056,7 +326795,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1252 + SolutionIndex: 1251 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -327317,7 +327056,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1253 + SolutionIndex: 1252 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -327578,7 +327317,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1254 + SolutionIndex: 1253 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -327839,7 +327578,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1255 + SolutionIndex: 1254 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -328100,7 +327839,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1256 + SolutionIndex: 1255 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -328361,7 +328100,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1257 + SolutionIndex: 1256 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -328622,7 +328361,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1258 + SolutionIndex: 1257 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -328883,7 +328622,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1259 + SolutionIndex: 1258 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -329144,7 +328883,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1260 + SolutionIndex: 1259 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -329405,7 +329144,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1261 + SolutionIndex: 1260 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA0_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -329666,7 +329405,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1262 + SolutionIndex: 1261 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -329927,7 +329666,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1263 + SolutionIndex: 1262 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -330188,7 +329927,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1264 + SolutionIndex: 1263 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA0_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -330449,7 +330188,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1265 + SolutionIndex: 1264 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WSGRA0_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -330710,7 +330449,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1266 + SolutionIndex: 1265 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WSGRA0_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -330971,7 +330710,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1267 + SolutionIndex: 1266 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WSGRA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -331232,7 +330971,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1268 + SolutionIndex: 1267 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -331493,7 +331232,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1269 + SolutionIndex: 1268 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -331754,7 +331493,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1270 + SolutionIndex: 1269 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -332015,7 +331754,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1271 + SolutionIndex: 1270 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU17_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -332276,7 +332015,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1272 + SolutionIndex: 1271 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x64_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -332537,7 +332276,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1273 + SolutionIndex: 1272 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -332798,7 +332537,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1274 + SolutionIndex: 1273 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -333059,7 +332798,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1275 + SolutionIndex: 1274 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -333320,7 +333059,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1276 + SolutionIndex: 1275 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU18_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -333581,7 +333320,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1277 + SolutionIndex: 1276 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -333842,7 +333581,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1278 + SolutionIndex: 1277 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -334103,7 +333842,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1279 + SolutionIndex: 1278 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -334364,7 +334103,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1280 + SolutionIndex: 1279 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU14_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -334625,7 +334364,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1281 + SolutionIndex: 1280 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -334886,7 +334625,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1282 + SolutionIndex: 1281 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -335147,7 +334886,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1283 + SolutionIndex: 1282 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_1_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -335408,7 +335147,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1284 + SolutionIndex: 1283 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU14_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -335669,7 +335408,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1285 + SolutionIndex: 1284 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -335930,7 +335669,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1286 + SolutionIndex: 1285 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_GRVWB8_GSU6_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT1_1_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -336191,7 +335930,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1287 + SolutionIndex: 1286 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -336452,7 +336191,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1288 + SolutionIndex: 1287 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_1_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -336713,7 +336452,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1289 + SolutionIndex: 1288 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -336974,7 +336713,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1290 + SolutionIndex: 1289 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -337235,7 +336974,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1291 + SolutionIndex: 1290 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_GRVWB8_GSU7_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -337496,7 +337235,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1292 + SolutionIndex: 1291 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -337757,7 +337496,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1293 + SolutionIndex: 1292 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWB8_GSU14_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -338018,7 +337757,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1294 + SolutionIndex: 1293 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU19_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -338279,7 +338018,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1295 + SolutionIndex: 1294 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_GSU7_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -338540,7 +338279,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1296 + SolutionIndex: 1295 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -338801,7 +338540,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1297 + SolutionIndex: 1296 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -339062,7 +338801,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1298 + SolutionIndex: 1297 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU14_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -339323,7 +339062,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1299 + SolutionIndex: 1298 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU7_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -339584,7 +339323,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1300 + SolutionIndex: 1299 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -339845,7 +339584,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1301 + SolutionIndex: 1300 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -340106,7 +339845,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1302 + SolutionIndex: 1301 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU19_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -340367,7 +340106,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1303 + SolutionIndex: 1302 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_GSU14_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -340628,7 +340367,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1304 + SolutionIndex: 1303 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU19_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -340889,7 +340628,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1305 + SolutionIndex: 1304 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_2_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -341150,7 +340889,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1306 + SolutionIndex: 1305 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU19_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -341411,7 +341150,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1307 + SolutionIndex: 1306 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -341672,7 +341411,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1308 + SolutionIndex: 1307 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -341933,7 +341672,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1309 + SolutionIndex: 1308 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU17_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -342194,7 +341933,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1310 + SolutionIndex: 1309 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_CLR1_GRVWB2_GSU18_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -342455,7 +342194,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1311 + SolutionIndex: 1310 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -342716,7 +342455,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1312 + SolutionIndex: 1311 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -342977,7 +342716,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1313 + SolutionIndex: 1312 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_CLR1_GRVWB2_GSU17_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_8_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -343238,7 +342977,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1314 + SolutionIndex: 1313 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU12_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -343499,7 +343238,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1315 + SolutionIndex: 1314 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -343760,7 +343499,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1316 + SolutionIndex: 1315 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_CLR1_GRVWB8_GSU23_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -344021,7 +343760,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1317 + SolutionIndex: 1316 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_CLR1_GRVWB2_GSU18_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -344282,7 +344021,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1318 + SolutionIndex: 1317 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_CLR1_GRVWB2_GSU17_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_9_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -344543,7 +344282,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1319 + SolutionIndex: 1318 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x32_MI32x32x1_SN_CLR1_GRVWB8_GSU8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -344804,7 +344543,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1320 + SolutionIndex: 1319 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU14_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -345065,7 +344804,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1321 + SolutionIndex: 1320 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_CLR1_GRVWB8_GSU3_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -345326,7 +345065,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1322 + SolutionIndex: 1321 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU14_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -345587,7 +345326,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1323 + SolutionIndex: 1322 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -345848,7 +345587,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1324 + SolutionIndex: 1323 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_CLR1_GRVWB8_GSU14_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -346109,7 +345848,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1325 + SolutionIndex: 1324 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_CLR1_GRVWB2_GSU14_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_8_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -346370,7 +346109,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1326 + SolutionIndex: 1325 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -346631,7 +346370,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1327 + SolutionIndex: 1326 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -346892,7 +346631,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1328 + SolutionIndex: 1327 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -347153,7 +346892,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1329 + SolutionIndex: 1328 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -347414,7 +347153,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1330 + SolutionIndex: 1329 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_CLR1_GRVWB2_GSU9_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -347675,7 +347414,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1331 + SolutionIndex: 1330 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -347936,7 +347675,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1332 + SolutionIndex: 1331 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -348197,7 +347936,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1333 + SolutionIndex: 1332 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_CLR1_GRVWB8_GSU7_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -348458,7 +348197,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1334 + SolutionIndex: 1333 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_CLR1_GRVWB2_GSU7_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_8_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -348719,7 +348458,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1335 + SolutionIndex: 1334 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_8_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -348980,7 +348719,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1336 + SolutionIndex: 1335 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -349241,7 +348980,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1337 + SolutionIndex: 1336 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -349502,7 +349241,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1338 + SolutionIndex: 1337 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -349763,7 +349502,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1339 + SolutionIndex: 1338 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -350024,7 +349763,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1340 + SolutionIndex: 1339 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -350285,7 +350024,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1341 + SolutionIndex: 1340 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_6_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -350546,7 +350285,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1342 + SolutionIndex: 1341 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_9_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -350807,7 +350546,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1343 + SolutionIndex: 1342 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_8_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -351068,7 +350807,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1344 + SolutionIndex: 1343 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -351329,7 +351068,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1345 + SolutionIndex: 1344 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -351590,7 +351329,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1346 + SolutionIndex: 1345 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -351851,7 +351590,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1347 + SolutionIndex: 1346 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA3072_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -352112,7 +351851,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1348 + SolutionIndex: 1347 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -352373,7 +352112,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1349 + SolutionIndex: 1348 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -352634,7 +352373,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1350 + SolutionIndex: 1349 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -352895,7 +352634,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1351 + SolutionIndex: 1350 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -353156,7 +352895,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1352 + SolutionIndex: 1351 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -353417,7 +353156,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1353 + SolutionIndex: 1352 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -353678,7 +353417,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1354 + SolutionIndex: 1353 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -353939,7 +353678,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1355 + SolutionIndex: 1354 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -354200,7 +353939,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1356 + SolutionIndex: 1355 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -354461,7 +354200,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1357 + SolutionIndex: 1356 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -354722,7 +354461,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1358 + SolutionIndex: 1357 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -354983,7 +354722,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1359 + SolutionIndex: 1358 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -355244,7 +354983,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1360 + SolutionIndex: 1359 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -355505,7 +355244,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1361 + SolutionIndex: 1360 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -355766,7 +355505,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1362 + SolutionIndex: 1361 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -356027,7 +355766,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1363 + SolutionIndex: 1362 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -356288,7 +356027,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1364 + SolutionIndex: 1363 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -356549,7 +356288,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1365 + SolutionIndex: 1364 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -356810,7 +356549,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1366 + SolutionIndex: 1365 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -357071,7 +356810,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1367 + SolutionIndex: 1366 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -357332,7 +357071,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1368 + SolutionIndex: 1367 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -357593,7 +357332,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1369 + SolutionIndex: 1368 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -357854,7 +357593,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1370 + SolutionIndex: 1369 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -358115,7 +357854,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1371 + SolutionIndex: 1370 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -358376,7 +358115,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1372 + SolutionIndex: 1371 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -358637,7 +358376,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1373 + SolutionIndex: 1372 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -358898,7 +358637,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1374 + SolutionIndex: 1373 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -359159,7 +358898,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1375 + SolutionIndex: 1374 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -359420,7 +359159,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1376 + SolutionIndex: 1375 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -359681,7 +359420,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1377 + SolutionIndex: 1376 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -359942,7 +359681,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1378 + SolutionIndex: 1377 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -360203,7 +359942,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1379 + SolutionIndex: 1378 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -360464,7 +360203,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1380 + SolutionIndex: 1379 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -360725,7 +360464,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1381 + SolutionIndex: 1380 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -360986,7 +360725,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1382 + SolutionIndex: 1381 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -361247,7 +360986,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1383 + SolutionIndex: 1382 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_4_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -361508,7 +361247,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1384 + SolutionIndex: 1383 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -361769,7 +361508,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1385 + SolutionIndex: 1384 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -362030,7 +361769,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1386 + SolutionIndex: 1385 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -362291,7 +362030,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1387 + SolutionIndex: 1386 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -362552,7 +362291,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1388 + SolutionIndex: 1387 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -362813,7 +362552,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1389 + SolutionIndex: 1388 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -363074,7 +362813,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1390 + SolutionIndex: 1389 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -363335,7 +363074,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1391 + SolutionIndex: 1390 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -363596,7 +363335,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1392 + SolutionIndex: 1391 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -363857,7 +363596,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1393 + SolutionIndex: 1392 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_9_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -364118,7 +363857,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1394 + SolutionIndex: 1393 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -364379,7 +364118,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1395 + SolutionIndex: 1394 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -364640,7 +364379,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1396 + SolutionIndex: 1395 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -364901,7 +364640,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1397 + SolutionIndex: 1396 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -365162,7 +364901,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1398 + SolutionIndex: 1397 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -365423,7 +365162,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1399 + SolutionIndex: 1398 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -365684,7 +365423,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1400 + SolutionIndex: 1399 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -365945,7 +365684,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1401 + SolutionIndex: 1400 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -366206,7 +365945,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1402 + SolutionIndex: 1401 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -366467,7 +366206,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1403 + SolutionIndex: 1402 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_1_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -366728,7 +366467,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1404 + SolutionIndex: 1403 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -366989,7 +366728,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1405 + SolutionIndex: 1404 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -367250,7 +366989,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1406 + SolutionIndex: 1405 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_1_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA0_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -367511,7 +367250,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1407 + SolutionIndex: 1406 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -367772,7 +367511,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1408 + SolutionIndex: 1407 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WSGRA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -368033,7 +367772,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1409 + SolutionIndex: 1408 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WSGRA0_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -368294,7 +368033,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1410 + SolutionIndex: 1409 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WSGRA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -368555,7 +368294,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1411 + SolutionIndex: 1410 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WSGRA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -368816,7 +368555,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1412 + SolutionIndex: 1411 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -369077,7 +368816,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1413 + SolutionIndex: 1412 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x64_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -369338,7 +369077,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1414 + SolutionIndex: 1413 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU13_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -369599,7 +369338,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1415 + SolutionIndex: 1414 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -369860,7 +369599,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1416 + SolutionIndex: 1415 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -370121,7 +369860,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1417 + SolutionIndex: 1416 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -370382,7 +370121,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1418 + SolutionIndex: 1417 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -370643,7 +370382,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1419 + SolutionIndex: 1418 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -370904,7 +370643,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1420 + SolutionIndex: 1419 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -371165,7 +370904,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1421 + SolutionIndex: 1420 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -371426,7 +371165,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1422 + SolutionIndex: 1421 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -371687,7 +371426,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1423 + SolutionIndex: 1422 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -371948,7 +371687,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1424 + SolutionIndex: 1423 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU7_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -372209,7 +371948,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1425 + SolutionIndex: 1424 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x48x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -372470,7 +372209,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1426 + SolutionIndex: 1425 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_6_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -372731,7 +372470,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1427 + SolutionIndex: 1426 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -372992,7 +372731,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1428 + SolutionIndex: 1427 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -373253,7 +372992,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1429 + SolutionIndex: 1428 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -373514,7 +373253,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1430 + SolutionIndex: 1429 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -373775,7 +373514,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1431 + SolutionIndex: 1430 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -374036,7 +373775,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1432 + SolutionIndex: 1431 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU14_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -374297,7 +374036,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1433 + SolutionIndex: 1432 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -374558,7 +374297,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1434 + SolutionIndex: 1433 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -374819,7 +374558,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1435 + SolutionIndex: 1434 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -375080,7 +374819,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1436 + SolutionIndex: 1435 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_CLR1_GRVWB8_GSU9_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -375341,7 +375080,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1437 + SolutionIndex: 1436 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU9_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -375602,7 +375341,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1438 + SolutionIndex: 1437 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -375863,7 +375602,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1439 + SolutionIndex: 1438 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU18_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -376124,7 +375863,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1440 + SolutionIndex: 1439 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU24_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -376385,7 +376124,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1441 + SolutionIndex: 1440 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -376646,7 +376385,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1442 + SolutionIndex: 1441 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU18_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_6_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -376907,7 +376646,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1443 + SolutionIndex: 1442 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU18_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -377168,7 +376907,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1444 + SolutionIndex: 1443 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -377429,7 +377168,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1445 + SolutionIndex: 1444 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU18_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -377690,7 +377429,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1446 + SolutionIndex: 1445 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU18_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -377951,7 +377690,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1447 + SolutionIndex: 1446 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -378212,7 +377951,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1448 + SolutionIndex: 1447 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU18_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -378473,7 +378212,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1449 + SolutionIndex: 1448 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU18_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -378734,7 +378473,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1450 + SolutionIndex: 1449 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -378995,7 +378734,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1451 + SolutionIndex: 1450 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -379256,7 +378995,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1452 + SolutionIndex: 1451 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -379517,7 +379256,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1453 + SolutionIndex: 1452 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_CLR1_GRVWB8_GSU12_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -379778,7 +379517,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1454 + SolutionIndex: 1453 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_CLR1_GRVWB2_GSU12_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_8_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -380039,7 +379778,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1455 + SolutionIndex: 1454 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x112x64_MI16x16x1_SN_CLR1_GRVWB2_GSU10_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -380300,7 +380039,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1456 + SolutionIndex: 1455 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -380561,7 +380300,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1457 + SolutionIndex: 1456 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -380822,7 +380561,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1458 + SolutionIndex: 1457 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_CLR1_GRVWB2_GSU10_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -381083,7 +380822,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1459 + SolutionIndex: 1458 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -381344,7 +381083,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1460 + SolutionIndex: 1459 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x112x32_MI16x16x1_SN_CLR1_GRVWB2_GSU10_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_7_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -381605,7 +381344,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1461 + SolutionIndex: 1460 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -381866,7 +381605,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1462 + SolutionIndex: 1461 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -382127,7 +381866,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1463 + SolutionIndex: 1462 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -382388,7 +382127,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1464 + SolutionIndex: 1463 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -382649,7 +382388,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1465 + SolutionIndex: 1464 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -382910,7 +382649,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1466 + SolutionIndex: 1465 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -383171,7 +382910,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1467 + SolutionIndex: 1466 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -383432,7 +383171,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1468 + SolutionIndex: 1467 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -383693,7 +383432,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1469 + SolutionIndex: 1468 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -383954,7 +383693,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1470 + SolutionIndex: 1469 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -384215,7 +383954,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1471 + SolutionIndex: 1470 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -384476,7 +384215,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1472 + SolutionIndex: 1471 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -384737,7 +384476,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1473 + SolutionIndex: 1472 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -384998,7 +384737,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1474 + SolutionIndex: 1473 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -385259,7 +384998,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1475 + SolutionIndex: 1474 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -385520,7 +385259,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1476 + SolutionIndex: 1475 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -385781,7 +385520,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1477 + SolutionIndex: 1476 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -386042,7 +385781,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1478 + SolutionIndex: 1477 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA0_LPB16_LRVW8_MIAV0_MIWT12_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -386303,7 +386042,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1479 + SolutionIndex: 1478 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -386564,7 +386303,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1480 + SolutionIndex: 1479 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -386825,7 +386564,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1481 + SolutionIndex: 1480 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -387086,7 +386825,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1482 + SolutionIndex: 1481 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -387347,7 +387086,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1483 + SolutionIndex: 1482 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -387608,7 +387347,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1484 + SolutionIndex: 1483 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -387869,7 +387608,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1485 + SolutionIndex: 1484 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 @@ -388130,7 +387869,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1486 + SolutionIndex: 1485 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -388391,7 +388130,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1487 + SolutionIndex: 1486 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -388652,7 +388391,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1488 + SolutionIndex: 1487 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -388913,7 +388652,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1489 + SolutionIndex: 1488 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -389174,7 +388913,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1490 + SolutionIndex: 1489 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -389435,7 +389174,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1491 + SolutionIndex: 1490 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -389696,7 +389435,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1492 + SolutionIndex: 1491 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -389957,7 +389696,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1493 + SolutionIndex: 1492 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -390218,7 +389957,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1494 + SolutionIndex: 1493 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -390479,7 +390218,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1495 + SolutionIndex: 1494 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -390740,7 +390479,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1496 + SolutionIndex: 1495 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -391001,7 +390740,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1497 + SolutionIndex: 1496 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT6_2_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -391262,7 +391001,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1498 + SolutionIndex: 1497 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -391523,7 +391262,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1499 + SolutionIndex: 1498 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -391784,7 +391523,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1500 + SolutionIndex: 1499 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU7_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -392045,7 +391784,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1501 + SolutionIndex: 1500 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -392306,7 +392045,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1502 + SolutionIndex: 1501 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -392567,7 +392306,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1503 + SolutionIndex: 1502 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x64_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -392828,7 +392567,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1504 + SolutionIndex: 1503 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -393089,7 +392828,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1505 + SolutionIndex: 1504 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -393350,7 +393089,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1506 + SolutionIndex: 1505 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU13_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -393611,7 +393350,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1507 + SolutionIndex: 1506 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -393872,7 +393611,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1508 + SolutionIndex: 1507 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -394133,7 +393872,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1509 + SolutionIndex: 1508 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -394394,7 +394133,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1510 + SolutionIndex: 1509 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -394655,7 +394394,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1511 + SolutionIndex: 1510 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -394916,7 +394655,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1512 + SolutionIndex: 1511 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -395177,7 +394916,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1513 + SolutionIndex: 1512 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -395438,7 +395177,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1514 + SolutionIndex: 1513 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -395699,7 +395438,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1515 + SolutionIndex: 1514 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -395960,7 +395699,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1516 + SolutionIndex: 1515 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -396221,7 +395960,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1517 + SolutionIndex: 1516 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -396482,7 +396221,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1518 + SolutionIndex: 1517 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU15_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -396743,7 +396482,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1519 + SolutionIndex: 1518 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU7_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -397004,7 +396743,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1520 + SolutionIndex: 1519 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -397265,7 +397004,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1521 + SolutionIndex: 1520 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -397526,7 +397265,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1522 + SolutionIndex: 1521 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -397787,7 +397526,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1523 + SolutionIndex: 1522 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -398048,7 +397787,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1524 + SolutionIndex: 1523 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -398309,7 +398048,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1525 + SolutionIndex: 1524 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -398570,7 +398309,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1526 + SolutionIndex: 1525 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -398831,7 +398570,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1527 + SolutionIndex: 1526 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -399092,7 +398831,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1528 + SolutionIndex: 1527 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -399353,7 +399092,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1529 + SolutionIndex: 1528 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -399614,7 +399353,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1530 + SolutionIndex: 1529 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU18_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -399875,7 +399614,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1531 + SolutionIndex: 1530 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_1_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -400136,7 +399875,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1532 + SolutionIndex: 1531 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU18_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -400397,7 +400136,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1533 + SolutionIndex: 1532 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU18_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -400658,7 +400397,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1534 + SolutionIndex: 1533 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU9_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -400919,7 +400658,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1535 + SolutionIndex: 1534 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU18_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -401180,7 +400919,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1536 + SolutionIndex: 1535 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU14_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -401441,7 +401180,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1537 + SolutionIndex: 1536 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU7_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -401702,7 +401441,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1538 + SolutionIndex: 1537 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -401963,7 +401702,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1539 + SolutionIndex: 1538 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -402224,7 +401963,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1540 + SolutionIndex: 1539 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -402485,7 +402224,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1541 + SolutionIndex: 1540 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -402746,7 +402485,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1542 + SolutionIndex: 1541 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -403007,7 +402746,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1543 + SolutionIndex: 1542 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -403268,7 +403007,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1544 + SolutionIndex: 1543 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -403529,7 +403268,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1545 + SolutionIndex: 1544 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_CLR1_GRVWB8_GSU9_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -403790,7 +403529,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1546 + SolutionIndex: 1545 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -404051,7 +403790,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1547 + SolutionIndex: 1546 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU9_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -404312,7 +404051,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1548 + SolutionIndex: 1547 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -404573,7 +404312,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1549 + SolutionIndex: 1548 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU9_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -404834,7 +404573,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1550 + SolutionIndex: 1549 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_CLR1_GRVWB2_GSU9_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_8_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -405095,7 +404834,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1551 + SolutionIndex: 1550 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_CLR1_GRVWB2_GSU10_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -405356,7 +405095,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1552 + SolutionIndex: 1551 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI32x32x1_SN_CLR1_GRVWB2_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_5_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -405617,7 +405356,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1553 + SolutionIndex: 1552 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_CLR1_GRVWB8_GSU1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -405878,7 +405617,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1554 + SolutionIndex: 1553 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -406139,7 +405878,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1555 + SolutionIndex: 1554 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_6_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -406400,7 +406139,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1556 + SolutionIndex: 1555 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -406661,7 +406400,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1557 + SolutionIndex: 1556 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -406922,7 +406661,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1558 + SolutionIndex: 1557 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI32x32x1_SN_CLR1_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -407183,7 +406922,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1559 + SolutionIndex: 1558 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -407444,7 +407183,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1560 + SolutionIndex: 1559 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -407705,7 +407444,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1561 + SolutionIndex: 1560 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_GSU9_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT4_4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -407966,7 +407705,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1562 + SolutionIndex: 1561 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -408227,7 +407966,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1563 + SolutionIndex: 1562 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_8_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -408488,7 +408227,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1564 + SolutionIndex: 1563 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -408749,7 +408488,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1565 + SolutionIndex: 1564 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -409010,7 +408749,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1566 + SolutionIndex: 1565 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -409271,7 +409010,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1567 + SolutionIndex: 1566 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -409338,7 +409077,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -409350,11 +409089,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -409365,44 +409104,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 31616 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 53504 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 53504 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -409411,14 +409150,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [5, 10] + MIWaveTileA: 5 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -409439,14 +409178,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 200 + NumLoadsA: 5 + NumLoadsB: 10 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -409532,8 +409271,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1568 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1567 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -409541,17 +409280,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 10 + ThreadTileA: 20 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -409562,7 +409301,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -409572,11 +409311,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 5] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -409599,7 +409338,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -409611,8 +409350,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -409626,68 +409365,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NLCA5_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 53504 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 53504 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 10] - MIWaveTileA: 5 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -409700,14 +409439,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 200 - NumLoadsA: 5 - NumLoadsB: 10 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -409793,8 +409532,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1569 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1568 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -409803,16 +409542,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 10 - ThreadTileA: 20 - ThreadTileB: 10 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -409833,11 +409572,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -409873,10 +409612,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -409887,32 +409626,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 24576 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -409933,274 +409672,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 128 MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 - MagicDivAlg: 2 - MatrixInstB: 1 - MatrixInstBM: 1 - MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] - MaxOccupancy: 40 - NoLdsWriteCode: false - NoReject: false - NoTailLoop: false - NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 - NonTemporalE: 0 - NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 - NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 - NumThreads: 256 - OptNoLoadLoop: 1 - PackedC0IdxChars: [I] - PackedC0IndicesX: [0] - PackedC1IdxChars: [J] - PackedC1IndicesX: [1] - PrefetchGlobalRead: 2 - PrefetchLocalRead: 1 - PreloadKernArgs: true - ProblemType: - Activation: true - ActivationComputeDataType: 0 - ActivationNoGuard: false - ActivationType: hipblaslt_all - AllowNoFreeDims: false - AssignedDerivedParameters: true - Batched: true - BetaOnlyUseBias: false - BiasDataTypeList: [0, 4] - BiasSrc: D - ComplexConjugateA: false - ComplexConjugateB: false - ComputeDataType: 0 - DataType: 4 - DataTypeA: 4 - DataTypeB: 4 - DataTypeE: 4 - DestDataType: 4 - F32XdlMathOp: 0 - Gradient: false - GroupedGemm: false - HighPrecisionAccumulate: true - Index0: 0 - Index01A: 0 - Index01B: 1 - Index1: 1 - IndexAssignmentsA: [0, 3, 2] - IndexAssignmentsB: [3, 1, 2] - IndexAssignmentsLD: [4, 5, 6, 7] - IndexAssignmentsMetadata: [3, 0, 2] - IndexUnroll: 3 - IndexUnrollA: 1 - IndexUnrollB: 0 - IndexUnrollM: 0 - IndicesBatch: [2] - IndicesFree: [0, 1] - IndicesSummation: [3] - MirrorDimsA: [] - MirrorDimsB: [] - MirrorDimsMetadata: [] - NumIndicesBatch: 1 - NumIndicesC: 3 - NumIndicesFree: 2 - NumIndicesLD: 4 - NumIndicesSummation: 1 - OperationType: GEMM - SetConstStrideA: [] - SetConstStrideB: [] - SetConstStrideBias: [] - SilentHighPrecisionAccumulate: false - Sparse: 0 - StochasticRounding: false - StridedBatched: true - SupportUserArgs: true - TLUA: true - TLUB: false - Tensor0: 0 - Tensor1: 1 - TileA: 0 - TileAwareSelection: false - TileB: 1 - TotalIndices: 4 - TransposeA: false - TransposeB: false - UseBeta: true - UseBias: 1 - UseE: false - UseInitialStridesAB: false - UseInitialStridesCD: false - UseScaleAB: '' - UseScaleAlphaVec: 1 - UseScaleCD: false - ScheduleGlobalRead: 1 - ScheduleIterAlg: 3 - ScheduleLocalWrite: 1 - SolutionIndex: 1570 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 - SourceSwap: 1 - StaggerU: 0 - StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 - StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 - SuppressNoLoadLoop: false - ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 - TransposeLDS: 1 - TransposeLDSMetadata: true - UnrollMajorLDSA: false - UnrollMajorLDSB: true - UnrollMajorLDSMetadata: true - Use64bShadowLimit: 1 - UseInstOffsetForGRO: 0 - UseSgprForGRO: -1 - Valid: true - VectorStore: -1 - VectorWidthA: 1 - VectorWidthB: 1 - WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 - WaveSeparateGlobalReadMetadata: 0 - WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 - WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false - _VectorStore: 1 - _WorkspaceSizePerElemBias: 0 - _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 - ActivationAlt: false - ActivationFuncCall: true - ActivationFused: true - AssertFree0ElementMultiple: 1 - AssertFree1ElementMultiple: 1 - AssertSummationElementMultiple: 1 - AssignedDerivedParameters: true - AssignedProblemIndependentDerivedParameters: true - BufferLoad: true - BufferStore: true - CUCount: null - ClusterLocalRead: 1 - CodeObjectVersion: default - ConvertAfterDS: false - CustomKernelName: '' - DepthU: 64 - DirectToLds: false - DirectToLdsA: false - DirectToLdsB: false - DirectToVgprSparseMetadata: false - EdgeType: ShiftPtr - EnableF32XdlMathOp: false - EnableMatrixInstruction: true - ExpandPointerSwap: 0 - ForceDisableShadowInit: false - GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 - GroupLoadStore: false - GuaranteeNoPartialA: false - GuaranteeNoPartialB: true - GuaranteeNoPartialMetadata: true - ISA: [9, 4, 2] - InnerUnroll: 1 - InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} - KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 - LdsBlockSizePerPadMetadata: 0 - LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 - LdsNumElementsAlignedMetadata: 0 - LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 - LdsOffsetBias: 0 - LdsOffsetBiasGSU: 0 - LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 - LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 - LocalWritePerMfma: -1 - LocalWriteUseSgprA: false - LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 - MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] - MIInputPerThread: 4 - MIInputPerThreadA: 4 - MIInputPerThreadB: 4 - MIInputPerThreadMetadata: 4 - MIOutputVectorWidth: 4 - MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 - MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 + MacroTileA: 128 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -410315,7 +409793,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1571 + SolutionIndex: 1569 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -410576,7 +410054,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1572 + SolutionIndex: 1570 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -410837,7 +410315,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1573 + SolutionIndex: 1571 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -411098,7 +410576,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1574 + SolutionIndex: 1572 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -411359,7 +410837,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1575 + SolutionIndex: 1573 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -411620,7 +411098,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1576 + SolutionIndex: 1574 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -411881,7 +411359,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1577 + SolutionIndex: 1575 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -412142,7 +411620,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1578 + SolutionIndex: 1576 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT8_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -412403,7 +411881,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1579 + SolutionIndex: 1577 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -412664,7 +412142,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1580 + SolutionIndex: 1578 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -412925,7 +412403,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1581 + SolutionIndex: 1579 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -413186,7 +412664,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1582 + SolutionIndex: 1580 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -413447,7 +412925,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1583 + SolutionIndex: 1581 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -413708,7 +413186,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1584 + SolutionIndex: 1582 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -413969,7 +413447,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1585 + SolutionIndex: 1583 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -414230,7 +413708,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1586 + SolutionIndex: 1584 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -414491,7 +413969,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1587 + SolutionIndex: 1585 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -414752,7 +414230,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1588 + SolutionIndex: 1586 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -415013,7 +414491,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1589 + SolutionIndex: 1587 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -415274,7 +414752,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1590 + SolutionIndex: 1588 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -415535,7 +415013,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1591 + SolutionIndex: 1589 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -415796,7 +415274,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1592 + SolutionIndex: 1590 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -416057,7 +415535,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1593 + SolutionIndex: 1591 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -416318,7 +415796,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1594 + SolutionIndex: 1592 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -416579,7 +416057,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1595 + SolutionIndex: 1593 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -416840,7 +416318,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1596 + SolutionIndex: 1594 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -417101,7 +416579,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1597 + SolutionIndex: 1595 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -417362,7 +416840,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1598 + SolutionIndex: 1596 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -417623,7 +417101,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1599 + SolutionIndex: 1597 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -417884,7 +417362,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1600 + SolutionIndex: 1598 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -418145,7 +417623,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1601 + SolutionIndex: 1599 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -418406,7 +417884,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1602 + SolutionIndex: 1600 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -418667,7 +418145,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1603 + SolutionIndex: 1601 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -418928,7 +418406,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1604 + SolutionIndex: 1602 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -419189,7 +418667,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1605 + SolutionIndex: 1603 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -419450,7 +418928,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1606 + SolutionIndex: 1604 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -419711,7 +419189,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1607 + SolutionIndex: 1605 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -419972,7 +419450,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1608 + SolutionIndex: 1606 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -420233,7 +419711,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1609 + SolutionIndex: 1607 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -420494,7 +419972,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1610 + SolutionIndex: 1608 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -420755,7 +420233,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1611 + SolutionIndex: 1609 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -421016,7 +420494,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1612 + SolutionIndex: 1610 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -421277,7 +420755,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1613 + SolutionIndex: 1611 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -421538,7 +421016,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1614 + SolutionIndex: 1612 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -421799,7 +421277,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1615 + SolutionIndex: 1613 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -422060,7 +421538,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1616 + SolutionIndex: 1614 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -422321,7 +421799,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1617 + SolutionIndex: 1615 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x64_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -422582,7 +422060,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1618 + SolutionIndex: 1616 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -422843,7 +422321,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1619 + SolutionIndex: 1617 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_GSU8_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -423104,7 +422582,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1620 + SolutionIndex: 1618 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -423365,7 +422843,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1621 + SolutionIndex: 1619 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -423626,7 +423104,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1622 + SolutionIndex: 1620 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -423887,7 +423365,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1623 + SolutionIndex: 1621 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -424148,7 +423626,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1624 + SolutionIndex: 1622 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -424409,7 +423887,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1625 + SolutionIndex: 1623 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -424670,7 +424148,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1626 + SolutionIndex: 1624 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -424931,7 +424409,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1627 + SolutionIndex: 1625 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU11_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -425192,7 +424670,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1628 + SolutionIndex: 1626 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -425453,7 +424931,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1629 + SolutionIndex: 1627 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU11_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -425714,7 +425192,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1630 + SolutionIndex: 1628 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_GSU13_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -425975,7 +425453,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1631 + SolutionIndex: 1629 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -426236,7 +425714,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1632 + SolutionIndex: 1630 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -426497,7 +425975,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1633 + SolutionIndex: 1631 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU11_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -426758,7 +426236,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1634 + SolutionIndex: 1632 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -427019,7 +426497,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1635 + SolutionIndex: 1633 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU11_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -427280,7 +426758,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1636 + SolutionIndex: 1634 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -427541,7 +427019,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1637 + SolutionIndex: 1635 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -427802,7 +427280,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1638 + SolutionIndex: 1636 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU11_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -428063,7 +427541,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1639 + SolutionIndex: 1637 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -428324,7 +427802,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1640 + SolutionIndex: 1638 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_CLR1_GRVWB2_GSU5_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -428585,7 +428063,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1641 + SolutionIndex: 1639 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_CLR1_GRVWB8_GSU10_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -428846,7 +428324,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1642 + SolutionIndex: 1640 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -429107,7 +428585,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1643 + SolutionIndex: 1641 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -429368,7 +428846,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1644 + SolutionIndex: 1642 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_CLR1_GRVWB2_GSU8_LBSPPA2560_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_6_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -429629,7 +429107,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1645 + SolutionIndex: 1643 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -429890,7 +429368,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1646 + SolutionIndex: 1644 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_CLR1_GRVWB2_GSU5_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -430151,7 +429629,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1647 + SolutionIndex: 1645 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -430412,7 +429890,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1648 + SolutionIndex: 1646 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -430673,7 +430151,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1649 + SolutionIndex: 1647 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -430934,7 +430412,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1650 + SolutionIndex: 1648 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -431195,7 +430673,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1651 + SolutionIndex: 1649 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -431456,7 +430934,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1652 + SolutionIndex: 1650 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -431539,7 +431017,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -431550,7 +431028,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -431563,20 +431041,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -431587,7 +431065,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -431595,15 +431073,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 11] + MIWaveTileA: 2 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 160 + MacroTile1: 176 MacroTileA: 128 - MacroTileB: 160 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -431624,14 +431102,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 88 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 4 - NumLoadsB: 20 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -431717,8 +431195,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1653 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1651 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -431726,17 +431204,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 11 + ThreadTileA: 8 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -431747,13 +431225,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -431796,8 +431274,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -431811,68 +431289,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 8 + LSPB: 32 LVCA: 16 - LVCB: 32 + LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 11] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 11 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 176 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 176 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -431885,14 +431363,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 88 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 22 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -431978,268 +431456,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1654 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 - SourceSwap: 1 - StaggerU: 0 - StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 - StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 - SuppressNoLoadLoop: false - ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 11 - ThreadTileA: 8 - ThreadTileB: 11 - TransposeLDS: 1 - TransposeLDSMetadata: true - UnrollMajorLDSA: false - UnrollMajorLDSB: true - UnrollMajorLDSMetadata: true - Use64bShadowLimit: 1 - UseInstOffsetForGRO: 0 - UseSgprForGRO: -1 - Valid: true - VectorStore: -1 - VectorWidthA: 2 - VectorWidthB: 1 - WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 - WaveSeparateGlobalReadMetadata: 0 - WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 - WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false - _VectorStore: 1 - _WorkspaceSizePerElemBias: 0 - _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 - ActivationAlt: false - ActivationFuncCall: true - ActivationFused: true - AssertFree0ElementMultiple: 1 - AssertFree1ElementMultiple: 1 - AssertSummationElementMultiple: 1 - AssignedDerivedParameters: true - AssignedProblemIndependentDerivedParameters: true - BufferLoad: true - BufferStore: true - CUCount: null - ClusterLocalRead: 1 - CodeObjectVersion: default - ConvertAfterDS: false - CustomKernelName: '' - DepthU: 64 - DirectToLds: false - DirectToLdsA: false - DirectToLdsB: false - DirectToVgprSparseMetadata: false - EdgeType: ShiftPtr - EnableF32XdlMathOp: false - EnableMatrixInstruction: true - ExpandPointerSwap: 0 - ForceDisableShadowInit: false - GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 - GroupLoadStore: false - GuaranteeNoPartialA: false - GuaranteeNoPartialB: true - GuaranteeNoPartialMetadata: true - ISA: [9, 4, 2] - InnerUnroll: 1 - InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} - KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 - LdsBlockSizePerPadMetadata: 0 - LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 - LdsNumElementsAlignedMetadata: 0 - LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 - LdsOffsetBias: 0 - LdsOffsetBiasGSU: 0 - LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 - LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 - LocalWritePerMfma: -1 - LocalWriteUseSgprA: false - LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 - MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] - MIInputPerThread: 4 - MIInputPerThreadA: 4 - MIInputPerThreadB: 4 - MIInputPerThreadMetadata: 4 - MIOutputVectorWidth: 4 - MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 - MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 - MagicDivAlg: 2 - MatrixInstB: 1 - MatrixInstBM: 1 - MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] - MaxOccupancy: 40 - NoLdsWriteCode: false - NoReject: false - NoTailLoop: false - NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 - NonTemporalE: 0 - NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 - NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 256 - OptNoLoadLoop: 1 - PackedC0IdxChars: [I] - PackedC0IndicesX: [0] - PackedC1IdxChars: [J] - PackedC1IndicesX: [1] - PrefetchGlobalRead: 2 - PrefetchLocalRead: 1 - PreloadKernArgs: true - ProblemType: - Activation: true - ActivationComputeDataType: 0 - ActivationNoGuard: false - ActivationType: hipblaslt_all - AllowNoFreeDims: false - AssignedDerivedParameters: true - Batched: true - BetaOnlyUseBias: false - BiasDataTypeList: [0, 4] - BiasSrc: D - ComplexConjugateA: false - ComplexConjugateB: false - ComputeDataType: 0 - DataType: 4 - DataTypeA: 4 - DataTypeB: 4 - DataTypeE: 4 - DestDataType: 4 - F32XdlMathOp: 0 - Gradient: false - GroupedGemm: false - HighPrecisionAccumulate: true - Index0: 0 - Index01A: 0 - Index01B: 1 - Index1: 1 - IndexAssignmentsA: [0, 3, 2] - IndexAssignmentsB: [3, 1, 2] - IndexAssignmentsLD: [4, 5, 6, 7] - IndexAssignmentsMetadata: [3, 0, 2] - IndexUnroll: 3 - IndexUnrollA: 1 - IndexUnrollB: 0 - IndexUnrollM: 0 - IndicesBatch: [2] - IndicesFree: [0, 1] - IndicesSummation: [3] - MirrorDimsA: [] - MirrorDimsB: [] - MirrorDimsMetadata: [] - NumIndicesBatch: 1 - NumIndicesC: 3 - NumIndicesFree: 2 - NumIndicesLD: 4 - NumIndicesSummation: 1 - OperationType: GEMM - SetConstStrideA: [] - SetConstStrideB: [] - SetConstStrideBias: [] - SilentHighPrecisionAccumulate: false - Sparse: 0 - StochasticRounding: false - StridedBatched: true - SupportUserArgs: true - TLUA: true - TLUB: false - Tensor0: 0 - Tensor1: 1 - TileA: 0 - TileAwareSelection: false - TileB: 1 - TotalIndices: 4 - TransposeA: false - TransposeB: false - UseBeta: true - UseBias: 1 - UseE: false - UseInitialStridesAB: false - UseInitialStridesCD: false - UseScaleAB: '' - UseScaleAlphaVec: 1 - UseScaleCD: false - ScheduleGlobalRead: 1 - ScheduleIterAlg: 3 - ScheduleLocalWrite: 1 - SolutionIndex: 1655 + SolutionIndex: 1652 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -432500,7 +431717,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1656 + SolutionIndex: 1653 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -432761,7 +431978,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1657 + SolutionIndex: 1654 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB8_LRVW4_MIAV0_MIWT8_3_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -433022,7 +432239,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1658 + SolutionIndex: 1655 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -433283,7 +432500,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1659 + SolutionIndex: 1656 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -433544,7 +432761,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1660 + SolutionIndex: 1657 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -433805,7 +433022,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1661 + SolutionIndex: 1658 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -434066,7 +433283,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1662 + SolutionIndex: 1659 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT12_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -434327,7 +433544,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1663 + SolutionIndex: 1660 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_6_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -434588,7 +433805,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1664 + SolutionIndex: 1661 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -434849,7 +434066,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1665 + SolutionIndex: 1662 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -435110,7 +434327,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1666 + SolutionIndex: 1663 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -435371,7 +434588,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1667 + SolutionIndex: 1664 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_7_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -435632,7 +434849,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1668 + SolutionIndex: 1665 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -435893,7 +435110,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1669 + SolutionIndex: 1666 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -436154,7 +435371,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1670 + SolutionIndex: 1667 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -436415,7 +435632,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1671 + SolutionIndex: 1668 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -436676,7 +435893,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1672 + SolutionIndex: 1669 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -436937,7 +436154,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1673 + SolutionIndex: 1670 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -437198,7 +436415,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1674 + SolutionIndex: 1671 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -437459,7 +436676,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1675 + SolutionIndex: 1672 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -437720,7 +436937,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1676 + SolutionIndex: 1673 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -437981,7 +437198,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1677 + SolutionIndex: 1674 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -438242,7 +437459,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1678 + SolutionIndex: 1675 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -438503,7 +437720,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1679 + SolutionIndex: 1676 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x64_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -438764,7 +437981,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1680 + SolutionIndex: 1677 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -439025,7 +438242,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1681 + SolutionIndex: 1678 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -439286,7 +438503,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1682 + SolutionIndex: 1679 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -439547,7 +438764,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1683 + SolutionIndex: 1680 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -439808,7 +439025,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1684 + SolutionIndex: 1681 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -440069,7 +439286,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1685 + SolutionIndex: 1682 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -440330,7 +439547,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1686 + SolutionIndex: 1683 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -440591,7 +439808,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1687 + SolutionIndex: 1684 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x80x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_5_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -440852,7 +440069,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1688 + SolutionIndex: 1685 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -441113,7 +440330,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1689 + SolutionIndex: 1686 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -441374,7 +440591,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1690 + SolutionIndex: 1687 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -441635,7 +440852,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1691 + SolutionIndex: 1688 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -441896,7 +441113,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1692 + SolutionIndex: 1689 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 @@ -442157,7 +441374,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1693 + SolutionIndex: 1690 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -442418,7 +441635,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1694 + SolutionIndex: 1691 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -442679,7 +441896,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 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Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_CLR1_GRVWB8_GSU2_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -444245,7 +443462,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1701 + SolutionIndex: 1698 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -444506,7 +443723,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1702 + SolutionIndex: 1699 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -444767,7 +443984,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1703 + SolutionIndex: 1700 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -445028,7 +444245,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1704 + SolutionIndex: 1701 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -445289,7 +444506,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1705 + SolutionIndex: 1702 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -445550,7 +444767,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1706 + SolutionIndex: 1703 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_GSU10_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -445811,7 +445028,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1707 + SolutionIndex: 1704 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU7_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -446072,7 +445289,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1708 + SolutionIndex: 1705 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -446333,7 +445550,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1709 + SolutionIndex: 1706 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -446594,7 +445811,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1710 + SolutionIndex: 1707 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU9_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -446855,7 +446072,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1711 + SolutionIndex: 1708 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -447116,7 +446333,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1712 + SolutionIndex: 1709 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU9_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -447377,7 +446594,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1713 + SolutionIndex: 1710 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU9_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -447638,7 +446855,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1714 + SolutionIndex: 1711 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_CLR1_GRVWB8_GSU9_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -447899,7 +447116,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1715 + SolutionIndex: 1712 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -448160,7 +447377,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1716 + SolutionIndex: 1713 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -448421,7 +447638,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1717 + SolutionIndex: 1714 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -448682,7 +447899,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1718 + SolutionIndex: 1715 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -448943,7 +448160,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1719 + SolutionIndex: 1716 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NLCA1_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -449204,7 +448421,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1720 + SolutionIndex: 1717 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU7_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -449465,7 +448682,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1721 + SolutionIndex: 1718 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -449726,7 +448943,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1722 + SolutionIndex: 1719 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -449987,7 +449204,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1723 + SolutionIndex: 1720 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_CLR1_GRVWB8_GSU8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -450248,7 +449465,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1724 + SolutionIndex: 1721 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -450509,7 +449726,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1725 + SolutionIndex: 1722 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_CLR1_GRVWB2_GSU2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -450770,7 +449987,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1726 + SolutionIndex: 1723 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_CLR1_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -451031,7 +450248,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1727 + SolutionIndex: 1724 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -451292,7 +450509,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1728 + SolutionIndex: 1725 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU7_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_13_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -451553,7 +450770,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1729 + SolutionIndex: 1726 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -451814,7 +451031,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1730 + SolutionIndex: 1727 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_14_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -452075,7 +451292,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1731 + SolutionIndex: 1728 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_GSU6_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_11_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -452336,7 +451553,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1732 + SolutionIndex: 1729 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -452597,7 +451814,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1733 + SolutionIndex: 1730 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA3584_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT7_8_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -452858,7 +452075,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1734 + SolutionIndex: 1731 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -453119,7 +452336,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1735 + SolutionIndex: 1732 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -453380,7 +452597,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1736 + SolutionIndex: 1733 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_9_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -453641,7 +452858,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1737 + SolutionIndex: 1734 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x32_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_9_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -453902,7 +453119,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1738 + SolutionIndex: 1735 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -454163,7 +453380,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1739 + SolutionIndex: 1736 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -454424,7 +453641,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1740 + SolutionIndex: 1737 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -454685,7 +453902,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1741 + SolutionIndex: 1738 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -454946,7 +454163,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1742 + SolutionIndex: 1739 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -455207,7 +454424,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1743 + SolutionIndex: 1740 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -455468,7 +454685,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1744 + SolutionIndex: 1741 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -455729,7 +454946,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1745 + SolutionIndex: 1742 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -455990,7 +455207,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1746 + SolutionIndex: 1743 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -456251,7 +455468,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1747 + SolutionIndex: 1744 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -456512,7 +455729,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1748 + SolutionIndex: 1745 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -456773,7 +455990,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1749 + SolutionIndex: 1746 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -457034,7 +456251,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1750 + SolutionIndex: 1747 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -457295,7 +456512,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1751 + SolutionIndex: 1748 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_15_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -457556,7 +456773,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1752 + SolutionIndex: 1749 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -457817,7 +457034,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1753 + SolutionIndex: 1750 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -458078,7 +457295,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1754 + SolutionIndex: 1751 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -458339,7 +457556,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1755 + SolutionIndex: 1752 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -458600,7 +457817,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1756 + SolutionIndex: 1753 SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB2_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -458680,7 +457897,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -458694,7 +457911,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -458707,9 +457924,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -458718,7 +457935,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 @@ -458740,14 +457957,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 320 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 320 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -458768,14 +457985,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -458861,8 +458078,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1757 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1754 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -458878,9 +458095,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -458898,10 +458115,10 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -458928,7 +458145,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -458941,10 +458158,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -458955,42 +458172,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT4_8_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -459001,14 +458218,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -459029,11 +458246,11 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 4 @@ -459122,8 +458339,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1758 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1755 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT4_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -459131,17 +458348,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -459152,21 +458369,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -459202,10 +458419,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -459216,36 +458433,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_7_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 - LVPA: 4 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -459261,15 +458478,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 112 + MacroTileA: 256 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -459290,14 +458507,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 32 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 8 + NumLoadsB: 14 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -459383,8 +458600,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1759 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1756 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -459392,17 +458609,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -459413,17 +458630,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -459450,7 +458667,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -459462,11 +458679,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -459477,68 +458694,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_7_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 + LdsNumBytes: 24064 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 24064 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 112 + MacroTileA: 256 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -459546,19 +458763,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -459644,8 +458861,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1760 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 1757 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -459653,17 +458870,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -459674,21 +458891,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -459711,7 +458928,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -459723,7 +458940,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -459738,42 +458955,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT4_8_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 61056 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -459783,15 +459000,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 8] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -459812,14 +459029,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -459905,8 +459122,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1761 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT4_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1758 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -459915,16 +459132,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 8 + ThreadTile1: 13 ThreadTileA: 16 - ThreadTileB: 8 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -459941,15 +459158,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -459984,7 +459201,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -459999,22 +459216,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_7_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 + LdsNumBytes: 51200 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 17920 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -460023,44 +459240,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 + LdsOffsetMetadata: 51200 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 7] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 112 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 112 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -460073,14 +459290,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 8 - NumLoadsB: 14 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -460166,8 +459383,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1762 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1759 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -460176,16 +459393,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -460233,7 +459450,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -460245,11 +459462,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -460260,68 +459477,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_7_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 24064 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 7680 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 24064 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 112 - MacroTileA: 256 - MacroTileB: 112 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -460329,19 +459546,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 7 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -460427,8 +459644,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1763 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1760 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -460436,17 +459653,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -460457,7 +459674,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -460468,10 +459685,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -460494,7 +459711,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -460507,7 +459724,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -460521,32 +459738,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 8 + LSPB: 16 LVCA: 32 - LVCB: 32 + LVCB: 16 LVPA: 1 - LVPB: 4 + LVPB: 8 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61056 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 27264 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61056 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 27264 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -460555,8 +459772,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -460567,14 +459784,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] + MIWaveTile: [4, 10] MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTileB: 10 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -460595,14 +459812,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -460688,8 +459905,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1764 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1761 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -460705,9 +459922,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 13 + ThreadTile1: 10 ThreadTileA: 16 - ThreadTileB: 13 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -460728,11 +459945,11 @@ WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -460782,7 +459999,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_12_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 64 LSPA: 8 @@ -460791,13 +460008,13 @@ LVCB: 8 LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 + LdsNumBytes: 63488 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -460806,44 +460023,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 + LdsOffsetMetadata: 63488 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 12 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -460851,19 +460068,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -460949,8 +460166,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1765 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1762 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_12_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -460959,16 +460176,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -460986,7 +460203,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -461043,32 +460260,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 + LSPA: 8 LSPB: 32 - LVCA: 16 + LVCA: 32 LVCB: 8 - LVPA: 2 + LVPA: 1 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -461088,15 +460305,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -461112,19 +460329,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -461210,8 +460427,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1766 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1763 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -461220,16 +460437,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 6 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -461246,8 +460463,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -461289,7 +460506,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -461304,22 +460521,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 16 + LSPB: 64 LVCA: 32 - LVCB: 16 + LVCB: 4 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27264 + LdsNumBytes: 25600 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -461328,44 +460545,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27264 + LdsOffsetMetadata: 25600 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -461378,14 +460595,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -461471,8 +460688,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1767 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1764 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -461481,16 +460698,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -461550,11 +460767,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -461565,33 +460782,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_12_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_15_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 38400 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -461611,14 +460828,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 12] - MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveTile: [2, 15] + MIWaveTileA: 2 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 240 + MacroTileA: 128 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -461639,14 +460856,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 4 + NumLoadsB: 30 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 30 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -461732,8 +460949,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1768 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_12_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1765 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_15_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -461741,17 +460958,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 12 - ThreadTileA: 16 - ThreadTileB: 12 + ThreadTile0: 8 + ThreadTile1: 15 + ThreadTileA: 8 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -461762,14 +460979,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -461826,7 +461043,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 LSCB: 64 LSPA: 8 @@ -461839,9 +461056,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 + LdsNumBytes: 51200 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -461850,7 +461067,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 + LdsOffsetMetadata: 51200 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 @@ -461872,14 +461089,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -461895,19 +461112,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -461993,8 +461210,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1769 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1766 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -462010,9 +461227,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -462060,7 +461277,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -462087,34 +461304,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -462122,10 +461339,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -462133,22 +461350,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveTile: [4, 9] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -462161,14 +461378,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -462254,8 +461471,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1770 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1767 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -462264,16 +461481,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -462290,15 +461507,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -462337,7 +461554,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -462348,7 +461565,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_15_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -462361,20 +461578,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 38400 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -462393,15 +461610,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 15] - MIWaveTileA: 2 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 240 + MacroTile1: 288 MacroTileA: 128 - MacroTileB: 240 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -462417,19 +461634,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 4 - NumLoadsB: 30 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 30 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -462515,8 +461732,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1771 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_15_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 1768 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -462524,17 +461741,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 15 - ThreadTileA: 8 - ThreadTileB: 15 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -462545,14 +461762,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -462582,7 +461799,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -462594,11 +461811,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -462609,45 +461826,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 16 LVCA: 32 - LVCB: 8 + LVCB: 16 LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 26240 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 26240 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -462655,22 +461872,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 144 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -462683,14 +461900,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -462776,8 +461993,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1772 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1769 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -462785,17 +462002,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -462806,21 +462023,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -462859,7 +462076,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -462870,68 +462087,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 + LSPA: 8 LSPB: 32 - LVCA: 16 + LVCA: 32 LVCB: 8 - LVPA: 2 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -462944,14 +462161,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -463037,8 +462254,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1773 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1770 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -463046,17 +462263,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -463067,14 +462284,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -463104,7 +462321,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -463131,42 +462348,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 + LdsNumBytes: 32768 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -463176,15 +462393,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -463205,14 +462422,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 4 - NumLoadsB: 36 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -463298,8 +462515,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1774 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1771 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -463308,16 +462525,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 9 + ThreadTile1: 15 ThreadTileA: 16 - ThreadTileB: 9 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -463334,15 +462551,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -463365,7 +462582,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -463377,11 +462594,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -463392,45 +462609,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 16 + LSPB: 32 LVCA: 32 - LVCB: 16 + LVCB: 8 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26240 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26240 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -463438,22 +462655,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 144 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 144 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -463461,19 +462678,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -463559,8 +462776,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1775 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1772 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -463568,17 +462785,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -463589,21 +462806,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -463626,7 +462843,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -463653,32 +462870,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 64 LVCA: 32 - LVCB: 8 + LVCB: 4 LVPA: 1 - LVPB: 4 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -463687,8 +462904,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -463699,14 +462916,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -463727,14 +462944,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -463820,8 +463037,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1776 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1773 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -463837,9 +463054,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -463861,10 +463078,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -463899,11 +463116,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -463914,34 +463131,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTC0_NTD0_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -463959,15 +463176,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 240 - MacroTileA: 256 - MacroTileB: 240 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -463983,19 +463200,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 4 - NumLoadsB: 15 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -464081,8 +463298,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1777 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1774 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -464090,17 +463307,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -464111,13 +463328,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -464148,7 +463365,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -464160,7 +463377,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -464175,32 +463392,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 16 LVCA: 32 - LVCB: 8 + LVCB: 16 LVPA: 1 - LVPB: 4 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 27904 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 11520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 27904 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -464209,8 +463426,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -464221,14 +463438,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -464249,14 +463466,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -464342,8 +463559,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1778 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1775 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -464359,9 +463576,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 7 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 7 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -464379,14 +463596,14 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -464409,7 +463626,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -464436,32 +463653,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 64 + LSPB: 32 LVCA: 32 - LVCB: 4 + LVCB: 8 LVPA: 1 - LVPB: 8 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -464470,8 +463687,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -464482,14 +463699,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -464510,14 +463727,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -464603,8 +463820,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1779 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1776 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -464620,9 +463837,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -464644,10 +463861,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -464682,11 +463899,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -464697,34 +463914,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTC0_NTD0_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 30592 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 30592 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -464742,15 +463959,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -464771,14 +463988,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 5 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 4 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -464864,8 +464081,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1780 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 1777 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -464873,17 +464090,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -464894,13 +464111,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -464931,7 +464148,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -464947,7 +464164,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -464958,34 +464175,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27904 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 11520 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27904 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -464993,33 +464210,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -465027,19 +464244,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 32 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -465125,8 +464342,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1781 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 1778 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -465134,17 +464351,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -465155,21 +464372,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -465208,7 +464425,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -465219,32 +464436,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 - LVPA: 1 + LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -465264,15 +464481,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -465293,14 +464510,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -465386,8 +464603,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1782 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1779 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -465395,17 +464612,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -465416,13 +464633,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -465465,11 +464682,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -465480,22 +464697,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 16 + LSPB: 64 LVCA: 32 - LVCB: 16 + LVCB: 4 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30592 + LdsNumBytes: 25600 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 14208 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -465504,21 +464721,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30592 + LdsOffsetMetadata: 25600 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -465526,22 +464743,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -465554,14 +464771,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 13 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -465647,8 +464864,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1783 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1780 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -465656,17 +464873,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -465677,14 +464894,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -465714,7 +464931,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -465726,11 +464943,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -465741,34 +464958,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 8 + LSPB: 64 LVCA: 8 - LVCB: 32 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 77824 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -465776,33 +464993,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 192 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -465815,14 +465032,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 32 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -465908,8 +465125,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1784 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1781 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -465917,7 +465134,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -465925,9 +465142,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 48 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 48 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -465938,21 +465155,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -465975,7 +465192,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -465987,11 +465204,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -466002,68 +465219,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 30592 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 30592 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -466071,19 +465288,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 4 + NumLoadsB: 13 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -466169,26 +465386,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1785 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 1782 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -466199,7 +465416,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -466210,16 +465427,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -466236,7 +465453,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -466248,11 +465465,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -466263,45 +465480,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 64 + LSPB: 8 LVCA: 32 - LVCB: 4 + LVCB: 32 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 61056 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -466309,22 +465526,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 208 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -466332,19 +465549,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -466430,26 +465647,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1786 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 1783 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -466460,27 +465677,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -466497,7 +465714,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -466509,11 +465726,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -466524,68 +465741,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 77824 + LdsOffsetMetadata: 61056 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -466593,19 +465810,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -466691,26 +465908,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1787 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 1784 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -466721,7 +465938,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -466732,16 +465949,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -466774,7 +465991,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -466785,7 +466002,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG32_8_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -466798,19 +466015,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30592 + LdsNumBytes: 33792 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 14208 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30592 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -466830,15 +466047,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -466859,14 +466076,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 13 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -466952,8 +466169,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1788 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1785 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -466961,17 +466178,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -466982,13 +466199,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -467019,7 +466236,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -467031,11 +466248,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -467046,45 +466263,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 8 + LSPB: 64 LVCA: 32 - LVCB: 32 + LVCB: 4 LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61056 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61056 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -467092,22 +466309,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -467120,14 +466337,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -467213,8 +466430,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1789 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1786 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -467222,17 +466439,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -467243,27 +466460,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -467280,7 +466497,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -467292,11 +466509,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -467307,45 +466524,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 8 + LSPB: 64 LVCA: 32 - LVCB: 32 + LVCB: 4 LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61056 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61056 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -467353,22 +466570,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -467381,14 +466598,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -467474,8 +466691,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1790 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1787 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -467483,17 +466700,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -467504,27 +466721,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -467557,7 +466774,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -467568,7 +466785,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -467613,10 +466830,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 16] + MIWaveTileA: 4 + MIWaveTileB: 16 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 256 @@ -467643,7 +466860,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 NumLoadsB: 16 NumLoadsCoalescedA: 1 @@ -467735,8 +466952,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1791 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1788 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -467744,17 +466961,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 16 + ThreadTileA: 16 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -467765,14 +466982,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -467814,11 +467031,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -467829,68 +467046,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG32_8_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 64 + LSPB: 16 LVCA: 32 - LVCB: 4 + LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 + LdsNumBytes: 31616 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -467903,14 +467120,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -467996,8 +467213,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1792 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1789 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -468005,7 +467222,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -468013,9 +467230,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 8 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -468026,14 +467243,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -468075,11 +467292,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -468090,32 +467307,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG64_4_1 + LSCA: 512 LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 LVPA: 1 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -468135,15 +467352,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -468165,13 +467382,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 4 - NumLoadsB: 4 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -468257,8 +467474,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1793 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 1790 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -468266,17 +467483,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -468287,14 +467504,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -468336,7 +467553,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -468351,22 +467568,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 16 + LSPB: 64 LVCA: 32 - LVCB: 16 + LVCB: 4 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 + LdsNumBytes: 34816 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -468375,31 +467592,31 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 + LdsOffsetMetadata: 34816 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 16] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 16 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 256 @@ -468409,10 +467626,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -468428,11 +467645,11 @@ NumElementsPerThread: 256 NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -468518,8 +467735,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1794 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1791 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -468528,16 +467745,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 16 - ThreadTileA: 16 - ThreadTileB: 16 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -468555,7 +467772,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -468601,7 +467818,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -468612,7 +467829,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -468625,9 +467842,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 + LdsNumBytes: 32768 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 15232 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -468636,7 +467853,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 + LdsOffsetMetadata: 32768 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 4 @@ -468657,15 +467874,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 240 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -468686,14 +467903,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 4 - NumLoadsB: 14 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -468779,8 +467996,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1795 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1792 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -468788,17 +468005,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -468809,14 +468026,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -468862,7 +468079,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -468873,68 +468090,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG64_4_1 - LSCA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 LSCB: 32 - LSPA: 4 + LSPA: 32 LSPB: 16 - LVCA: 64 + LVCA: 8 LVCB: 16 - LVPA: 1 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 77824 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -468947,14 +468164,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 20 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -469040,8 +468257,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1796 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM8 + SolutionIndex: 1793 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -469049,17 +468266,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -469070,14 +468287,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -469119,11 +468336,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -469134,45 +468351,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG32_8_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 64 + LSPB: 16 LVCA: 32 - LVCB: 4 + LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 + LdsNumBytes: 31616 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -469180,22 +468397,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -469208,14 +468425,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -469301,8 +468518,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1797 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1794 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -469310,17 +468527,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -469331,13 +468548,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -469380,11 +468597,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -469395,68 +468612,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG64_4_1 + LSCA: 512 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 + LSPA: 4 + LSPB: 64 + LVCA: 64 + LVCB: 4 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 240 - MacroTileA: 256 - MacroTileB: 240 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -469469,14 +468686,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 4 - NumLoadsB: 15 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -469562,8 +468779,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1798 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1795 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -469571,17 +468788,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -469592,14 +468809,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -469645,7 +468862,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -469656,32 +468873,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG64_4_1 + LSCA: 512 LSCB: 32 - LSPA: 32 + LSPA: 4 LSPB: 16 - LVCA: 8 + LVCA: 64 LVCB: 16 - LVPA: 4 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 77824 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -469701,15 +468918,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 512 + MacroTile1: 112 + MacroTileA: 512 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -469730,14 +468947,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 20 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 8 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -469823,8 +469040,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1799 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1796 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -469832,17 +469049,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -469853,13 +469070,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -469890,7 +469107,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -469906,7 +469123,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -469917,33 +469134,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -469951,8 +469168,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -469963,14 +469180,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -469991,14 +469208,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 14 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 36 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -470084,8 +469301,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1800 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1797 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -470093,17 +469310,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -470114,7 +469331,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -470125,16 +469342,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -470163,11 +469380,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -470178,68 +469395,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG64_4_1 - LSCA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 32 - LSPA: 4 - LSPB: 64 - LVCA: 64 - LVCB: 4 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 16] + MIWaveTileA: 4 + MIWaveTileB: 16 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -470253,13 +469470,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 2 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -470345,8 +469562,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1801 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 + SolutionIndex: 1798 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -470354,17 +469571,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 16 + ThreadTileA: 16 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -470375,14 +469592,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -470439,32 +469656,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG64_4_1 - LSCA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 LSCB: 32 - LSPA: 4 + LSPA: 16 LSPB: 16 - LVCA: 64 + LVCA: 16 LVCB: 16 - LVPA: 1 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 38656 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 38656 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -470484,15 +469701,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] + MIWaveGroup: [1, 4] MIWaveTile: [8, 7] MIWaveTileA: 8 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 112 - MacroTileA: 512 - MacroTileB: 112 + MacroTile0: 128 + MacroTile1: 448 + MacroTileA: 128 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -470515,12 +469732,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 224 NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 8 - NumLoadsB: 7 + NumLoadsA: 2 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -470606,8 +469823,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1802 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 + SolutionIndex: 1799 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -470616,10 +469833,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 8 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 @@ -470642,8 +469859,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -470673,7 +469890,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -470689,7 +469906,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -470700,33 +469917,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG64_4_1 + LSCA: 512 + LSCB: 32 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 32 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -470734,8 +469951,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -470745,15 +469962,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 512 + MacroTile1: 112 + MacroTileA: 512 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -470774,14 +469991,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 36 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 8 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -470867,8 +470084,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1803 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1800 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -470876,17 +470093,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -470897,27 +470114,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -470934,7 +470151,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -470961,32 +470178,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 16 + LSPB: 8 LVCA: 32 - LVCB: 16 + LVCB: 32 LVPA: 1 - LVPB: 8 + LVPB: 4 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 63232 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 63232 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -470995,8 +470212,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -471007,14 +470224,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 16] + MIWaveTile: [4, 14] MIWaveTileA: 4 - MIWaveTileB: 16 + MIWaveTileB: 14 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -471035,14 +470252,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 8 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -471128,8 +470345,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1804 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1801 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -471145,9 +470362,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 16 + ThreadTile1: 14 ThreadTileA: 16 - ThreadTileB: 16 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -471169,16 +470386,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -471195,7 +470412,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -471207,11 +470424,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -471222,68 +470439,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38656 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38656 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 7] - MIWaveTileA: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -471297,13 +470514,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 28 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -471389,8 +470606,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1805 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 1802 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -471398,11 +470615,11 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 @@ -471419,27 +470636,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -471468,11 +470685,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -471483,22 +470700,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG128_2_1 LSCA: 512 LSCB: 32 LSPA: 4 - LSPB: 16 + LSPB: 64 LVCA: 64 - LVCB: 16 + LVCB: 4 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 + LdsNumBytes: 41984 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 7680 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -471507,21 +470724,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 + LdsOffsetMetadata: 41984 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -471529,22 +470746,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 512 - MacroTile1: 112 + MacroTile1: 128 MacroTileA: 512 - MacroTileB: 112 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -471557,14 +470774,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 8 - NumLoadsB: 7 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -471650,8 +470867,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1806 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM8 + SolutionIndex: 1803 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -471659,17 +470876,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -471680,14 +470897,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -471717,7 +470934,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -471729,11 +470946,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -471744,68 +470961,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63232 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63232 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 77824 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 14] - MIWaveTileA: 4 - MIWaveTileB: 14 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -471818,14 +471035,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 8 - NumLoadsB: 28 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 3 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -471911,8 +471128,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1807 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1804 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -471920,17 +471137,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 14 - ThreadTileA: 16 - ThreadTileB: 14 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -471941,7 +471158,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -471952,16 +471169,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -471978,7 +471195,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -471990,11 +471207,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -472005,45 +471222,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 16 LVCA: 32 - LVCB: 8 + LVCB: 16 LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -472051,22 +471268,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 240 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -472079,14 +471296,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 4 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -472172,8 +471389,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1808 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1805 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -472181,17 +471398,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -472202,27 +471419,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -472251,7 +471468,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -472266,45 +471483,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG128_2_1 - LSCA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 32 - LSPA: 4 - LSPB: 64 - LVCA: 64 - LVCB: 4 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 30592 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 30592 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -472312,22 +471529,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 4] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -472340,14 +471557,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 4 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -472433,8 +471650,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1809 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM1 + SolutionIndex: 1806 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -472443,16 +471660,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -472469,8 +471686,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -472500,7 +471717,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -472512,11 +471729,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -472527,68 +471744,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 77824 + LdsOffsetMetadata: 61056 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -472601,14 +471818,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -472694,8 +471911,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1810 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 1807 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -472703,17 +471920,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -472724,27 +471941,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -472788,7 +472005,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -472801,9 +472018,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 + LdsNumBytes: 31616 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 16384 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -472812,7 +472029,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 + LdsOffsetMetadata: 31616 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 4 @@ -472834,14 +472051,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] + MIWaveTile: [4, 14] MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveTileB: 14 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 240 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 240 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -472862,14 +472079,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 NumLoadsA: 4 - NumLoadsB: 15 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -472955,8 +472172,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1811 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 1808 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -472972,9 +472189,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 15 + ThreadTile1: 14 ThreadTileA: 16 - ThreadTileB: 15 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -473038,7 +472255,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -473049,7 +472266,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -473058,13 +472275,13 @@ LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30592 + LdsNumBytes: 25600 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 14208 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -473073,21 +472290,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30592 + LdsOffsetMetadata: 25600 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -473095,22 +472312,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -473123,14 +472340,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 13 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -473216,8 +472433,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1812 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 1809 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -473225,17 +472442,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -473246,13 +472463,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -473283,7 +472500,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -473294,14 +472511,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -473310,44 +472527,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61056 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61056 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -473355,15 +472572,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -473379,19 +472596,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 26 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -473477,26 +472694,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1813 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 1810 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -473507,27 +472724,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 4] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -473544,7 +472761,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -473555,14 +472772,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -473571,44 +472788,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 16 - LVCA: 32 + LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -473616,15 +472833,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 14] - MIWaveTileA: 4 - MIWaveTileB: 14 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -473640,19 +472857,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 4 - NumLoadsB: 14 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -473738,26 +472955,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1814 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 1811 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 14 - ThreadTileA: 16 - ThreadTileB: 14 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -473768,27 +472985,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 5] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -473805,7 +473022,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -473816,14 +473033,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -473832,68 +473049,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 64 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -473901,19 +473118,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -473999,26 +473216,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1815 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 + SolutionIndex: 1812 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -474029,27 +473246,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 5] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -474079,7 +473296,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -474093,7 +473310,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_SVW1_VWA1_WG16_8_2 LSCA: 16 LSCB: 128 LSPA: 16 @@ -474106,9 +473323,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 + LdsNumBytes: 41472 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -474117,18 +473334,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 + LdsOffsetMetadata: 41472 LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -474138,15 +473355,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 4] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 192 + MacroTile1: 128 MacroTileA: 16 - MacroTileB: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -474167,14 +473384,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -474260,8 +473477,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1816 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1813 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -474271,15 +473488,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 4 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -474296,11 +473513,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 3] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -474327,7 +473544,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -474340,7 +473557,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -474354,32 +473571,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_SVW1_VWA1_WG16_16_1 LSCA: 16 - LSCB: 128 + LSCB: 64 LSPA: 16 - LSPB: 16 + LSPB: 32 LVCA: 16 - LVCB: 16 + LVCB: 8 LVPA: 16 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 53504 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 67840 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 53504 + LdsOffsetMetadata_Blk: 67840 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -474388,8 +473605,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -474400,14 +473617,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 192 + MacroTile1: 320 MacroTileA: 16 - MacroTileB: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -474428,14 +473645,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -474521,8 +473738,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1817 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1814 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -474538,9 +473755,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -474561,11 +473778,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 6] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -474588,7 +473805,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -474600,7 +473817,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 1 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -474615,42 +473832,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_SVW1_VWA1_WG16_8_2 LSCA: 16 - LSCB: 128 + LSCB: 64 LSPA: 16 - LSPB: 4 + LSPB: 32 LVCA: 16 - LVCB: 64 + LVCB: 8 LVPA: 16 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 38144 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 67840 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 38144 + LdsOffsetMetadata_Blk: 67840 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -474660,15 +473877,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 7] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 16 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -474689,14 +473906,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 48 + NumElementsPerThread: 14 + NumGlobalWriteVectorsPerThread: 14 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -474782,8 +473999,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1818 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1815 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -474793,15 +474010,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 7 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -474818,17 +474035,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 5] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -474849,7 +474066,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -474862,7 +474079,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -474876,32 +474093,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_WG16_8_2 LSCA: 16 - LSCB: 128 + LSCB: 256 LSPA: 16 - LSPB: 16 + LSPB: 8 LVCA: 16 - LVCB: 16 + LVCB: 32 LVPA: 16 - LVPB: 2 + LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -474910,8 +474127,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -474922,14 +474139,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 2] - MIWaveTile: [1, 4] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 128 + MacroTile1: 96 MacroTileA: 16 - MacroTileB: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -474950,14 +474167,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 16 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -475043,8 +474260,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1819 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1816 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -475060,9 +474277,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 4 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -475083,11 +474300,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -475110,7 +474327,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -475121,14 +474338,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -475137,32 +474354,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_WG16_16_1 LSCA: 16 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 + LSCB: 256 + LSPA: 128 + LSPB: 8 + LVCA: 2 + LVCB: 32 LVPA: 16 - LVPB: 4 + LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53504 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 67840 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53504 - LdsOffsetMetadata_Blk: 67840 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -475171,8 +474388,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -475183,14 +474400,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 5] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 320 + MacroTile1: 64 MacroTileA: 16 - MacroTileB: 320 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -475211,14 +474428,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -475304,8 +474521,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1820 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1817 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -475321,9 +474538,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 5 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 5 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -475344,13 +474561,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -475371,7 +474588,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -475382,14 +474599,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -475398,42 +474615,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_WG16_16_1 LSCA: 16 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 LVPA: 16 - LVPB: 4 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38144 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 67840 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38144 - LdsOffsetMetadata_Blk: 67840 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -475443,15 +474660,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 7] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -475472,14 +474689,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 14 - NumGlobalWriteVectorsPerThread: 14 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -475565,8 +474782,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1821 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1818 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -475576,15 +474793,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 7 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 7 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -475601,17 +474818,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -475632,7 +474849,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -475643,14 +474860,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -475659,32 +474876,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_WG16_8_2 LSCA: 16 - LSCB: 256 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 LVPA: 16 - LVPB: 1 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 37376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -475693,8 +474910,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -475735,12 +474952,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 6 NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 16 - NumLoadsB: 12 + NumLoadsA: 1 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -475826,8 +475043,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1822 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1819 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -475866,13 +475083,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -475893,7 +475110,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -475906,7 +475123,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -475920,32 +475137,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 256 - LSPA: 128 - LSPB: 8 - LVCA: 2 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -475954,8 +475171,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -475965,15 +475182,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] + MIWaveGroup: [2, 2] + MIWaveTile: [1, 6] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -475994,14 +475211,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -476087,8 +475304,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1823 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1820 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -476097,16 +475314,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 6 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -476123,15 +475340,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 4] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -476170,7 +475387,7 @@ GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -476181,33 +475398,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 128 + LSPA: 64 LSPB: 16 - LVCA: 2 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -476227,13 +475444,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 32 MacroTile1: 192 - MacroTileA: 16 + MacroTileA: 32 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -476255,13 +475472,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 + NumElementsPerThread: 24 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 + NumLoadsA: 2 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -476348,8 +475565,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1824 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1821 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -476357,16 +475574,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -476378,7 +475595,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -476428,7 +475645,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -476442,7 +475659,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_SVW1_VWA1_WG16_16_1 LSCA: 16 LSCB: 128 LSPA: 128 @@ -476451,33 +475668,33 @@ LVCB: 16 LVPA: 16 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 768 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -476487,15 +475704,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -476516,14 +475733,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 1 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -476609,8 +475826,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1825 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1822 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -476620,15 +475837,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -476645,11 +475862,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -476689,10 +475906,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -476703,7 +475920,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG16_8_2 LSCA: 32 LSCB: 128 LSPA: 64 @@ -476716,29 +475933,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 8704 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -476748,9 +475965,9 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 6] + MIWaveTileA: 2 MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 32 @@ -476778,7 +475995,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 2 NumLoadsB: 12 NumLoadsCoalescedA: 1 @@ -476870,8 +476087,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1826 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1823 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -476879,16 +476096,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 + StoreVectorWidth: 2 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 6 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true @@ -476900,17 +476117,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -476950,7 +476167,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -476964,7 +476181,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 128 LSPA: 64 @@ -476977,19 +476194,19 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 + LdsNumBytes: 27648 LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 27648 + LdsOffsetMetadata_Blk: 41984 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -477010,14 +476227,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 192 + MacroTile1: 64 MacroTileA: 32 - MacroTileB: 192 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -477038,14 +476255,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -477131,8 +476348,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1827 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1824 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -477148,9 +476365,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -477171,7 +476388,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -477198,7 +476415,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -477210,11 +476427,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -477225,33 +476442,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -477259,8 +476476,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -477271,14 +476488,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -477300,13 +476517,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 24 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -477392,8 +476609,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1828 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1825 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -477401,17 +476618,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -477422,7 +476639,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -477432,11 +476649,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -477472,10 +476689,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -477486,7 +476703,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 128 LSPA: 64 @@ -477499,29 +476716,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 8704 LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -477531,9 +476748,9 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 6] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 6] + MIWaveTileA: 1 MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 32 @@ -477561,7 +476778,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 2 NumLoadsB: 12 NumLoadsCoalescedA: 1 @@ -477653,8 +476870,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1829 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 1826 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -477662,16 +476879,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 + StoreVectorWidth: 1 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 4 ThreadTile1: 6 - ThreadTileA: 8 + ThreadTileA: 4 ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true @@ -477683,17 +476900,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 5] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -477736,7 +476953,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -477747,7 +476964,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x80x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NLCA1_SVW1_VWA1_WG32_4_2 LSCA: 32 LSCB: 128 LSPA: 64 @@ -477760,29 +476977,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27648 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 31744 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27648 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 32 + LdsOffsetMetadata: 31744 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -477792,15 +477009,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 64 + MacroTile1: 80 MacroTileA: 32 - MacroTileB: 64 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -477821,14 +477038,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 NumLoadsA: 2 - NumLoadsB: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -477914,8 +477131,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1830 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1827 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x80x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -477923,17 +477140,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -477944,13 +477161,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -477981,7 +477198,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -477993,11 +477210,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -478008,22 +477225,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -478032,13 +477249,13 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 70144 - LdsPadA: 32 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -478053,14 +477270,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 32 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -478082,14 +477299,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 + NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 1 - NumLoadsB: 24 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -478175,8 +477392,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1831 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1828 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -478184,17 +477401,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 6 + ThreadTileA: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -478205,21 +477422,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 4] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -478255,10 +477472,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -478269,7 +477486,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NLCA1_SVW2_VWA2_WG16_8_2 LSCA: 32 LSCB: 128 LSPA: 64 @@ -478282,29 +477499,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -478314,15 +477531,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 32 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -478343,14 +477560,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 10 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -478436,8 +477653,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1832 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1829 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -478445,17 +477662,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 + StoreVectorWidth: 2 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -478466,17 +477683,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -478503,7 +477720,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -478516,7 +477733,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 7 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -478530,68 +477747,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x80x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NLCA1_SVW1_VWA1_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_WG32_8_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 32 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31744 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 69632 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31744 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 69632 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 5] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 80 + MacroTile1: 384 MacroTileA: 32 - MacroTileB: 80 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -478604,14 +477821,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 2 - NumLoadsB: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -478697,8 +477914,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1833 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x80x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 + SolutionIndex: 1830 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_GRVWB8_GSU7_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -478707,16 +477924,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -478733,15 +477950,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 7] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -478780,7 +477997,7 @@ GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -478791,42 +478008,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 128 + LSPA: 64 LSPB: 16 - LVCA: 2 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -478836,14 +478053,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 32 MacroTile1: 192 - MacroTileA: 16 + MacroTileA: 32 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -478865,13 +478082,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 + NumElementsPerThread: 24 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 + NumLoadsA: 2 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -478958,8 +478175,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1834 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1831 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -478967,17 +478184,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -478988,13 +478205,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -479038,10 +478255,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -479052,7 +478269,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NLCA1_SVW2_VWA2_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 128 LSPA: 64 @@ -479065,29 +478282,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 36352 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 36352 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -479097,15 +478314,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 160 + MacroTile1: 96 MacroTileA: 32 - MacroTileB: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -479126,14 +478343,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 2 - NumLoadsB: 10 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -479219,8 +478436,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1835 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 1832 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -479228,17 +478445,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 + StoreVectorWidth: 1 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -479249,17 +478466,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -479302,7 +478519,7 @@ GlobalSplitU: 7 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -479313,32 +478530,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 69632 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 69632 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -479359,14 +478576,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 384 - MacroTileA: 32 - MacroTileB: 384 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -479387,14 +478604,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -479480,8 +478697,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1836 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_GRVWB8_GSU7_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1833 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU7_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -479489,17 +478706,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 2 SubGroup1: 128 SubGroupA: 2 SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -479510,7 +478727,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -479574,32 +478791,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 64 + LSPA: 32 LSPB: 16 - LVCA: 4 + LVCA: 8 LVCB: 16 - LVPA: 8 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -479619,15 +478836,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -479648,14 +478865,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -479741,8 +478958,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1837 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1834 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -479751,16 +478968,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -479777,7 +478994,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -479808,7 +479025,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -479821,10 +479038,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -479835,22 +479052,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36352 + LdsNumBytes: 54784 LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -479859,9 +479076,9 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36352 + LdsOffsetMetadata: 54784 LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -479869,8 +479086,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -479881,14 +479098,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [2, 9] + MIWaveTileA: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 96 - MacroTileA: 32 - MacroTileB: 96 + MacroTile0: 64 + MacroTile1: 288 + MacroTileA: 64 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -479909,14 +479126,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 2 - NumLoadsB: 6 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -480002,8 +479219,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1838 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1835 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -480011,17 +479228,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 9 + ThreadTileA: 8 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -480032,7 +479249,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -480042,11 +479259,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -480069,7 +479286,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -480082,7 +479299,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 7 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -480096,34 +479313,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 64 + LSCB: 128 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -480131,33 +479348,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 256 + MacroTile1: 96 MacroTileA: 64 - MacroTileB: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -480170,14 +479387,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -480263,8 +479480,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1839 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU7_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1836 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -480273,16 +479490,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -480303,11 +479520,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 7] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -480330,7 +479547,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -480343,10 +479560,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -480357,33 +479574,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SVW4_VWA4_WG16_16_1 LSCA: 64 - LSCB: 128 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 38912 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 38912 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -480391,8 +479608,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -480402,15 +479619,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 64 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -480431,14 +479648,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -480524,8 +479741,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1840 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1837 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -480533,17 +479750,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -480554,21 +479771,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -480604,7 +479821,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -480618,32 +479835,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -480663,15 +479880,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 288 - MacroTileA: 64 - MacroTileB: 288 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -480694,12 +479911,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 72 NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 2 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 + NumLoadsA: 3 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -480785,8 +480002,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1841 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1838 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -480795,16 +480012,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -480821,11 +480038,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -480879,7 +480096,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 128 LSPA: 32 @@ -480892,9 +480109,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 + LdsNumBytes: 63488 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -480903,7 +480120,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 + LdsOffsetMetadata: 63488 LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 @@ -480925,14 +480142,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 96 + MacroTile1: 160 MacroTileA: 64 - MacroTileB: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -480953,14 +480170,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -481046,8 +480263,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1842 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1839 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -481063,9 +480280,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -481129,7 +480346,7 @@ GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -481140,33 +480357,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38912 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 48384 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38912 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 + LdsOffsetMetadata: 48384 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -481185,15 +480402,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 192 - MacroTileA: 64 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -481214,14 +480431,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -481307,8 +480524,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1843 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1840 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -481316,17 +480533,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -481337,13 +480554,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -481374,7 +480591,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -481387,7 +480604,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -481401,37 +480618,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_PLR1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG16_8_2 LSCA: 32 - LSCB: 64 + LSCB: 128 LSPA: 64 - LSPB: 32 + LSPB: 16 LVCA: 4 - LVCB: 8 + LVCB: 16 LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -481446,15 +480663,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -481475,14 +480692,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 2 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -481568,8 +480785,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1844 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1841 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -481579,15 +480796,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -481604,15 +480821,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -481651,7 +480868,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -481662,33 +480879,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 128 - LSPA: 32 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -481708,14 +480925,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -481736,14 +480953,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -481829,8 +481046,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1845 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1842 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -481838,17 +481055,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -481859,7 +481076,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -481909,10 +481126,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -481923,33 +481140,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48384 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48384 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -481968,15 +481185,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 10] + MIWaveTileA: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -481997,14 +481214,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -482090,8 +481307,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1846 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1843 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -482099,17 +481316,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 10 + ThreadTileA: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -482120,17 +481337,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -482157,7 +481374,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -482170,7 +481387,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -482184,68 +481401,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG16_8_2 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] + MIWaveGroup: [2, 2] MIWaveTile: [2, 5] MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -482258,13 +481475,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 2 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -482351,8 +481568,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1847 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 1844 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_CLR1_GRVWB8_GSU8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -482362,14 +481579,14 @@ StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 8 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -482387,15 +481604,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 8] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -482418,7 +481635,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -482431,10 +481648,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -482445,33 +481662,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 61696 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 61696 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -482479,10 +481696,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -482491,14 +481708,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -482519,14 +481736,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -482612,8 +481829,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1848 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1845 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -482621,17 +481838,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -482642,7 +481859,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -482652,11 +481869,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 6] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -482692,7 +481909,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -482706,32 +481923,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42496 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42496 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -482743,7 +481960,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -482751,15 +481968,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 10] - MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -482780,14 +481997,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -482873,8 +482090,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1849 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1846 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -482883,16 +482100,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 10 - ThreadTileA: 8 - ThreadTileB: 10 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -482909,11 +482126,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 6] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -482940,7 +482157,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -482953,7 +482170,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -482967,34 +482184,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -483002,10 +482219,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -483013,22 +482230,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -483041,14 +482258,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -483134,8 +482351,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1850 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_CLR1_GRVWB8_GSU8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1847 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -483144,16 +482361,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -483170,15 +482387,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -483201,7 +482418,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -483213,11 +482430,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -483228,42 +482445,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1536_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT12_5_NLCA3_PLR1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61696 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61696 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 77824 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -483273,15 +482490,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -483302,14 +482519,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 20 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -483395,8 +482612,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1851 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1848 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_CLR1_GRVWB2_GSU8_LBSPPA1536_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT12_5_NLCA3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -483404,17 +482621,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -483425,21 +482642,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 8] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -483478,7 +482695,7 @@ GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -483489,68 +482706,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_PLR1_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 160 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -483563,13 +482780,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -483656,8 +482873,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1852 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1849 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -483665,16 +482882,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 48 ThreadTile1: 4 - ThreadTileA: 40 + ThreadTileA: 48 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -483686,13 +482903,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -483750,32 +482967,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 128 - LSPA: 32 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -483795,15 +483012,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -483824,14 +483041,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -483917,8 +483134,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1853 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1850 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -483927,16 +483144,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -483953,7 +483170,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -483984,7 +483201,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -483996,11 +483213,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -484011,42 +483228,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1536_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT12_5_NLCA3_PLR1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NLCA7_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 49408 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 77824 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 49408 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -484056,15 +483273,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -484085,14 +483302,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 20 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 4 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -484178,8 +483395,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1854 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_CLR1_GRVWB2_GSU8_LBSPPA1536_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT12_5_NLCA3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1851 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -484187,17 +483404,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -484208,21 +483425,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -484272,45 +483489,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -484318,22 +483535,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -484346,14 +483563,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 7 + NumLoadsB: 7 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -484439,8 +483656,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1855 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWB8_GSU6_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1852 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -484449,16 +483666,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -484475,7 +483692,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -484506,7 +483723,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -484519,10 +483736,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -484533,33 +483750,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 38912 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 38912 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -484567,8 +483784,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -484578,15 +483795,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 64 + MacroTile1: 192 + MacroTileA: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -484607,14 +483824,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -484700,8 +483917,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1856 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1853 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -484709,17 +483926,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -484730,21 +483947,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -484780,10 +483997,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -484794,33 +484011,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NLCA7_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49408 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49408 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -484840,14 +484057,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -484868,14 +484085,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 4 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -484961,8 +484178,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1857 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1854 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -484970,17 +484187,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -484991,7 +484208,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -485001,7 +484218,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -485028,7 +484245,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -485041,10 +484258,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -485055,33 +484272,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_PLR1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -485089,10 +484306,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -485100,15 +484317,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -485129,14 +484346,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 7 - NumLoadsB: 7 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -485222,8 +484439,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1858 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1855 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -485231,17 +484448,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -485252,21 +484469,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -485289,7 +484506,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -485301,11 +484518,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -485316,44 +484533,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_10_NLCA3_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38912 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 34560 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38912 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 16 + LdsOffsetMetadata: 34560 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -485361,15 +484578,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 10] + MIWaveTileA: 6 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 192 - MacroTileA: 64 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -485390,14 +484607,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 3 + NumLoadsB: 20 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -485483,8 +484700,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1859 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1856 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_CLR1_GRVWB2_GSU8_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_10_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -485492,17 +484709,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 10 + ThreadTileA: 24 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -485513,21 +484730,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 8] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -485563,10 +484780,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -485577,68 +484794,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 45056 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -485651,14 +484868,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 4 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -485744,8 +484961,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1860 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1857 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -485753,17 +484970,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 1 + ThreadTileA: 48 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -485774,7 +484991,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -485784,7 +485001,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -485811,7 +485028,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -485824,10 +485041,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -485838,22 +485055,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_PLR1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 + LdsNumBytes: 44032 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -485862,10 +485079,10 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 + LdsOffsetMetadata: 44032 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -485873,33 +485090,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -485912,14 +485129,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -486005,8 +485222,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1861 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1858 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -486014,17 +485231,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -486035,21 +485252,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -486072,7 +485289,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -486084,11 +485301,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -486099,42 +485316,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_10_NLCA3_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NLCA7_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34560 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 59648 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34560 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 59648 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -486145,14 +485362,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 10] - MIWaveTileA: 6 - MIWaveTileB: 10 + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -486173,14 +485390,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 3 - NumLoadsB: 20 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -486266,8 +485483,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1862 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_CLR1_GRVWB2_GSU8_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_10_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1859 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -486275,17 +485492,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 10 - ThreadTileA: 24 - ThreadTileB: 10 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -486296,7 +485513,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -486306,11 +485523,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -486345,11 +485562,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -486360,68 +485577,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30720 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30720 - LdsOffsetMetadata_Blk: 45056 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 128 - MacroTileA: 96 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -486434,14 +485651,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 28 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -486527,8 +485744,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1863 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_CLR1_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1860 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB2_GSU5_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -486536,17 +485753,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 1 - ThreadTileA: 48 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -486557,7 +485774,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -486567,7 +485784,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -486607,10 +485824,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -486621,7 +485838,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -486630,13 +485847,13 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 + LdsNumBytes: 52224 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -486645,21 +485862,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 + LdsOffsetMetadata: 52224 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -486667,22 +485884,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 128 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -486695,14 +485912,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -486788,8 +486005,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1864 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1861 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -486797,17 +486014,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -486818,17 +486035,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -486855,7 +486072,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -486867,8 +486084,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -486882,42 +486099,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NLCA7_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1536_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT3_12_NLCA3_PLR1_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59648 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 45312 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59648 - LdsOffsetMetadata_Blk: 94464 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 45312 LdsPadA: 16 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -486927,14 +486144,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 12] + MIWaveTileA: 3 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 224 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -486956,14 +486173,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 3 + NumLoadsB: 12 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -487049,8 +486266,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1865 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NLCA7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1862 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_CLR1_GRVWB2_GSU4_LBSPPA1536_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT3_12_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -487059,16 +486276,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 12 + ThreadTile1: 12 + ThreadTileA: 12 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -487085,15 +486302,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 4] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -487116,7 +486333,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -487132,7 +486349,7 @@ GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -487143,42 +486360,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 28032 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 16 + LdsOffsetMetadata: 28032 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -487189,13 +486406,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 + MIWaveTile: [6, 7] + MIWaveTileA: 6 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 192 MacroTile1: 224 - MacroTileA: 128 + MacroTileA: 192 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -487217,14 +486434,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 28 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 14 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -487310,8 +486527,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1866 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB2_GSU5_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1863 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_CLR1_GRVWB2_GSU5_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -487319,16 +486536,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 24 ThreadTile1: 7 - ThreadTileA: 16 + ThreadTileA: 24 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -487340,7 +486557,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -487351,10 +486568,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -487393,7 +486610,7 @@ GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -487404,33 +486621,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 32 - LVCA: 16 + LVCA: 8 LVCB: 8 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 16384 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -487450,13 +486667,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 + MIWaveTile: [6, 7] + MIWaveTileA: 6 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 192 MacroTile1: 224 - MacroTileA: 128 + MacroTileA: 192 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -487478,13 +486695,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -487571,8 +486788,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1867 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1864 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -487580,16 +486797,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 24 ThreadTile1: 7 - ThreadTileA: 16 + ThreadTileA: 24 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -487601,7 +486818,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -487638,7 +486855,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -487650,11 +486867,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -487665,44 +486882,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1536_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT3_12_NLCA3_PLR1_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 45312 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 45312 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -487710,15 +486927,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 12] - MIWaveTileA: 3 - MIWaveTileB: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -487739,14 +486956,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 3 - NumLoadsB: 12 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -487832,8 +487049,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1868 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_CLR1_GRVWB2_GSU4_LBSPPA1536_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT3_12_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1865 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -487841,17 +487058,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 12 - ThreadTileA: 12 - ThreadTileB: 12 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -487862,21 +487079,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -487899,7 +487116,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -487912,10 +487129,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -487926,42 +487143,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_9_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 8 LVCA: 8 - LVCB: 16 + LVCB: 32 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + LVPB: 4 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28032 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28032 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -487971,15 +487188,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -488000,14 +487217,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 14 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 10 + NumLoadsB: 18 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -488093,8 +487310,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1869 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_CLR1_GRVWB2_GSU5_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1866 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_9_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -488102,17 +487319,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -488123,21 +487340,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -488160,7 +487377,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -488172,11 +487389,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -488187,42 +487404,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_9_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 30592 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 53504 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 30592 + LdsOffsetMetadata_Blk: 53504 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -488232,15 +487449,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -488261,14 +487478,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 5 + NumLoadsB: 9 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -488354,8 +487571,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1870 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1867 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x32_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_9_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -488363,17 +487580,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -488384,21 +487601,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 4] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -488434,10 +487651,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -488448,7 +487665,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -488457,13 +487674,13 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 + LdsNumBytes: 44032 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -488472,21 +487689,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 + LdsOffsetMetadata: 44032 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -488494,22 +487711,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 128 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -488522,14 +487739,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 4 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -488615,8 +487832,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1871 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1868 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -488624,17 +487841,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -488645,17 +487862,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -488695,10 +487912,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -488709,36 +487926,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_9_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 8 - LVCA: 8 + LVCA: 16 LVCB: 32 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 64256 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 47872 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 106752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -488754,15 +487971,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 352 + MacroTileA: 128 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -488783,14 +488000,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 10 - NumLoadsB: 18 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 44 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 44 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -488876,8 +488093,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1872 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_9_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1869 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -488885,17 +488102,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -488906,17 +488123,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -488956,7 +488173,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -488970,7 +488187,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_9_NLCA5_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB4_LRVW4_MIAV1_MIWT1_10_NLCA1_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 32 LSPA: 32 @@ -488979,23 +488196,23 @@ LVCB: 16 LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30592 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 15232 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 53504 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 20736 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30592 - LdsOffsetMetadata_Blk: 53504 + LdsOffsetMetadata: 15232 + LdsOffsetMetadata_Blk: 20736 LdsPadA: 16 LdsPadB: 4 LdsPadMetadata: 0 @@ -489007,7 +488224,7 @@ LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -489016,14 +488233,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [1, 10] + MIWaveTileA: 1 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -489044,14 +488261,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 5 - NumLoadsB: 9 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 1 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -489137,8 +488354,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1873 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x32_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2560_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT5_9_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1870 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB4_LRVW4_MIAV1_MIWT1_10_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -489153,10 +488370,10 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 10 + ThreadTileA: 4 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -489177,7 +488394,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 32 _DepthUA: 32 _DepthUB: 32 @@ -489216,7 +488433,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -489231,68 +488448,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 32 + LSPB: 8 LVCA: 16 - LVCB: 8 + LVCB: 32 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 39936 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 39936 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 9] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 192 + MacroTile1: 144 MacroTileA: 128 - MacroTileB: 192 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -489305,14 +488522,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -489398,8 +488615,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1874 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1871 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -489408,16 +488625,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 9 + ThreadTileA: 8 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -489477,8 +488694,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -489492,36 +488709,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 47872 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 49152 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -489529,7 +488746,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -489537,15 +488754,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 11] + MIWaveGroup: [1, 4] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 352 - MacroTileA: 128 - MacroTileB: 352 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -489566,14 +488783,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 44 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 44 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -489659,8 +488876,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1875 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1872 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -489669,16 +488886,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 11 + ThreadTile1: 4 ThreadTileA: 16 - ThreadTileB: 11 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -489695,11 +488912,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -489726,7 +488943,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -489742,7 +488959,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -489753,42 +488970,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB4_LRVW4_MIAV1_MIWT1_10_NLCA1_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 15232 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 29696 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 20736 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 15232 - LdsOffsetMetadata_Blk: 20736 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 29696 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -489799,14 +489016,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 10] - MIWaveTileA: 1 - MIWaveTileB: 10 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -489828,12 +489045,12 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 1 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -489920,8 +489137,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1876 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB4_LRVW4_MIAV1_MIWT1_10_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1873 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -489929,17 +489146,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 10 - ThreadTileA: 4 - ThreadTileB: 10 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -489950,7 +489167,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -489961,10 +489178,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -489999,11 +489216,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -490014,33 +489231,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 39936 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 28672 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 39936 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 + LdsOffsetMetadata: 28672 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -490059,15 +489276,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 144 - MacroTileA: 128 - MacroTileB: 144 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -490088,14 +489305,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 18 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -490181,8 +489398,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1877 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1874 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -490190,17 +489407,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -490211,13 +489428,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -490248,7 +489465,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -490261,10 +489478,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -490275,44 +489492,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB8_LRVW4_MIAV0_MIWT5_8_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 64 LVCA: 8 - LVCB: 8 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 29952 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 53504 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49152 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 16 + LdsOffsetMetadata: 29952 + LdsOffsetMetadata_Blk: 53504 + LdsPadA: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -490320,15 +489537,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -490349,14 +489566,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 2 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -490442,8 +489659,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1878 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1875 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2560_LBSPPB128_LPA16_LPB8_LRVW4_MIAV0_MIWT5_8_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -490451,17 +489668,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -490472,21 +489689,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -490509,7 +489726,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -490521,11 +489738,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -490536,34 +489753,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29696 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 86016 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29696 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 86016 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -490571,33 +489788,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -490610,14 +489827,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -490703,8 +489920,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1879 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1876 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -490712,17 +489929,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -490733,7 +489950,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -490743,11 +489960,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 5] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -490786,7 +490003,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -490797,68 +490014,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_4_NLCA1_SVW1_VWA1_WG128_2_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28672 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28672 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 128 MacroTile1: 128 - MacroTileA: 64 + MacroTileA: 128 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -490871,13 +490088,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -490964,8 +490181,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1880 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1877 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -490973,17 +490190,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 4 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -490994,13 +490211,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -491043,11 +490260,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -491058,34 +490275,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB8_LRVW4_MIAV0_MIWT5_8_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29952 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 19072 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 53504 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29952 - LdsOffsetMetadata_Blk: 53504 - LdsPadA: 16 - LdsPadB: 8 + LdsOffsetMetadata: 19072 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -491095,7 +490312,7 @@ LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -491103,15 +490320,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -491132,14 +490349,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 2 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -491225,8 +490442,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1881 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2560_LBSPPB128_LPA16_LPB8_LRVW4_MIAV0_MIWT5_8_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1878 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -491234,17 +490451,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -491255,17 +490472,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 32 _DepthUA: 32 _DepthUB: 32 @@ -491292,7 +490509,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -491305,10 +490522,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -491319,32 +490536,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 86016 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 86016 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -491353,8 +490570,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -491364,15 +490581,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -491393,14 +490610,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 5 - NumLoadsB: 3 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -491486,8 +490703,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1882 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1879 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -491495,17 +490712,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -491516,21 +490733,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -491569,7 +490786,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -491580,68 +490797,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_4_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT10_2_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 4] - MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 2] + MIWaveTileA: 10 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 160 MacroTile1: 128 - MacroTileA: 128 + MacroTileA: 160 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -491654,13 +490871,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -491747,8 +490964,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1883 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 1880 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT10_2_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -491756,17 +490973,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 2 + ThreadTileA: 40 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -491777,13 +490994,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -491814,7 +491031,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -491827,10 +491044,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -491841,44 +491058,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_9_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 19072 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19072 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -491886,15 +491103,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -491915,14 +491132,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 10 + NumLoadsB: 18 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -492008,8 +491225,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1884 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1881 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_9_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -492017,17 +491234,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -492038,21 +491255,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -492087,8 +491304,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -492102,68 +491319,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -492176,14 +491393,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 16 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -492269,8 +491486,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1885 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 1882 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -492285,10 +491502,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -492305,11 +491522,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -492348,11 +491565,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -492363,33 +491580,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT10_2_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -492400,7 +491617,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -492408,15 +491625,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 2] - MIWaveTileA: 10 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -492437,14 +491654,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 - NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 36 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -492530,8 +491747,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1886 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT10_2_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1883 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -492539,17 +491756,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 2 - ThreadTileA: 40 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -492560,17 +491777,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -492597,7 +491814,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -492610,10 +491827,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -492624,44 +491841,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_9_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 5120 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_6_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 15232 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 6528 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 25088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 106752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 15232 + LdsOffsetMetadata_Blk: 25088 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -492670,14 +491887,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -492698,14 +491915,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 10 - NumLoadsB: 18 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -492791,8 +492008,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1887 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_9_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1884 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_6_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -492800,17 +492017,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -492821,7 +492038,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -492831,11 +492048,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -492858,7 +492075,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -492870,11 +492087,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -492885,42 +492102,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 22016 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 22016 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -492931,14 +492148,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -492960,13 +492177,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 16 - NumLoadsCoalescedA: 3 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -493052,8 +492269,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1888 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1885 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -493061,17 +492278,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -493082,7 +492299,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -493093,10 +492310,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -493131,11 +492348,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -493146,33 +492363,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 8 + LSPB: 32 LVCA: 16 - LVCB: 32 + LVCB: 8 LVPA: 2 LVPB: 4 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -493183,7 +492400,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -493191,15 +492408,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 10] + MIWaveTileA: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 288 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 288 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -493220,14 +492437,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 NumLoadsA: 4 - NumLoadsB: 36 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -493313,8 +492530,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1889 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1886 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -493322,17 +492539,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 10 + ThreadTileA: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -493343,17 +492560,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -493380,7 +492597,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -493396,7 +492613,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -493407,42 +492624,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_6_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 15232 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 6528 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 25088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 15232 - LdsOffsetMetadata_Blk: 25088 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -493453,14 +492670,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -493476,19 +492693,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 2 - NumLoadsB: 6 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -493574,8 +492791,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1890 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_6_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1887 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -493583,17 +492800,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 6 - ThreadTileA: 8 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -493604,7 +492821,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -493615,10 +492832,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -493641,7 +492858,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -493654,10 +492871,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -493668,68 +492885,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 22016 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22016 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -493737,19 +492954,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 2 - NumLoadsB: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -493835,8 +493052,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1891 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1888 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -493844,17 +493061,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -493865,21 +493082,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -493902,7 +493119,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -493914,7 +493131,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -493929,44 +493146,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIAV0_MIWT2_11_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 - LSPB: 32 + LSPB: 16 LVCA: 16 - LVCB: 8 + LVCB: 16 LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42496 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 20736 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42496 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 20736 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -493975,14 +493192,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 10] + MIWaveTile: [2, 11] MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 160 + MacroTile1: 176 MacroTileA: 128 - MacroTileB: 160 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -494003,14 +493220,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 88 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 2 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -494096,8 +493313,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1892 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 1889 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIAV0_MIWT2_11_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -494113,9 +493330,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 10 + ThreadTile1: 11 ThreadTileA: 8 - ThreadTileB: 10 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -494133,14 +493350,14 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -494179,7 +493396,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -494190,33 +493407,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 8 + LSPA: 16 LSPB: 8 - LVCA: 32 + LVCA: 16 LVCB: 32 - LVPA: 1 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -494227,7 +493444,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -494236,14 +493453,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [2, 11] + MIWaveTileA: 2 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 80 - MacroTileA: 256 - MacroTileB: 80 + MacroTile0: 128 + MacroTile1: 176 + MacroTileA: 128 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -494264,14 +493481,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 10 + NumElementsPerThread: 88 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -494357,8 +493574,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1893 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1890 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -494366,17 +493583,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 11 + ThreadTileA: 8 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -494387,14 +493604,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -494424,7 +493641,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -494437,10 +493654,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -494451,32 +493668,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 64 LVCA: 32 - LVCB: 8 + LVCB: 4 LVPA: 1 - LVPB: 4 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -494485,8 +493702,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -494496,15 +493713,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -494520,19 +493737,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -494618,8 +493835,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1894 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1891 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -494627,17 +493844,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -494648,21 +493865,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -494685,7 +493902,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -494697,7 +493914,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -494712,42 +493929,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIAV0_MIWT2_11_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 20736 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 20736 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -494757,15 +493974,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 11] - MIWaveTileA: 2 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 176 - MacroTileA: 128 - MacroTileB: 176 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -494781,19 +493998,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 88 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 2 - NumLoadsB: 11 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -494879,8 +494096,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1895 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIAV0_MIWT2_11_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1892 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -494889,16 +494106,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 11 - ThreadTileA: 8 - ThreadTileB: 11 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -494915,15 +494132,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -494958,11 +494175,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -494973,45 +494190,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_8_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 8 + LSPB: 32 LVCA: 16 - LVCB: 32 + LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -495019,22 +494236,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 11] - MIWaveTileA: 2 - MIWaveTileB: 11 + MIWaveTile: [1, 8] + MIWaveTileA: 1 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 176 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 176 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -495042,19 +494259,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 88 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 128 NumLoadsA: 4 - NumLoadsB: 22 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -495140,8 +494357,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1896 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 1893 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_8_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -495149,17 +494366,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 11 - ThreadTileA: 8 - ThreadTileB: 11 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -495170,14 +494387,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -495219,7 +494436,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -495234,22 +494451,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_6_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 64 + LSPB: 16 LVCA: 32 - LVCB: 4 + LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 + LdsNumBytes: 22912 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedB: 6528 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -495258,44 +494475,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 + LdsOffsetMetadata: 22912 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 6] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 96 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -495308,14 +494525,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -495401,8 +494618,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1897 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1894 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_6_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -495411,16 +494628,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -495480,7 +494697,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -495495,68 +494712,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 46592 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 46592 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -495569,14 +494786,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -495662,8 +494879,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1898 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 1895 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -495672,16 +494889,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -495698,8 +494915,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -495745,7 +494962,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -495756,32 +494973,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_8_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT6_1_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 32 - LVCA: 16 + LVCA: 8 LVCB: 8 - LVPA: 2 + LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -495801,15 +495018,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 8] - MIWaveTileA: 1 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 1] + MIWaveTileA: 6 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -495825,19 +495042,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -495923,8 +495140,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1899 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_8_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 1896 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT6_1_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -495932,17 +495149,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 96 + ThreadTile1: 1 + ThreadTileA: 96 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -495953,13 +495170,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -495990,7 +495207,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -496017,32 +495234,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_6_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 22912 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 6528 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22912 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -496051,8 +495268,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -496062,15 +495279,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 6] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 10] MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -496086,19 +495303,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -496184,8 +495401,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1900 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_6_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1897 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -496194,16 +495411,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 6 + ThreadTile1: 10 ThreadTileA: 16 - ThreadTileB: 6 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -496220,15 +495437,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -496267,7 +495484,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -496278,68 +495495,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 8 + LSPA: 16 LSPB: 8 - LVCA: 32 + LVCA: 16 LVCB: 32 - LVPA: 1 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46592 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46592 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -496352,14 +495569,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -496445,8 +495662,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1901 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 1898 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -496454,17 +495671,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -496475,13 +495692,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -496528,7 +495745,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -496539,7 +495756,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT6_1_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -496552,9 +495769,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 + LdsNumBytes: 52224 LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -496563,7 +495780,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 + LdsOffsetMetadata: 52224 LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 LdsPadB: 8 @@ -496584,15 +495801,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 1] - MIWaveTileA: 6 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 192 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -496613,14 +495830,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 NumLoadsA: 6 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -496706,8 +495923,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1902 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT6_1_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1899 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -496715,17 +495932,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 1 - ThreadTileA: 96 - ThreadTileB: 1 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -496736,14 +495953,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -496800,7 +496017,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -496809,13 +496026,13 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 + LdsNumBytes: 52224 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -496824,44 +496041,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 + LdsOffsetMetadata: 52224 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -496874,14 +496091,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -496967,8 +496184,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1903 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 1900 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -496977,16 +496194,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -497034,7 +496251,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -497046,11 +496263,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -497061,42 +496278,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT8_4_NTC0_NTD0_NLCA1_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 - LSCB: 32 + LSCB: 64 LSPA: 16 - LSPB: 64 + LSPB: 8 LVCA: 16 - LVCB: 4 + LVCB: 32 LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -497106,15 +496323,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -497130,19 +496347,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -497228,8 +496445,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1904 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT8_4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 1901 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -497237,17 +496454,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -497258,21 +496475,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -497295,7 +496512,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -497322,32 +496539,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_7_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 - LSPB: 8 + LSPB: 16 LVCA: 16 - LVCB: 32 + LVCB: 16 LVPA: 2 - LVPB: 4 + LVPB: 8 LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 23424 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 23424 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -497356,8 +496573,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -497368,14 +496585,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 10] + MIWaveTile: [4, 7] MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 320 + MacroTile1: 224 MacroTileA: 128 - MacroTileB: 320 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -497391,19 +496608,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 40 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -497489,8 +496706,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1905 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 1902 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -497506,9 +496723,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 10 + ThreadTile1: 7 ThreadTileA: 16 - ThreadTileB: 10 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -497530,10 +496747,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -497572,7 +496789,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -497583,33 +496800,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 8 - LVCA: 16 + LVCA: 8 LVCB: 32 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -497629,14 +496846,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -497657,14 +496874,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 36 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 28 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -497750,8 +496967,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1906 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1903 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -497759,17 +496976,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -497780,14 +496997,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -497817,7 +497034,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -497829,11 +497046,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -497844,68 +497061,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 28416 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 28416 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -497913,19 +497130,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 11 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -498011,8 +497228,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1907 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 1904 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -498020,17 +497237,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -498041,7 +497258,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -498052,10 +497269,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -498078,7 +497295,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -498090,7 +497307,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -498105,42 +497322,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 28416 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 28416 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -498150,15 +497367,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -498179,14 +497396,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 4 - NumLoadsB: 7 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -498272,8 +497489,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1908 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 1905 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -498282,16 +497499,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 7 + ThreadTile1: 11 ThreadTileA: 16 - ThreadTileB: 7 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -498308,15 +497525,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -498366,7 +497583,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -498375,13 +497592,13 @@ LVCB: 32 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 64256 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedB: 47872 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -498390,12 +497607,12 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 64256 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -498412,14 +497629,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] + MIWaveTile: [4, 11] MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 224 + MacroTile1: 352 MacroTileA: 128 - MacroTileB: 224 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -498440,14 +497657,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 4 - NumLoadsB: 28 + NumLoadsB: 44 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularB: 44 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -498533,8 +497750,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1909 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 1906 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -498550,9 +497767,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 7 + ThreadTile1: 11 ThreadTileA: 16 - ThreadTileB: 7 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -498570,7 +497787,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -498616,7 +497833,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -498627,68 +497844,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_7_NTC3_NTD3_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NTC0_NTD0_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 LSCB: 32 - LSPA: 16 + LSPA: 8 LSPB: 16 - LVCA: 16 + LVCA: 32 LVCB: 16 - LVPA: 2 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 24320 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 16128 + LdsNumBytes: 31616 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 24320 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 7] - MIWaveTileA: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 224 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -498696,18 +497913,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 2 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 @@ -498794,8 +498011,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1910 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 1907 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -498803,16 +498020,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 7 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -498824,14 +498041,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -498888,45 +498105,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 8 - LVCA: 16 + LVCA: 8 LVCB: 32 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -498934,22 +498151,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -498962,14 +498179,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 32 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 36 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -499055,8 +498272,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1911 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 1908 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -499065,16 +498282,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -499091,7 +498308,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -499138,7 +498355,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -499149,7 +498366,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SVW8_VWA8_WG32_8_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -499194,10 +498411,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 160 @@ -499224,7 +498441,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 NumLoadsB: 10 NumLoadsCoalescedA: 1 @@ -499316,8 +498533,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1912 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1909 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -499325,17 +498542,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -499346,14 +498563,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -499383,7 +498600,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -499395,7 +498612,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -499410,68 +498627,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 16 + LSPB: 32 LVCA: 32 - LVCB: 16 + LVCB: 8 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26240 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26240 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 144 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 144 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -499479,19 +498696,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -499577,8 +498794,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1913 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIAV0_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1910 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -499587,16 +498804,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -499614,14 +498831,14 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -499660,7 +498877,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -499671,7 +498888,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_7_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_16_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 32 LSPA: 16 @@ -499684,20 +498901,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23424 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23424 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -499716,15 +498933,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 16] + MIWaveTileA: 2 + MIWaveTileB: 16 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 224 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -499745,14 +498962,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 2 - NumLoadsB: 14 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -499838,8 +499055,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1914 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 1911 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_16_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -499847,17 +499064,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 16 + ThreadTileA: 8 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -499868,13 +499085,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -499905,7 +499122,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -499917,7 +499134,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -499932,34 +499149,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -499967,33 +499184,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -500006,14 +499223,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 28 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -500099,8 +499316,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1915 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1912 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -500115,10 +499332,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -500135,15 +499352,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -500178,11 +499395,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -500193,68 +499410,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 77824 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -500267,14 +499484,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 11 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 3 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -500360,8 +499577,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1916 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1913 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -500369,17 +499586,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -500390,7 +499607,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -500439,11 +499656,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -500454,22 +499671,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NTC3_NTD3_NLCA1_SVW8_VWA8_WG32_8_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 16 + LSPB: 64 LVCA: 32 - LVCB: 16 + LVCB: 4 LVPA: 1 LVPB: 8 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 + LdsNumBytes: 25600 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -500478,10 +499695,10 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 + LdsOffsetMetadata: 25600 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -500499,15 +499716,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 176 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 176 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -500528,14 +499745,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 - NumLoadsB: 11 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -500621,8 +499838,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1917 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1914 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -500630,17 +499847,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -500651,14 +499868,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -500700,11 +499917,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -500715,68 +499932,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 47872 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 352 - MacroTileA: 128 - MacroTileB: 352 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -500784,19 +500001,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 44 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 44 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -500882,8 +500099,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1918 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1915 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -500891,17 +500108,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -500912,14 +500129,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -500949,7 +500166,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -500961,11 +500178,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -500976,45 +500193,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NTC0_NTD0_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 15232 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -501022,22 +500239,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -501045,19 +500262,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 4 - NumLoadsB: 14 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -501143,8 +500360,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1919 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1916 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -501152,17 +500369,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 7 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 7 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -501173,21 +500390,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -501210,7 +500427,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -501226,7 +500443,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -501237,33 +500454,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_6_NTC3_NTD3_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 29440 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 32 + LdsOffsetMetadata: 29440 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -501271,8 +500488,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -501283,14 +500500,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -501311,14 +500528,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 36 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -501404,8 +500621,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1920 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1917 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -501413,17 +500630,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -501434,21 +500651,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -501487,7 +500704,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -501498,7 +500715,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -501511,9 +500728,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27264 + LdsNumBytes: 29440 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -501522,7 +500739,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27264 + LdsOffsetMetadata: 29440 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 4 @@ -501543,15 +500760,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -501572,14 +500789,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -501665,8 +500882,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1921 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1918 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -501674,17 +500891,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -501695,14 +500912,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -501732,7 +500949,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -501744,7 +500961,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -501759,68 +500976,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 16 LVCA: 32 - LVCB: 8 + LVCB: 16 LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 26240 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 26240 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 9] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 144 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -501828,19 +501045,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -501926,8 +501143,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1922 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1919 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -501936,16 +501153,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -501963,14 +501180,14 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -502009,7 +501226,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -502020,33 +501237,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_16_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 32 - LSPA: 16 + LSPA: 8 LSPB: 16 - LVCA: 16 + LVCA: 32 LVCB: 16 - LVPA: 2 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 28416 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 + LdsOffsetMetadata: 28416 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -502066,14 +501283,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 16] - MIWaveTileA: 2 - MIWaveTileB: 16 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -502094,14 +501311,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 2 - NumLoadsB: 16 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -502187,8 +501404,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1923 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_16_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 1920 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -502196,17 +501413,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 16 - ThreadTileA: 8 - ThreadTileB: 16 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -502217,14 +501434,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -502266,11 +501483,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -502281,22 +501498,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG32_8_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 64 + LSPB: 16 LVCA: 32 - LVCB: 4 + LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 + LdsNumBytes: 33792 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -502305,30 +501522,30 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 + LdsOffsetMetadata: 33792 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 8] + MIWaveTileA: 8 MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 @@ -502339,10 +501556,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -502350,19 +501567,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -502448,16 +501665,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1924 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1921 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -502478,14 +501695,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -502498,7 +501715,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -502531,7 +501748,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -502542,32 +501759,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 LSCB: 32 - LSPA: 32 + LSPA: 8 LSPB: 64 - LVCA: 8 + LVCA: 32 LVCB: 4 - LVPA: 4 + LVPA: 1 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 77824 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -502587,15 +501804,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -502611,19 +501828,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -502709,26 +501926,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1925 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 1922 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -502739,14 +501956,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -502759,7 +501976,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -502788,11 +502005,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -502803,68 +502020,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NTC3_NTD3_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG128_2_1 + LSCA: 512 LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16384 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 32768 LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 512 MacroTile1: 128 - MacroTileA: 256 + MacroTileA: 512 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -502872,19 +502089,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -502970,25 +502187,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1926 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1923 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 64 ThreadTile1: 4 - ThreadTileA: 32 + ThreadTileA: 64 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -503000,13 +502217,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -503020,7 +502237,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -503064,7 +502281,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 LSCB: 64 LSPA: 8 @@ -503077,9 +502294,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 + LdsNumBytes: 65024 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -503088,7 +502305,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 + LdsOffsetMetadata: 65024 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 @@ -503110,14 +502327,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] + MIWaveTile: [2, 7] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -503133,19 +502350,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -503231,15 +502448,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1927 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1924 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -503248,9 +502465,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -503268,7 +502485,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -503281,7 +502498,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -503298,7 +502515,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -503310,11 +502527,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -503325,68 +502542,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 + LdsNumBytes: 32768 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -503394,19 +502611,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -503492,26 +502709,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1928 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 1925 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -503522,27 +502739,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -503575,7 +502792,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -503586,7 +502803,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_6_NTC3_NTD3_NLCA1_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -503599,9 +502816,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29440 + LdsNumBytes: 32768 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -503610,7 +502827,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29440 + LdsOffsetMetadata: 32768 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 4 @@ -503631,15 +502848,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 240 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -503655,19 +502872,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 4 - NumLoadsB: 12 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -503753,26 +502970,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1929 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1926 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -503783,14 +503000,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -503803,7 +503020,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -503847,7 +503064,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -503860,9 +503077,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29440 + LdsNumBytes: 28416 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -503871,7 +503088,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29440 + LdsOffsetMetadata: 28416 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 4 @@ -503893,14 +503110,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 12] + MIWaveTile: [4, 11] MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 176 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -503916,19 +503133,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 4 - NumLoadsB: 12 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -504014,15 +503231,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1930 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1927 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 @@ -504031,9 +503248,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 12 + ThreadTile1: 11 ThreadTileA: 16 - ThreadTileB: 12 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -504051,7 +503268,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -504064,7 +503281,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -504093,7 +503310,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -504108,22 +503325,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 16 + LSPB: 64 LVCA: 32 - LVCB: 16 + LVCB: 4 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26240 + LdsNumBytes: 30208 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9856 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -504132,44 +503349,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26240 + LdsOffsetMetadata: 30208 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 144 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 144 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -504177,19 +503394,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 4 - NumLoadsB: 9 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -504275,26 +503492,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1931 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1928 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -504312,7 +503529,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -504325,7 +503542,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -504342,7 +503559,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -504354,11 +503571,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -504369,45 +503586,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 16 + LSPB: 32 LVCA: 32 - LVCB: 16 + LVCB: 8 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -504415,22 +503632,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 176 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 176 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -504438,19 +503655,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 11 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -504536,26 +503753,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1932 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1929 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -504566,27 +503783,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -504619,7 +503836,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -504630,33 +503847,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 32 - LSPA: 8 + LSPA: 32 LSPB: 16 - LVCA: 32 + LVCA: 8 LVCB: 16 - LVPA: 1 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 25856 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 25856 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -504676,14 +503893,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -504704,14 +503921,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 16 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 3 + NumLoadsB: 12 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -504797,8 +504014,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1933 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1930 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -504806,17 +504023,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -504827,14 +504044,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -504880,7 +504097,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -504891,32 +504108,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 8 + LSPA: 32 LSPB: 64 - LVCA: 32 + LVCA: 8 LVCB: 4 - LVPA: 1 + LVPA: 4 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 45056 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -504936,15 +504153,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -504965,14 +504182,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -505058,8 +504275,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1934 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1931 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -505067,17 +504284,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -505088,14 +504305,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -505137,11 +504354,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -505152,68 +504369,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG128_2_1 - LSCA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 32 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 1 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -505226,14 +504443,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -505319,8 +504536,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1935 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM1 + SolutionIndex: 1932 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -505328,17 +504545,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -505349,14 +504566,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -505386,7 +504603,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -505413,68 +504630,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WSGRA0_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -505487,14 +504704,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 8 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -505580,8 +504797,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1936 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 1933 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -505596,10 +504813,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -505616,21 +504833,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -505663,7 +504880,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -505674,7 +504891,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WSGRA0_WG32_8_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -505687,19 +504904,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 + LdsNumBytes: 33792 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 16384 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -505719,15 +504936,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 240 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 240 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -505748,14 +504965,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 15 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -505841,8 +505058,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1937 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1934 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA0_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -505850,17 +505067,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -505871,14 +505088,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -505920,11 +505137,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -505935,68 +505152,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WSGRA0_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 45056 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 240 - MacroTileA: 256 - MacroTileB: 240 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -506009,14 +505226,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 4 - NumLoadsB: 15 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -506102,8 +505319,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1938 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 + SolutionIndex: 1935 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WSGRA0_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -506111,17 +505328,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -506132,14 +505349,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -506169,7 +505386,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -506180,14 +505397,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -506196,44 +505413,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 256 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -506241,15 +505458,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -506265,19 +505482,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 11 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 16 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -506363,26 +505580,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1939 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 + SolutionIndex: 1936 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -506393,27 +505610,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -506430,7 +505647,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -506441,14 +505658,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -506457,34 +505674,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 16 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 43264 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 67840 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 43264 + LdsOffsetMetadata_Blk: 67840 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -506492,33 +505709,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 256 + MacroTileA: 16 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -506526,19 +505743,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 - NumLoadsB: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -506624,26 +505841,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1940 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 + SolutionIndex: 1937 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -506654,27 +505871,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -506691,7 +505908,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -506702,14 +505919,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -506718,34 +505935,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -506753,53 +505970,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -506885,26 +506102,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1941 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn8 + SolutionIndex: 1938 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -506915,27 +506132,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -506952,7 +506169,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -506963,14 +506180,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -506979,44 +506196,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 256 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25856 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25856 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -507024,15 +506241,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -507047,20 +506264,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 12 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 16 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -507146,26 +506363,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1942 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 1939 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -507176,27 +506393,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -507213,7 +506430,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -507224,14 +506441,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -507240,34 +506457,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 16 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 43264 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 67840 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 45056 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 43264 + LdsOffsetMetadata_Blk: 67840 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -507275,33 +506492,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 256 + MacroTileA: 16 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -507309,19 +506526,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -507407,15 +506624,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1943 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 + SolutionIndex: 1940 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -507423,10 +506640,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -507443,21 +506660,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -507474,7 +506691,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -507485,14 +506702,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -507501,44 +506718,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -507546,15 +506763,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -507569,20 +506786,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -507668,26 +506885,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1944 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 1941 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -507698,27 +506915,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -507735,7 +506952,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -507751,7 +506968,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -507762,44 +506979,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WSGRA0_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -507807,15 +507024,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -507831,19 +507048,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -507929,26 +507146,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1945 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WSGRA0_WG32_8_1_WGMn16 + SolutionIndex: 1942 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -507959,27 +507176,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -507996,7 +507213,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -508008,11 +507225,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -508023,44 +507240,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WSGRA0_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 16 - LVCA: 32 + LVCA: 2 LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -508068,15 +507285,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -508092,19 +507309,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -508190,26 +507407,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1946 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA0_WG32_8_1_WGMn16 + SolutionIndex: 1943 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 6 + ThreadTileA: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -508220,27 +507437,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -508257,7 +507474,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -508284,88 +507501,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WSGRA0_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 256 + LSPA: 128 + LSPB: 8 + LVCA: 2 + LVCB: 32 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 45056 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -508451,26 +507668,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1947 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WSGRA0_WG64_4_1_WGMn16 + SolutionIndex: 1944 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -508487,21 +507704,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -508518,7 +507735,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -508529,14 +507746,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -508545,32 +507762,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 256 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 14592 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 20736 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 14592 + LdsOffsetMetadata_Blk: 20736 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -508579,8 +507796,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -508590,14 +507807,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] + MIWaveGroup: [2, 2] + MIWaveTile: [1, 2] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 32 MacroTile1: 64 - MacroTileA: 16 + MacroTileA: 32 MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 @@ -508619,14 +507836,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 16 - NumLoadsB: 8 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -508712,8 +507929,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1948 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1945 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -508722,16 +507939,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -508748,17 +507965,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -508779,7 +507996,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -508790,14 +508007,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -508806,32 +508023,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 16 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43264 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 67840 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43264 - LdsOffsetMetadata_Blk: 67840 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -508840,8 +508057,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -508851,15 +508068,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 256 - MacroTileA: 16 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -508874,20 +508091,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -508973,8 +508190,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1949 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1946 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -508983,16 +508200,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 4 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -509009,17 +508226,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -509051,14 +508268,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -509067,42 +508284,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_8_NTB4_NLCA1_SVW1_VWA1_WG32_4_2 + LSCA: 32 LSCB: 128 - LSPA: 16 + LSPA: 64 LSPB: 16 - LVCA: 16 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -509112,15 +508329,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [2, 1] + MIWaveTile: [1, 8] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -509141,14 +508358,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -509234,8 +508451,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1950 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1947 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_8_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -509244,16 +508461,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 8 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -509270,17 +508487,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -509301,7 +508518,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -509312,14 +508529,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -509328,34 +508545,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 256 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIWT1_1_NTB0_NLCA1_SVW1_VWA1_WG32_4_1 + LSCA: 32 + LSCB: 128 + LSPA: 32 LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 16 + LVCA: 4 + LVCB: 16 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -509363,54 +508580,54 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 16 - LoopUnroll: 256 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [1, 2] MIWaveTile: [1, 1] MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 32 MacroTile1: 64 - MacroTileA: 16 + MacroTileA: 32 MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 - NumThreads: 256 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -509495,8 +508712,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1951 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1948 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIWT1_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -509505,15 +508722,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 2 SubGroup1: 64 - SubGroupA: 4 + SubGroupA: 2 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 16 ThreadTile1: 1 - ThreadTileA: 4 + ThreadTileA: 16 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -509531,17 +508748,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -509562,7 +508779,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -509573,14 +508790,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -509589,32 +508806,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NLCA3_SVW1_VWA1_WG16_16_1 LSCA: 16 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 LVPA: 16 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVPB: 2 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43264 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 67840 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43264 - LdsOffsetMetadata_Blk: 67840 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -509623,8 +508840,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -509635,14 +508852,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 4] - MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 256 - MacroTileA: 16 - MacroTileB: 256 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -509657,19 +508874,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -509756,8 +508973,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1952 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1949 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -509772,10 +508989,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 4 - ThreadTileA: 4 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -509796,13 +509013,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -509834,14 +509051,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -509850,32 +509067,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NLCA3_SVW1_VWA1_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 16 + LSPA: 128 LSPB: 16 - LVCA: 16 + LVCA: 2 LVCB: 16 LVPA: 16 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 768 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -509896,13 +509113,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 48 MacroTile1: 128 - MacroTileA: 16 + MacroTileA: 48 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -509918,19 +509135,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -510017,8 +509234,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1953 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1950 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -510033,9 +509250,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 12 ThreadTile1: 2 - ThreadTileA: 4 + ThreadTileA: 12 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -510063,7 +509280,7 @@ _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -510096,8 +509313,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -510111,42 +509328,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCA1_SVW1_VWA1_WG16_16_1 LSCA: 16 LSCB: 128 LSPA: 128 - LSPB: 16 + LSPB: 4 LVCA: 2 - LVCB: 16 + LVCB: 64 LVPA: 16 LVPB: 2 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -510156,15 +509373,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 2] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -510179,20 +509396,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 1 - NumLoadsB: 4 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -510278,8 +509495,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1954 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1951 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -510289,15 +509506,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -510314,11 +509531,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -510358,10 +509575,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -510372,42 +509589,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 128 + LSPA: 64 LSPB: 16 - LVCA: 2 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 27648 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 27648 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -510417,15 +509634,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -510446,14 +509663,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -510539,8 +509756,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1955 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1952 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -510548,17 +509765,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -510569,17 +509786,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -510606,7 +509823,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -510619,10 +509836,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -510633,22 +509850,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 128 - LSPB: 8 - LVCA: 2 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 + LdsNumBytes: 64512 LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -510657,13 +509874,13 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 + LdsOffsetMetadata: 64512 LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -510678,15 +509895,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -510707,14 +509924,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -510800,8 +510017,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1956 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1953 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -510809,17 +510026,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -510830,21 +510047,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -510880,10 +510097,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -510894,7 +510111,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -510907,20 +510124,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 14592 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 20736 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 14592 - LdsOffsetMetadata_Blk: 20736 - LdsPadA: 16 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -510939,15 +510156,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 64 + MacroTile1: 320 MacroTileA: 32 - MacroTileB: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -510968,14 +510185,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 1 - NumLoadsB: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -511061,8 +510278,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1957 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1954 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -511070,17 +510287,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -511091,17 +510308,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -511128,7 +510345,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -511141,7 +510358,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -511155,37 +510372,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 256 + LSPA: 128 + LSPB: 8 + LVCA: 2 + LVCB: 32 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -511200,15 +510417,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 2] MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -511223,20 +510440,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -511322,8 +510539,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1958 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1955 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -511332,16 +510549,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 5 + ThreadTile1: 2 ThreadTileA: 4 - ThreadTileB: 5 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -511358,15 +510575,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -511402,7 +510619,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -511416,32 +510633,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_8_NTB4_NLCA1_SVW1_VWA1_WG32_4_2 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 LSCB: 128 - LSPA: 64 + LSPA: 128 LSPB: 16 - LVCA: 4 + LVCA: 2 LVCB: 16 - LVPA: 8 + LVPA: 16 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 8704 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -511461,14 +510678,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 8] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 4] MIWaveTileA: 1 - MIWaveTileB: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 16 MacroTile1: 128 - MacroTileA: 32 + MacroTileA: 16 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -511484,19 +510701,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -511583,8 +510800,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1959 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_8_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 + SolutionIndex: 1956 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -511593,16 +510810,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 8 + ThreadTile1: 4 ThreadTileA: 4 - ThreadTileB: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -511619,11 +510836,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -511650,7 +510867,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -511663,10 +510880,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -511677,68 +510894,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIWT1_1_NTB0_NLCA1_SVW1_VWA1_WG32_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 LSCA: 32 - LSCB: 128 - LSPA: 32 - LSPB: 8 + LSCB: 64 + LSPA: 64 + LSPB: 32 LVCA: 4 - LVCB: 16 - LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 256 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 64 + MacroTile1: 320 MacroTileA: 32 - MacroTileB: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -511751,15 +510968,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 1 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -511844,8 +511061,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1960 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIWT1_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM1 + SolutionIndex: 1957 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -511853,17 +511070,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 + StoreVectorWidth: 2 + SubGroup0: 4 SubGroup1: 64 - SubGroupA: 2 + SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -511874,21 +511091,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -511927,7 +511144,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -511938,33 +511155,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 128 + LSPA: 64 LSPB: 16 - LVCA: 2 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 2 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -511984,13 +511201,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 + MIWaveTile: [2, 2] + MIWaveTileA: 2 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 32 MacroTile1: 128 - MacroTileA: 48 + MacroTileA: 32 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -512012,13 +511229,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -512105,8 +511322,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1961 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1958 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -512114,16 +511331,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 8 ThreadTile1: 2 - ThreadTileA: 12 + ThreadTileA: 8 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -512135,7 +511352,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -512185,10 +511402,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -512199,42 +511416,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG16_8_2 + LSCA: 32 LSCB: 128 - LSPA: 128 + LSPA: 64 LSPB: 16 - LVCA: 2 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 2 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -512244,14 +511461,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 32 MacroTile1: 128 - MacroTileA: 48 + MacroTileA: 32 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -512273,13 +511490,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -512366,8 +511583,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1962 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1959 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -512375,17 +511592,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -512396,17 +511613,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -512433,7 +511650,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -512445,11 +511662,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -512460,33 +511677,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 64 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 29184 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 29184 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -512494,8 +511711,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -512505,15 +511722,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -512528,20 +511745,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 48 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -512627,8 +511844,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1963 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1960 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -512636,17 +511853,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -512657,21 +511874,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -512707,7 +511924,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -512721,32 +511938,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 64 + LSPA: 32 LSPB: 16 - LVCA: 4 + LVCA: 8 LVCB: 16 - LVPA: 8 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27648 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27648 - LdsOffsetMetadata_Blk: 41984 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -512766,15 +511983,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -512795,14 +512012,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -512888,8 +512105,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1964 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1961 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -512898,16 +512115,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 1 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 1 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -512924,11 +512141,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -512982,32 +512199,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 64 + LSPA: 32 LSPB: 16 - LVCA: 4 + LVCA: 8 LVCB: 16 - LVPA: 8 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -513027,15 +512244,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -513056,14 +512273,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -513149,8 +512366,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1965 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1962 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -513159,16 +512376,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -513185,7 +512402,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -513216,7 +512433,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -513229,7 +512446,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -513243,68 +512460,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_4_2 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 5] + MIWaveGroup: [1, 2] + MIWaveTile: [2, 2] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 320 - MacroTileA: 32 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -513317,14 +512534,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 10 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -513410,8 +512627,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1966 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1963 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_CLR1_GRVWB8_GSU1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -513420,16 +512637,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 + SubGroup0: 2 SubGroup1: 64 - SubGroupA: 4 + SubGroupA: 2 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -513446,15 +512663,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -513477,7 +512694,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -513490,7 +512707,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -513504,44 +512721,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 128 - LSPB: 8 - LVCA: 2 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 58624 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 58624 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -513549,15 +512766,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -513578,14 +512795,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 9 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -513671,8 +512888,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1967 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1964 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -513681,16 +512898,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -513707,15 +512924,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -513738,7 +512955,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -513751,10 +512968,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -513765,44 +512982,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -513810,15 +513027,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 4] - MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -513833,20 +513050,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -513932,8 +513149,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1968 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1965 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -513941,17 +513158,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 4 - ThreadTileA: 4 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -513962,21 +513179,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 6] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -513999,7 +513216,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -514012,7 +513229,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -514026,37 +513243,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NLCA1_PLR1_SVW2_VWA2_WG32_4_2 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 57344 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -514071,15 +513288,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 5] + MIWaveGroup: [2, 1] + MIWaveTile: [2, 7] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 320 - MacroTileA: 32 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 112 + MacroTileA: 64 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -514094,20 +513311,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 10 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 14 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -514193,8 +513410,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1969 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1966 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -514203,16 +513420,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -514229,15 +513446,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -514273,7 +513490,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -514287,42 +513504,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_4_2 + LSCA: 64 LSCB: 128 - LSPA: 64 + LSPA: 32 LSPB: 16 - LVCA: 4 + LVCA: 8 LVCB: 16 - LVPA: 8 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 57344 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -514332,15 +513549,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] + MIWaveGroup: [2, 1] + MIWaveTile: [2, 7] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 128 - MacroTileA: 32 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 112 + MacroTileA: 64 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -514355,20 +513572,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 14 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -514454,8 +513671,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1970 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1967 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -514464,16 +513681,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 2 + ThreadTile1: 7 ThreadTileA: 8 - ThreadTileB: 2 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -514490,11 +513707,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -514537,7 +513754,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -514548,33 +513765,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG16_8_2 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_PLR1_SVW4_VWA4_WG16_8_2 + LSCA: 64 LSCB: 128 - LSPA: 64 + LSPA: 32 LSPB: 16 - LVCA: 4 + LVCA: 8 LVCB: 16 - LVPA: 8 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16384 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -514594,13 +513811,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 64 MacroTile1: 128 - MacroTileA: 32 + MacroTileA: 64 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -514622,13 +513839,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 + NumElementsPerThread: 32 NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -514715,8 +513932,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1971 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 1968 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -514724,16 +513941,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 32 SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 8 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -514745,7 +513962,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -514782,7 +513999,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -514795,10 +514012,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -514809,37 +514026,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_PLR1_SVW4_VWA4_WG16_8_2 LSCA: 64 - LSCB: 64 + LSCB: 128 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 + LVPB: 2 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29184 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29184 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -514854,15 +514071,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 128 + MacroTile1: 96 MacroTileA: 64 - MacroTileB: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -514883,14 +514100,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -514976,8 +514193,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1972 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1969 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -514985,17 +514202,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreVectorWidth: 4 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -515006,21 +514223,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -515043,7 +514260,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -515055,8 +514272,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -515070,32 +514287,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 128 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 8 LVCA: 8 - LVCB: 16 + LVCB: 32 LVPA: 4 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 29184 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 29184 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -515104,8 +514321,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -515116,14 +514333,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 160 + MacroTile1: 128 MacroTileA: 64 - MacroTileB: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -515144,14 +514361,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -515237,8 +514454,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1973 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1970 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB2_GSU2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -515254,9 +514471,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 4 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -515277,11 +514494,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -515317,7 +514534,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -515331,7 +514548,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB4_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 128 LSPA: 32 @@ -515344,9 +514561,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 54272 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -515355,7 +514572,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 + LdsOffsetMetadata: 54272 LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 @@ -515377,14 +514594,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 160 + MacroTile1: 128 MacroTileA: 64 - MacroTileB: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -515405,14 +514622,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -515498,8 +514715,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1974 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWB8_GSU3_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1971 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -515515,9 +514732,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 4 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -515538,7 +514755,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -515565,7 +514782,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -515578,10 +514795,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -515592,88 +514809,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_4_2 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 58624 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 58624 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 9 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -515759,8 +514976,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1975 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_CLR1_GRVWB8_GSU1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 1972 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -515768,17 +514985,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 64 - SubGroupA: 2 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -515789,21 +515006,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -515826,7 +515043,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -515839,10 +515056,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -515853,33 +515070,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58624 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58624 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -515887,10 +515104,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -515899,14 +515116,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -515927,14 +515144,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 9 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -516020,8 +515237,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1976 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1973 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -516029,17 +515246,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -516050,7 +515267,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -516060,11 +515277,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -516087,7 +515304,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -516100,10 +515317,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -516114,44 +515331,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_PLR1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NLCA1_PLR1_SVW4_VWA4_WG16_8_2 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -516159,15 +515376,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -516188,14 +515405,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -516281,8 +515498,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1977 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_GSU6_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1974 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -516290,17 +515507,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -516311,21 +515528,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -516364,7 +515581,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -516375,7 +515592,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NLCA1_PLR1_SVW2_VWA2_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_NLCA1_PLR1_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 128 LSPA: 32 @@ -516388,29 +515605,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57344 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -516420,15 +515637,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 112 + MacroTile1: 64 MacroTileA: 64 - MacroTileB: 112 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -516443,20 +515660,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 14 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 - NumLoadsB: 7 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -516542,8 +515759,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1978 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 1975 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -516551,17 +515768,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -516572,13 +515789,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -516622,10 +515839,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -516636,7 +515853,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_PLR1_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 128 LSPA: 32 @@ -516649,29 +515866,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57344 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -516681,15 +515898,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 112 + MacroTile1: 128 MacroTileA: 64 - MacroTileB: 112 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -516704,20 +515921,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 14 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 - NumLoadsB: 7 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -516803,8 +516020,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1979 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 1976 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -516812,17 +516029,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -516833,17 +516050,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -516886,7 +516103,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -516897,7 +516114,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_PLR1_SVW4_VWA4_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_4_2 LSCA: 64 LSCB: 128 LSPA: 32 @@ -516911,19 +516128,19 @@ LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -516942,10 +516159,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 64 MacroTile1: 128 @@ -516972,7 +516189,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 @@ -517064,8 +516281,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1980 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 + SolutionIndex: 1977 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -517073,17 +516290,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -517094,13 +516311,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -517131,7 +516348,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -517144,10 +516361,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -517158,44 +516375,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_PLR1_SVW4_VWA4_WG16_8_2 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -517203,15 +516420,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -517226,20 +516443,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -517325,8 +516542,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1981 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 + SolutionIndex: 1978 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -517334,17 +516551,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -517355,21 +516572,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -517404,11 +516621,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -517419,33 +516636,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29184 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29184 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -517456,7 +516673,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -517465,14 +516682,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [3, 10] + MIWaveTileA: 3 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -517493,14 +516710,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 16 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -517586,8 +516803,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1982 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_CLR1_GRVWB2_GSU2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1979 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -517595,17 +516812,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 10 + ThreadTileA: 12 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -517616,7 +516833,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -517626,7 +516843,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -517666,7 +516883,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -517680,45 +516897,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB4_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 128 - LSPA: 32 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 16 LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -517726,29 +516943,29 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 @@ -517756,12 +516973,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 32 NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -517847,8 +517064,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1983 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1980 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -517857,16 +517074,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -517883,11 +517100,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -517926,11 +517143,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -517941,33 +517158,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58624 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58624 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -517987,14 +517204,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -518009,20 +517226,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 9 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 28 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -518108,8 +517325,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1984 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1981 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -518117,17 +517334,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -518138,7 +517355,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -518148,7 +517365,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -518175,7 +517392,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -518188,10 +517405,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -518202,33 +517419,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -518236,8 +517453,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -518248,14 +517465,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -518270,20 +517487,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -518369,8 +517586,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1985 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1982 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -518378,17 +517595,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -518399,7 +517616,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -518409,11 +517626,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -518436,7 +517653,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -518452,7 +517669,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -518463,37 +517680,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NLCA1_PLR1_SVW4_VWA4_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 128 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -518508,15 +517725,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 128 + MacroTile1: 160 MacroTileA: 64 - MacroTileB: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -518531,20 +517748,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -518630,8 +517847,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1986 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 + SolutionIndex: 1983 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -518639,17 +517856,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -518660,21 +517877,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -518697,7 +517914,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -518709,11 +517926,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -518724,44 +517941,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_NLCA1_PLR1_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1280 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 21504 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 21504 + LdsOffsetB_Blk: 87040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 87040 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -518769,15 +517986,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 4] - MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -518798,14 +518015,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 40 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -518891,8 +518108,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1987 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1984 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU6_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -518900,17 +518117,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 4 - ThreadTileA: 4 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -518921,21 +518138,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 6] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -518958,7 +518175,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -518971,10 +518188,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -518985,33 +518202,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_PLR1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -519019,10 +518236,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -519030,15 +518247,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -519059,14 +518276,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -519152,8 +518369,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1988 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1985 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -519161,17 +518378,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -519182,21 +518399,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -519246,7 +518463,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_PLR1_SVW2_VWA2_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 128 LSPA: 32 @@ -519259,9 +518476,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 63488 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -519270,18 +518487,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 + LdsOffsetMetadata: 63488 LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -519291,15 +518508,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 8] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 128 + MacroTile1: 160 MacroTileA: 64 - MacroTileB: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -519314,20 +518531,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -519413,8 +518630,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1989 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 1986 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -519424,15 +518641,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 8 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -519449,7 +518666,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -519493,7 +518710,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -519507,7 +518724,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_PLR1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -519520,9 +518737,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 + LdsNumBytes: 64000 LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -519531,7 +518748,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 + LdsOffsetMetadata: 64000 LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 LdsPadB: 16 @@ -519553,14 +518770,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] + MIWaveTile: [6, 5] MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 96 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -519575,20 +518792,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 3 - NumLoadsB: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -519674,8 +518891,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1990 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1987 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -519691,9 +518908,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 24 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -519714,7 +518931,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -519754,10 +518971,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -519768,33 +518985,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NLCA3_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -519814,14 +519031,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 10] - MIWaveTileA: 3 - MIWaveTileB: 10 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -519836,20 +519053,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 3 - NumLoadsB: 10 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -519935,8 +519152,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1991 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_CLR1_GRVWB8_GSU5_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NLCA3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1988 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -519944,17 +519161,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 10 - ThreadTileA: 12 - ThreadTileB: 10 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -519965,7 +519182,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -519975,7 +519192,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -520002,7 +519219,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -520018,7 +519235,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -520029,32 +519246,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 LSCA: 128 - LSCB: 128 + LSCB: 64 LSPA: 16 - LSPB: 16 + LSPB: 32 LVCA: 16 - LVCB: 16 + LVCB: 8 LVPA: 2 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -520063,8 +519280,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 128 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] @@ -520074,10 +519291,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 128 MacroTile1: 64 @@ -520104,13 +519321,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -520196,8 +519413,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1992 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1989 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -520205,17 +519422,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 1 - ThreadTileA: 32 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -520226,21 +519443,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -520275,11 +519492,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -520290,22 +519507,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 8 + LSPB: 32 LVCA: 16 - LVCB: 32 + LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 34816 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -520314,21 +519531,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 34816 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -520336,22 +519553,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 224 + MacroTile1: 128 MacroTileA: 128 - MacroTileB: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -520364,14 +519581,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -520457,8 +519674,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1993 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1990 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -520466,17 +519683,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -520487,17 +519704,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -520540,7 +519757,7 @@ GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -520551,7 +519768,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -520560,13 +519777,13 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -520575,21 +519792,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -520597,42 +519814,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 160 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 4 - NumLoadsB: 5 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -520718,8 +519935,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1994 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1991 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -520727,16 +519944,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -520748,13 +519965,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -520785,7 +520002,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -520801,7 +520018,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -520812,33 +520029,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -520846,8 +520063,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -520858,14 +520075,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -520886,14 +520103,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 5 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -520979,8 +520196,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1995 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1992 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -520988,17 +520205,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -521009,7 +520226,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -521020,10 +520237,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -521058,8 +520275,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 6 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -521073,68 +520290,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1280 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 21504 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21504 - LdsOffsetB_Blk: 87040 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 87040 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -521147,14 +520364,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 40 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -521240,8 +520457,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1996 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU6_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1993 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -521256,10 +520473,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -521276,11 +520493,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -521320,10 +520537,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -521334,33 +520551,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -521380,14 +520597,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -521408,14 +520625,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -521501,8 +520718,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1997 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1994 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -521510,17 +520727,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -521531,7 +520748,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -521541,7 +520758,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -521568,7 +520785,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -521581,10 +520798,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -521595,33 +520812,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 51456 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 51456 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -521629,10 +520846,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -521641,14 +520858,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -521663,20 +520880,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -521762,8 +520979,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1998 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1995 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -521771,17 +520988,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -521792,7 +521009,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -521802,11 +521019,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -521842,10 +521059,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -521856,7 +521073,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1280_LBSPPB128_LPA16_LPB8_LRVW4_MIAV0_MIWT5_9_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -521865,27 +521082,27 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 1280 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 41472 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -521901,15 +521118,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -521930,14 +521147,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 5 + NumLoadsB: 9 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -522023,8 +521240,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1999 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1996 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA1280_LBSPPB128_LPA16_LPB8_LRVW4_MIAV0_MIWT5_9_NTB0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -522032,17 +521249,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -522053,17 +521270,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -522103,7 +521320,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -522117,32 +521334,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 90624 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -522162,15 +521379,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -522191,14 +521408,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -522284,8 +521501,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2000 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1997 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB4_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -522294,16 +521511,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -522320,11 +521537,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -522367,7 +521584,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -522378,68 +521595,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 32 - LVCA: 16 + LVCA: 8 LVCB: 8 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 38912 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 38912 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 192 + MacroTileA: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -522452,14 +521669,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -522545,8 +521762,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2001 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 1998 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -522554,17 +521771,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -522575,13 +521792,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -522624,8 +521841,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -522639,45 +521856,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -522685,22 +521902,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -522713,14 +521930,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 36 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -522806,8 +522023,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2002 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1999 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -522816,16 +522033,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -522842,11 +522059,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -522885,8 +522102,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -522900,45 +522117,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -522946,42 +522163,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 36 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -523067,8 +522284,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2003 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2000 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -523077,16 +522294,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -523103,11 +522320,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -523134,7 +522351,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -523150,7 +522367,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -523161,33 +522378,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 27904 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 45312 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 27904 + LdsOffsetMetadata_Blk: 45312 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -523195,8 +522412,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -523207,14 +522424,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -523235,14 +522452,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -523328,8 +522545,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2004 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2001 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -523337,17 +522554,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -523358,7 +522575,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -523369,10 +522586,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -523408,7 +522625,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -523422,7 +522639,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -523431,59 +522648,59 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 37376 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 37376 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 192 + MacroTile1: 128 MacroTileA: 128 - MacroTileB: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -523496,14 +522713,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -523589,8 +522806,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2005 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2002 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -523599,16 +522816,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -523629,7 +522846,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -523669,10 +522886,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -523683,33 +522900,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB0_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 59648 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 59648 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -523729,14 +522946,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -523751,20 +522968,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -523850,8 +523067,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2006 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2003 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -523859,17 +523076,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -523880,7 +523097,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -523890,7 +523107,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -523930,10 +523147,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -523944,45 +523161,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51456 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51456 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -523990,22 +523207,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -524018,14 +523235,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 5 - NumLoadsB: 6 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -524111,8 +523328,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2007 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2004 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -524120,17 +523337,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -524141,17 +523358,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -524191,10 +523408,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -524205,45 +523422,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1280_LBSPPB128_LPA16_LPB8_LRVW4_MIAV0_MIWT5_9_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1280 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 41472 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -524251,42 +523468,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 5 - NumLoadsB: 9 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -524372,8 +523589,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2008 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA1280_LBSPPB128_LPA16_LPB8_LRVW4_MIAV0_MIWT5_9_NTB0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2005 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -524381,17 +523598,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -524402,17 +523619,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -524451,7 +523668,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -524466,13 +523683,13 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 - LSPB: 32 + LSPB: 8 LVCA: 4 - LVCB: 8 + LVCB: 32 LVPA: 8 LVPB: 4 LdsBlockSizePerPadA: 2560 @@ -524534,7 +523751,7 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 @@ -524543,11 +523760,11 @@ NumElementsPerThread: 160 NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 5 - NumLoadsB: 8 + NumLoadsB: 32 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -524633,8 +523850,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2009 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB4_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2006 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -524716,7 +523933,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -524727,7 +523944,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NTB4_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -524736,79 +523953,79 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38912 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38912 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 192 - MacroTileA: 64 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 64 + MacroTileA: 192 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -524894,8 +524111,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2010 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2007 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -524903,17 +524120,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 1 + ThreadTileA: 48 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -524924,13 +524141,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -524973,8 +524190,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -524988,36 +524205,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 90624 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -525034,14 +524251,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] + MIWaveTile: [6, 4] MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 288 + MacroTile1: 128 MacroTileA: 192 - MacroTileB: 288 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -525062,14 +524279,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 6 - NumLoadsB: 36 + NumLoadsB: 4 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -525155,8 +524372,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2011 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2008 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -525172,9 +524389,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 9 + ThreadTile1: 4 ThreadTileA: 24 - ThreadTileB: 9 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -525195,7 +524412,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -525234,11 +524451,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -525249,45 +524466,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -525295,42 +524512,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 288 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 288 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 NumLoadsA: 6 - NumLoadsB: 36 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -525416,8 +524633,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2012 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2009 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -525425,17 +524642,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -525446,17 +524663,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -525499,7 +524716,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -525510,45 +524727,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27904 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 45312 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27904 - LdsOffsetMetadata_Blk: 45312 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -525556,42 +524773,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -525677,8 +524894,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2013 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2010 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -525686,17 +524903,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -525707,13 +524924,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -525757,7 +524974,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -525771,7 +524988,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -525780,59 +524997,59 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37376 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37376 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -525845,14 +525062,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -525938,8 +525155,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2014 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2011 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -525948,16 +525165,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 8 - ThreadTileA: 8 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -525978,7 +525195,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -526017,11 +525234,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -526032,33 +525249,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB0_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59648 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59648 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -526069,7 +525286,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -526077,15 +525294,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 112 + MacroTileA: 128 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -526100,20 +525317,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 14 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -526199,8 +525416,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2015 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2012 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -526208,17 +525425,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -526229,17 +525446,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -526279,7 +525496,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -526293,7 +525510,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -526306,9 +525523,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 + LdsNumBytes: 34816 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -526317,7 +525534,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 + LdsOffsetMetadata: 34816 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 @@ -526330,7 +525547,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -526339,14 +525556,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] + MIWaveTile: [2, 2] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 128 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -526362,19 +525579,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -526460,8 +525677,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2016 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2013 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -526477,9 +525694,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 2 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -526500,7 +525717,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -526527,7 +525744,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -526539,11 +525756,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -526554,88 +525771,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 + LdsNumBytes: 28416 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 28416 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -526721,8 +525938,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2017 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2014 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -526730,17 +525947,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -526751,7 +525968,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -526761,11 +525978,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -526800,8 +526017,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -526815,32 +526032,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 8704 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -526852,7 +526069,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -526860,14 +526077,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 64 MacroTile1: 256 - MacroTileA: 160 + MacroTileA: 64 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -526884,19 +526101,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 32 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -526982,8 +526199,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2018 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2015 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -526992,16 +526209,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -527018,11 +526235,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -527065,7 +526282,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -527076,7 +526293,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NTB4_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -527089,19 +526306,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -527121,15 +526338,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 64 - MacroTileA: 192 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -527144,20 +526361,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 2 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -527243,8 +526460,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2019 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2016 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -527252,17 +526469,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 1 - ThreadTileA: 48 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -527273,13 +526490,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -527323,7 +526540,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -527337,7 +526554,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -527346,59 +526563,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -527406,19 +526623,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -527504,8 +526721,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2020 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2017 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -527514,16 +526731,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -527544,7 +526761,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -527584,10 +526801,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -527598,45 +526815,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -527644,42 +526861,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -527765,8 +526982,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2021 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2018 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -527774,17 +526991,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -527795,17 +527012,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -527848,7 +527065,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -527859,7 +527076,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -527868,13 +527085,13 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 + LdsNumBytes: 41984 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -527883,21 +527100,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 + LdsOffsetMetadata: 41984 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -527905,42 +527122,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -528026,8 +527243,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2022 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2019 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -528035,17 +527252,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -528056,13 +527273,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -528106,10 +527323,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -528120,7 +527337,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -528129,13 +527346,13 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 + LdsNumBytes: 41984 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -528144,21 +527361,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 + LdsOffsetMetadata: 41984 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -528166,22 +527383,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -528189,19 +527406,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -528287,8 +527504,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2023 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2020 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -528296,17 +527513,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -528317,17 +527534,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -528354,7 +527571,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -528381,42 +527598,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 - LSPB: 8 + LSPB: 16 LVCA: 16 - LVCB: 32 + LVCB: 16 LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 16384 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 25088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 16384 + LdsOffsetMetadata_Blk: 25088 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -528449,7 +527666,7 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 @@ -528457,12 +527674,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 56 NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 14 + NumLoadsA: 2 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -528548,8 +527765,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2024 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2021 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -528589,10 +527806,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -528615,7 +527832,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -528642,32 +527859,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 + LdsNumBytes: 25600 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -528676,10 +527893,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -528687,14 +527904,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -528716,14 +527933,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -528809,8 +528026,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2025 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2022 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -528819,16 +528036,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 2 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 2 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -528845,15 +528062,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -528876,7 +528093,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -528888,11 +528105,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -528903,42 +528120,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB0_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -528948,15 +528165,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -528977,14 +528194,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 11 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 7 + NumLoadsB: 7 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -529070,8 +528287,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2026 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU3_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_11_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2023 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -529079,17 +528296,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -529100,21 +528317,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -529153,7 +528370,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -529164,33 +528381,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT8_2_NTB0_NTC0_NTD0_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 - LVPA: 4 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -529210,14 +528427,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 64 + MacroTileA: 256 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -529233,19 +528450,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -529331,8 +528548,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2027 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2024 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT8_2_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -529340,17 +528557,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 8 - ThreadTileA: 8 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -529361,7 +528578,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -529398,7 +528615,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -529410,11 +528627,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -529425,68 +528642,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_15_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -529494,19 +528711,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 4 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -529592,8 +528809,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2028 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2025 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_15_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -529601,17 +528818,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -529622,21 +528839,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 4] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -529686,45 +528903,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT10_2_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -529732,22 +528949,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 + MIWaveTile: [10, 2] + MIWaveTileA: 10 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -529755,19 +528972,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 + NumLoadsB: 4 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -529853,8 +529070,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2029 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2026 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT10_2_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -529863,15 +529080,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 40 ThreadTile1: 2 - ThreadTileA: 32 + ThreadTileA: 40 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -529889,7 +529106,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -529936,7 +529153,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -529947,33 +529164,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 32 - LVCA: 16 + LVCA: 8 LVCB: 8 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -529993,14 +529210,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [2, 9] + MIWaveTileA: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 288 + MacroTileA: 64 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -530015,20 +529232,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 2 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -530114,8 +529331,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2030 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2027 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -530123,17 +529340,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 9 + ThreadTileA: 8 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -530144,7 +529361,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -530181,7 +529398,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -530194,10 +529411,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -530208,34 +529425,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NTB0_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 86016 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 86016 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -530243,10 +529460,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -530254,22 +529471,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -530282,14 +529499,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -530375,8 +529592,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2031 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2028 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -530384,17 +529601,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -530405,21 +529622,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -530458,7 +529675,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -530469,7 +529686,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG128_2_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -530478,13 +529695,13 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 + LdsNumBytes: 44032 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -530493,44 +529710,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 + LdsOffsetMetadata: 44032 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 128 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -530543,14 +529760,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 4 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -530636,8 +529853,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2032 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2029 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -530645,7 +529862,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -530653,9 +529870,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 5 + ThreadTile1: 6 ThreadTileA: 16 - ThreadTileB: 5 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -530666,13 +529883,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -530703,7 +529920,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -530715,7 +529932,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -530730,68 +529947,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 - LSCB: 32 + LSCB: 64 LSPA: 16 - LSPB: 16 + LSPB: 32 LVCA: 16 - LVCB: 16 + LVCB: 8 LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 16384 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 25088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 16384 - LdsOffsetMetadata_Blk: 25088 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 112 + MacroTile1: 192 MacroTileA: 128 - MacroTileB: 112 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -530804,14 +530021,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 7 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -530897,8 +530114,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2033 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2030 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -530907,16 +530124,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -530938,10 +530155,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -530964,7 +530181,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -530991,32 +530208,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 + LdsNumBytes: 44032 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -531025,8 +530242,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -531036,15 +530253,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -531060,19 +530277,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -531158,8 +530375,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2034 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2031 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -531168,16 +530385,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 3 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -531194,15 +530411,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -531238,10 +530455,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -531252,7 +530469,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB0_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -531265,20 +530482,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -531297,15 +530514,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 2] + MIWaveTileA: 14 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 224 - MacroTile1: 224 + MacroTile1: 128 MacroTileA: 224 - MacroTileB: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -531326,14 +530543,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 NumLoadsA: 7 - NumLoadsB: 7 + NumLoadsB: 4 NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -531419,8 +530636,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2035 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2032 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -531428,17 +530645,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 56 + ThreadTile1: 2 + ThreadTileA: 56 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -531449,17 +530666,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -531502,7 +530719,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -531513,7 +530730,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT8_2_NTB0_NTC0_NTD0_NLCA1_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 LSCB: 64 LSPA: 8 @@ -531522,13 +530739,13 @@ LVCB: 8 LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 + LdsNumBytes: 51200 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 10240 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -531537,44 +530754,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 + LdsOffsetMetadata: 51200 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 64 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -531582,19 +530799,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -531680,8 +530897,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2036 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT8_2_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2033 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -531689,7 +530906,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -531697,9 +530914,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 2 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 2 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -531710,13 +530927,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -531747,7 +530964,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -531759,8 +530976,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -531774,68 +530991,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_15_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT4_1_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 16 + LSPB: 32 LVCA: 32 - LVCB: 16 + LVCB: 8 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 1] MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 240 + MacroTile1: 64 MacroTileA: 256 - MacroTileB: 240 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -531848,14 +531065,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 4 - NumLoadsB: 15 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -531941,8 +531158,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2037 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_15_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2034 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT4_1_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -531951,16 +531168,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 64 + ThreadTile1: 1 + ThreadTileA: 64 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -531981,11 +531198,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -532024,7 +531241,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -532035,33 +531252,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT10_2_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 20992 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 16384 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -532080,14 +531297,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 2] - MIWaveTileA: 10 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 128 MacroTile1: 128 - MacroTileA: 160 + MacroTileA: 128 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -532109,13 +531326,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -532202,8 +531419,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2038 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT10_2_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2035 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -532211,17 +531428,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 2 - ThreadTileA: 40 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -532232,13 +531449,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -532269,7 +531486,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -532285,7 +531502,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -532296,42 +531513,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x64x32_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA0_LPB8_LRVW4_MIAV1_MIWT20_1_NTB0_NTC3_NTD3_NLCA5_SVW4_VWA4_WG16_16_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 64 LVCA: 8 - LVCB: 8 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 25088 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 53248 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 53248 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -532341,15 +531558,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 1] + MIWaveTileA: 20 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 288 - MacroTileA: 64 - MacroTileB: 288 + MacroTile0: 320 + MacroTile1: 64 + MacroTileA: 320 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -532370,14 +531587,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 2 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 5 + NumLoadsB: 1 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -532463,8 +531680,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2039 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2036 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x64x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA0_LPB8_LRVW4_MIAV1_MIWT20_1_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -532472,17 +531689,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 80 + ThreadTile1: 1 + ThreadTileA: 80 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -532493,21 +531710,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -532530,7 +531747,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -532543,7 +531760,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -532557,34 +531774,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NTB0_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB0_NTC3_NTD3_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 64 + LSPB: 32 LVCA: 8 - LVCB: 4 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + LVPB: 4 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61696 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 86016 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 86016 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 61696 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -532592,33 +531809,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [5, 8] MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 320 - MacroTile1: 192 + MacroTile1: 128 MacroTileA: 320 - MacroTileB: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -532626,19 +531843,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -532724,8 +531941,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2040 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2037 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -532734,16 +531951,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -532764,11 +531981,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -532791,7 +532008,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -532803,11 +532020,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -532818,68 +532035,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT12_2_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 20992 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 20992 + LdsOffsetMetadata_Blk: 45056 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 2] + MIWaveTileA: 12 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -532893,13 +532110,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 4 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -532985,8 +532202,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2041 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2038 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT12_2_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -532994,17 +532211,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 48 + ThreadTile1: 2 + ThreadTileA: 48 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -533015,21 +532232,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -533079,45 +532296,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 32 - LVCA: 16 + LVCA: 8 LVCB: 8 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -533125,22 +532342,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -533155,12 +532372,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 96 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -533246,8 +532463,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2042 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2039 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -533256,16 +532473,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -533282,7 +532499,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -533325,8 +532542,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -533340,45 +532557,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -533386,22 +532603,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -533409,19 +532626,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 32 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -533507,8 +532724,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2043 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2040 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -533517,16 +532734,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -533543,11 +532760,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -533574,7 +532791,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -533586,11 +532803,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -533601,42 +532818,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_8_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 25088 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -533646,14 +532863,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 2] - MIWaveTileA: 14 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -533670,19 +532887,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 7 - NumLoadsB: 4 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -533768,8 +532985,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2044 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2041 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_8_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -533777,17 +532994,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 2 - ThreadTileA: 56 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -533798,21 +533015,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -533862,87 +533079,87 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 8 + LSPA: 64 LSPB: 32 - LVCA: 32 + LVCA: 4 LVCB: 8 - LVPA: 1 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 2] + MIWaveTileA: 14 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 224 MacroTile1: 128 - MacroTileA: 256 + MacroTileA: 224 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 7 NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -534029,8 +533246,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2045 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2042 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -534039,16 +533256,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 56 + ThreadTile1: 2 + ThreadTileA: 56 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -534065,7 +533282,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -534123,7 +533340,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT4_1_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 LSCB: 64 LSPA: 8 @@ -534132,13 +533349,13 @@ LVCB: 8 LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -534147,44 +533364,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 1] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 8] MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 64 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -534197,14 +533414,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -534290,8 +533507,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2046 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT4_1_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2043 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -534300,16 +533517,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 1 - ThreadTileA: 64 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -534327,7 +533544,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -534373,7 +533590,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -534384,7 +533601,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -534393,13 +533610,13 @@ LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 20480 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -534408,21 +533625,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -534430,22 +533647,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 + MIWaveTile: [2, 4] + MIWaveTileA: 2 MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -534458,14 +533675,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -534551,8 +533768,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2047 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2044 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -534560,16 +533777,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -534581,14 +533798,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -534618,7 +533835,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -534630,7 +533847,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -534645,44 +533862,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x64x32_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA0_LPB8_LRVW4_MIAV1_MIWT20_1_NTB0_NTC3_NTD3_NLCA5_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25088 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 53248 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25088 - LdsOffsetMetadata_Blk: 53248 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -534690,15 +533907,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [20, 1] - MIWaveTileA: 20 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 64 - MacroTileA: 320 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -534714,19 +533931,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 5 - NumLoadsB: 1 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 28 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -534812,8 +534029,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2048 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x64x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA0_LPB8_LRVW4_MIAV1_MIWT20_1_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2045 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -534822,16 +534039,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 1 - ThreadTileA: 80 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -534848,15 +534065,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -534892,10 +534109,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -534906,7 +534123,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB0_NTC3_NTD3_NLCA5_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -534915,24 +534132,24 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61696 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61696 - LdsOffsetMetadata_Blk: 106752 - LdsPadA: 16 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -534951,15 +534168,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -534980,14 +534197,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 10 - NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -535073,8 +534290,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2049 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2046 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -535082,17 +534299,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -535103,17 +534320,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -535140,7 +534357,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -535167,42 +534384,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT12_2_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_8_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 20992 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 57344 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 20992 - LdsOffsetMetadata_Blk: 45056 + LdsOffsetMetadata: 57344 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -535212,15 +534429,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 2] - MIWaveTileA: 12 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -535236,19 +534453,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 32 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -535334,8 +534551,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2050 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT12_2_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2047 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_8_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -535344,16 +534561,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 2 - ThreadTileA: 48 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -535370,15 +534587,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -535428,45 +534645,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -535474,22 +534691,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 + MIWaveTile: [2, 4] + MIWaveTileA: 2 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -535502,14 +534719,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -535595,8 +534812,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2051 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2048 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -535605,15 +534822,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 24 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -535631,8 +534848,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -535662,7 +534879,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -535675,7 +534892,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -535689,32 +534906,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x208x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_13_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 22912 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 22912 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 32 LdsPadB: 4 LdsPadMetadata: 0 @@ -535723,8 +534940,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -535734,15 +534951,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 13] + MIWaveTileA: 2 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 208 + MacroTileA: 128 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -535763,14 +534980,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 32 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 104 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 2 + NumLoadsB: 13 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -535856,8 +535073,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2052 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_8_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2049 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_13_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -535866,16 +535083,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 8 + ThreadTile1: 13 + ThreadTileA: 8 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -535892,15 +535109,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -535935,7 +535152,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -535950,68 +535167,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_8_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25088 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25088 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 8] + MIWaveGroup: [1, 4] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 384 + MacroTileA: 128 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -536024,14 +535241,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -536117,8 +535334,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2053 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIAV0_MIWT4_8_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2050 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -536127,16 +535344,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -536153,8 +535370,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -536184,7 +535401,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -536211,34 +535428,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -536246,53 +535463,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 2] - MIWaveTileA: 14 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 7 - NumLoadsB: 4 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -536378,8 +535595,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2054 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2051 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -536388,16 +535605,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 2 - ThreadTileA: 56 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -536414,15 +535631,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -536461,7 +535678,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -536472,7 +535689,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 LSCB: 64 LSPA: 8 @@ -536481,13 +535698,13 @@ LVCB: 8 LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 + LdsNumBytes: 51200 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 20480 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -536496,21 +535713,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 + LdsOffsetMetadata: 51200 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -536518,9 +535735,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 8] - MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 128 @@ -536530,10 +535747,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -536547,7 +535764,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -536639,8 +535856,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2055 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2052 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -536648,17 +535865,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -536669,14 +535886,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -536733,45 +535950,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 32 - LVCA: 16 + LVCA: 8 LVCB: 8 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -536779,22 +535996,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -536802,19 +536019,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -536900,8 +536117,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2056 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2053 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -536910,16 +536127,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -536936,8 +536153,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -536979,11 +536196,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -536994,22 +536211,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_9_NTC3_NTD3_NLCA1_SVW1_VWA1_WG128_2_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 8 + LSPB: 32 LVCA: 16 - LVCB: 32 + LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 57856 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedB: 41472 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -537018,44 +536235,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 57856 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 9] + MIWaveTileA: 1 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 224 + MacroTile1: 288 MacroTileA: 128 - MacroTileB: 224 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -537063,19 +536280,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 NumLoadsA: 4 - NumLoadsB: 28 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -537161,8 +536378,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2057 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2054 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -537170,7 +536387,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -537178,9 +536395,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 7 + ThreadTile1: 9 ThreadTileA: 16 - ThreadTileB: 7 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -537191,13 +536408,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -537244,7 +536461,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -537255,7 +536472,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -537264,36 +536481,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -537301,22 +536518,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 192 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -537329,14 +536546,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 NumLoadsA: 6 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -537422,8 +536639,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2058 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2055 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -537431,17 +536648,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -537452,14 +536669,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -537516,7 +536733,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_8_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -537525,13 +536742,13 @@ LVCB: 32 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57344 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 40960 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -537540,12 +536757,12 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57344 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -537562,14 +536779,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 8] + MIWaveTile: [4, 10] MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTileB: 10 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -537585,19 +536802,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 NumLoadsA: 4 - NumLoadsB: 32 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -537683,8 +536900,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2059 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_8_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2056 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -537700,9 +536917,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 8 + ThreadTile1: 10 ThreadTileA: 16 - ThreadTileB: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -537720,7 +536937,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -537777,45 +536994,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 32 - LVCA: 16 + LVCA: 8 LVCB: 8 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 107008 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -537823,22 +537040,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 + MIWaveTile: [10, 4] + MIWaveTileA: 10 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -537851,14 +537068,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 4 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -537944,8 +537161,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2060 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2057 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -537954,15 +537171,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 40 ThreadTile1: 4 - ThreadTileA: 32 + ThreadTileA: 40 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -537980,8 +537197,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -538011,7 +537228,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -538038,42 +537255,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -538083,15 +537300,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -538112,14 +537329,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 4 - NumLoadsB: 11 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -538205,8 +537422,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2061 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2058 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -538215,16 +537432,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 11 + ThreadTile1: 9 ThreadTileA: 16 - ThreadTileB: 11 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -538241,15 +537458,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -538284,11 +537501,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -538299,22 +537516,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 16 + LSPB: 64 LVCA: 32 - LVCB: 16 + LVCB: 4 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27264 + LdsNumBytes: 30208 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -538323,21 +537540,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27264 + LdsOffsetMetadata: 30208 LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -538345,22 +537562,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -538373,14 +537590,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -538466,8 +537683,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2062 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2059 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -538475,17 +537692,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -538496,13 +537713,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -538533,7 +537750,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -538545,11 +537762,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -538560,68 +537777,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x208x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_13_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 22912 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22912 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 13] - MIWaveTileA: 2 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 208 - MacroTileA: 128 - MacroTileB: 208 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -538629,19 +537846,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 104 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 2 - NumLoadsB: 13 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -538727,8 +537944,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2063 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_13_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2060 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -538736,17 +537953,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 13 - ThreadTileA: 8 - ThreadTileB: 13 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -538757,7 +537974,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -538768,10 +537985,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -538810,7 +538027,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -538821,68 +538038,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 32 - LSPA: 16 + LSPA: 32 LSPB: 64 - LVCA: 16 + LVCA: 8 LVCB: 4 - LVPA: 2 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 384 - MacroTileA: 128 - MacroTileB: 384 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -538890,19 +538107,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 2 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 2 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -538988,8 +538205,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2064 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2061 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -538997,17 +538214,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -539018,14 +538235,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -539082,32 +538299,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 32 - LSPA: 8 + LSPA: 16 LSPB: 64 - LVCA: 32 + LVCA: 16 LVCB: 4 - LVPA: 1 + LVPA: 2 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -539127,15 +538344,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 7] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 448 + MacroTileA: 128 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -539156,14 +538373,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 2 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -539249,8 +538466,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2065 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2062 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -539259,16 +538476,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -539285,8 +538502,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -539343,45 +538560,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 8 + LSPA: 16 LSPB: 32 - LVCA: 32 + LVCA: 16 LVCB: 8 - LVPA: 1 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -539389,22 +538606,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] + MIWaveTile: [2, 16] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 16 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -539412,19 +538629,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 128 NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -539510,8 +538727,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2066 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2063 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -539520,16 +538737,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 16 + ThreadTileA: 8 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -539546,7 +538763,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -539577,7 +538794,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -539589,7 +538806,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -539604,42 +538821,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 90624 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 45568 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -539650,14 +538867,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] + MIWaveTile: [6, 8] MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 192 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -539678,14 +538895,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 16 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -539771,8 +538988,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2067 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2064 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -539788,9 +539005,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 6 + ThreadTile1: 8 ThreadTileA: 24 - ThreadTileB: 6 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -539812,10 +539029,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -539850,11 +539067,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -539865,22 +539082,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_9_NTC3_NTD3_NLCA1_SVW1_VWA1_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 32 + LSPB: 8 LVCA: 16 - LVCB: 8 + LVCB: 32 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 41472 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -539889,44 +539106,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 9] - MIWaveTileA: 1 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 288 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 288 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -539939,14 +539156,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 NumLoadsA: 4 - NumLoadsB: 9 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -540032,8 +539249,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2068 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM8 + SolutionIndex: 2065 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -540041,7 +539258,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -540049,9 +539266,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 9 + ThreadTile1: 10 ThreadTileA: 16 - ThreadTileB: 9 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -540062,13 +539279,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -540126,7 +539343,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -540139,9 +539356,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -540150,7 +539367,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 LdsPadB: 8 @@ -540172,14 +539389,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] + MIWaveTile: [3, 4] MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 192 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -540200,14 +539417,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 NumLoadsA: 6 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -540293,8 +539510,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2069 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 2066 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -540310,9 +539527,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 48 - ThreadTile1: 3 + ThreadTile1: 4 ThreadTileA: 48 - ThreadTileB: 3 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -540330,7 +539547,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -540360,7 +539577,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -540372,11 +539589,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -540387,42 +539604,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -540433,14 +539650,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -540461,14 +539678,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 40 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 2 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -540554,8 +539771,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2070 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2067 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -540563,17 +539780,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -540584,21 +539801,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -540621,7 +539838,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -540633,11 +539850,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -540648,42 +539865,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_NLCA7_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 5120 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 41472 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 37632 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41472 - LdsOffsetB_Blk: 107008 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 107008 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 37632 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -540693,14 +539910,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 448 MacroTile1: 128 - MacroTileA: 320 + MacroTileA: 448 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -540717,19 +539934,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 7 + NumLoadsB: 8 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -540815,8 +540032,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2071 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2068 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -540824,17 +540041,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -540845,21 +540062,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -540882,7 +540099,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -540909,42 +540126,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 + LdsNumBytes: 30592 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 30592 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -540954,15 +540171,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -540978,19 +540195,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 NumLoadsA: 4 - NumLoadsB: 36 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -541076,26 +540293,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2072 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2069 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 9 + ThreadTile1: 13 ThreadTileA: 16 - ThreadTileB: 9 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -541112,21 +540329,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -541143,7 +540360,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -541155,11 +540372,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -541170,45 +540387,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 64 + LSPB: 8 LVCA: 32 - LVCB: 4 + LVCB: 32 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 61056 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -541216,22 +540433,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 208 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -541239,19 +540456,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -541337,26 +540554,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2073 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2070 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -541367,27 +540584,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -541420,7 +540637,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -541431,7 +540648,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_5_NLCA5_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -541440,36 +540657,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 41984 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 41984 + LdsOffsetB_Blk: 107520 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 107520 + LdsPadA: 32 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -541477,22 +540694,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -541500,19 +540717,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 5 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -541598,26 +540815,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2074 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2071 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_5_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -541628,13 +540845,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -541648,7 +540865,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -541665,7 +540882,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -541677,11 +540894,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -541692,42 +540909,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 47872 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -541738,14 +540955,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 352 + MacroTileA: 128 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -541761,19 +540978,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 2 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 44 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 44 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -541859,26 +541076,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2075 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2072 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -541889,7 +541106,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -541900,16 +541117,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -541938,11 +541155,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -541953,68 +541170,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 28416 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 28416 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -542022,19 +541239,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 2 - NumLoadsB: 7 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -542120,26 +541337,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2076 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2073 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -542150,7 +541367,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -542170,7 +541387,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -542199,11 +541416,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -542214,36 +541431,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 32 + LSPB: 8 LVCA: 16 - LVCB: 8 + LVCB: 32 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 47872 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -542259,15 +541476,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 16] - MIWaveTileA: 2 - MIWaveTileB: 16 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 352 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -542283,19 +541500,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 44 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 44 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -542381,26 +541598,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2077 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2074 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 16 - ThreadTileA: 8 - ThreadTileB: 16 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -542411,14 +541628,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -542431,7 +541648,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -542460,11 +541677,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -542475,68 +541692,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG128_2_1 + LSCA: 512 LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 + LSPA: 4 + LSPB: 64 + LVCA: 64 + LVCB: 4 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -542544,19 +541761,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 16 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -542642,26 +541859,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2078 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2075 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -542672,14 +541889,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -542692,7 +541909,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -542709,7 +541926,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -542736,32 +541953,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 + LdsNumBytes: 32768 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 43520 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -542770,8 +541987,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -542781,15 +541998,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 10] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -542805,19 +542022,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 4 - NumLoadsB: 40 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -542903,26 +542120,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2079 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2076 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 10 + ThreadTile1: 15 ThreadTileA: 16 - ThreadTileB: 10 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -542939,21 +542156,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -542982,11 +542199,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -542997,68 +542214,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_NLCA3_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 28416 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 28416 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -543066,19 +542283,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 2 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 11 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -543164,26 +542381,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2080 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2077 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -543194,7 +542411,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -543214,7 +542431,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -543231,7 +542448,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -543247,7 +542464,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -543258,32 +542475,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -543292,8 +542509,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -543304,14 +542521,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -543327,19 +542544,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -543425,26 +542642,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2081 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2078 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -543455,27 +542672,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -543492,7 +542709,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -543519,68 +542736,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -543588,19 +542805,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 2 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -543686,15 +542903,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2082 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2079 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -543702,10 +542919,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -543722,21 +542939,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -543765,11 +542982,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -543780,45 +542997,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_NLCA7_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37632 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37632 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -543826,22 +543043,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [7, 8] - MIWaveTileA: 7 + MIWaveTile: [2, 8] + MIWaveTileA: 2 MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -543849,19 +543066,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 7 - NumLoadsB: 8 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -543947,25 +543164,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2083 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 2080 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 32 ThreadTile1: 8 - ThreadTileA: 28 + ThreadTileA: 32 ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true @@ -543977,14 +543194,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -543997,7 +543214,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -544026,11 +543243,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -544041,68 +543258,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG32_8_1 LSCA: 256 LSCB: 32 LSPA: 8 - LSPB: 16 + LSPB: 64 LVCA: 32 - LVCB: 16 + LVCB: 4 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30592 + LdsNumBytes: 34816 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 14208 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30592 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -544115,14 +543332,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 13 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -544208,8 +543425,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2084 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2081 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -544217,17 +543434,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -544238,13 +543455,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -544275,7 +543492,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -544291,7 +543508,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -544302,32 +543519,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG32_8_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 8 + LSPB: 16 LVCA: 32 - LVCB: 32 + LVCB: 16 LVPA: 1 - LVPB: 4 + LVPB: 8 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61056 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 31616 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61056 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -544336,8 +543553,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -544347,15 +543564,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -544376,14 +543593,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -544469,8 +543686,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2085 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2082 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -544478,17 +543695,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -544499,27 +543716,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -544536,7 +543753,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -544548,7 +543765,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -544563,68 +543780,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_5_NLCA5_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 41984 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 32512 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 16128 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 41984 - LdsOffsetB_Blk: 107520 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 107520 - LdsPadA: 32 + LdsOffsetMetadata: 32512 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -544637,14 +543854,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 5 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 4 + NumLoadsB: 14 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -544730,8 +543947,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2086 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_5_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2083 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -544746,10 +543963,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -544766,21 +543983,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -544797,7 +544014,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -544809,11 +544026,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -544824,22 +544041,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 + LdsNumBytes: 34816 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 47872 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -544848,44 +544065,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 + LdsOffsetMetadata: 34816 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 352 - MacroTileA: 128 - MacroTileB: 352 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -544898,14 +544115,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 44 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 44 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -544991,8 +544208,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2087 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2084 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -545000,17 +544217,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -545021,27 +544238,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -545074,7 +544291,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -545085,32 +544302,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG64_4_1 + LSCA: 512 LSCB: 32 - LSPA: 8 + LSPA: 4 LSPB: 16 - LVCA: 32 + LVCA: 64 LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -545131,14 +544348,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 512 + MacroTile1: 112 + MacroTileA: 512 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -545159,14 +544376,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 11 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -545252,8 +544469,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2088 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2085 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -545261,17 +544478,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 8 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -545282,14 +544499,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -545331,11 +544548,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -545346,68 +544563,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 47872 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 352 - MacroTileA: 128 - MacroTileB: 352 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -545420,14 +544637,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 44 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 44 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -545513,8 +544730,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2089 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2086 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -545522,17 +544739,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -545543,14 +544760,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -545592,7 +544809,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -545607,45 +544824,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG128_2_1 - LSCA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 32 - LSPA: 4 - LSPB: 64 - LVCA: 64 - LVCB: 4 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 31616 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -545653,22 +544870,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 4] + MIWaveTile: [4, 14] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -545681,14 +544898,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 4 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -545774,8 +544991,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2090 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM16 + SolutionIndex: 2087 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -545784,16 +545001,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 14 + ThreadTileA: 16 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -545810,7 +545027,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -545857,7 +545074,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -545868,7 +545085,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG32_8_1 LSCA: 256 LSCB: 32 LSPA: 8 @@ -545881,19 +545098,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 + LdsNumBytes: 33792 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 16384 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -545913,15 +545130,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 240 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 240 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -545942,14 +545159,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 15 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -546035,8 +545252,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2091 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2088 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -546044,17 +545261,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -546065,13 +545282,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -546114,11 +545331,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -546129,34 +545346,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -546174,15 +545391,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -546203,14 +545420,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 11 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -546296,8 +545513,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2092 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2089 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -546305,17 +545522,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -546326,13 +545543,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -546379,7 +545596,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -546390,32 +545607,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 8 + LSPA: 32 LSPB: 64 - LVCA: 32 + LVCA: 8 LVCB: 4 - LVPA: 1 + LVPA: 4 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 16384 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 12288 LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 45056 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -546436,13 +545653,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveTile: [3, 3] + MIWaveTileA: 3 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -546464,13 +545681,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 3 NumLoadsB: 3 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 @@ -546557,8 +545774,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2093 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2090 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -546566,16 +545783,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 48 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 48 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -546587,7 +545804,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -546624,7 +545841,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -546640,7 +545857,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -546651,32 +545868,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 64 LVCA: 32 - LVCB: 8 + LVCB: 4 LVPA: 1 - LVPB: 4 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -546685,8 +545902,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -546696,10 +545913,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 192 @@ -546726,13 +545943,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -546818,8 +546035,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2094 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 2091 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -546827,17 +546044,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -546848,27 +546065,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -546885,7 +546102,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -546912,32 +546129,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 64 + LSPB: 32 LVCA: 32 - LVCB: 4 + LVCB: 8 LVPA: 1 - LVPB: 8 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -546946,8 +546163,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -546958,14 +546175,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] + MIWaveTile: [2, 6] MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -546986,14 +546203,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -547079,8 +546296,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2095 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2092 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -547096,9 +546313,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 8 + ThreadTile1: 6 ThreadTileA: 32 - ThreadTileB: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -547120,16 +546337,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -547162,7 +546379,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -547173,32 +546390,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 8 + LSPA: 32 LSPB: 64 - LVCA: 32 + LVCA: 8 LVCB: 4 - LVPA: 1 + LVPA: 4 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 45056 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -547218,15 +546435,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -547247,14 +546464,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -547340,8 +546557,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2096 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 2093 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -547349,17 +546566,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -547370,13 +546587,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -547419,11 +546636,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -547434,34 +546651,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -547480,14 +546697,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -547508,14 +546725,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 14 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -547601,8 +546818,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2097 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 2094 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -547610,17 +546827,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -547631,14 +546848,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -547684,7 +546901,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -547695,68 +546912,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WSGRA2_WG32_8_1 LSCA: 256 LSCB: 32 - LSPA: 8 + LSPA: 4 LSPB: 16 LVCA: 32 LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32512 + LdsNumBytes: 33792 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 16128 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32512 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -547769,14 +546986,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 14 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -547862,8 +547079,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2098 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2095 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -547871,7 +547088,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -547879,9 +547096,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 7 + ThreadTile1: 8 ThreadTileA: 32 - ThreadTileB: 7 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -547892,14 +547109,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 - WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadA: 2 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -547929,7 +547146,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -547940,14 +547157,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -547956,88 +547173,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 256 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 16 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -548123,26 +547340,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2099 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 2096 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -548153,27 +547370,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -548190,7 +547407,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -548201,14 +547418,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -548217,44 +547434,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG64_4_1 - LSCA: 512 - LSCB: 32 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 4096 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 16 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 53504 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 67840 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 53504 + LdsOffsetMetadata_Blk: 67840 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -548262,15 +547479,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 112 - MacroTileA: 512 - MacroTileB: 112 + MacroTile0: 16 + MacroTile1: 320 + MacroTileA: 16 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -548286,19 +547503,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -548384,26 +547601,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2100 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM16 + SolutionIndex: 2097 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -548414,27 +547631,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -548462,14 +547679,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -548478,68 +547695,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 16 LSCB: 64 - LSPA: 8 + LSPA: 16 LSPB: 32 - LVCA: 32 + LVCA: 16 LVCB: 8 - LVPA: 1 + LVPA: 16 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 53504 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 67840 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 53504 + LdsOffsetMetadata_Blk: 67840 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 320 + MacroTileA: 16 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -548547,19 +547764,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -548645,26 +547862,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2101 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2098 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -548675,27 +547892,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -548712,7 +547929,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -548723,14 +547940,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -548739,44 +547956,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 16 - LVCA: 32 + LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -548784,15 +548001,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 14] - MIWaveTileA: 4 - MIWaveTileB: 14 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -548808,19 +548025,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 4 - NumLoadsB: 14 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -548906,26 +548123,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2102 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2099 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 14 - ThreadTileA: 16 - ThreadTileB: 14 + ThreadTile0: 4 + ThreadTile1: 6 + ThreadTileA: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -548936,27 +548153,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -548973,7 +548190,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -548984,14 +548201,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -549000,44 +548217,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 16 - LVCA: 32 + LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -549045,15 +548262,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -549069,19 +548286,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 16 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -549167,26 +548384,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2103 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 2100 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -549197,27 +548414,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -549234,7 +548451,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -549247,10 +548464,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -549261,44 +548478,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -549306,14 +548523,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 192 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -549330,19 +548547,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -549428,26 +548645,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2104 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2101 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -549458,27 +548675,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -549495,7 +548712,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -549507,8 +548724,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -549522,68 +548739,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 64 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 45056 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 160 + MacroTileA: 16 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -549591,19 +548808,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 1 + NumLoadsB: 40 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -549689,26 +548906,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2105 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 2102 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -549725,21 +548942,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -549756,7 +548973,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -549772,7 +548989,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -549783,88 +549000,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 256 + LSPA: 128 + LSPB: 8 + LVCA: 2 + LVCB: 32 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -549950,25 +549167,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2106 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2103 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -549980,27 +549197,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -550017,7 +549234,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -550030,10 +549247,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -550044,34 +549261,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -550079,33 +549296,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -550113,19 +549330,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -550211,26 +549428,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2107 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2104 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -550241,27 +549458,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -550278,7 +549495,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -550291,10 +549508,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -550305,34 +549522,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 45056 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -550340,33 +549557,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 320 + MacroTileA: 32 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -550374,19 +549591,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 1 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -550472,26 +549689,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2108 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2105 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -550502,27 +549719,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -550539,7 +549756,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -550552,10 +549769,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -550566,44 +549783,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -550612,14 +549829,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -550634,20 +549851,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -550733,26 +549950,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2109 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2106 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -550763,27 +549980,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -550800,7 +550017,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -550812,11 +550029,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -550827,68 +550044,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WSGRA2_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 4 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 69632 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 69632 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 32 MacroTile1: 256 - MacroTileA: 256 + MacroTileA: 32 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -550896,19 +550113,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 + NumElementsPerThread: 32 NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 16 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -550994,26 +550211,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2110 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WSGRA2_WG32_8_1_WGMn16 + SolutionIndex: 2107 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -551024,27 +550241,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 - WaveSeparateGlobalReadA: 2 + WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -551061,7 +550278,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -551072,14 +550289,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -551088,22 +550305,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_8_2 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 + LdsNumBytes: 55296 LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 52224 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -551112,9 +550329,9 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 + LdsOffsetMetadata: 55296 LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -551122,8 +550339,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -551134,14 +550351,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -551156,20 +550373,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 16 - NumLoadsB: 12 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -551255,8 +550472,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2111 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2108 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -551264,17 +550481,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 32 SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -551285,7 +550502,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -551296,12 +550513,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -551322,7 +550539,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -551333,14 +550550,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -551349,33 +550566,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 16 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53504 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 67840 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53504 - LdsOffsetMetadata_Blk: 67840 - LdsPadA: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -551383,8 +550600,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -551395,14 +550612,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 320 - MacroTileA: 16 - MacroTileB: 320 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -551423,14 +550640,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -551516,8 +550733,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2112 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2109 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -551525,17 +550742,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -551546,7 +550763,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -551556,13 +550773,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -551583,7 +550800,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -551594,14 +550811,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -551610,37 +550827,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 LSCA: 16 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 LVPA: 16 - LVPB: 4 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53504 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 67840 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53504 - LdsOffsetMetadata_Blk: 67840 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -551655,15 +550872,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [1, 2] MIWaveTile: [1, 5] MIWaveTileA: 1 MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 320 + MacroTile1: 160 MacroTileA: 16 - MacroTileB: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -551684,13 +550901,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 1 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -551777,8 +550994,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2113 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2110 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -551788,9 +551005,9 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -551813,17 +551030,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -551855,14 +551072,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -551871,12 +551088,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 LSCA: 16 LSCB: 128 - LSPA: 16 + LSPA: 128 LSPB: 16 - LVCA: 16 + LVCA: 2 LVCB: 16 LVPA: 16 LVPB: 2 @@ -551884,9 +551101,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 + LdsNumBytes: 50688 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -551895,7 +551112,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 + LdsOffsetMetadata: 50688 LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 @@ -551917,14 +551134,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 16 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -551945,14 +551162,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 1 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -552038,8 +551255,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2114 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2111 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -552055,9 +551272,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 6 + ThreadTile1: 5 ThreadTileA: 4 - ThreadTileB: 6 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -552078,13 +551295,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -552116,14 +551333,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -552132,12 +551349,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 LSCA: 16 LSCB: 128 - LSPA: 16 + LSPA: 128 LSPB: 16 - LVCA: 16 + LVCA: 2 LVCB: 16 LVPA: 16 LVPB: 2 @@ -552208,11 +551425,11 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 6 NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 8 + NumLoadsA: 1 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -552299,8 +551516,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2115 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2112 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -552345,7 +551562,7 @@ _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -552379,7 +551596,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -552393,32 +551610,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 128 - LSPA: 128 + LSPA: 64 LSPB: 16 - LVCA: 2 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -552438,15 +551655,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -552467,14 +551684,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -552560,8 +551777,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2116 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2113 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -552570,16 +551787,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -552596,11 +551813,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -552627,7 +551844,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -552639,8 +551856,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -552654,37 +551871,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 64 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 29952 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 37120 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 29952 + LdsOffsetMetadata_Blk: 37120 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -552699,14 +551916,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] + MIWaveGroup: [2, 2] MIWaveTile: [1, 5] MIWaveTileA: 1 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 32 MacroTile1: 160 - MacroTileA: 16 + MacroTileA: 32 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -552728,14 +551945,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 1 - NumLoadsB: 40 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -552821,8 +552038,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2117 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2114 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -552831,9 +552048,9 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] @@ -552857,15 +552074,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -552888,7 +552105,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -552915,37 +552132,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 128 - LSPB: 8 - LVCA: 2 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 36352 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 36352 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -552960,14 +552177,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] + MIWaveGroup: [2, 2] MIWaveTile: [1, 3] MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 32 MacroTile1: 96 - MacroTileA: 16 + MacroTileA: 32 MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 @@ -552983,20 +552200,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -553082,8 +552299,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2118 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2115 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -553092,9 +552309,9 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] @@ -553118,15 +552335,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -553149,7 +552366,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -553176,34 +552393,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 32 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 69632 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 69632 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -553211,33 +552428,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 160 + MacroTile1: 256 MacroTileA: 32 - MacroTileB: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -553250,14 +552467,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -553343,8 +552560,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2119 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2116 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -553353,16 +552570,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -553384,10 +552601,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -553410,7 +552627,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -553423,7 +552640,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -553437,32 +552654,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NLCA1_SVW2_VWA2_WG16_16_1 LSCA: 32 - LSCB: 64 + LSCB: 128 LSPA: 64 - LSPB: 32 + LSPB: 16 LVCA: 4 - LVCB: 8 + LVCB: 16 LVPA: 8 - LVPB: 4 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -553471,8 +552688,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -553483,14 +552700,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 5] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 320 + MacroTile1: 192 MacroTileA: 32 - MacroTileB: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -553505,20 +552722,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 10 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -553604,8 +552821,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2120 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2117 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -553621,9 +552838,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 3 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -553644,11 +552861,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -553671,7 +552888,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -553684,7 +552901,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -553698,42 +552915,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_14_NTB0_NLCA1_SVW1_VWA1_WG32_4_2 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 32 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 57344 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 69888 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 40192 + LdsOffsetMetadata_Blk: 69888 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -553743,15 +552960,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] + MIWaveGroup: [2, 1] + MIWaveTile: [1, 14] MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTileB: 14 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 160 + MacroTile1: 224 MacroTileA: 32 - MacroTileB: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -553766,20 +552983,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 1 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -553865,8 +553082,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2121 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2118 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_14_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -553876,15 +553093,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 5 + ThreadTile1: 14 ThreadTileA: 4 - ThreadTileB: 5 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -553901,15 +553118,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -553945,10 +553162,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -553959,7 +553176,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -553968,36 +553185,36 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 69632 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 69632 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -554005,22 +553222,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 256 + MacroTile1: 192 MacroTileA: 32 - MacroTileB: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -554033,14 +553250,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 1 - NumLoadsB: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -554126,8 +553343,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2122 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2119 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -554135,17 +553352,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -554156,17 +553373,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -554220,7 +553437,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NTB0_NLCA1_SVW2_VWA2_WG16_8_2 LSCA: 32 LSCB: 128 LSPA: 64 @@ -554233,9 +553450,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 + LdsNumBytes: 64512 LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -554244,7 +553461,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 + LdsOffsetMetadata: 64512 LdsOffsetMetadata_Blk: 74752 LdsPadA: 32 LdsPadB: 16 @@ -554266,14 +553483,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 2] - MIWaveTile: [2, 5] + MIWaveTile: [2, 6] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 32 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -554294,14 +553511,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 2 - NumLoadsB: 10 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -554387,8 +553604,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2123 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 2120 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -554404,9 +553621,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 6 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -554454,7 +553671,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -554467,7 +553684,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -554481,34 +553698,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -554516,10 +553733,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -554527,22 +553744,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveTile: [2, 2] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -554555,14 +553772,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -554648,8 +553865,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2124 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2121 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -554658,16 +553875,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -554684,15 +553901,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -554715,7 +553932,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -554731,7 +553948,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -554742,37 +553959,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 38912 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 38912 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -554787,15 +554004,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 192 + MacroTileA: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -554816,14 +554033,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 1 - NumLoadsB: 10 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -554909,8 +554126,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2125 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2122 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -554918,17 +554135,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -554939,21 +554156,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -554989,10 +554206,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -555003,42 +554220,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 128 + LSPA: 32 LSPB: 16 - LVCA: 2 + LVCA: 8 LVCB: 16 - LVPA: 16 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -555048,14 +554265,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 64 MacroTile1: 160 - MacroTileA: 16 + MacroTileA: 64 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -555077,13 +554294,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 1 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -555170,8 +554387,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2126 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2123 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -555179,16 +554396,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 5 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -555200,17 +554417,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -555237,7 +554454,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -555250,10 +554467,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -555264,37 +554481,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 16 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -555309,15 +554526,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] + MIWaveTileA: 6 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -555338,11 +554555,11 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 1 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 6 @@ -555431,8 +554648,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2127 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2124 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -555440,16 +554657,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 24 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 24 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -555461,21 +554678,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -555498,7 +554715,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -555511,10 +554728,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -555525,33 +554742,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 32 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -555559,10 +554776,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -555570,15 +554787,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -555599,14 +554816,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -555692,8 +554909,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2128 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2125 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -555701,17 +554918,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -555722,21 +554939,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -555772,7 +554989,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -555786,7 +555003,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -555795,23 +555012,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29952 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 58624 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 37120 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29952 - LdsOffsetMetadata_Blk: 37120 + LdsOffsetMetadata: 58624 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -555823,7 +555040,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -555832,14 +555049,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -555854,20 +555071,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 9 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -555953,8 +555170,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2129 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2126 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -555969,10 +555186,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -555993,7 +555210,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -556020,7 +555237,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -556033,7 +555250,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -556047,32 +555264,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 32 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36352 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 38144 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36352 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 38144 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -556081,8 +555298,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -556093,14 +555310,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 96 - MacroTileA: 32 - MacroTileB: 96 + MacroTile0: 96 + MacroTile1: 160 + MacroTileA: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -556121,14 +555338,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -556214,8 +555431,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2130 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2127 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -556230,10 +555447,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -556254,11 +555471,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -556294,7 +555511,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -556308,7 +555525,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -556317,59 +555534,59 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 58624 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 69632 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 69632 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 58624 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 256 - MacroTileA: 32 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -556382,14 +555599,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 1 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 9 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -556475,8 +555692,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2131 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2128 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -556485,16 +555702,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -556515,7 +555732,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -556542,7 +555759,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -556569,32 +555786,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -556603,8 +555820,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -556614,15 +555831,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -556637,20 +555854,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -556736,8 +555953,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2132 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2129 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -556746,16 +555963,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -556772,15 +555989,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -556816,10 +556033,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -556830,42 +556047,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_14_NTB0_NLCA1_SVW1_VWA1_WG32_4_2 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57344 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 69888 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40192 - LdsOffsetMetadata_Blk: 69888 - LdsPadA: 16 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -556875,15 +556092,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 14] - MIWaveTileA: 1 - MIWaveTileB: 14 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 224 - MacroTileA: 32 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -556904,14 +556121,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 1 - NumLoadsB: 7 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -556997,8 +556214,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2133 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_14_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 + SolutionIndex: 2130 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -557006,17 +556223,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 14 - ThreadTileA: 4 - ThreadTileB: 14 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -557027,17 +556244,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -557064,7 +556281,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -557091,32 +556308,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -557125,8 +556342,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -557136,15 +556353,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -557165,14 +556382,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 6 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -557258,8 +556475,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2134 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2131 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -557268,16 +556485,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -557294,15 +556511,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -557352,42 +556569,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NTB0_NLCA1_SVW2_VWA2_WG16_8_2 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 64 + LSPA: 32 LSPB: 16 - LVCA: 4 + LVCA: 8 LVCB: 16 - LVPA: 8 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -557397,15 +556614,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 6] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -557428,12 +556645,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 24 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -557519,8 +556736,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2135 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 2132 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -557529,16 +556746,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 6 + ThreadTile1: 3 ThreadTileA: 8 - ThreadTileB: 6 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -557555,7 +556772,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -557599,7 +556816,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -557613,7 +556830,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -557626,9 +556843,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 + LdsNumBytes: 63488 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -557637,7 +556854,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 + LdsOffsetMetadata: 63488 LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 LdsPadB: 8 @@ -557650,7 +556867,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -557659,14 +556876,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 256 + MacroTile1: 384 MacroTileA: 64 - MacroTileB: 256 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -557687,14 +556904,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -557780,8 +556997,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2136 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2133 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -557797,9 +557014,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 32 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -557820,7 +557037,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -557847,7 +557064,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -557863,7 +557080,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -557874,33 +557091,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 64 + LSCB: 128 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 + LVPB: 2 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38912 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38912 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -557908,8 +557125,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -557919,15 +557136,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 64 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -557942,20 +557159,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 6 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -558041,8 +557258,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2137 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2134 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -558050,17 +557267,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -558071,21 +557288,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -558108,7 +557325,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -558124,7 +557341,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -558135,44 +557352,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 LSCA: 64 - LSCB: 128 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -558180,15 +557397,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 160 + MacroTile1: 384 MacroTileA: 64 - MacroTileB: 160 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -558209,14 +557426,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -558302,8 +557519,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2138 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2135 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -558311,17 +557528,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -558332,21 +557549,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -558381,8 +557598,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -558396,36 +557613,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_LBSPPA768_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 - LSPB: 32 + LSPB: 8 LVCA: 4 - LVCB: 8 + LVCB: 32 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 768 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 13312 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 13312 + LdsOffsetB_Blk: 78848 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 78848 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -558433,7 +557650,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -558442,14 +557659,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] + MIWaveTile: [6, 6] MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 192 + MacroTile1: 384 MacroTileA: 96 - MacroTileB: 192 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -558470,14 +557687,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 NumLoadsA: 3 - NumLoadsB: 6 + NumLoadsB: 48 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -558563,8 +557780,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2139 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2136 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA768_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -558580,9 +557797,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 3 + ThreadTile1: 6 ThreadTileA: 24 - ThreadTileB: 3 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -558603,7 +557820,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -558643,7 +557860,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -558657,7 +557874,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -558670,9 +557887,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 + LdsNumBytes: 64000 LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -558681,7 +557898,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 + LdsOffsetMetadata: 64000 LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 LdsPadB: 16 @@ -558703,14 +557920,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] + MIWaveTile: [6, 5] MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 96 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -558725,20 +557942,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 3 - NumLoadsB: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -558824,8 +558041,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2140 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2137 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -558841,9 +558058,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 24 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -558864,7 +558081,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -558904,7 +558121,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -559085,8 +558302,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2141 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2138 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -559125,7 +558342,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -559165,10 +558382,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -559179,7 +558396,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -559192,20 +558409,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38144 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38144 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -559216,7 +558433,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -559224,15 +558441,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 5] + MIWaveTileA: 6 MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 160 + MacroTile1: 320 MacroTileA: 96 - MacroTileB: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -559253,14 +558470,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 + NumElementsPerThread: 120 NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 3 - NumLoadsB: 5 + NumLoadsB: 10 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -559346,8 +558563,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2142 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2139 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -559355,16 +558572,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 24 ThreadTile1: 5 - ThreadTileA: 12 + ThreadTileA: 24 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -559376,17 +558593,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -559413,7 +558630,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -559426,10 +558643,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -559440,33 +558657,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58624 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58624 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -559474,10 +558691,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -559486,14 +558703,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -559508,20 +558725,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 9 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -559607,8 +558824,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2143 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2140 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -559616,17 +558833,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -559637,7 +558854,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -559647,11 +558864,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -559690,7 +558907,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -559701,33 +558918,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB4_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 8704 + LdsNumBytes: 38144 + LdsNumElementsAlignedA: 12544 LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 + LdsOffsetMetadata: 38144 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -559747,13 +558964,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 + MIWaveTile: [3, 5] + MIWaveTileA: 3 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 96 MacroTile1: 160 - MacroTileA: 64 + MacroTileA: 96 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -559769,19 +558986,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -559868,8 +559085,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2144 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2141 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -559877,16 +559094,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 12 ThreadTile1: 5 - ThreadTileA: 8 + ThreadTileA: 12 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -559898,7 +559115,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -559951,7 +559168,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -559962,33 +559179,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 43264 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 + LdsOffsetMetadata: 43264 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -560007,15 +559224,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 6] + MIWaveTileA: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -560036,14 +559253,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 3 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -560129,8 +559346,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2145 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2142 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -560138,17 +559355,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 6 + ThreadTileA: 12 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -560159,13 +559376,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -560196,7 +559413,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -560208,7 +559425,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -560223,32 +559440,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 128 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 8 LVCA: 8 - LVCB: 16 + LVCB: 32 LVPA: 4 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 24064 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 24064 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -560257,8 +559474,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -560269,14 +559486,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 160 + MacroTile1: 96 MacroTileA: 64 - MacroTileB: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -560297,14 +559514,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -560390,8 +559607,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2146 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2143 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -560407,9 +559624,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 3 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -560431,10 +559648,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -560470,7 +559687,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -560484,7 +559701,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 128 LSPA: 32 @@ -560497,9 +559714,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 + LdsNumBytes: 54272 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -560508,7 +559725,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 + LdsOffsetMetadata: 54272 LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 @@ -560530,14 +559747,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 96 + MacroTile1: 128 MacroTileA: 64 - MacroTileB: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -560552,20 +559769,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -560651,8 +559868,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2147 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2144 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -560668,9 +559885,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 4 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -560691,7 +559908,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -560718,7 +559935,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -560731,7 +559948,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -560745,34 +559962,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -560780,33 +559997,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -560819,14 +560036,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -560912,8 +560129,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2148 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_GSU5_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2145 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -560922,16 +560139,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -560948,15 +560165,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -560979,7 +560196,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -561006,34 +560223,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -561041,10 +560258,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -561052,42 +560269,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -561173,8 +560390,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2149 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2146 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -561183,16 +560400,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -561209,15 +560426,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -561253,7 +560470,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -561267,36 +560484,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -561312,15 +560529,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 6] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -561335,20 +560552,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -561434,8 +560651,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2150 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2147 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -561444,16 +560661,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 6 + ThreadTile1: 9 ThreadTileA: 16 - ThreadTileB: 6 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -561470,11 +560687,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -561513,8 +560730,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -561528,36 +560745,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_LBSPPA768_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 13312 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 44544 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13312 - LdsOffsetB_Blk: 78848 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 78848 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -561565,7 +560782,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -561573,15 +560790,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 384 - MacroTileA: 96 - MacroTileB: 384 + MacroTile0: 64 + MacroTile1: 224 + MacroTileA: 64 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -561602,14 +560819,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 48 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -561695,8 +560912,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2151 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_GSU5_LBSPPA768_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2148 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -561705,16 +560922,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -561731,11 +560948,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -561775,10 +560992,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -561789,7 +561006,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -561798,24 +561015,24 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 61696 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 61696 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -561834,15 +561051,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -561857,20 +561074,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -561956,8 +561173,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2152 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2149 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -561965,17 +561182,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -561986,17 +561203,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -562050,7 +561267,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -562059,23 +561276,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58624 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58624 - LdsOffsetMetadata_Blk: 78080 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 86272 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -562096,14 +561313,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -562124,14 +561341,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 9 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -562217,8 +561434,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2153 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2150 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -562233,10 +561450,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -562296,8 +561513,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -562311,32 +561528,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -562348,7 +561565,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -562356,15 +561573,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -562385,14 +561602,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 32 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -562478,8 +561695,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2154 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2151 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -562488,16 +561705,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -562514,11 +561731,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -562545,7 +561762,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -562572,32 +561789,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 128 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -562606,8 +561823,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -562618,14 +561835,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveTile: [2, 9] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 96 + MacroTile1: 288 MacroTileA: 64 - MacroTileB: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -562640,20 +561857,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 2 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -562739,8 +561956,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2155 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2152 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -562756,9 +561973,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 9 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -562780,10 +561997,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -562806,7 +562023,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -562819,7 +562036,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -562833,34 +562050,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB4_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_5_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38144 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38144 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 77824 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -562868,10 +562085,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -562883,32 +562100,32 @@ MIWaveTileA: 3 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 160 - MacroTileA: 96 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 NumLoadsA: 3 NumLoadsB: 5 NumLoadsCoalescedA: 3 @@ -563000,8 +562217,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2156 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2153 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -563010,15 +562227,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 48 ThreadTile1: 5 - ThreadTileA: 12 + ThreadTileA: 48 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -563036,15 +562253,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 4] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -563079,11 +562296,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -563094,33 +562311,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43264 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 29696 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43264 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 29696 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -563139,15 +562356,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 6] - MIWaveTileA: 3 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -563168,14 +562385,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -563261,8 +562478,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2157 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2154 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -563270,17 +562487,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 6 - ThreadTileA: 12 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -563291,17 +562508,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -563328,7 +562545,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -563341,10 +562558,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -563355,42 +562572,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 24064 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 19072 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 24064 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 19072 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -563401,14 +562618,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -563429,14 +562646,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -563522,8 +562739,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2158 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2155 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -563531,17 +562748,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -563552,7 +562769,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -563562,11 +562779,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -563589,7 +562806,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -563616,34 +562833,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -563651,10 +562868,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -563662,42 +562879,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -563783,8 +563000,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2159 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2156 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -563793,16 +563010,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -563819,15 +563036,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -563866,7 +563083,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -563877,7 +563094,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -563890,20 +563107,20 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -563922,15 +563139,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 80 + MacroTile1: 96 MacroTileA: 128 - MacroTileB: 80 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -563951,14 +563168,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -564044,8 +563261,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2160 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2157 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -564053,17 +563270,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -564074,13 +563291,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -564124,7 +563341,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -564138,7 +563355,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -564151,9 +563368,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -564162,7 +563379,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 @@ -564184,14 +563401,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 192 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -564212,14 +563429,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -564305,8 +563522,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2161 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2158 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -564322,9 +563539,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -564345,7 +563562,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -564385,10 +563602,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -564399,33 +563616,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 36096 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 36096 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -564436,7 +563653,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -564445,14 +563662,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -564467,20 +563684,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -564566,8 +563783,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2162 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2159 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -564575,17 +563792,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -564596,7 +563813,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -564606,7 +563823,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -564645,8 +563862,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -564660,36 +563877,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 1280 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44544 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 21504 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 21504 + LdsOffsetB_Blk: 87040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 87040 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -564697,7 +563914,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -564705,15 +563922,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 224 - MacroTileA: 64 - MacroTileB: 224 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -564734,14 +563951,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 40 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -564827,8 +564044,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2163 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2160 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -564837,16 +564054,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -564863,11 +564080,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -564907,10 +564124,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -564921,68 +564138,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61696 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61696 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -564995,14 +564212,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -565088,8 +564305,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2164 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2161 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -565097,17 +564314,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -565118,7 +564335,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -565128,7 +564345,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -565168,10 +564385,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -565182,88 +564399,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -565349,8 +564566,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2165 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2162 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -565358,17 +564575,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -565379,7 +564596,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -565389,7 +564606,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -565428,11 +564645,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -565443,45 +564660,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -565489,22 +564706,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 64 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -565517,14 +564734,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 32 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -565610,8 +564827,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2166 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2163 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -565619,17 +564836,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 8 - ThreadTileA: 8 - ThreadTileB: 8 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -565640,17 +564857,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -565677,7 +564894,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -565693,7 +564910,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -565704,34 +564921,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 22016 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 22016 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -565739,33 +564956,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 288 - MacroTileA: 64 - MacroTileB: 288 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -565778,14 +564995,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 2 - NumLoadsB: 9 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -565871,8 +565088,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2167 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2164 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -565880,17 +565097,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -565901,21 +565118,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -565938,7 +565155,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -565951,7 +565168,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -565965,32 +565182,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_5_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 77824 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -565999,8 +565216,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -566010,15 +565227,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -566039,14 +565256,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -566132,8 +565349,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2168 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2165 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -566142,16 +565359,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -566168,15 +565385,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -566199,7 +565416,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -566211,11 +565428,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -566226,33 +565443,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 - LSCB: 64 + LSCB: 128 LSPA: 16 - LSPB: 8 + LSPB: 16 LVCA: 16 - LVCB: 32 + LVCB: 16 LVPA: 2 - LVPB: 4 + LVPB: 2 LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29696 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29696 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 32 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -566260,8 +565477,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -566271,15 +565488,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 80 + MacroTile1: 96 MacroTileA: 128 - MacroTileB: 80 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -566294,20 +565511,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -566393,8 +565610,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2169 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2166 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -566402,17 +565619,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -566423,21 +565640,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -566460,7 +565677,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -566472,11 +565689,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -566487,42 +565704,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 19072 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 36096 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19072 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 36096 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -566533,14 +565750,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -566555,20 +565772,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -566654,8 +565871,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2170 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2167 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -566663,17 +565880,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -566684,7 +565901,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -566694,11 +565911,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -566748,88 +565965,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -566915,8 +566132,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2171 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2168 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -566931,10 +566148,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -566951,7 +566168,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -566982,7 +566199,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -567009,42 +566226,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x32_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA0_LPB8_LRVW4_MIAV1_MIWT4_5_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 27136 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 36864 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 27136 + LdsOffsetMetadata_Blk: 36864 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -567054,15 +566271,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [1, 4] + MIWaveTile: [4, 5] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -567083,14 +566300,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 1 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -567176,8 +566393,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2172 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2169 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA0_LPB8_LRVW4_MIAV1_MIWT4_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -567186,16 +566403,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -567212,15 +566429,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -567256,7 +566473,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -567270,68 +566487,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -567344,14 +566561,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -567437,8 +566654,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2173 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU4_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2170 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -567453,10 +566670,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -567473,11 +566690,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -567517,7 +566734,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -567531,45 +566748,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36096 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36096 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -567577,22 +566794,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 + MIWaveTile: [3, 3] + MIWaveTileA: 3 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 96 - MacroTileA: 160 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -567605,14 +566822,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -567698,8 +566915,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2174 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2171 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -567708,15 +566925,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 48 ThreadTile1: 3 - ThreadTileA: 20 + ThreadTileA: 48 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -567734,11 +566951,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -567777,11 +566994,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -567792,68 +567009,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1280 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 21504 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 21504 - LdsOffsetB_Blk: 87040 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 87040 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -567866,14 +567083,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 40 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -567959,8 +567176,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2175 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU4_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2172 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -567968,17 +567185,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -567989,17 +567206,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -568042,7 +567259,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -568053,68 +567270,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 47104 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 47104 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -568127,14 +567344,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -568220,8 +567437,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2176 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2173 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -568229,17 +567446,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 1 - ThreadTileA: 32 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -568250,7 +567467,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -568314,32 +567531,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -568351,7 +567568,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -568359,15 +567576,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -568388,14 +567605,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -568481,8 +567698,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2177 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2174 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -568491,16 +567708,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 32 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -568517,7 +567734,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -568560,11 +567777,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -568575,68 +567792,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -568644,19 +567861,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -568742,8 +567959,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2178 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU3_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2175 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -568751,17 +567968,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -568772,7 +567989,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -568782,7 +567999,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -568809,7 +568026,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -568821,11 +568038,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -568836,34 +568053,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 22016 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22016 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -568871,10 +568088,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -568882,22 +568099,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -568910,14 +568127,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 2 - NumLoadsB: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -569003,8 +568220,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2179 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2176 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -569012,17 +568229,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 6 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 6 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -569033,21 +568250,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -569086,7 +568303,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -569097,32 +568314,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 + LSPA: 8 LSPB: 32 - LVCA: 16 + LVCA: 32 LVCB: 8 - LVPA: 2 + LVPA: 1 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -569143,14 +568360,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -569165,20 +568382,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -569264,8 +568481,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2180 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2177 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -569273,17 +568490,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -569294,7 +568511,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -569331,7 +568548,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -569347,7 +568564,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -569358,33 +568575,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 56320 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -569392,10 +568609,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -569404,14 +568621,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [2, 11] + MIWaveTileA: 2 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 64 + MacroTile1: 352 + MacroTileA: 64 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -569426,20 +568643,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 88 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 2 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -569525,8 +568742,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2181 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2178 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -569534,17 +568751,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 11 + ThreadTileA: 8 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -569555,7 +568772,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -569566,10 +568783,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -569619,7 +568836,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -569632,9 +568849,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36096 + LdsNumBytes: 46336 LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -569643,7 +568860,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36096 + LdsOffsetMetadata: 46336 LdsOffsetMetadata_Blk: 86272 LdsPadA: 16 LdsPadB: 16 @@ -569656,7 +568873,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -569665,14 +568882,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] + MIWaveTile: [5, 5] MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 96 + MacroTile1: 160 MacroTileA: 160 - MacroTileB: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -569687,20 +568904,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 NumLoadsA: 5 - NumLoadsB: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -569786,8 +569003,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2182 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2179 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -569803,9 +569020,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 20 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -569865,11 +569082,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -569880,36 +569097,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NTB0_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63232 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 63232 + LdsOffsetMetadata_Blk: 107008 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -569925,15 +569142,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 10] + MIWaveTileA: 5 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -569948,20 +569165,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 6 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 200 + NumLoadsA: 10 + NumLoadsB: 20 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -570047,8 +569264,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2183 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2180 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA2560_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -570056,17 +569273,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 10 + ThreadTileA: 20 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -570077,13 +569294,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -570130,7 +569347,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -570141,68 +569358,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x32_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA0_LPB8_LRVW4_MIAV1_MIWT4_5_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 32 - LSPA: 32 + LSPA: 16 LSPB: 64 - LVCA: 8 + LVCA: 16 LVCB: 4 - LVPA: 4 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27136 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 17408 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 36864 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27136 - LdsOffsetMetadata_Blk: 36864 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -570210,19 +569427,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 5 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -570308,8 +569525,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2184 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA0_LPB8_LRVW4_MIAV1_MIWT4_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2181 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -570317,17 +569534,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -570338,13 +569555,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -570387,11 +569604,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -570402,33 +569619,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 47872 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 47872 + LdsOffsetMetadata_Blk: 90368 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -570439,7 +569656,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -570447,15 +569664,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 144 + MacroTileA: 192 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -570476,14 +569693,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 18 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -570569,8 +569786,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2185 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2182 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -570578,17 +569795,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -570599,13 +569816,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -570648,11 +569865,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -570663,45 +569880,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 52224 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -570709,22 +569926,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -570732,19 +569949,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 28 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -570830,8 +570047,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2186 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2183 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -570839,17 +570056,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -570860,17 +570077,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -570897,7 +570114,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -570909,7 +570126,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -570924,32 +570141,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 - LSPB: 32 + LSPB: 16 LVCA: 16 - LVCB: 8 + LVCB: 16 LVPA: 2 - LVPB: 4 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 19712 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 11520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 19712 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -570958,8 +570175,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] @@ -570970,14 +570187,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 3] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 96 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -570998,14 +570215,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -571091,8 +570308,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2187 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2184 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -571108,9 +570325,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -571132,10 +570349,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -571174,7 +570391,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -571185,33 +570402,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47104 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 54528 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47104 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 54528 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -571231,14 +570448,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -571254,19 +570471,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 7 + NumLoadsB: 5 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -571352,8 +570569,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2188 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2185 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -571361,17 +570578,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -571382,7 +570599,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -571419,7 +570636,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -571431,11 +570648,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -571446,88 +570663,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIAV0_MIWT7_9_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 38784 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 38784 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [7, 9] + MIWaveTileA: 7 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 448 + MacroTile1: 144 + MacroTileA: 448 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 7 + NumLoadsB: 9 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -571613,8 +570830,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2189 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2186 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA3584_LPA16_LPB4_LRVW4_MIAV0_MIWT7_9_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -571622,17 +570839,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 9 + ThreadTileA: 28 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -571643,7 +570860,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -571653,11 +570870,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -571692,11 +570909,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -571707,33 +570924,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -571753,14 +570970,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [2, 10] + MIWaveTileA: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 80 - MacroTileA: 256 - MacroTileB: 80 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -571782,13 +570999,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 10 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -571874,8 +571091,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2190 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2187 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -571883,17 +571100,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 10 + ThreadTileA: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -571904,7 +571121,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -571953,11 +571170,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -571968,22 +571185,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 + LdsNumBytes: 46592 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 12800 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -571992,21 +571209,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 + LdsOffsetMetadata: 46592 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -572014,22 +571231,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 80 + MacroTile1: 96 MacroTileA: 256 - MacroTileB: 80 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -572037,19 +571254,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 10 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -572135,8 +571352,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2191 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2188 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -572144,17 +571361,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -572165,13 +571382,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -572229,32 +571446,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 8 + LSPA: 16 LSPB: 32 - LVCA: 32 + LVCA: 16 LVCB: 8 - LVPA: 1 + LVPA: 2 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -572274,15 +571491,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] + MIWaveGroup: [2, 2] MIWaveTile: [2, 5] MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -572297,7 +571514,7 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 @@ -572305,12 +571522,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 160 NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -572396,8 +571613,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2192 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2189 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -572406,10 +571623,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 @@ -572432,7 +571649,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -572490,7 +571707,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -572499,59 +571716,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 56320 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 11] + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 11 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 352 + MacroTile1: 384 MacroTileA: 64 - MacroTileB: 352 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -572564,14 +571781,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 88 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 2 - NumLoadsB: 11 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -572657,8 +571874,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2193 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2190 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -572667,16 +571884,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 11 - ThreadTileA: 8 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -572736,11 +571953,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -572751,36 +571968,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_NLCA5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 - LSPB: 32 + LSPB: 8 LVCA: 4 - LVCB: 8 + LVCB: 32 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 1280 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46336 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 21504 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 21504 + LdsOffsetB_Blk: 87040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46336 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 87040 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -572796,15 +572013,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 160 + MacroTile1: 320 MacroTileA: 160 - MacroTileB: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -572825,14 +572042,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 + NumElementsPerThread: 200 NumGlobalWriteVectorsPerThread: 100 NumLoadsA: 5 - NumLoadsB: 5 + NumLoadsB: 40 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -572918,8 +572135,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2194 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2191 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1280_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -572927,16 +572144,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 40 ThreadTile1: 5 - ThreadTileA: 20 + ThreadTileA: 40 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -572948,17 +572165,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -572985,7 +572202,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -572998,10 +572215,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -573012,33 +572229,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NTB0_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63232 - LdsNumElementsAlignedA: 41472 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 19072 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 41472 - LdsOffsetB_Blk: 107008 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63232 - LdsOffsetMetadata_Blk: 107008 - LdsPadA: 16 + LdsOffsetMetadata: 19072 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -573046,10 +572263,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -573057,14 +572274,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 10] - MIWaveTileA: 5 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 128 MacroTile1: 160 - MacroTileA: 320 + MacroTileA: 128 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -573081,19 +572298,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 200 - NumLoadsA: 10 - NumLoadsB: 20 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -573179,8 +572396,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2195 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA2560_LPA16_LPB4_LRVW4_MIAV0_MIWT5_10_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2192 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -573188,17 +572405,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 10 - ThreadTileA: 20 - ThreadTileB: 10 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -573209,21 +572426,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -573246,7 +572463,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -573262,7 +572479,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -573273,32 +572490,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 17408 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -573307,10 +572524,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -573319,14 +572536,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -573341,20 +572558,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 2 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -573440,8 +572657,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2196 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2193 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -573449,17 +572666,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -573470,7 +572687,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -573481,10 +572698,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -573519,11 +572736,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -573534,68 +572751,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47872 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47872 - LdsOffsetMetadata_Blk: 90368 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 144 - MacroTileA: 192 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -573603,19 +572820,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 18 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -573701,8 +572918,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2197 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2194 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -573710,17 +572927,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -573731,7 +572948,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -573780,11 +572997,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -573795,33 +573012,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -573840,15 +573057,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -573869,14 +573086,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 28 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -573962,8 +573179,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2198 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2195 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -573971,17 +573188,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -573992,13 +573209,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -574029,7 +573246,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -574041,11 +573258,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -574056,32 +573273,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 19712 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 11520 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19712 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -574090,10 +573307,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -574102,13 +573319,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 5] - MIWaveTileA: 1 + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 160 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -574125,19 +573342,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 + NumElementsPerThread: 160 NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 2 - NumLoadsB: 10 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -574223,8 +573440,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2199 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2196 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -574232,16 +573449,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -574253,7 +573470,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -574264,10 +573481,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -574306,7 +573523,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -574317,45 +573534,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54528 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54528 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -574363,22 +573580,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -574391,14 +573608,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 7 - NumLoadsB: 5 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -574484,8 +573701,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2200 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2197 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -574493,16 +573710,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 28 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -574514,13 +573731,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -574551,7 +573768,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -574563,11 +573780,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -574578,88 +573795,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIAV0_MIWT7_9_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38784 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38784 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 9] - MIWaveTileA: 7 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 144 - MacroTileA: 448 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 7 - NumLoadsB: 9 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -574745,8 +573962,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2201 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA3584_LPA16_LPB4_LRVW4_MIAV0_MIWT7_9_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2198 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -574754,17 +573971,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 9 - ThreadTileA: 28 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -574775,7 +573992,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -574785,11 +574002,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -574828,7 +574045,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -574839,33 +574056,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42496 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 51456 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42496 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 + LdsOffsetMetadata: 51456 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -574876,7 +574093,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -574884,15 +574101,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 10] - MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -574908,19 +574125,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -575006,8 +574223,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2202 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2199 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -575015,17 +574232,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 10 - ThreadTileA: 8 - ThreadTileB: 10 + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -575036,13 +574253,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -575100,68 +574317,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 8 + LSPA: 64 LSPB: 32 - LVCA: 32 + LVCA: 4 LVCB: 8 - LVPA: 1 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46592 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46592 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -575174,14 +574391,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 3 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -575267,8 +574484,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2203 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2200 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -575277,15 +574494,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 40 ThreadTile1: 3 - ThreadTileA: 32 + ThreadTileA: 40 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -575303,7 +574520,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -575334,7 +574551,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -575350,7 +574567,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -575361,32 +574578,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NTB4_NTC3_NTD3_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 86016 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 86016 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -575395,8 +574612,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -575407,14 +574624,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -575429,20 +574646,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -575528,8 +574745,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2204 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2201 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -575537,17 +574754,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -575558,7 +574775,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -575569,10 +574786,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -575595,7 +574812,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -575611,7 +574828,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -575622,45 +574839,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA0_LPB8_LRVW4_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 64 LVCA: 8 - LVCB: 8 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 45056 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -575668,22 +574885,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveTile: [12, 3] + MIWaveTileA: 12 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -575696,14 +574913,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 2 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -575789,8 +575006,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2205 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2202 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA0_LPB8_LRVW4_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -575798,16 +575015,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 48 ThreadTile1: 3 - ThreadTileA: 32 + ThreadTileA: 48 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -575819,21 +575036,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -575868,11 +575085,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -575883,88 +575100,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1280 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 21504 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21504 - LdsOffsetB_Blk: 87040 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 87040 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 40 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -576050,8 +575267,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2206 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1280_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2203 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -576059,17 +575276,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -576080,17 +575297,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -576129,11 +575346,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -576144,68 +575361,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 19072 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 20992 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19072 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 20992 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 64 + MacroTileA: 256 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -576218,14 +575435,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -576311,8 +575528,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2207 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2204 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -576320,17 +575537,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -576341,13 +575558,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -576405,45 +575622,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 59648 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59648 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -576451,22 +575668,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 224 MacroTile1: 192 - MacroTileA: 192 + MacroTileA: 224 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -576479,13 +575696,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -576572,8 +575789,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2208 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2205 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -576582,16 +575799,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -576608,7 +575825,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -576639,7 +575856,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -576655,7 +575872,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -576666,45 +575883,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 - LSPB: 32 + LSPB: 64 LVCA: 16 - LVCB: 8 + LVCB: 4 LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -576712,22 +575929,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -576740,14 +575957,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 2 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -576833,8 +576050,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2209 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2206 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -576842,17 +576059,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -576863,21 +576080,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -576900,7 +576117,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -576912,11 +576129,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -576927,34 +576144,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_9_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 28928 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 20736 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 28928 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -576962,33 +576179,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 9] + MIWaveTileA: 1 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -576996,19 +576213,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 2 + NumLoadsB: 18 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -577094,8 +576311,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2210 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2207 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_9_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -577103,17 +576320,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -577124,21 +576341,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -577161,7 +576378,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -577173,11 +576390,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -577188,45 +576405,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 16 LVCA: 32 - LVCB: 8 + LVCB: 16 LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 26240 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 26240 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -577234,22 +576451,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 144 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -577262,14 +576479,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -577355,8 +576572,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2211 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2208 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -577364,17 +576581,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -577385,21 +576602,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -577422,7 +576639,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -577434,7 +576651,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -577449,45 +576666,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTC0_NTD0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -577495,22 +576712,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -577518,19 +576735,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 16 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -577616,8 +576833,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2212 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2209 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -577626,16 +576843,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -577652,15 +576869,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -577683,7 +576900,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -577695,11 +576912,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -577710,32 +576927,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 45056 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -577744,8 +576961,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -577756,14 +576973,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -577779,19 +576996,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 3 + NumLoadsB: 16 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -577877,8 +577094,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2213 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2210 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -577886,17 +577103,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -577907,21 +577124,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -577956,11 +577173,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -577971,33 +577188,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51456 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51456 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -578017,14 +577234,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -578040,19 +577257,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 5 - NumLoadsB: 6 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 28 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -578138,8 +577355,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2214 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2211 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -578147,17 +577364,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -578168,14 +577385,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -578232,36 +577449,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 41984 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 41984 + LdsOffsetB_Blk: 107520 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 107520 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -578277,15 +577494,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -578306,14 +577523,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 6 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 5 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -578399,8 +577616,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2215 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2212 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -578409,16 +577626,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 40 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 40 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -578435,8 +577652,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -578478,8 +577695,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -578493,88 +577710,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NTB4_NTC3_NTD3_NLCA5_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_9_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 32 LSPA: 32 - LSPB: 64 + LSPB: 16 LVCA: 8 - LVCB: 4 + LVCB: 16 LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 30592 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 86016 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 53504 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 86016 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 30592 + LdsOffsetMetadata_Blk: 53504 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 320 - MacroTile1: 192 + MacroTile1: 144 MacroTileA: 320 - MacroTileB: 192 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 NumLoadsA: 5 - NumLoadsB: 3 + NumLoadsB: 9 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -578660,8 +577877,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2216 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT5_3_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2213 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_9_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -578670,16 +577887,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -578697,10 +577914,10 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 32 _DepthUA: 32 _DepthUB: 32 @@ -578727,7 +577944,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -578739,7 +577956,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -578754,42 +577971,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA0_LPB8_LRVW4_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 47872 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 45056 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -578799,15 +578016,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 352 + MacroTileA: 128 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -578828,14 +578045,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 44 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 44 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -578921,8 +578138,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2217 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA0_LPB8_LRVW4_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2214 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -578931,16 +578148,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -578957,15 +578174,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -578988,7 +578205,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -579000,11 +578217,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -579015,88 +578232,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 16] + MIWaveTileA: 4 + MIWaveTileB: 16 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 16 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -579182,8 +578399,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2218 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2215 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -579191,17 +578408,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 16 + ThreadTileA: 16 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -579212,21 +578429,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -579261,7 +578478,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -579276,45 +578493,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 20992 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 20992 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -579322,22 +578539,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 64 - MacroTileA: 256 - MacroTileB: 64 + MacroTile0: 384 + MacroTile1: 144 + MacroTileA: 384 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -579350,14 +578567,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 1 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 9 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -579443,8 +578660,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2219 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2216 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -579453,16 +578670,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -579479,8 +578696,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -579522,11 +578739,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -579537,36 +578754,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59648 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59648 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -579583,14 +578800,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -579605,20 +578822,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 36 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -579704,8 +578921,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2220 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2217 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -579713,17 +578930,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -579734,14 +578951,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -579783,7 +579000,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -579798,22 +579015,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 2 LVPB: 8 LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 + LdsNumBytes: 27776 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -579822,10 +579039,10 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 + LdsOffsetMetadata: 27776 LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -579844,14 +579061,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 10] + MIWaveTile: [4, 9] MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 320 + MacroTile1: 288 MacroTileA: 128 - MacroTileB: 320 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -579872,14 +579089,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 2 - NumLoadsB: 5 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -579965,8 +579182,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2221 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT4_10_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2218 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -579982,9 +579199,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 10 + ThreadTile1: 9 ThreadTileA: 16 - ThreadTileB: 10 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -580059,45 +579276,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_9_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NTC3_NTD3_NLCA7_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 16 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 2 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28928 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 20736 + LdsNumBytes: 38784 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28928 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 38784 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -580105,22 +579322,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 9] - MIWaveTileA: 1 + MIWaveTile: [7, 9] + MIWaveTileA: 7 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 448 + MacroTile1: 144 + MacroTileA: 448 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -580128,19 +579345,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 2 - NumLoadsB: 18 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 7 + NumLoadsB: 9 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -580226,8 +579443,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2222 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_9_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM16 + SolutionIndex: 2219 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -580236,15 +579453,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 28 ThreadTile1: 9 - ThreadTileA: 16 + ThreadTileA: 28 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -580262,7 +579479,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -580305,7 +579522,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -580320,68 +579537,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26240 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26240 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] + MIWaveGroup: [1, 4] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 512 + MacroTileA: 128 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -580394,14 +579611,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -580487,8 +579704,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2223 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2220 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -580497,16 +579714,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -580523,8 +579740,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -580570,7 +579787,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -580581,33 +579798,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTC0_NTD0_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x80x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SVW8_VWA8_WG64_4_1 + LSCA: 512 LSCB: 32 - LSPA: 32 + LSPA: 4 LSPB: 16 - LVCA: 8 + LVCA: 64 LVCB: 16 - LVPA: 4 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 38272 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 5504 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 + LdsOffsetMetadata: 38272 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -580626,15 +579843,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 512 + MacroTile1: 80 + MacroTileA: 512 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -580650,19 +579867,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 16 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -580748,8 +579965,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2224 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2221 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x80x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -580757,17 +579974,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -580778,13 +579995,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -580827,11 +580044,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -580842,16 +580059,16 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_4_NTC0_NTD0_NLCA3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 32 LSPA: 32 - LSPB: 16 + LSPB: 64 LVCA: 8 - LVCB: 16 + LVCB: 4 LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false @@ -580871,25 +580088,25 @@ LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 4] + MIWaveTileA: 12 MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 192 @@ -580900,10 +580117,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -580917,13 +580134,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 3 - NumLoadsB: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -581009,8 +580226,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2225 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2222 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -581018,7 +580235,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -581039,13 +580256,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -581092,7 +580309,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -581103,7 +580320,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTC0_NTD0_NLCA3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -581116,20 +580333,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -581148,15 +580365,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 224 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -581172,19 +580389,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 6 - NumLoadsB: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -581270,8 +580487,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2226 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2223 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -581279,17 +580496,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -581300,13 +580517,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -581337,7 +580554,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -581349,11 +580566,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -581364,42 +580581,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_6_NTC3_NTD3_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 41984 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41984 - LdsOffsetB_Blk: 107520 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 107520 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -581409,15 +580626,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 384 + MacroTileA: 128 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -581438,14 +580655,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 5 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 24 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -581531,8 +580748,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2227 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2224 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -581540,17 +580757,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -581561,21 +580778,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -581614,7 +580831,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -581625,33 +580842,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_9_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_20_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 32 - LSPA: 32 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30592 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 30464 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 53504 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30592 - LdsOffsetMetadata_Blk: 53504 - LdsPadA: 16 + LdsOffsetMetadata: 30464 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -581671,14 +580888,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [2, 20] + MIWaveTileA: 2 + MIWaveTileB: 20 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -581699,14 +580916,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 5 - NumLoadsB: 9 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 2 + NumLoadsB: 20 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -581792,8 +581009,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2228 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_9_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2225 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_20_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -581801,17 +581018,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 20 + ThreadTileA: 8 + ThreadTileB: 20 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -581822,14 +581039,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -581871,11 +581088,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -581886,22 +581103,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 8 + LSPB: 32 LVCA: 16 - LVCB: 32 + LVCB: 8 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 47872 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -581910,21 +581127,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -581932,22 +581149,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 352 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 352 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -581960,14 +581177,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 4 - NumLoadsB: 44 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 44 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -582053,8 +581270,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2229 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2226 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -582062,17 +581279,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -582083,14 +581300,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -582120,7 +581337,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -582132,7 +581349,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -582147,68 +581364,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 16 + LSPB: 32 LVCA: 32 - LVCB: 16 + LVCB: 8 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 16] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 16 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -582216,19 +581433,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -582314,8 +581531,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2230 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2227 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -582324,16 +581541,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 16 - ThreadTileA: 16 - ThreadTileB: 16 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -582355,10 +581572,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -582408,7 +581625,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x336x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_21_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 32 LSPA: 16 @@ -582417,23 +581634,23 @@ LVCB: 16 LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 31616 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 22912 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 90624 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 32 LdsPadB: 4 LdsPadMetadata: 0 @@ -582454,14 +581671,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [2, 21] + MIWaveTileA: 2 + MIWaveTileB: 21 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 144 - MacroTileA: 384 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 336 + MacroTileA: 128 + MacroTileB: 336 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -582482,14 +581699,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 9 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 2 + NumLoadsB: 21 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 21 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -582575,8 +581792,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2231 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2228 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x336x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_21_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -582591,10 +581808,10 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 21 + ThreadTileA: 8 + ThreadTileB: 21 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -582642,7 +581859,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -582658,7 +581875,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -582669,33 +581886,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 8 + LSPB: 16 LVCA: 8 - LVCB: 32 + LVCB: 16 LVPA: 4 - LVPB: 4 + LVPB: 8 LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 32 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 77824 + LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -582703,8 +581920,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -582714,15 +581931,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 288 + MacroTile1: 320 MacroTileA: 192 - MacroTileB: 288 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -582743,14 +581960,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 36 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 20 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -582836,8 +582053,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2232 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2229 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -582845,17 +582062,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -582866,21 +582083,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -582915,11 +582132,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -582930,34 +582147,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB8_LRVW4_MIWT7_8_NTC0_NTD0_NLCA7_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27776 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 38144 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27776 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 38144 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -582975,15 +582192,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -582999,19 +582216,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 2 - NumLoadsB: 18 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 7 + NumLoadsB: 2 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -583097,8 +582314,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2233 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_9_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2230 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB8_LRVW4_MIWT7_8_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -583106,17 +582323,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -583127,13 +582344,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -583164,7 +582381,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -583180,7 +582397,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -583191,33 +582408,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NTC3_NTD3_NLCA7_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38784 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 47872 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38784 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -583225,8 +582442,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -583236,15 +582453,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 9] - MIWaveTileA: 7 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 144 - MacroTileA: 448 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 352 + MacroTileA: 128 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -583265,14 +582482,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 7 - NumLoadsB: 9 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 44 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 44 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -583358,8 +582575,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2234 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2231 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -583367,17 +582584,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 9 - ThreadTileA: 28 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -583388,21 +582605,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -583437,7 +582654,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -583452,68 +582669,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 29440 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 29440 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -583521,19 +582738,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -583619,26 +582836,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2235 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2232 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -583655,8 +582872,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -583669,7 +582886,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -583713,32 +582930,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x80x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SVW8_VWA8_WG64_4_1 - LSCA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_6_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 LSCB: 32 - LSPA: 4 + LSPA: 8 LSPB: 16 - LVCA: 64 + LVCA: 32 LVCB: 16 LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38272 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 5504 + LdsNumBytes: 29440 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38272 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 29440 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -583758,15 +582975,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [8, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 80 - MacroTileA: 512 - MacroTileB: 80 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -583782,19 +582999,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -583880,26 +583097,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2236 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x80x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG64_4_1_WGM16 + SolutionIndex: 2233 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_6_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 8 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 6 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -583916,7 +583133,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -583930,7 +583147,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -583963,7 +583180,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -583974,32 +583191,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_4_NTC0_NTD0_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_6_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 LSCB: 32 - LSPA: 32 + LSPA: 8 LSPB: 64 - LVCA: 8 + LVCA: 32 LVCB: 4 - LVPA: 4 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30720 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30720 - LdsOffsetMetadata_Blk: 45056 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -584019,15 +583236,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -584043,19 +583260,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -584141,26 +583358,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2237 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM16 + SolutionIndex: 2234 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_6_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -584171,13 +583388,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -584191,7 +583408,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -584220,7 +583437,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -584235,68 +583452,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTC0_NTD0_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -584304,19 +583521,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 32 - NumLoadsCoalescedA: 3 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -584402,15 +583619,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2238 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM16 + SolutionIndex: 2235 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 @@ -584418,10 +583635,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -584438,7 +583655,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -584452,7 +583669,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -584481,7 +583698,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -584496,32 +583713,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -584541,15 +583758,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 8] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -584565,19 +583782,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 2 - NumLoadsB: 32 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -584663,26 +583880,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2239 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2236 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 8 + ThreadTile1: 6 ThreadTileA: 32 - ThreadTileB: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -584699,8 +583916,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -584713,7 +583930,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -584730,7 +583947,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -584746,7 +583963,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -584757,32 +583974,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_6_NTC3_NTD3_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 63232 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 63232 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -584791,8 +584008,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -584802,15 +584019,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 14] + MIWaveTileA: 4 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 384 - MacroTileA: 128 - MacroTileB: 384 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -584826,19 +584043,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 2 - NumLoadsB: 24 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 8 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -584924,26 +584141,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2240 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2237 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 14 + ThreadTileA: 16 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -584954,27 +584171,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -584991,7 +584208,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -585002,14 +584219,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -585018,68 +584235,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 384 - MacroTileA: 128 - MacroTileB: 384 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -585087,19 +584304,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 2 - NumLoadsB: 6 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -585185,8 +584402,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2241 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2238 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -585194,17 +584411,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -585215,23 +584432,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -585252,7 +584469,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -585263,14 +584480,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -585279,87 +584496,87 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 2 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -585446,8 +584663,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2242 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2239 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -585455,17 +584672,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -585476,23 +584693,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -585513,7 +584730,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -585524,14 +584741,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -585540,68 +584757,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 77824 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 160 + MacroTileA: 16 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -585609,19 +584826,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 8 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -585707,8 +584924,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2243 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2240 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -585718,14 +584935,14 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 4 ThreadTile1: 5 - ThreadTileA: 48 + ThreadTileA: 4 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -585743,17 +584960,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -585774,7 +584991,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -585785,14 +585002,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -585801,44 +585018,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_20_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30464 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30464 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -585846,15 +585063,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 20] - MIWaveTileA: 2 - MIWaveTileB: 20 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 160 + MacroTileA: 16 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -585869,20 +585086,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 2 - NumLoadsB: 20 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -585968,8 +585185,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2244 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_20_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2241 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -585977,17 +585194,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 20 - ThreadTileA: 8 - ThreadTileB: 20 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -585998,23 +585215,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -586035,7 +585252,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -586046,14 +585263,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -586062,68 +585279,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 LSPA: 16 - LSPB: 32 + LSPB: 16 LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -586131,19 +585348,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -586229,8 +585446,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2245 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2242 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -586238,17 +585455,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 6 + ThreadTileA: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -586259,23 +585476,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -586296,7 +585513,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -586307,14 +585524,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -586323,88 +585540,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -586490,8 +585707,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2246 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2243 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -586499,17 +585716,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 6 + ThreadTileA: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -586520,23 +585737,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -586557,7 +585774,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -586569,11 +585786,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -586584,44 +585801,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x336x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_21_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 16 - LVCA: 16 + LVCA: 2 LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 22912 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -586629,15 +585846,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 21] - MIWaveTileA: 2 - MIWaveTileB: 21 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 336 - MacroTileA: 128 - MacroTileB: 336 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -586653,19 +585870,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 2 - NumLoadsB: 21 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 21 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -586751,8 +585968,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2247 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x336x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_21_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2244 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -586760,17 +585977,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 21 - ThreadTileA: 8 - ThreadTileB: 21 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -586781,21 +585998,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -586818,7 +586035,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -586831,10 +586048,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -586845,44 +586062,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 64 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 59136 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 70656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 77824 - LdsPadA: 0 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 70656 + LdsPadA: 16 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -586890,15 +586107,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 224 + MacroTileA: 16 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -586914,19 +586131,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 20 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 14 + NumGlobalWriteVectorsPerThread: 14 + NumLoadsA: 1 + NumLoadsB: 56 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularB: 56 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -587012,8 +586229,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2248 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2245 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -587021,17 +586238,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -587042,21 +586259,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -587079,7 +586296,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -587091,8 +586308,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -587106,88 +586323,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTC3_NTD3_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 64 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 59136 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 86016 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 70656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 86016 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 70656 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalReadVectorWidth: 4 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 224 + MacroTileA: 16 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 5 - NumLoadsB: 3 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 14 + NumGlobalWriteVectorsPerThread: 14 + NumLoadsA: 1 + NumLoadsB: 56 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 56 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -587273,8 +586490,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2249 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 2246 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -587284,15 +586501,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -587309,15 +586526,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -587340,7 +586557,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -587356,7 +586573,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -587367,33 +586584,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTC0_NTD0_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NLCA3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -587401,10 +586618,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -587412,15 +586629,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -587435,20 +586652,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -587534,8 +586751,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2250 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2247 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -587543,17 +586760,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -587564,21 +586781,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -587601,7 +586818,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -587613,11 +586830,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -587628,44 +586845,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NTB4_NLCA1_SVW2_VWA2_WG16_8_2 + LSCA: 32 + LSCB: 128 + LSPA: 64 LSPB: 16 - LVCA: 32 + LVCA: 4 LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26240 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26240 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -587673,15 +586890,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -587696,20 +586913,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -587795,8 +587012,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2251 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2248 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -587804,17 +587021,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -587825,21 +587042,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -587862,7 +587079,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -587874,11 +587091,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -587889,44 +587106,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 LSPB: 16 - LVCA: 32 + LVCA: 4 LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26240 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26240 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -587934,15 +587151,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -587957,20 +587174,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -588056,8 +587273,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2252 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_9_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2249 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -588065,17 +587282,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -588086,21 +587303,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -588123,7 +587340,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -588150,44 +587367,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB8_LRVW4_MIWT7_8_NTC0_NTD0_NLCA7_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38144 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38144 - LdsOffsetMetadata_Blk: 94464 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -588195,14 +587412,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 448 + MacroTile0: 16 MacroTile1: 128 - MacroTileA: 448 + MacroTileA: 16 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -588218,20 +587435,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 7 - NumLoadsB: 2 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -588317,8 +587534,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2253 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB8_LRVW4_MIWT7_8_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2250 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -588327,16 +587544,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -588353,15 +587570,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -588384,7 +587601,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -588396,11 +587613,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -588411,44 +587628,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 47872 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -588456,15 +587673,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 352 - MacroTileA: 128 - MacroTileB: 352 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -588479,20 +587696,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 44 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 44 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -588578,8 +587795,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2254 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2251 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -588587,17 +587804,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -588608,21 +587825,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -588645,7 +587862,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -588657,11 +587874,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -588672,44 +587889,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 16 - LVCA: 32 + LVCA: 2 LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29440 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29440 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -588717,15 +587934,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 12] - MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 160 + MacroTileA: 16 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -588740,20 +587957,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 1 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -588839,26 +588056,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2255 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2252 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 12 - ThreadTileA: 16 - ThreadTileB: 12 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -588869,27 +588086,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -588906,7 +588123,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -588922,7 +588139,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -588933,44 +588150,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_6_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 4 + LVCA: 4 + LVCB: 64 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29440 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29440 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -588978,14 +588195,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 32 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 32 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -589002,19 +588219,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -589100,26 +588317,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2256 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_6_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 2253 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -589130,27 +588347,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -589167,7 +588384,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -589183,7 +588400,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -589194,44 +588411,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_6_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -589239,14 +588456,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -589263,19 +588480,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -589361,26 +588578,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2257 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_6_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 2254 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -589391,27 +588608,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -589428,7 +588645,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -589444,7 +588661,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -589455,88 +588672,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -589622,26 +588839,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2258 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2255 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 6 + ThreadTileA: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -589652,27 +588869,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -589689,7 +588906,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -589705,7 +588922,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -589716,32 +588933,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 69632 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 69632 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -589750,10 +588967,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -589761,15 +588978,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 384 + MacroTileA: 32 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -589785,19 +589002,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -589883,26 +589100,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2259 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2256 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -589913,27 +589130,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -589950,7 +589167,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -589962,7 +589179,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -589977,44 +589194,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63232 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63232 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -590022,15 +589239,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 14] + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 14 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -590046,19 +589263,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 8 - NumLoadsB: 28 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -590144,26 +589361,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2260 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2257 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 14 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 14 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -590180,21 +589397,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -590222,14 +589439,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -590238,33 +589455,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 LSCB: 128 - LSPA: 16 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 16 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -590284,13 +589501,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 64 MacroTile1: 128 - MacroTileA: 16 + MacroTileA: 64 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -590306,19 +589523,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 + NumElementsPerThread: 32 NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -590405,8 +589622,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2261 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2258 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -590414,16 +589631,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 16 ThreadTile1: 2 - ThreadTileA: 4 + ThreadTileA: 16 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -590435,7 +589652,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -590451,7 +589668,7 @@ _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -590472,7 +589689,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -590483,14 +589700,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -590499,33 +589716,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -590533,10 +589750,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -590545,14 +589762,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -590573,14 +589790,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -590666,8 +589883,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2262 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2259 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -590675,17 +589892,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -590696,7 +589913,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -590706,13 +589923,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -590733,7 +589950,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -590744,14 +589961,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -590760,37 +589977,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 33024 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 33024 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -590805,15 +590022,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -590834,14 +590051,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 8 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -590927,8 +590144,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2263 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2260 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -590937,16 +590154,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -590963,17 +590180,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -590994,7 +590211,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -591005,14 +590222,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -591021,37 +590238,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NLCA1_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 26368 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 26368 + LdsOffsetMetadata_Blk: 41216 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -591066,15 +590283,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] + MIWaveGroup: [4, 1] + MIWaveTile: [1, 7] MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 112 + MacroTileA: 64 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -591089,20 +590306,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 8 - NumLoadsB: 10 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -591188,8 +590405,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2264 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2261 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -591198,16 +590415,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 4 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -591224,17 +590441,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -591255,7 +590472,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -591266,14 +590483,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -591282,37 +590499,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 29184 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 29184 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -591327,15 +590544,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -591356,14 +590573,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -591449,8 +590666,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2265 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2262 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -591458,17 +590675,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -591479,23 +590696,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -591527,14 +590744,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -591543,42 +590760,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_SVW1_VWA1_WG16_8_2 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 16 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 16 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -591588,15 +590805,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -591611,20 +590828,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -591710,8 +590927,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2266 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2263 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -591719,17 +590936,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -591740,13 +590957,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -591756,7 +590973,7 @@ _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -591777,7 +590994,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -591790,10 +591007,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -591804,33 +591021,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -591838,10 +591055,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -591850,14 +591067,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -591872,17 +591089,17 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 @@ -591971,8 +591188,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2267 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2264 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -591980,17 +591197,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -592001,7 +591218,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -592011,11 +591228,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -592038,7 +591255,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -592050,11 +591267,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -592065,44 +591282,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB0_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 64 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 5120 - LdsNumElementsAlignedB: 59136 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 70656 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 70656 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 2 + LocalReadVectorWidth: 8 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -592110,15 +591327,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 224 - MacroTileA: 16 - MacroTileB: 224 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -592139,14 +591356,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 14 - NumGlobalWriteVectorsPerThread: 14 - NumLoadsA: 1 - NumLoadsB: 56 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 56 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -592232,8 +591449,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2268 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2265 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -592241,17 +591458,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 7 - ThreadTileA: 4 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -592262,21 +591479,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -592299,7 +591516,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -592311,11 +591528,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -592326,37 +591543,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 64 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 5120 - LdsNumElementsAlignedB: 59136 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 70656 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 70656 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 2 + LocalReadVectorWidth: 8 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -592371,15 +591588,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 224 - MacroTileA: 16 - MacroTileB: 224 + MacroTile0: 32 + MacroTile1: 320 + MacroTileA: 32 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -592394,20 +591611,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 14 - NumGlobalWriteVectorsPerThread: 14 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 1 - NumLoadsB: 56 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 56 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -592493,8 +591710,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2269 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2266 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -592502,17 +591719,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 7 - ThreadTileA: 4 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -592523,21 +591740,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -592560,7 +591777,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -592576,7 +591793,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -592587,33 +591804,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 39424 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 + LdsOffsetMetadata: 39424 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -592621,8 +591838,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -592632,15 +591849,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 192 + MacroTileA: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -592655,20 +591872,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 + NumElementsPerThread: 48 NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumLoadsA: 2 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -592754,8 +591971,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2270 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2267 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -592763,17 +591980,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -592784,21 +592001,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -592821,7 +592038,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -592837,7 +592054,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -592848,37 +592065,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NTB4_NLCA1_SVW2_VWA2_WG16_8_2 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 49152 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -592893,15 +592110,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -592916,20 +592133,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -593015,8 +592232,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2271 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 2268 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -593024,17 +592241,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 6 - ThreadTileA: 8 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -593045,21 +592262,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -593082,7 +592299,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -593095,7 +592312,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -593109,32 +592326,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 32 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -593143,10 +592360,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -593155,14 +592372,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 128 - MacroTileA: 32 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -593183,14 +592400,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -593276,8 +592493,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2272 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2269 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -593292,10 +592509,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -593316,11 +592533,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -593343,7 +592560,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -593359,7 +592576,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -593370,37 +592587,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -593415,15 +592632,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 4] - MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -593444,14 +592661,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -593537,8 +592754,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2273 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2270 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -593546,17 +592763,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 4 - ThreadTileA: 4 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -593567,21 +592784,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -593604,7 +592821,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -593617,10 +592834,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -593631,45 +592848,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 13312 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 20480 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 13312 + LdsOffsetMetadata_Blk: 20480 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -593677,42 +592894,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 64 MacroTile1: 128 - MacroTileA: 16 + MacroTileA: 64 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 1 - NumLoadsB: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -593798,8 +593015,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2274 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2271 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -593807,17 +593024,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -593828,21 +593045,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -593865,7 +593082,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -593881,7 +593098,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -593892,44 +593109,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 56320 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -593937,15 +593154,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 11] + MIWaveTileA: 2 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 352 + MacroTileA: 64 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -593960,20 +593177,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 1 - NumLoadsB: 10 + NumElementsPerThread: 88 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 2 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -594059,8 +593276,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2275 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2272 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -594068,17 +593285,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 11 + ThreadTileA: 8 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -594089,21 +593306,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -594126,7 +593343,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -594138,7 +593355,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -594153,32 +593370,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 4 - LVCA: 4 - LVCB: 64 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -594187,8 +593404,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -594198,15 +593415,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 8] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -594227,14 +593444,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 2 - NumLoadsB: 48 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -594320,8 +593537,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2276 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2273 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -594330,16 +593547,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 8 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -594356,15 +593573,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -594387,7 +593604,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -594414,34 +593631,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 49152 + LdsOffsetMetadata_Blk: 77824 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -594449,10 +593666,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -594460,42 +593677,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -594581,8 +593798,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2277 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2274 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -594591,16 +593808,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 2 + ThreadTileA: 48 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -594617,15 +593834,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -594648,7 +593865,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -594664,7 +593881,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -594675,44 +593892,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -594720,15 +593937,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -594743,20 +593960,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -594842,8 +594059,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2278 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2275 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -594851,17 +594068,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -594872,21 +594089,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -594909,7 +594126,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -594936,32 +594153,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 + LdsNumBytes: 17920 LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 4096 - LdsOffsetB_Blk: 69632 + LdsOffsetB_Blk: 36864 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 69632 + LdsOffsetMetadata: 17920 + LdsOffsetMetadata_Blk: 36864 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -594970,8 +594187,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] @@ -594981,15 +594198,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [2, 2] MIWaveTile: [1, 3] MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 384 - MacroTileA: 32 - MacroTileB: 384 + MacroTile0: 64 + MacroTile1: 192 + MacroTileA: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -595013,11 +594230,11 @@ NumElementsPerThread: 48 NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 1 - NumLoadsB: 12 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -595103,8 +594320,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2279 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2276 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -595113,10 +594330,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 @@ -595139,15 +594356,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -595170,7 +594387,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -595183,10 +594400,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -595197,33 +594414,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 128 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -595231,8 +594448,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -595242,15 +594459,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 128 + MacroTile1: 256 MacroTileA: 64 - MacroTileB: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -595271,13 +594488,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -595364,8 +594581,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2280 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2277 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -595373,17 +594590,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -595394,21 +594611,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -595431,7 +594648,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -595443,7 +594660,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -595458,22 +594675,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 + LdsNumBytes: 36864 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -595482,7 +594699,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 + LdsOffsetMetadata: 36864 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 16 @@ -595492,8 +594709,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -595503,14 +594720,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 128 MacroTile1: 128 - MacroTileA: 64 + MacroTileA: 128 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -595527,19 +594744,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -595625,8 +594842,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2281 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2278 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -595635,16 +594852,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 4 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -595661,15 +594878,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -595704,8 +594921,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -595719,32 +594936,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -595756,7 +594973,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -595764,15 +594981,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 112 + MacroTileA: 128 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -595787,20 +595004,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 14 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -595886,8 +595103,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2282 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2279 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -595896,16 +595113,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -595922,11 +595139,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -595966,10 +595183,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -595980,33 +595197,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_14_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33024 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33024 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -596017,7 +595234,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -596025,15 +595242,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 14] + MIWaveTileA: 2 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 128 - MacroTileA: 96 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -596049,19 +595266,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -596147,8 +595364,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2283 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2280 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_14_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -596156,17 +595373,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 4 - ThreadTileA: 12 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 14 + ThreadTileA: 8 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -596177,17 +595394,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -596241,7 +595458,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NLCA1_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -596250,23 +595467,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26368 - LdsNumElementsAlignedA: 8448 + LdsNumBytes: 42752 + LdsNumElementsAlignedA: 24832 LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 41216 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26368 - LdsOffsetMetadata_Blk: 41216 + LdsOffsetMetadata: 42752 + LdsOffsetMetadata_Blk: 90368 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -596287,13 +595504,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 7] - MIWaveTileA: 1 + MIWaveTile: [3, 7] + MIWaveTileA: 3 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 192 MacroTile1: 112 - MacroTileA: 64 + MacroTileA: 192 MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 @@ -596310,16 +595527,16 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 NumLoadsB: 14 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 14 @@ -596408,8 +595625,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2284 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2281 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -596424,9 +595641,9 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 12 ThreadTile1: 7 - ThreadTileA: 4 + ThreadTileA: 12 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -596491,7 +595708,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -596502,33 +595719,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29184 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 48384 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29184 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 + LdsOffsetMetadata: 48384 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -596548,14 +595765,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -596571,19 +595788,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -596669,8 +595886,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2285 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2282 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -596678,17 +595895,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -596699,7 +595916,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -596736,7 +595953,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -596749,10 +595966,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -596763,33 +595980,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NTC3_NTD3_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -596797,10 +596014,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -596809,14 +596026,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -596831,20 +596048,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -596930,8 +596147,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2286 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2283 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -596939,17 +596156,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -596960,7 +596177,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -596970,11 +596187,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -597010,10 +596227,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -597024,33 +596241,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 45312 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 45312 + LdsOffsetMetadata_Blk: 90368 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -597069,15 +596286,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 8] + MIWaveTileA: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -597092,20 +596309,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -597191,8 +596408,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2287 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2284 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -597200,17 +596417,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -597221,17 +596438,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -597285,32 +596502,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -597330,15 +596547,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -597354,19 +596571,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -597452,8 +596669,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2288 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2285 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -597462,16 +596679,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 24 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -597488,7 +596705,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -597532,7 +596749,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -597546,32 +596763,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTB4_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -597583,7 +596800,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -597591,15 +596808,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 320 - MacroTileA: 32 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -597614,20 +596831,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -597713,8 +596930,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2289 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2286 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -597723,16 +596940,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -597749,11 +596966,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -597807,32 +597024,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC0_NTD0_NLCA7_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 39424 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 39424 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 94720 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -597844,7 +597061,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -597852,15 +597069,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 2] + MIWaveTileA: 14 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 192 - MacroTileA: 64 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -597881,14 +597098,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 2 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 7 + NumLoadsB: 4 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -597974,8 +597191,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2290 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2287 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -597984,16 +597201,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 6 - ThreadTileA: 8 - ThreadTileB: 6 + ThreadTile0: 56 + ThreadTile1: 2 + ThreadTileA: 56 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -598010,7 +597227,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -598041,7 +597258,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -598057,7 +597274,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -598068,34 +597285,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 + LdsNumBytes: 17408 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 40960 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49152 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -598103,33 +597320,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -598137,19 +597354,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -598235,8 +597452,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2291 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2288 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -598244,17 +597461,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -598265,21 +597482,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -598318,7 +597535,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -598329,7 +597546,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB4_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -598338,24 +597555,24 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -598374,15 +597591,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -598398,19 +597615,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 7 + NumLoadsB: 7 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -598496,8 +597713,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2292 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2289 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -598505,17 +597722,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -598526,13 +597743,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -598590,68 +597807,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -598659,19 +597876,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -598757,8 +597974,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2293 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2290 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -598773,10 +597990,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -598793,7 +598010,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -598824,7 +598041,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -598840,7 +598057,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -598851,34 +598068,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 13312 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 46336 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 20480 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 13312 - LdsOffsetMetadata_Blk: 20480 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 46336 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -598886,53 +598103,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 1 - NumLoadsB: 2 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 5 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -599018,8 +598235,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2294 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2291 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -599027,17 +598244,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 1 - ThreadTileA: 32 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -599048,7 +598265,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -599059,10 +598276,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -599101,7 +598318,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -599112,33 +598329,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 56320 + LdsNumBytes: 41216 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 + LdsOffsetMetadata: 41216 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -599149,7 +598366,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -599158,14 +598375,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 11] - MIWaveTileA: 2 - MIWaveTileB: 11 + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 352 - MacroTileA: 64 - MacroTileB: 352 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -599180,20 +598397,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 88 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 2 - NumLoadsB: 11 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 4 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -599279,8 +598496,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2295 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2292 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -599288,17 +598505,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 11 - ThreadTileA: 8 - ThreadTileB: 11 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -599309,7 +598526,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -599359,10 +598576,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -599373,33 +598590,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB4_NTC3_NTD3_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 8704 + LdsNumBytes: 61696 + LdsNumElementsAlignedA: 20736 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 + LdsOffsetMetadata: 61696 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -599410,7 +598627,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -599419,13 +598636,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 8] - MIWaveTileA: 2 + MIWaveTile: [5, 8] + MIWaveTileA: 5 MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 160 MacroTile1: 256 - MacroTileA: 64 + MacroTileA: 160 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -599441,19 +598658,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -599540,8 +598757,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2296 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2293 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -599549,16 +598766,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 20 ThreadTile1: 8 - ThreadTileA: 8 + ThreadTileA: 20 ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true @@ -599570,7 +598787,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -599580,7 +598797,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -599607,7 +598824,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -599619,7 +598836,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -599634,75 +598851,75 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 21248 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 45312 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49152 - LdsOffsetMetadata_Blk: 77824 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 21248 + LdsOffsetMetadata_Blk: 45312 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [3, 8] MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 @@ -599801,8 +599018,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2297 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2294 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -599811,16 +599028,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 2 - ThreadTileA: 48 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -599837,15 +599054,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -599880,11 +599097,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -599895,33 +599112,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 - LSPB: 32 + LSPB: 8 LVCA: 4 - LVCB: 8 + LVCB: 32 LVPA: 8 LVPB: 4 LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 58624 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 58624 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -599940,15 +599157,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 256 + MacroTile1: 288 MacroTileA: 96 - MacroTileB: 256 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -599964,19 +599181,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 NumLoadsA: 3 - NumLoadsB: 8 + NumLoadsB: 36 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -600062,8 +599279,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2298 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2295 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -600071,17 +599288,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -600092,13 +599309,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -600129,7 +599346,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -600156,34 +599373,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NLCA1_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 64 + LSPB: 32 LVCA: 8 - LVCB: 4 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + LVPB: 4 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 17920 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 45312 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 36864 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17920 - LdsOffsetMetadata_Blk: 36864 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 45312 + LdsOffsetMetadata_Blk: 90368 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -600191,53 +599408,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 8] + MIWaveTileA: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 192 - MacroTileA: 64 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 1 - NumLoadsB: 3 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -600323,8 +599540,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2299 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2296 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -600333,16 +599550,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -600364,10 +599581,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -600390,7 +599607,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -600402,8 +599619,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -600417,42 +599634,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 + LdsNumBytes: 19584 LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 40960 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 19584 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -600462,15 +599679,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 8] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 10] MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -600491,14 +599708,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -600584,8 +599801,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2300 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2297 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -600594,16 +599811,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 8 + ThreadTile1: 10 ThreadTileA: 8 - ThreadTileB: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -600620,15 +599837,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -600663,11 +599880,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -600678,33 +599895,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 16384 + LdsNumBytes: 49408 + LdsNumElementsAlignedA: 28928 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 49408 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -600715,7 +599932,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -600724,13 +599941,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 + MIWaveTile: [7, 4] + MIWaveTileA: 7 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 224 MacroTile1: 128 - MacroTileA: 128 + MacroTileA: 224 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -600746,20 +599963,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 16 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 4 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -600845,8 +600062,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2301 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2298 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -600854,16 +600071,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 28 ThreadTile1: 4 - ThreadTileA: 16 + ThreadTileA: 28 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -600875,7 +600092,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -600924,11 +600141,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -600939,33 +600156,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 49408 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 + LdsOffsetMetadata: 49408 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -600976,7 +600193,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -600984,15 +600201,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 112 - MacroTileA: 128 - MacroTileB: 112 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -601007,20 +600224,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 14 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 4 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -601106,8 +600323,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2302 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2299 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -601115,17 +600332,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -601136,13 +600353,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -601186,7 +600403,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -601200,7 +600417,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_14_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -601213,19 +600430,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52736 + LdsNumBytes: 32256 LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52736 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -601237,7 +600454,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -601246,14 +600463,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 14] + MIWaveTile: [2, 6] MIWaveTileA: 2 - MIWaveTileB: 14 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 224 + MacroTile1: 96 MacroTileA: 128 - MacroTileB: 224 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -601274,14 +600491,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 4 - NumLoadsB: 7 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -601367,8 +600584,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2303 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT2_14_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2300 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -601384,9 +600601,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 14 + ThreadTile1: 6 ThreadTileA: 8 - ThreadTileB: 14 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -601407,7 +600624,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -601446,7 +600663,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -601461,45 +600678,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 + LSCA: 128 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42752 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42752 - LdsOffsetMetadata_Blk: 90368 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -601507,22 +600724,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 112 - MacroTileA: 192 - MacroTileB: 112 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -601530,19 +600747,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 14 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -601628,8 +600845,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2304 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2301 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -601638,16 +600855,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -601664,7 +600881,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -601711,7 +600928,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -601722,33 +600939,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48384 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48384 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -601768,14 +600985,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -601790,20 +601007,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -601889,8 +601106,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2305 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2302 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -601898,17 +601115,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -601919,7 +601136,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -601969,7 +601186,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -601983,7 +601200,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NTC3_NTD3_NLCA5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -601996,9 +601213,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 + LdsNumBytes: 36096 LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -602007,7 +601224,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 + LdsOffsetMetadata: 36096 LdsOffsetMetadata_Blk: 86272 LdsPadA: 16 LdsPadB: 16 @@ -602020,7 +601237,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -602029,14 +601246,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] + MIWaveTile: [5, 3] MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 224 + MacroTile1: 96 MacroTileA: 160 - MacroTileB: 224 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -602051,20 +601268,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 5 - NumLoadsB: 7 + NumLoadsB: 3 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -602150,8 +601367,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2306 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2303 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -602167,9 +601384,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 - ThreadTile1: 7 + ThreadTile1: 3 ThreadTileA: 20 - ThreadTileB: 7 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -602190,7 +601407,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -602233,7 +601450,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -602244,33 +601461,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45312 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45312 - LdsOffsetMetadata_Blk: 90368 - LdsPadA: 16 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -602289,15 +601506,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -602313,19 +601530,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -602411,8 +601628,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2307 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2304 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -602420,17 +601637,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -602441,13 +601658,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -602490,7 +601707,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -602505,36 +601722,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 1280 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 21504 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 21504 + LdsOffsetB_Blk: 87040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 87040 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -602550,15 +601767,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -602573,20 +601790,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 40 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -602672,8 +601889,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2308 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2305 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -602682,16 +601899,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -602708,7 +601925,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -602739,7 +601956,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -602752,7 +601969,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -602766,42 +601983,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTB4_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB8_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 64 LVCA: 8 - LVCB: 8 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 45568 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -602812,14 +602029,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] + MIWaveTile: [6, 6] MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 192 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -602834,20 +602051,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 3 + NumLoadsB: 3 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -602933,8 +602150,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2309 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2306 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB8_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -602950,9 +602167,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 7 + ThreadTile1: 6 ThreadTileA: 24 - ThreadTileB: 7 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -602973,11 +602190,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -603027,32 +602244,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC0_NTD0_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 94720 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 90624 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -603072,15 +602289,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 2] - MIWaveTileA: 14 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -603096,19 +602313,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 7 - NumLoadsB: 4 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -603194,8 +602411,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2310 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2307 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -603204,16 +602421,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 2 - ThreadTileA: 56 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -603230,7 +602447,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -603273,11 +602490,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -603288,32 +602505,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 LSCA: 128 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 2 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 17408 + LdsNumBytes: 15104 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedB: 6912 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 16384 LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB_Blk: 24576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 15104 + LdsOffsetMetadata_Blk: 24576 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -603333,15 +602550,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 96 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -603357,19 +602574,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 2 - NumLoadsB: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -603455,8 +602672,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2311 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2308 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -603464,17 +602681,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -603485,13 +602702,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -603535,10 +602752,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -603549,7 +602766,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB4_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -603562,20 +602779,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -603594,15 +602811,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 224 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 224 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -603617,20 +602834,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 NumLoadsA: 7 - NumLoadsB: 7 + NumLoadsB: 6 NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -603716,8 +602933,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2312 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2309 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -603725,17 +602942,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -603746,17 +602963,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -603799,7 +603016,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -603810,45 +603027,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 54528 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 54528 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -603856,22 +603073,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -603879,19 +603096,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 7 + NumLoadsB: 5 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -603977,8 +603194,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2313 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2310 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -603986,17 +603203,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -604007,13 +603224,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -604060,7 +603277,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -604071,33 +603288,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46336 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 47104 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46336 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 + LdsOffsetMetadata: 47104 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -604117,14 +603334,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 160 - MacroTileA: 160 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -604139,20 +603356,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 5 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -604238,8 +603455,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2314 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2311 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -604247,17 +603464,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -604268,7 +603485,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -604321,7 +603538,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -604332,45 +603549,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41216 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41216 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -604378,22 +603595,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -604401,19 +603618,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -604499,8 +603716,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2315 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2312 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -604508,17 +603725,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -604529,13 +603746,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -604579,10 +603796,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -604593,7 +603810,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB4_NTC3_NTD3_NLCA5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -604606,20 +603823,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61696 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61696 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -604638,15 +603855,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 256 + MacroTile1: 192 MacroTileA: 160 - MacroTileB: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -604661,20 +603878,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 5 - NumLoadsB: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -604760,8 +603977,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2316 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2313 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -604769,17 +603986,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -604790,17 +604007,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -604827,7 +604044,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -604854,42 +604071,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB2_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 21248 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 59648 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 45312 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 21248 - LdsOffsetMetadata_Blk: 45312 + LdsOffsetMetadata: 59648 + LdsOffsetMetadata_Blk: 94464 LdsPadA: 16 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -604899,15 +604116,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -604928,14 +604145,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 + NumLoadsB: 24 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -605021,8 +604238,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2317 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB4_LRVW4_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2314 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -605031,16 +604248,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -605057,15 +604274,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -605100,11 +604317,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -605115,33 +604332,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 - LSPB: 8 + LSPB: 32 LVCA: 4 - LVCB: 32 + LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58624 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58624 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -605160,15 +604377,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -605183,20 +604400,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 36 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -605282,8 +604499,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2318 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2315 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -605291,17 +604508,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -605312,13 +604529,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -605365,7 +604582,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -605376,7 +604593,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -605389,20 +604606,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45312 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45312 - LdsOffsetMetadata_Blk: 90368 - LdsPadA: 16 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -605421,15 +604638,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 192 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -605444,20 +604661,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 6 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -605543,8 +604760,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2319 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2316 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -605552,17 +604769,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -605573,13 +604790,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -605610,7 +604827,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -605622,11 +604839,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -605637,68 +604854,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 19584 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19584 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 10] - MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -605706,19 +604923,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 2 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -605804,8 +605021,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2320 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2317 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -605813,17 +605030,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 10 - ThreadTileA: 8 - ThreadTileB: 10 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -605834,7 +605051,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -605845,10 +605062,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -605898,45 +605115,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49408 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49408 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -605944,42 +605161,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 4 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -606065,8 +605282,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2321 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2318 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -606075,16 +605292,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -606101,7 +605318,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -606132,7 +605349,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -606144,7 +605361,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -606159,34 +605376,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_7_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG128_2_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49408 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 24320 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 16128 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49408 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 24320 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -606194,40 +605411,40 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 @@ -606235,12 +605452,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 112 NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 4 - NumLoadsCoalescedA: 7 + NumLoadsA: 2 + NumLoadsB: 14 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -606326,8 +605543,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2322 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2319 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -606342,10 +605559,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -606362,15 +605579,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -606409,7 +605626,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -606420,33 +605637,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB4_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 59648 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 32 + LdsOffsetMetadata: 59648 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -606457,7 +605674,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -606465,15 +605682,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 6] + MIWaveTileA: 7 MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -606488,20 +605705,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 3 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -606587,8 +605804,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2323 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2320 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -606596,16 +605813,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 28 ThreadTile1: 6 - ThreadTileA: 8 + ThreadTileA: 28 ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true @@ -606617,13 +605834,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -606654,7 +605871,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -606666,11 +605883,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -606681,88 +605898,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT16_2_NTB4_NTC0_NTD0_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 + LdsNumBytes: 25088 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [16, 2] + MIWaveTileA: 16 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -606848,8 +606065,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2324 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2321 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT16_2_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -606857,17 +606074,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -606878,21 +606095,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -606931,7 +606148,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -606942,7 +606159,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -606955,20 +606172,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -606979,7 +606196,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -606987,15 +606204,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 16] + MIWaveTileA: 2 + MIWaveTileB: 16 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 160 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -607010,20 +606227,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -607109,8 +606326,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2325 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2322 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -607118,17 +606335,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 16 + ThreadTileA: 8 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -607139,13 +606356,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -607189,10 +606406,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -607203,88 +606420,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 64 + LSPA: 8 LSPB: 32 - LVCA: 4 + LVCA: 32 LVCB: 8 - LVPA: 8 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36096 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36096 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 96 - MacroTileA: 160 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 8 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -607370,8 +606587,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2326 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2323 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -607379,17 +606596,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -607400,17 +606617,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -607464,32 +606681,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 107008 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -607509,15 +606726,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -607532,20 +606749,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -607631,8 +606848,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2327 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2324 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -607641,16 +606858,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 40 - ThreadTile1: 3 + ThreadTile1: 4 ThreadTileA: 40 - ThreadTileB: 3 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -607667,7 +606884,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -607710,8 +606927,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -607725,36 +606942,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 - LSPB: 8 + LSPB: 32 LVCA: 4 - LVCB: 32 + LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1280 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 21504 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21504 - LdsOffsetB_Blk: 87040 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 87040 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -607771,14 +606988,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] + MIWaveTile: [10, 4] MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 320 + MacroTile1: 256 MacroTileA: 160 - MacroTileB: 320 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -607793,20 +607010,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 5 - NumLoadsB: 40 + NumLoadsB: 8 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -607892,8 +607109,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2328 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU2_LBSPPA1280_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2325 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -607909,9 +607126,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 40 - ThreadTile1: 5 + ThreadTile1: 4 ThreadTileA: 40 - ThreadTileB: 5 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -607932,7 +607149,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -607959,7 +607176,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -607975,7 +607192,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -607986,42 +607203,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB8_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_8_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 64 + LSPB: 32 LVCA: 8 - LVCB: 4 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + LVPB: 4 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61696 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 61696 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -608031,15 +607248,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -608054,20 +607271,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 10 + NumLoadsB: 4 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -608153,8 +607370,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2329 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB8_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2326 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_8_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -608162,17 +607379,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -608183,21 +607400,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -608232,11 +607449,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -608247,36 +607464,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 47872 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -608293,14 +607510,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 352 + MacroTileA: 128 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -608321,14 +607538,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 44 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 44 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -608414,8 +607631,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2330 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2327 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -608423,17 +607640,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -608444,7 +607661,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -608481,7 +607698,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -608493,11 +607710,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -608508,32 +607725,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 - LSCB: 32 + LSCB: 64 LSPA: 16 - LSPB: 16 + LSPB: 32 LVCA: 16 - LVCB: 16 + LVCB: 8 LVPA: 2 - LVPB: 8 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 15104 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 6912 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 24576 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 15104 - LdsOffsetMetadata_Blk: 24576 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -608542,10 +607759,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -608553,15 +607770,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 96 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -608577,19 +607794,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 2 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -608675,8 +607892,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2331 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2328 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -608684,17 +607901,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -608705,21 +607922,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -608758,7 +607975,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -608769,7 +607986,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB4_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -608782,20 +607999,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -608814,15 +608031,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 224 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 224 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -608837,20 +608054,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 NumLoadsA: 7 - NumLoadsB: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -608936,8 +608153,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2332 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2329 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -608945,17 +608162,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -608966,13 +608183,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -609015,11 +608232,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -609030,36 +608247,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54528 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54528 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61056 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -609075,15 +608292,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -609098,20 +608315,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 7 - NumLoadsB: 5 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -609197,8 +608414,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2333 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2330 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -609206,17 +608423,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -609227,13 +608444,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -609276,7 +608493,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -609291,36 +608508,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 4 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47104 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47104 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 61056 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -609336,15 +608553,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -609359,20 +608576,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -609458,8 +608675,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2334 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2331 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -609468,16 +608685,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 6 + ThreadTile1: 13 ThreadTileA: 16 - ThreadTileB: 6 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -609494,7 +608711,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -609552,32 +608769,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 + LSPA: 8 LSPB: 32 - LVCA: 16 + LVCA: 32 LVCB: 8 - LVPA: 2 + LVPA: 1 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -609597,15 +608814,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -609626,14 +608843,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -609719,8 +608936,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2335 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2332 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -609729,16 +608946,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -609755,7 +608972,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -609798,11 +609015,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -609813,33 +609030,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_8_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -609858,15 +609075,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -609881,20 +609098,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 6 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 16 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -609980,8 +609197,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2336 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2333 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_8_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -609989,17 +609206,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -610010,13 +609227,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -610059,11 +609276,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -610074,88 +609291,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB2_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59648 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59648 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 - NumLoadsB: 24 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -610241,8 +609458,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2337 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2334 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -610250,17 +609467,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -610271,13 +609488,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -610308,7 +609525,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -610335,42 +609552,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 + LdsNumBytes: 30208 LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB_Blk: 53760 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 53760 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -610380,15 +609597,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -610403,20 +609620,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 5 - NumLoadsB: 6 + NumLoadsB: 2 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -610502,8 +609719,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2338 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2335 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -610512,16 +609729,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 40 - ThreadTile1: 3 + ThreadTile1: 4 ThreadTileA: 40 - ThreadTileB: 3 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -610538,15 +609755,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -610569,7 +609786,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -610585,7 +609802,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -610596,34 +609813,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_2_NTB0_NTC3_NTD3_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 64 LVCA: 8 - LVCB: 8 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 29696 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 53248 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 29696 + LdsOffsetMetadata_Blk: 53248 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -610631,33 +609848,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -610670,14 +609887,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 2 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -610763,8 +609980,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2339 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2336 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_2_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -610772,17 +609989,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -610793,21 +610010,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -610830,7 +610047,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -610842,11 +610059,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -610857,22 +610074,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB4_LRVW4_MIWT24_2_NTB4_NTC0_NTD0_NLCA3_SVW8_VWA8_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 33280 LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -610881,64 +610098,64 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 33280 LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [24, 2] + MIWaveTileA: 24 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 384 + MacroTile1: 128 + MacroTileA: 384 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 6 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -611024,8 +610241,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2340 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2337 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB4_LRVW4_MIWT24_2_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -611033,17 +610250,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -611054,21 +610271,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -611103,11 +610320,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -611118,45 +610335,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 8 LVCA: 8 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -611164,42 +610381,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 192 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 6 - NumLoadsB: 6 + NumLoadsB: 32 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -611285,8 +610502,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2341 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2338 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -611294,17 +610511,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -611315,13 +610532,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -611364,7 +610581,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -611379,32 +610596,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_7_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG128_2_1 LSCA: 128 LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 + LVCB: 4 LVPA: 2 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 24320 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 16128 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 24320 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -611425,14 +610642,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 384 + MacroTile1: 128 + MacroTileA: 384 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -611447,20 +610664,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 2 - NumLoadsB: 14 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -611546,8 +610763,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2342 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT1_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2339 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -611562,10 +610779,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -611613,7 +610830,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -611625,11 +610842,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -611640,34 +610857,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB4_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59648 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59648 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -611675,53 +610892,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 4 + NumLoadsB: 16 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -611807,8 +611024,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2343 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_6_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2340 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -611816,17 +611033,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -611837,21 +611054,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -611886,11 +611103,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -611901,34 +611118,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT16_2_NTB4_NTC0_NTD0_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NTC3_NTD3_NLCA7_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25088 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25088 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -611946,14 +611163,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [16, 2] - MIWaveTileA: 16 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 448 MacroTile1: 128 - MacroTileA: 256 + MacroTileA: 448 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -611969,20 +611186,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 2 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -612068,8 +611285,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2344 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT16_2_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2341 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -612077,17 +611294,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -612098,13 +611315,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -612135,7 +611352,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -612147,11 +611364,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -612162,42 +611379,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 37632 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 37632 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -612208,14 +611425,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 16] - MIWaveTileA: 2 - MIWaveTileB: 16 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -612230,19 +611447,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 7 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -612329,8 +611546,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2345 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2342 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -612338,17 +611555,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 16 - ThreadTileA: 8 - ThreadTileB: 16 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -612359,7 +611576,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -612370,10 +611587,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -612396,7 +611613,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -612408,11 +611625,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -612423,45 +611640,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 16 LVCA: 32 - LVCB: 8 + LVCB: 16 LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 27264 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 27264 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -612469,42 +611686,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -612590,8 +611807,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2346 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2343 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -612599,17 +611816,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -612620,21 +611837,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -612669,11 +611886,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -612684,36 +611901,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 41472 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41472 - LdsOffsetB_Blk: 107008 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 107008 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -612730,14 +611947,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -612752,20 +611969,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 40 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -612851,8 +612068,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2347 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2344 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -612860,17 +612077,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -612881,7 +612098,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -612918,7 +612135,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -612930,7 +612147,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -612945,22 +612162,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 + LdsNumBytes: 34048 LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -612969,18 +612186,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 + LdsOffsetMetadata: 34048 LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -612990,15 +612207,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [10, 6] MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -613014,19 +612231,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 NumLoadsA: 5 - NumLoadsB: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -613112,8 +612329,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2348 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2345 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -613122,16 +612339,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 40 - ThreadTile1: 4 + ThreadTile1: 6 ThreadTileA: 40 - ThreadTileB: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -613148,15 +612365,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -613191,11 +612408,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -613206,36 +612423,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_8_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadA: 1280 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61696 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 21504 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 21504 + LdsOffsetB_Blk: 87040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61696 - LdsOffsetMetadata_Blk: 106752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 87040 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -613251,15 +612468,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -613274,20 +612491,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 10 - NumLoadsB: 4 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 40 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -613373,8 +612590,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2349 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_8_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2346 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -613382,17 +612599,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -613403,13 +612620,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -613456,7 +612673,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -613467,33 +612684,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_10_NTB4_NTC3_NTD3_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 8 - LVCA: 16 + LVCA: 8 LVCB: 32 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 47872 + LdsNumBytes: 63232 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 63232 + LdsOffsetMetadata_Blk: 107008 + LdsPadA: 16 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -613512,15 +612729,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 10] + MIWaveTileA: 5 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 352 - MacroTileA: 128 - MacroTileB: 352 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -613535,20 +612752,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 44 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 200 + NumLoadsA: 10 + NumLoadsB: 20 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 44 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -613634,8 +612851,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2350 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2347 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_10_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -613643,17 +612860,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 20 + ThreadTile1: 10 + ThreadTileA: 20 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -613664,13 +612881,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -613701,7 +612918,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -613713,7 +612930,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -613728,68 +612945,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_10_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG64_4_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 - LSPB: 32 + LSPB: 16 LVCA: 16 - LVCB: 8 + LVCB: 16 LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 35968 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 35968 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 10] + MIWaveTileA: 6 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 384 + MacroTile1: 160 + MacroTileA: 384 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -613802,13 +613019,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 6 NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -613895,8 +613112,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2351 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2348 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_10_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -613905,16 +613122,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 10 + ThreadTileA: 24 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -613936,10 +613153,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -613962,7 +613179,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -613974,11 +613191,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -613989,42 +613206,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB4_NTC3_NTD3_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_10_NTB4_NTC3_NTD3_NLCA3_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 35968 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35968 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -614034,15 +613251,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 10] + MIWaveTileA: 6 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 384 + MacroTile1: 160 + MacroTileA: 384 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -614063,14 +613280,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 7 - NumLoadsB: 7 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 6 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -614156,8 +613373,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2352 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2349 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_10_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -614165,17 +613382,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 10 + ThreadTileA: 24 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -614186,21 +613403,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -614223,7 +613440,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -614235,11 +613452,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -614250,42 +613467,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61056 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61056 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -614295,15 +613512,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -614318,20 +613535,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 2 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -614417,8 +613634,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2353 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2350 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -614426,17 +613643,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -614447,21 +613664,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -614496,11 +613713,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -614511,36 +613728,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_8_NTB0_NTC3_NTD3_NLCA5_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61056 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 61696 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61056 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 61696 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -614556,15 +613773,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -614579,20 +613796,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -614678,8 +613895,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2354 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2351 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_8_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -614687,17 +613904,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -614708,13 +613925,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -614745,7 +613962,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -614757,11 +613974,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -614772,45 +613989,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 32 + LSPB: 16 LVCA: 32 - LVCB: 8 + LVCB: 16 LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 28416 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 28416 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -614818,42 +614035,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 176 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -614939,8 +614156,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2355 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2352 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -614948,17 +614165,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -614969,21 +614186,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -615006,7 +614223,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -615033,42 +614250,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_8_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 LSCA: 256 - LSCB: 64 + LSCB: 32 LSPA: 8 - LSPB: 8 + LSPB: 16 LVCA: 32 - LVCB: 32 + LVCB: 16 LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 30592 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 30592 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -615079,14 +614296,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 8] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 208 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -615101,20 +614318,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 16 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 4 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -615200,8 +614417,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2356 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_8_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2353 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -615217,9 +614434,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 8 + ThreadTile1: 13 ThreadTileA: 16 - ThreadTileB: 8 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -615241,10 +614458,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -615294,7 +614511,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 LSCB: 64 LSPA: 8 @@ -615307,9 +614524,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 + LdsNumBytes: 65024 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -615318,7 +614535,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 + LdsOffsetMetadata: 65024 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 @@ -615340,14 +614557,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] + MIWaveTile: [2, 7] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -615362,20 +614579,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -615461,8 +614678,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2357 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2354 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -615478,9 +614695,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -615528,7 +614745,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -615555,88 +614772,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 53760 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 53760 - LdsPadA: 32 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 2 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -615722,8 +614939,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2358 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2355 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -615738,10 +614955,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -615758,15 +614975,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -615789,7 +615006,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -615805,7 +615022,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -615816,34 +615033,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_2_NTB0_NTC3_NTD3_NLCA5_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 64 + LSPB: 32 LVCA: 8 - LVCB: 4 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + LVPB: 4 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29696 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 53248 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29696 - LdsOffsetMetadata_Blk: 53248 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 107008 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -615851,10 +615068,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -615862,9 +615079,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 320 MacroTile1: 128 @@ -615874,10 +615091,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -615891,13 +615108,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 2 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -615983,8 +615200,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2359 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_2_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2356 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -615992,17 +615209,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -616013,21 +615230,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -616062,11 +615279,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -616077,68 +615294,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB4_LRVW4_MIWT24_2_NTB4_NTC0_NTD0_NLCA3_SVW8_VWA8_WG16_16_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33280 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 86016 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33280 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 86016 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [24, 2] - MIWaveTileA: 24 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -616151,14 +615368,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -616244,8 +615461,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2360 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB4_LRVW4_MIWT24_2_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2357 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -616253,17 +615470,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -616274,13 +615491,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -616311,7 +615528,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -616323,11 +615540,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -616338,42 +615555,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTB0_NTC0_NTD0_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -616383,15 +615600,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -616407,19 +615624,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 32 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -616505,8 +615722,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2361 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_8_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2358 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -616514,17 +615731,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -616535,21 +615752,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -616572,7 +615789,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -616584,11 +615801,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -616599,34 +615816,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 - LSCB: 32 + LSCB: 64 LSPA: 16 - LSPB: 64 + LSPB: 8 LVCA: 16 - LVCB: 4 + LVCB: 32 LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -616634,53 +615851,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 2 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 36 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -616766,8 +615983,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2362 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2359 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -616775,17 +615992,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -616796,21 +616013,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -616833,7 +616050,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -616845,11 +616062,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -616860,22 +616077,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -616884,10 +616101,10 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -616895,33 +616112,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -616934,14 +616151,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 4 - NumLoadsB: 16 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -617027,8 +616244,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2363 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2360 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -617036,17 +616253,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -617057,21 +616274,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -617121,7 +616338,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NTC3_NTD3_NLCA7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NTC0_NTD0_NLCA7_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 32 LSPA: 32 @@ -617190,8 +616407,8 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 @@ -617288,8 +616505,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2364 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2361 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -617355,7 +616572,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -617367,7 +616584,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -617382,22 +616599,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB0_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37632 + LdsNumBytes: 64768 LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -617406,18 +616623,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37632 + LdsOffsetMetadata: 64768 LdsOffsetMetadata_Blk: 94464 LdsPadA: 16 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -617427,15 +616644,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 8] + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -617450,20 +616667,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 NumLoadsA: 7 - NumLoadsB: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -617549,8 +616766,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2365 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2362 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -617559,16 +616776,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 28 - ThreadTile1: 8 + ThreadTile1: 7 ThreadTileA: 28 - ThreadTileB: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -617585,15 +616802,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -617616,7 +616833,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -617628,11 +616845,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -617643,45 +616860,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 16 + LSPB: 32 LVCA: 32 - LVCB: 16 + LVCB: 8 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27264 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27264 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -617689,42 +616906,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -617810,8 +617027,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2366 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2363 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -617819,17 +617036,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -617840,21 +617057,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -617877,7 +617094,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -617904,32 +617121,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 77824 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -617938,8 +617155,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -617949,14 +617166,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 192 MacroTile1: 320 - MacroTileA: 128 + MacroTileA: 192 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -617973,19 +617190,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 40 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 20 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -618071,26 +617288,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2367 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2364 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -618107,21 +617324,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -618150,11 +617367,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -618165,45 +617382,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 32 LSPA: 32 - LSPB: 16 + LSPB: 64 LVCA: 8 - LVCB: 16 + LVCB: 4 LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 77824 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -618211,22 +617428,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 6] - MIWaveTileA: 10 - MIWaveTileB: 6 + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -618234,19 +617451,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 5 - NumLoadsB: 12 - NumLoadsCoalescedA: 5 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 3 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -618332,26 +617549,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2368 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2365 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 6 - ThreadTileA: 40 - ThreadTileB: 6 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -618362,14 +617579,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -618382,7 +617599,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -618399,7 +617616,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -618411,7 +617628,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -618426,68 +617643,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1280 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 21504 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21504 - LdsOffsetB_Blk: 87040 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 87040 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 448 + MacroTileA: 128 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -618495,19 +617712,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 40 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 2 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -618593,15 +617810,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2369 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2366 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -618609,10 +617826,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -618629,21 +617846,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -618660,7 +617877,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -618672,11 +617889,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -618687,88 +617904,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_10_NTB4_NTC3_NTD3_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63232 - LdsNumElementsAlignedA: 41472 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41472 - LdsOffsetB_Blk: 107008 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63232 - LdsOffsetMetadata_Blk: 107008 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 10] - MIWaveTileA: 5 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 512 + MacroTileA: 128 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 200 - NumLoadsA: 10 - NumLoadsB: 20 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -618854,26 +618071,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2370 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_10_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2367 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 10 - ThreadTileA: 20 - ThreadTileB: 10 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -618884,27 +618101,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -618921,7 +618138,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -618948,22 +618165,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_10_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35968 + LdsNumBytes: 60928 LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -618972,18 +618189,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35968 + LdsOffsetMetadata: 60928 LdsOffsetMetadata_Blk: 90624 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -618993,15 +618210,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 10] + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] MIWaveTileA: 6 - MIWaveTileB: 10 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 160 - MacroTileA: 384 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -619017,19 +618234,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 NumLoadsA: 6 - NumLoadsB: 10 + NumLoadsB: 28 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -619115,26 +618332,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2371 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_10_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2368 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 10 + ThreadTile1: 7 ThreadTileA: 24 - ThreadTileB: 10 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -619151,21 +618368,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -619198,7 +618415,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -619209,7 +618426,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_10_NTB4_NTC3_NTD3_NLCA3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG16_16_1 LSCA: 128 LSCB: 32 LSPA: 16 @@ -619218,24 +618435,24 @@ LVCB: 16 LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35968 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 38656 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35968 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 + LdsOffsetMetadata: 38656 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -619254,15 +618471,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 10] - MIWaveTileA: 6 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 160 - MacroTileA: 384 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 448 + MacroTileA: 128 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -619277,20 +618494,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 6 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 28 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -619376,26 +618593,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2372 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_10_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2369 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 10 - ThreadTileA: 24 - ThreadTileB: 10 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -619406,14 +618623,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -619426,7 +618643,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -619443,7 +618660,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -619459,7 +618676,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -619470,42 +618687,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -619516,14 +618733,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -619538,20 +618755,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 NumLoadsA: 7 - NumLoadsB: 2 + NumLoadsB: 7 NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -619637,26 +618854,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2373 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2370 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -619667,27 +618884,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -619720,7 +618937,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -619731,45 +618948,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_8_NTB0_NTC3_NTD3_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61696 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61696 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -619777,22 +618994,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -619800,19 +619017,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -619898,26 +619115,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2374 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_8_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2371 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -619928,14 +619145,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -619948,7 +619165,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -619977,11 +619194,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -619992,68 +619209,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 45056 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -620061,19 +619278,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 11 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -620159,26 +619376,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2375 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2372 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -620189,14 +619406,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -620209,7 +619426,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -620242,7 +619459,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -620253,33 +619470,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_7_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 32 - LSPA: 8 + LSPA: 32 LSPB: 16 - LVCA: 32 + LVCA: 8 LVCB: 16 - LVPA: 1 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30592 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 28032 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30592 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 + LdsOffsetMetadata: 28032 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -620298,15 +619515,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -620322,19 +619539,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 4 - NumLoadsB: 13 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 14 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -620420,26 +619637,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2376 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2373 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_7_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -620450,14 +619667,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -620470,7 +619687,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -620499,11 +619716,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -620514,45 +619731,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -620560,22 +619777,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -620583,19 +619800,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 8 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 10 + NumLoadsB: 18 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -620681,26 +619898,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2377 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2374 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -620711,14 +619928,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -620731,7 +619948,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -620748,7 +619965,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -620764,7 +619981,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -620775,88 +619992,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 512 + MacroTileA: 128 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -620942,26 +620159,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2378 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2375 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 8 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -620972,27 +620189,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -621025,7 +620242,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -621036,7 +620253,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -621045,36 +620262,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 41472 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41472 - LdsOffsetB_Blk: 107008 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 107008 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -621082,22 +620299,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 + MIWaveTile: [3, 4] + MIWaveTileA: 3 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -621105,19 +620322,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -621203,25 +620420,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2379 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2376 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 48 ThreadTile1: 4 - ThreadTileA: 40 + ThreadTileA: 48 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -621233,14 +620450,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -621253,7 +620470,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -621282,7 +620499,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -621297,88 +620514,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 32 LSPA: 32 - LSPB: 64 + LSPB: 16 LVCA: 8 - LVCB: 4 + LVCB: 16 LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 86016 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 53504 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 86016 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 53504 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [5, 11] MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 320 - MacroTile1: 192 + MacroTile1: 176 MacroTileA: 320 - MacroTileB: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 + NumElementsPerThread: 220 + NumGlobalWriteVectorsPerThread: 220 NumLoadsA: 5 - NumLoadsB: 3 + NumLoadsB: 11 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -621464,26 +620681,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2380 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2377 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 11 + ThreadTileA: 20 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -621501,7 +620718,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -621514,7 +620731,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -621531,7 +620748,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -621547,7 +620764,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -621558,68 +620775,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTB0_NTC0_NTD0_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 8192 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 5] - MIWaveTileA: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -621627,18 +620844,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -621725,20 +620942,20 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2381 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2378 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 @@ -621755,27 +620972,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -621792,7 +621009,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -621819,42 +621036,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_12_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 - LSPB: 8 + LSPB: 16 LVCA: 16 - LVCB: 32 + LVCB: 16 LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -621865,14 +621082,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] + MIWaveTile: [4, 12] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 12 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 288 + MacroTile1: 384 MacroTileA: 128 - MacroTileB: 288 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -621888,19 +621105,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 36 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 2 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -621986,15 +621203,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2382 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2379 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_12_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 @@ -622003,9 +621220,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 9 + ThreadTile1: 12 ThreadTileA: 16 - ThreadTileB: 9 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -622023,20 +621240,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -622053,7 +621270,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -622080,34 +621297,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG32_8_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 - LSPB: 32 + LSPB: 64 LVCA: 16 - LVCB: 8 + LVCB: 4 LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -622115,33 +621332,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] + MIWaveGroup: [1, 4] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 288 + MacroTile1: 384 MacroTileA: 128 - MacroTileB: 288 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -622149,19 +621366,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -622247,26 +621464,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2383 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2380 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -622284,20 +621501,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -622314,7 +621531,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -622326,11 +621543,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -622341,42 +621558,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NTC0_NTD0_NLCA7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_10_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 64 + LSPB: 8 LVCA: 8 - LVCB: 4 + LVCB: 32 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + LVPB: 4 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 63232 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 63232 + LdsOffsetMetadata_Blk: 107008 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -622386,15 +621603,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 10] + MIWaveTileA: 5 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -622410,19 +621627,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 2 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 200 + NumLoadsA: 10 + NumLoadsB: 20 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -622508,26 +621725,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2384 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2381 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_10_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 10 + ThreadTileA: 20 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -622538,27 +621755,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -622575,7 +621792,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -622587,11 +621804,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -622602,42 +621819,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB0_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG64_4_1 + LSCA: 512 + LSCB: 32 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -622647,15 +621864,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -622671,19 +621888,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 7 - NumLoadsB: 7 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -622769,26 +621986,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2385 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2382 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -622799,27 +622016,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -622848,7 +622065,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -622863,88 +622080,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 36 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -623030,15 +622247,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2386 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2383 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -623046,10 +622263,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -623066,8 +622283,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -623080,7 +622297,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -623109,11 +622326,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -623124,68 +622341,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NLCA3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 32 LSPA: 32 - LSPB: 16 + LSPB: 64 LVCA: 8 - LVCB: 16 + LVCB: 4 LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 86016 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 77824 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 86016 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -623199,13 +622416,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 20 - NumLoadsCoalescedA: 3 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -623291,8 +622508,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2387 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 + SolutionIndex: 2384 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -623300,17 +622517,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -623321,13 +622538,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -623370,7 +622587,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -623385,68 +622602,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NLCA7_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 32 LSPA: 32 - LSPB: 64 + LSPB: 16 LVCA: 8 - LVCB: 4 + LVCB: 16 LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 37632 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 77824 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 37632 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -623459,14 +622676,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 7 + NumLoadsB: 8 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -623552,8 +622769,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2388 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_5_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2385 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -623562,16 +622779,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -623631,11 +622848,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -623646,32 +622863,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG128_2_1 + LSCA: 512 LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 1 LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 39680 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 6912 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 39680 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -623691,15 +622908,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 512 + MacroTile1: 96 + MacroTileA: 512 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -623720,14 +622937,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 2 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -623813,8 +623030,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2389 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2386 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -623822,17 +623039,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -623843,13 +623060,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -623880,7 +623097,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -623892,11 +623109,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -623907,32 +623124,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -623941,8 +623158,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -623952,15 +623169,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -623981,14 +623198,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 8 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -624074,8 +623291,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2390 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2387 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -624083,17 +623300,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -624104,27 +623321,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -624157,7 +623374,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -624168,7 +623385,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SVW8_VWA8_WG16_16_1 LSCA: 128 LSCB: 32 LSPA: 16 @@ -624177,59 +623394,59 @@ LVCB: 4 LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -624242,14 +623459,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 2 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -624335,8 +623552,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2391 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2388 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -624344,17 +623561,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -624365,13 +623582,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -624402,7 +623619,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -624414,7 +623631,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -624429,34 +623646,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -624464,10 +623681,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -624475,22 +623692,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -624503,14 +623720,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 28 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -624596,8 +623813,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2392 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2389 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -624606,16 +623823,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -624632,21 +623849,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -624663,7 +623880,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -624674,14 +623891,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -624690,44 +623907,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 - LSCB: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 64 LSPA: 16 - LSPB: 16 + LSPB: 32 LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + LVCB: 8 + LVPA: 16 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38656 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 43264 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 67840 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38656 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 43264 + LdsOffsetMetadata_Blk: 67840 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -624736,14 +623953,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 16 + MacroTile1: 256 + MacroTileA: 16 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -624759,19 +623976,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 28 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -624857,26 +624074,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2393 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2390 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -624887,27 +624104,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -624924,7 +624141,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -624935,14 +624152,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -624951,32 +624168,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -624985,10 +624202,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -624996,15 +624213,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -625020,19 +624237,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 7 - NumLoadsB: 7 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -625118,26 +624335,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2394 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 2391 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -625154,21 +624371,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -625185,7 +624402,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -625196,14 +624413,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -625212,34 +624429,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 LSPA: 16 - LSPB: 32 + LSPB: 16 LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -625247,53 +624464,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -625379,26 +624596,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2395 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2392 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -625409,27 +624626,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -625446,7 +624663,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -625457,14 +624674,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -625473,34 +624690,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 16 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30720 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 43264 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 67840 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30720 - LdsOffsetMetadata_Blk: 45056 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 43264 + LdsOffsetMetadata_Blk: 67840 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -625508,10 +624725,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -625519,22 +624736,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 16 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 16 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -625542,19 +624759,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -625640,26 +624857,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2396 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2393 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -625670,27 +624887,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -625707,7 +624924,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -625718,14 +624935,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -625734,44 +624951,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_7_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28032 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28032 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -625779,15 +624996,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -625802,20 +625019,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 14 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -625901,26 +625118,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2397 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_7_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2394 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -625931,27 +625148,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -625968,7 +625185,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -625979,14 +625196,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -625995,44 +625212,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32128 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 23936 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32128 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -626040,15 +625257,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 352 - MacroTileA: 128 - MacroTileB: 352 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -626063,20 +625280,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 2 - NumLoadsB: 22 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -626162,26 +625379,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2398 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_11_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2395 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -626192,27 +625409,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -626240,14 +625457,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -626256,32 +625473,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 16 LVPB: 4 - LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 53504 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 67840 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 106752 + LdsOffsetMetadata: 53504 + LdsOffsetMetadata_Blk: 67840 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -626293,7 +625510,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -626301,15 +625518,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 16 + MacroTile1: 320 + MacroTileA: 16 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -626325,19 +625542,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 10 - NumLoadsB: 18 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -626423,26 +625640,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2399 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2396 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -626459,8 +625676,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -626469,11 +625686,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -626490,7 +625707,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -626501,14 +625718,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -626517,44 +625734,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 - LSCB: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -626563,14 +625780,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -626586,19 +625803,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -626684,26 +625901,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2400 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2397 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -626714,27 +625931,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -626762,14 +625979,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -626778,68 +625995,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT8x384x64_MI4x4x16_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT2_3_NTB0_NTC3_NTD3_PLR1_SVW2_VWA2_WG4_32_2 + LSCA: 8 LSCB: 64 LSPA: 32 LSPB: 32 LVCA: 8 LVCB: 8 - LVPA: 4 + LVPA: 32 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 1024 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 1024 + LdsOffsetB_Blk: 66560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 66560 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [4, 4, 4, 16, 1, 16] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 8 + MacroTile1: 384 + MacroTileA: 8 + MacroTileB: 384 MagicDivAlg: 2 - MatrixInstB: 1 + MatrixInstB: 16 MatrixInstBM: 1 - MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstBN: 16 + MatrixInstK: 4 + MatrixInstM: 4 + MatrixInstN: 4 + MatrixInstruction: [4, 4, 4, 16] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -626847,19 +626064,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 2 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -626945,26 +626162,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2401 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2398 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT8x384x64_MI4x4x16_SN_CLR1_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT2_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG4_32_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 1 + SubGroup1: 128 + SubGroupA: 1 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -626975,14 +626192,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [4, 32, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -626991,11 +626208,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -627012,7 +626229,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -627023,14 +626240,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -627039,44 +626256,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA0_LPB8_LRVW4_MIWT20_3_NLCA5_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 86016 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 86016 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -627085,13 +626302,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 320 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -627108,19 +626325,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -627206,25 +626423,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2402 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA0_LPB8_LRVW4_MIWT20_3_NLCA5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 + SolutionIndex: 2399 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -627236,27 +626453,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -627273,7 +626490,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -627285,7 +626502,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -627300,44 +626517,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 16 - LVCA: 8 + LVCA: 2 LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 53504 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 53504 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -627345,15 +626562,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 11] - MIWaveTileA: 5 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 176 - MacroTileA: 320 - MacroTileB: 176 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -627369,19 +626586,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 220 - NumGlobalWriteVectorsPerThread: 220 - NumLoadsA: 5 - NumLoadsB: 11 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -627467,26 +626684,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2403 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2400 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 11 - ThreadTileA: 20 - ThreadTileB: 11 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -627503,21 +626720,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -627534,7 +626751,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -627546,11 +626763,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -627561,88 +626778,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 64 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 59136 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 70656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 70656 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalReadVectorWidth: 4 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 224 + MacroTileA: 16 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 14 + NumGlobalWriteVectorsPerThread: 14 + NumLoadsA: 1 + NumLoadsB: 56 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 56 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -627728,26 +626945,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2404 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2401 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -627758,27 +626975,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -627795,7 +627012,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -627807,11 +627024,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -627822,44 +627039,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_12_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 40192 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 69888 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 40192 + LdsOffsetMetadata_Blk: 69888 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -627868,14 +627085,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 12] - MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 384 - MacroTileA: 128 - MacroTileB: 384 + MacroTile0: 32 + MacroTile1: 224 + MacroTileA: 32 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -627890,20 +627107,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 2 - NumLoadsB: 24 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 1 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -627989,26 +627206,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2405 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_12_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2402 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 12 - ThreadTileA: 16 - ThreadTileB: 12 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -628019,27 +627236,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -628056,7 +627273,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -628072,7 +627289,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -628083,45 +627300,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -628129,22 +627346,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 384 - MacroTileA: 128 - MacroTileB: 384 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -628152,19 +627369,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 2 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -628250,26 +627467,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2406 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2403 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -628280,27 +627497,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -628317,7 +627534,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -628329,7 +627546,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -628344,44 +627561,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_10_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63232 - LdsNumElementsAlignedA: 41472 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41472 - LdsOffsetB_Blk: 107008 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63232 - LdsOffsetMetadata_Blk: 107008 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -628389,15 +627606,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 10] - MIWaveTileA: 5 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -628412,20 +627629,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 200 - NumLoadsA: 10 - NumLoadsB: 20 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -628511,26 +627728,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2407 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_10_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2404 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 10 - ThreadTileA: 20 - ThreadTileB: 10 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -628547,21 +627764,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -628578,7 +627795,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -628590,11 +627807,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -628605,44 +627822,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWB2_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SVW8_VWA8_WG64_4_1 - LSCA: 512 - LSCB: 32 - LSPA: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 16 - LVCA: 64 + LVCA: 2 LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -628650,14 +627867,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 512 + MacroTile0: 48 MacroTile1: 128 - MacroTileA: 512 + MacroTileA: 48 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -628673,19 +627890,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -628772,26 +627989,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2408 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA4096_LPA0_LPB4_LRVW4_MIWT8_8_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM16 + SolutionIndex: 2405 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -628802,27 +628019,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -628851,11 +628068,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -628866,68 +628083,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 69632 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 69632 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 32 + MacroTile1: 256 + MacroTileA: 32 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -628935,19 +628152,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 36 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 1 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -629033,26 +628250,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2409 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2406 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -629063,14 +628280,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -629083,7 +628300,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -629100,7 +628317,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -629113,7 +628330,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -629127,88 +628344,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 86016 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 86016 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 320 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 5 - NumLoadsB: 3 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -629294,15 +628511,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2410 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2407 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -629310,9 +628527,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -629330,21 +628547,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -629361,7 +628578,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -629373,11 +628590,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -629388,44 +628605,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_8_NLCA3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 16 - LVCA: 16 + LVCA: 2 LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -629433,15 +628650,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -629456,20 +628673,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -629555,26 +628772,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2411 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_8_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2408 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -629585,27 +628802,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -629622,7 +628839,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -629634,11 +628851,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -629649,44 +628866,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NLCA7_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37632 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37632 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -629694,15 +628911,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 256 + MacroTileA: 32 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -629718,16 +628935,16 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 7 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 1 NumLoadsB: 8 - NumLoadsCoalescedA: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 @@ -629816,26 +629033,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2412 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2409 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -629846,27 +629063,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -629883,7 +629100,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -629895,11 +629112,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -629910,34 +629127,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_WG128_2_1 - LSCA: 512 - LSCB: 32 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 39680 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 6912 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 39680 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -629945,53 +629162,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 96 - MacroTileA: 512 - MacroTileB: 96 + MacroTile0: 32 + MacroTile1: 256 + MacroTileA: 32 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -630077,26 +629294,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2413 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x96x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM16 + SolutionIndex: 2410 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -630107,27 +629324,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -630144,7 +629361,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -630156,7 +629373,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -630171,34 +629388,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -630206,53 +629423,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 8 - NumLoadsB: 28 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -630338,26 +629555,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2414 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2411 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -630374,21 +629591,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -630405,7 +629622,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -630421,7 +629638,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -630432,44 +629649,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -630478,14 +629695,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -630501,19 +629718,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -630599,26 +629816,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2415 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2412 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -630629,27 +629846,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -630666,7 +629883,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -630679,10 +629896,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -630693,88 +629910,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -630860,26 +630077,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2416 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2413 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -630890,27 +630107,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -630927,7 +630144,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -630938,14 +630155,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -630954,32 +630171,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 LSCA: 16 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 LVPA: 16 - LVPB: 4 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43264 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 67840 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43264 - LdsOffsetMetadata_Blk: 67840 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -630988,8 +630205,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -631000,14 +630217,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 4] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 256 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -631022,20 +630239,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -631121,8 +630338,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2417 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2414 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -631138,9 +630355,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 4 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -631161,13 +630378,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -631188,7 +630405,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -631199,14 +630416,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -631215,22 +630432,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 + LdsNumBytes: 55808 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -631239,9 +630456,9 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 + LdsOffsetMetadata: 55808 LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -631249,8 +630466,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -631261,14 +630478,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 320 + MacroTileA: 32 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -631284,19 +630501,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 1 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -631382,8 +630599,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2418 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2415 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -631391,17 +630608,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -631412,7 +630629,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -631423,12 +630640,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -631460,14 +630677,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -631476,12 +630693,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 16 + LSPA: 128 LSPB: 16 - LVCA: 16 + LVCA: 2 LVCB: 16 LVPA: 16 LVPB: 2 @@ -631489,9 +630706,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -631500,7 +630717,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 @@ -631522,14 +630739,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -631544,20 +630761,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -631643,8 +630860,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2419 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2416 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -631660,9 +630877,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -631689,7 +630906,7 @@ _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -631710,7 +630927,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -631721,14 +630938,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -631737,32 +630954,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 LSCA: 16 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 LVPA: 16 - LVPB: 4 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43264 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 67840 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43264 - LdsOffsetMetadata_Blk: 67840 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -631771,8 +630988,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -631783,14 +631000,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 4] + MIWaveTile: [1, 2] MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 256 + MacroTile1: 128 MacroTileA: 16 - MacroTileB: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -631805,19 +631022,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -631904,8 +631121,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2420 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x256x64_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_4_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2417 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -631921,9 +631138,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 4 + ThreadTile1: 2 ThreadTileA: 4 - ThreadTileB: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -631945,12 +631162,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -631982,14 +631199,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -631998,12 +631215,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 16 + LSPA: 128 LSPB: 16 - LVCA: 16 + LVCA: 2 LVCB: 16 LVPA: 16 LVPB: 2 @@ -632074,11 +631291,11 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 + NumLoadsA: 1 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -632165,8 +631382,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2421 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2418 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -632211,7 +631428,7 @@ _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -632232,7 +631449,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -632243,14 +631460,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -632259,42 +631476,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA32_LPB8_LRVW4_MIWT2_6_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 5120 LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 70656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 70656 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -632305,14 +631522,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 384 + MacroTileA: 32 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -632327,19 +631544,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 1 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -632426,8 +631643,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2422 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2419 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA32_LPB8_LRVW4_MIWT2_6_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -632435,17 +631652,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -632456,7 +631673,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -632467,12 +631684,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -632493,7 +631710,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -632504,14 +631721,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -632520,33 +631737,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 16 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53504 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 67840 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53504 - LdsOffsetMetadata_Blk: 67840 - LdsPadA: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -632554,8 +631771,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -632566,14 +631783,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 320 - MacroTileA: 16 - MacroTileB: 320 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -632589,19 +631806,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -632687,8 +631904,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2423 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x320x64_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2420 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -632696,17 +631913,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -632717,7 +631934,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -632728,12 +631945,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -632754,7 +631971,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -632765,14 +631982,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -632781,32 +631998,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 35072 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 69888 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 35072 + LdsOffsetMetadata_Blk: 69888 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -632815,8 +632032,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -632826,14 +632043,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [1, 6] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 32 MacroTile1: 192 - MacroTileA: 16 + MacroTileA: 32 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -632855,14 +632072,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 1 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -632948,8 +632165,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2424 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2421 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -632958,16 +632175,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 6 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -632984,17 +632201,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -633026,14 +632243,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -633042,68 +632259,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT8x384x64_MI4x4x16_SN_CLR1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT2_3_NTB0_NTC3_NTD3_PLR1_SVW2_VWA2_WG4_32_2 - LSCA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 LSPA: 32 LSPB: 32 LVCA: 8 LVCB: 8 - LVPA: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 1024 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 44544 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 1024 - LdsOffsetB_Blk: 66560 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 66560 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [4, 4, 4, 16, 1, 16] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 7] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 8 - MacroTile1: 384 - MacroTileA: 8 - MacroTileB: 384 + MacroTile0: 64 + MacroTile1: 224 + MacroTileA: 64 + MacroTileB: 224 MagicDivAlg: 2 - MatrixInstB: 16 + MatrixInstB: 1 MatrixInstBM: 1 - MatrixInstBN: 16 - MatrixInstK: 4 - MatrixInstM: 4 - MatrixInstN: 4 - MatrixInstruction: [4, 4, 4, 16] + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -633111,19 +632328,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -633209,8 +632426,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2425 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT8x384x64_MI4x4x16_SN_CLR1_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT2_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG4_32_2_WGM1 + SolutionIndex: 2422 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -633219,16 +632436,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 1 - SubGroup1: 128 - SubGroupA: 1 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 7 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -633245,7 +632462,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [4, 32, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -633255,7 +632472,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -633276,7 +632493,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -633287,14 +632504,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -633303,33 +632520,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 44544 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -633337,8 +632554,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -633348,15 +632565,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 224 + MacroTileA: 64 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -633371,20 +632588,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -633470,8 +632687,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2426 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2423 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -633479,17 +632696,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -633500,23 +632717,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -633537,7 +632754,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -633553,7 +632770,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -633564,33 +632781,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -633598,10 +632815,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -633610,14 +632827,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -633633,16 +632850,16 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 @@ -633731,8 +632948,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2427 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2424 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -633740,17 +632957,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -633761,7 +632978,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -633772,10 +632989,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -633798,7 +633015,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -633810,7 +633027,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -633825,37 +633042,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 64 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 5120 - LdsNumElementsAlignedB: 59136 + LdsNumBytes: 48384 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 70656 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 70656 + LdsOffsetMetadata: 48384 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 2 + LocalReadVectorWidth: 8 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -633870,14 +633087,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 7] - MIWaveTileA: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] + MIWaveTileA: 3 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 96 MacroTile1: 224 - MacroTileA: 16 + MacroTileA: 96 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -633893,20 +633110,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 14 - NumGlobalWriteVectorsPerThread: 14 - NumLoadsA: 1 - NumLoadsB: 56 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 56 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -633992,8 +633209,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2428 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x224x128_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA128_LBSPPB256_LPA16_LPB4_LRVW4_MIWT1_7_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2425 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -634002,15 +633219,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 12 ThreadTile1: 7 - ThreadTileA: 4 + ThreadTileA: 12 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -634028,15 +633245,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -634086,7 +633303,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -634095,23 +633312,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40192 - LdsNumElementsAlignedA: 4352 + LdsNumBytes: 48384 + LdsNumElementsAlignedA: 12544 LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 69888 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40192 - LdsOffsetMetadata_Blk: 69888 + LdsOffsetMetadata: 48384 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -634132,13 +633349,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 7] - MIWaveTileA: 1 + MIWaveTile: [3, 7] + MIWaveTileA: 3 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 96 MacroTile1: 224 - MacroTileA: 32 + MacroTileA: 96 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -634160,11 +633377,11 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 1 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 7 @@ -634253,8 +633470,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2429 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2426 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -634269,9 +633486,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 12 ThreadTile1: 7 - ThreadTileA: 4 + ThreadTileA: 12 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -634320,7 +633537,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -634336,7 +633553,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -634347,22 +633564,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 + LdsNumBytes: 53760 LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -634371,9 +633588,9 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 + LdsOffsetMetadata: 53760 LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -634381,10 +633598,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -634393,14 +633610,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -634416,13 +633633,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 3 NumLoadsB: 8 NumLoadsCoalescedA: 3 @@ -634514,8 +633731,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2430 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2427 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -634523,17 +633740,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -634544,7 +633761,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -634555,10 +633772,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -634581,7 +633798,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -634608,32 +633825,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 48384 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 48384 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -634642,8 +633859,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -634653,15 +633870,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -634682,14 +633899,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 NumLoadsA: 3 - NumLoadsB: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -634775,8 +633992,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2431 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2428 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -634785,16 +634002,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 2 + ThreadTile1: 7 ThreadTileA: 12 - ThreadTileB: 2 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -634811,15 +634028,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -634842,7 +634059,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -634858,7 +634075,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -634869,33 +634086,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 44544 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -634903,8 +634120,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -634914,15 +634131,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 224 + MacroTileA: 64 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -634937,20 +634154,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -635036,8 +634253,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2432 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2429 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -635045,17 +634262,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -635066,21 +634283,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -635119,7 +634336,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -635130,32 +634347,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 4096 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 69632 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 69632 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -635176,13 +634393,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 + MIWaveTile: [2, 2] + MIWaveTileA: 2 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 64 MacroTile1: 256 - MacroTileA: 32 + MacroTileA: 64 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -635204,13 +634421,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 + NumElementsPerThread: 64 NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 1 + NumLoadsA: 2 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -635297,8 +634514,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2433 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIWT1_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2430 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -635306,16 +634523,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 2 SubGroup1: 128 SubGroupA: 2 SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -635327,7 +634544,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -635364,7 +634581,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -635377,10 +634594,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -635391,33 +634608,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -635425,8 +634642,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -635436,15 +634653,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -635460,19 +634677,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -635558,8 +634775,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2434 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2431 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -635567,17 +634784,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -635588,21 +634805,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -635625,7 +634842,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -635637,11 +634854,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -635652,42 +634869,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA0_LPB4_LRVW4_MIAV1_MIWT4_3_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 LSPB: 16 - LVCA: 2 + LVCA: 8 LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 17152 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 36864 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 17152 + LdsOffsetMetadata_Blk: 36864 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -635698,13 +634915,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 64 MacroTile1: 192 - MacroTileA: 16 + MacroTileA: 64 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -635720,13 +634937,13 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 + NumElementsPerThread: 48 NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 1 NumLoadsB: 12 @@ -635819,8 +635036,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2435 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2432 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA0_LPB4_LRVW4_MIAV1_MIWT4_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -635828,16 +635045,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -635849,7 +635066,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -635859,11 +635076,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -635898,11 +635115,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -635913,45 +635130,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 - LSPB: 32 + LSPB: 8 LVCA: 4 - LVCB: 8 + LVCB: 32 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 49152 + LdsOffsetMetadata_Blk: 77824 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -635959,42 +635176,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 96 MacroTile1: 256 - MacroTileA: 32 + MacroTileA: 96 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 1 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 32 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -636080,8 +635297,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2436 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2433 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -636089,17 +635306,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 2 + ThreadTileA: 48 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -636110,13 +635327,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -636163,7 +635380,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -636174,7 +635391,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -636183,24 +635400,24 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 53504 + LdsNumElementsAlignedA: 12544 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 32 + LdsOffsetMetadata: 53504 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -636211,7 +635428,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -636219,14 +635436,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 8] + MIWaveTileA: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 96 MacroTile1: 256 - MacroTileA: 32 + MacroTileA: 96 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -636248,11 +635465,11 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 @@ -636341,8 +635558,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2437 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2434 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -636350,17 +635567,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -636371,13 +635588,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -636408,7 +635625,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -636435,32 +635652,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 32 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -636469,8 +635686,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -636481,13 +635698,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveTile: [6, 3] + MIWaveTileA: 6 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 96 MacroTile1: 192 - MacroTileA: 32 + MacroTileA: 96 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -636503,20 +635720,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -636602,8 +635819,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2438 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2435 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -636618,9 +635835,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 24 ThreadTile1: 3 - ThreadTileA: 8 + ThreadTileA: 24 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -636643,10 +635860,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -636669,7 +635886,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -636685,7 +635902,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -636696,33 +635913,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -636730,10 +635947,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -636742,14 +635959,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -636764,20 +635981,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -636863,8 +636080,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2439 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2436 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -636872,17 +636089,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -636893,7 +636110,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -636904,10 +636121,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -636930,7 +636147,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -636942,11 +636159,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -636957,42 +636174,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA32_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 LSPB: 16 - LVCA: 2 + LVCA: 8 LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 + LdsNumBytes: 19840 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 19840 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -637002,15 +636219,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 224 + MacroTileA: 64 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -637025,20 +636242,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 1 - NumLoadsB: 12 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -637124,8 +636341,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2440 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2437 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA32_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -637133,17 +636350,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -637154,21 +636371,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -637191,7 +636408,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -637204,10 +636421,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -637218,33 +636435,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 38912 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 38912 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -637252,8 +636469,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -637264,13 +636481,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 64 MacroTile1: 192 - MacroTileA: 16 + MacroTileA: 64 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -637286,20 +636503,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 + NumElementsPerThread: 48 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -637385,8 +636602,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2441 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2438 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -637394,16 +636611,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -637415,7 +636632,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -637425,11 +636642,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -637479,32 +636696,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -637524,15 +636741,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 9] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 320 - MacroTileA: 32 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 288 + MacroTileA: 64 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -637548,19 +636765,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 10 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 2 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -637646,8 +636863,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2442 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2439 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -637656,16 +636873,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 9 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -637682,7 +636899,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -637713,7 +636930,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -637729,7 +636946,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -637740,33 +636957,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -637774,8 +636991,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -637786,14 +637003,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -637814,14 +637031,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -637907,8 +637124,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2443 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2440 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -637916,17 +637133,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -637937,7 +637154,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -637948,10 +637165,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -637974,7 +637191,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -637990,7 +637207,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -638001,33 +637218,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -638035,8 +637252,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -638046,15 +637263,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 10] + MIWaveTileA: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -638069,20 +637286,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -638168,8 +637385,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2444 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2441 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -638177,17 +637394,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 10 + ThreadTileA: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -638198,21 +637415,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -638235,7 +637452,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -638251,7 +637468,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -638262,33 +637479,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -638296,8 +637513,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -638307,15 +637524,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 10] + MIWaveTileA: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -638331,19 +637548,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -638429,8 +637646,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2445 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2442 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -638438,17 +637655,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 10 + ThreadTileA: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -638459,21 +637676,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -638512,7 +637729,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -638523,7 +637740,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA32_LPB8_LRVW4_MIWT2_6_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -638532,27 +637749,27 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 5120 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 70656 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 70656 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -638560,7 +637777,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -638568,15 +637785,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 10] + MIWaveTileA: 3 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 384 - MacroTileA: 32 - MacroTileB: 384 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -638597,14 +637814,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 1 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -638690,8 +637907,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2446 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA32_LPB8_LRVW4_MIWT2_6_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2443 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -638699,17 +637916,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 6 - ThreadTileA: 8 - ThreadTileB: 6 + ThreadTile0: 12 + ThreadTile1: 10 + ThreadTileA: 12 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -638720,13 +637937,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -638757,7 +637974,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -638769,7 +637986,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -638784,32 +638001,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 8 LVCA: 4 - LVCB: 16 + LVCB: 32 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -638818,10 +638035,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -638830,14 +638047,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -638853,19 +638070,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 40 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -638951,8 +638168,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2447 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2444 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -638967,10 +638184,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -638992,10 +638209,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -639034,7 +638251,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -639045,7 +638262,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -639054,24 +638271,24 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35072 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 69888 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35072 - LdsOffsetMetadata_Blk: 69888 - LdsPadA: 16 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -639082,7 +638299,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -639090,15 +638307,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -639113,20 +638330,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 1 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -639212,8 +638429,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2448 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2445 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -639221,17 +638438,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -639242,13 +638459,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -639291,7 +638508,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -639306,36 +638523,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_LBSPPA768_LPA32_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 768 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44544 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 13312 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 13312 + LdsOffsetB_Blk: 78848 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 78848 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -639343,7 +638560,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -639351,15 +638568,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 224 - MacroTileA: 64 - MacroTileB: 224 + MacroTile0: 96 + MacroTile1: 384 + MacroTileA: 96 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -639375,19 +638592,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 3 + NumLoadsB: 48 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -639473,8 +638690,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2449 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2446 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA768_LPA32_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -639483,16 +638700,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -639509,7 +638726,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -639556,7 +638773,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -639567,33 +638784,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44544 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 43264 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 + LdsOffsetMetadata: 43264 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -639613,14 +638830,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTile: [3, 6] + MIWaveTileA: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 224 - MacroTileA: 64 - MacroTileB: 224 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -639635,20 +638852,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 3 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -639734,8 +638951,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2450 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2447 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -639743,17 +638960,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 6 + ThreadTileA: 12 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -639764,7 +638981,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -639801,7 +639018,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -639813,11 +639030,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -639828,34 +639045,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 17920 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 36864 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 17920 + LdsOffsetMetadata_Blk: 36864 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -639863,33 +639080,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 192 + MacroTileA: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -639902,14 +639119,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 + NumElementsPerThread: 48 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumLoadsA: 1 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -639995,8 +639212,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2451 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2448 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -640004,17 +639221,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -640025,21 +639242,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -640078,7 +639295,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -640089,88 +639306,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48384 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48384 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 384 + MacroTileA: 64 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 2 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -640256,8 +639473,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2452 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2449 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -640265,17 +639482,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -640286,7 +639503,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -640339,7 +639556,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -640350,7 +639567,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -640363,20 +639580,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48384 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48384 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -640395,15 +639612,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 96 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -640418,20 +639635,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 3 - NumLoadsB: 7 + NumLoadsB: 6 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -640517,8 +639734,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2453 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2450 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -640526,17 +639743,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -640547,13 +639764,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -640600,7 +639817,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -640611,7 +639828,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -640624,20 +639841,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 43264 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 43264 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -640648,7 +639865,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -640656,15 +639873,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 6] + MIWaveTileA: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 256 + MacroTile1: 192 MacroTileA: 96 - MacroTileB: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -640679,20 +639896,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 72 NumLoadsA: 3 - NumLoadsB: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -640778,8 +639995,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2454 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2451 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -640787,17 +640004,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 6 + ThreadTileA: 12 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -640808,13 +640025,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -640861,7 +640078,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -640872,7 +640089,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -640885,20 +640102,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48384 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48384 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -640917,15 +640134,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 96 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -640941,19 +640158,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 3 - NumLoadsB: 7 + NumLoadsB: 6 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -641039,8 +640256,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2455 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2452 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -641048,17 +640265,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -641069,13 +640286,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -641122,7 +640339,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -641133,7 +640350,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_4_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -641142,36 +640359,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44544 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -641179,22 +640396,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 224 + MacroTile1: 256 MacroTileA: 64 - MacroTileB: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -641207,14 +640424,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 2 - NumLoadsB: 7 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -641300,8 +640517,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2456 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2453 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -641309,17 +640526,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -641330,13 +640547,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -641394,32 +640611,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -641431,7 +640648,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -641439,14 +640656,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 128 MacroTile1: 256 - MacroTileA: 64 + MacroTileA: 128 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -641468,13 +640685,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -641561,8 +640778,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2457 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2454 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -641571,16 +640788,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 2 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 2 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -641597,7 +640814,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -641640,11 +640857,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -641655,33 +640872,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -641692,7 +640909,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -641701,14 +640918,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -641723,20 +640940,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -641822,8 +641039,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2458 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_8_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2455 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -641831,17 +641048,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 8 - ThreadTileA: 8 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -641852,7 +641069,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -641889,7 +641106,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -641901,7 +641118,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -641916,44 +641133,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA0_LPB4_LRVW4_MIAV1_MIWT4_3_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 17152 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 36864 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17152 - LdsOffsetMetadata_Blk: 36864 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -641961,15 +641178,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 192 - MacroTileA: 64 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -641984,20 +641201,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -642083,8 +641300,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2459 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA0_LPB4_LRVW4_MIAV1_MIWT4_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2456 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -642093,16 +641310,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 7 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -642119,15 +641336,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -642166,7 +641383,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -642177,7 +641394,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -642186,36 +641403,36 @@ LVCB: 32 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49152 - LdsOffsetMetadata_Blk: 77824 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -642223,39 +641440,39 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 160 MacroTile1: 256 - MacroTileA: 96 + MacroTileA: 160 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 NumLoadsB: 32 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 32 @@ -642344,8 +641561,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2460 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2457 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -642353,17 +641570,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 2 - ThreadTileA: 48 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -642374,13 +641591,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -642427,7 +641644,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -642438,7 +641655,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -642447,24 +641664,24 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53504 - LdsNumElementsAlignedA: 12544 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53504 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -642483,14 +641700,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 160 MacroTile1: 256 - MacroTileA: 96 + MacroTileA: 160 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -642506,17 +641723,17 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 @@ -642605,8 +641822,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2461 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2458 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -642614,17 +641831,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -642635,13 +641852,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -642688,7 +641905,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -642699,7 +641916,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -642708,24 +641925,24 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -642736,7 +641953,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -642744,15 +641961,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -642767,20 +641984,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -642866,8 +642083,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2462 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2459 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -642875,17 +642092,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -642896,13 +642113,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -642933,7 +642150,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -642945,7 +642162,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -642960,42 +642177,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_15_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 25088 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -643005,15 +642222,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 15] + MIWaveTileA: 2 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 240 + MacroTileA: 128 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -643028,20 +642245,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 2 + NumLoadsB: 15 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -643127,8 +642344,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2463 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2460 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_15_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -643137,16 +642354,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 15 + ThreadTileA: 8 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -643163,15 +642380,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -643194,7 +642411,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -643206,11 +642423,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -643221,45 +642438,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA32_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 512 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 19840 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19840 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -643267,22 +642484,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 224 - MacroTileA: 64 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -643290,19 +642507,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 1 - NumLoadsB: 14 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -643388,8 +642605,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2464 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA32_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2461 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -643397,17 +642614,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -643418,21 +642635,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -643471,7 +642688,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -643482,7 +642699,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTB4_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -643491,24 +642708,24 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38912 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38912 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -643519,7 +642736,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -643527,15 +642744,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 192 - MacroTileA: 64 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -643550,20 +642767,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -643649,8 +642866,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2465 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2462 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -643658,17 +642875,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -643679,13 +642896,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -643716,7 +642933,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -643728,7 +642945,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -643743,44 +642960,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_15_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 + LdsNumBytes: 25088 LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -643788,15 +643005,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 9] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 15] MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 288 - MacroTileA: 64 - MacroTileB: 288 + MacroTile0: 128 + MacroTile1: 240 + MacroTileA: 128 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -643817,14 +643034,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 2 - NumLoadsB: 9 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -643910,8 +643127,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2466 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2463 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_15_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -643920,16 +643137,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 9 + ThreadTile1: 15 ThreadTileA: 8 - ThreadTileB: 9 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -643946,15 +643163,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -643977,7 +643194,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -643993,7 +643210,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -644004,44 +643221,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NTC3_NTD3_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 + LdsNumBytes: 26624 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 51200 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -644050,14 +643267,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -644078,14 +643295,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 2 - NumLoadsB: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -644171,8 +643388,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2467 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2464 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -644180,17 +643397,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -644201,7 +643418,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -644212,10 +643429,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -644254,7 +643471,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -644265,68 +643482,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 10] - MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -644339,14 +643556,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -644432,8 +643649,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2468 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2465 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -644441,17 +643658,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 10 - ThreadTileA: 8 - ThreadTileB: 10 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -644462,7 +643679,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -644526,45 +643743,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -644572,22 +643789,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 10] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -644595,19 +643812,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -644693,8 +643910,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2469 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_10_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2466 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -644703,16 +643920,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 10 - ThreadTileA: 8 - ThreadTileB: 10 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -644729,7 +643946,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -644760,7 +643977,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -644772,11 +643989,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -644787,42 +644004,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_4_NTB0_NTC0_NTD0_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 29696 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 29696 + LdsOffsetMetadata_Blk: 45056 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -644832,15 +644049,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 10] - MIWaveTileA: 3 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -644856,19 +644073,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 3 - NumLoadsB: 10 + NumLoadsB: 16 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -644954,8 +644171,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2470 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2467 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_4_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -644963,17 +644180,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 10 - ThreadTileA: 12 - ThreadTileB: 10 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -644984,21 +644201,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -645048,7 +644265,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -645057,27 +644274,27 @@ LVCB: 32 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 1280 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 21504 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 21504 + LdsOffsetB_Blk: 87040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 87040 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -645094,13 +644311,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 + MIWaveTile: [10, 5] + MIWaveTileA: 10 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 160 MacroTile1: 320 - MacroTileA: 96 + MacroTileA: 160 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -645122,11 +644339,11 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 NumLoadsB: 40 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 40 @@ -645215,8 +644432,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2471 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2468 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -645231,9 +644448,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 40 ThreadTile1: 5 - ThreadTileA: 24 + ThreadTileA: 40 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -645309,7 +644526,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -645318,23 +644535,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -645355,14 +644572,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -645378,19 +644595,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -645476,8 +644693,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2472 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2469 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -645492,10 +644709,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -645543,7 +644760,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -645555,7 +644772,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -645570,45 +644787,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_LBSPPA768_LPA32_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 768 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 13312 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 13312 - LdsOffsetB_Blk: 78848 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 78848 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 45056 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -645616,22 +644833,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 6] + MIWaveTile: [6, 2] MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 384 - MacroTileA: 96 - MacroTileB: 384 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -645644,14 +644861,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 3 - NumLoadsB: 48 + NumLoadsB: 4 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -645737,8 +644954,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2473 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA768_LPA32_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2470 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -645747,16 +644964,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -645773,15 +644990,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -645820,7 +645037,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -645831,68 +645048,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43264 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43264 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 6] - MIWaveTileA: 3 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -645900,19 +645117,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 6 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -645998,8 +645215,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2474 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2471 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -646007,17 +645224,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 6 - ThreadTileA: 12 - ThreadTileB: 6 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -646028,7 +645245,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -646065,7 +645282,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -646077,7 +645294,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -646092,32 +645309,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 8 + LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 17920 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 36864 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17920 - LdsOffsetMetadata_Blk: 36864 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -646126,10 +645343,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -646138,14 +645355,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 192 - MacroTileA: 64 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -646160,20 +645377,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 1 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -646259,8 +645476,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2475 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2472 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -646275,10 +645492,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -646300,10 +645517,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -646326,7 +645543,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -646338,7 +645555,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -646353,22 +645570,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 45056 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -646377,7 +645594,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 + LdsOffsetMetadata: 45056 LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 LdsPadB: 8 @@ -646387,8 +645604,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -646398,15 +645615,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 8] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 128 + MacroTile1: 512 + MacroTileA: 128 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -646421,20 +645638,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -646520,8 +645737,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2476 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2473 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -646530,16 +645747,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 3 + ThreadTile1: 8 ThreadTileA: 32 - ThreadTileB: 3 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -646556,15 +645773,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -646587,7 +645804,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -646603,7 +645820,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -646614,34 +645831,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NTC0_NTD0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_16_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG128_2_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -646649,33 +645866,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 16] + MIWaveTileA: 1 + MIWaveTileB: 16 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 512 + MacroTileA: 128 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -646683,19 +645900,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 256 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -646781,8 +645998,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2477 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2474 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_16_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -646790,17 +646007,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 16 + ThreadTileA: 16 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -646811,21 +646028,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -646848,7 +646065,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -646864,7 +646081,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -646875,44 +646092,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTB0_NTC3_NTD3_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43264 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43264 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -646920,15 +646137,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 6] - MIWaveTileA: 3 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -646943,20 +646160,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -647042,8 +646259,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2478 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2475 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -647051,17 +646268,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 6 - ThreadTileA: 12 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -647072,21 +646289,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -647136,68 +646353,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NTC3_NTD3_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -647205,19 +646422,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -647303,8 +646520,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2479 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2476 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -647319,10 +646536,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -647339,7 +646556,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -647370,7 +646587,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -647397,88 +646614,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_4_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB8_LRVW4_MIWT3_12_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 64 LVCA: 8 - LVCB: 8 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 26368 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 45312 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 + LdsOffsetMetadata: 26368 + LdsOffsetMetadata_Blk: 45312 + LdsPadA: 16 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 4] - MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 12] + MIWaveTileA: 3 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 2 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -647564,8 +646781,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2480 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2477 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB8_LRVW4_MIWT3_12_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -647574,16 +646791,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 12 + ThreadTileA: 12 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -647605,10 +646822,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -647643,7 +646860,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -647658,88 +646875,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1280 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 21504 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 21504 + LdsOffsetB_Blk: 87040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 87040 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 40 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -647825,8 +647042,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2481 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2478 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -647841,10 +647058,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -647861,7 +647078,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -647892,7 +647109,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -647919,42 +647136,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 77824 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -647964,15 +647181,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -647993,14 +647210,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 28 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 20 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -648086,8 +647303,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2482 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2479 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -648096,16 +647313,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -648122,15 +647339,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -648153,7 +647370,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -648180,42 +647397,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 77824 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -648225,15 +647442,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -648248,20 +647465,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -648347,8 +647564,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2483 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2480 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -648357,16 +647574,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -648383,15 +647600,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -648426,7 +647643,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -648441,32 +647658,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_14_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -648486,15 +647703,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 14] + MIWaveTileA: 2 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -648515,14 +647732,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 32 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -648608,8 +647825,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2484 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2481 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_14_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -648618,16 +647835,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 14 + ThreadTileA: 8 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -648644,7 +647861,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -648702,7 +647919,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB0_NTC0_NTD0_NLCA7_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -648711,23 +647928,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 94720 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -648748,14 +647965,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -648771,19 +647988,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -648869,8 +648086,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2485 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2482 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -648885,10 +648102,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -648963,7 +648180,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC0_NTD0_NLCA5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_6_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -648972,23 +648189,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 59648 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 86272 + LdsOffsetMetadata: 59648 + LdsOffsetMetadata_Blk: 94464 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -649009,14 +648226,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -649037,14 +648254,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -649130,8 +648347,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2486 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2483 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_6_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -649146,10 +648363,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -649197,7 +648414,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -649224,42 +648441,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_15_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 LSCA: 128 - LSCB: 32 + LSCB: 64 LSPA: 16 - LSPB: 16 + LSPB: 8 LVCA: 16 - LVCB: 16 + LVCB: 32 LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25088 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25088 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -649270,14 +648487,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 15] + MIWaveTile: [2, 16] MIWaveTileA: 2 - MIWaveTileB: 15 + MIWaveTileB: 16 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 240 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 240 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -649298,14 +648515,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 2 - NumLoadsB: 15 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -649391,8 +648608,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2487 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_15_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2484 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -649408,9 +648625,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 15 + ThreadTile1: 16 ThreadTileA: 8 - ThreadTileB: 15 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -649432,10 +648649,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -649474,7 +648691,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -649485,45 +648702,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_6_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 47104 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 47104 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -649531,22 +648748,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -649554,19 +648771,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -649652,8 +648869,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2488 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2485 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -649661,17 +648878,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -649682,13 +648899,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -649735,7 +648952,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -649746,33 +648963,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTB4_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_6_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 47104 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 + LdsOffsetMetadata: 47104 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -649792,14 +649009,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -649820,14 +649037,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -649913,8 +649130,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2489 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2486 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_6_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -649922,17 +649139,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -649943,7 +649160,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -649980,7 +649197,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -649992,7 +649209,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -650007,42 +649224,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_15_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25088 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25088 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -650052,15 +649269,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 15] - MIWaveTileA: 2 - MIWaveTileB: 15 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 240 - MacroTileA: 128 - MacroTileB: 240 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -650083,12 +649300,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 120 NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 2 - NumLoadsB: 15 - NumLoadsCoalescedA: 1 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -650174,8 +649391,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2490 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA32_LPB4_LRVW4_MIWT2_15_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2487 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -650184,16 +649401,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 15 - ThreadTileA: 8 - ThreadTileB: 15 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -650210,15 +649427,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -650241,7 +649458,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -650257,7 +649474,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -650268,42 +649485,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NTC3_NTD3_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -650314,14 +649531,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -650336,20 +649553,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -650435,8 +649652,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2491 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2488 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -650444,17 +649661,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -650465,7 +649682,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -650476,10 +649693,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -650514,11 +649731,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -650529,68 +649746,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA16_LPB16_LRVW8_MIWT3_12_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55552 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 55552 + LdsOffsetMetadata_Blk: 90368 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 12] + MIWaveTileA: 3 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -650598,19 +649815,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 24 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -650696,8 +649913,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2492 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2489 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA16_LPB16_LRVW8_MIWT3_12_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -650705,17 +649922,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 12 + ThreadTileA: 12 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -650726,13 +649943,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -650779,7 +649996,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -650790,68 +650007,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA16_LPB16_LRVW8_MIWT3_12_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 32 - LVCA: 16 + LVCA: 8 LVCB: 8 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55552 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 55552 + LdsOffsetMetadata_Blk: 90368 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 12] + MIWaveTileA: 3 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -650859,19 +650076,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -650957,8 +650174,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2493 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2490 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA16_LPB16_LRVW8_MIWT3_12_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -650966,17 +650183,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 12 + ThreadTileA: 12 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -650987,7 +650204,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -651024,7 +650241,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -651036,11 +650253,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -651051,42 +650268,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_4_NTB0_NTC0_NTD0_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29696 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29696 - LdsOffsetMetadata_Blk: 45056 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -651097,14 +650314,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -651119,20 +650336,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 16 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -651218,8 +650435,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2494 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_4_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2491 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -651227,17 +650444,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -651248,7 +650465,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -651259,10 +650476,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -651285,7 +650502,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -651301,7 +650518,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -651312,33 +650529,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1280 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 21504 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 21504 - LdsOffsetB_Blk: 87040 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 87040 - LdsPadA: 32 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -651346,8 +650563,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -651357,15 +650574,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -651381,19 +650598,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 40 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 4 + NumLoadsB: 15 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -651479,26 +650696,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2495 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2492 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -651509,27 +650726,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -651546,7 +650763,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -651558,11 +650775,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -651573,42 +650790,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 30592 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 30592 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -651618,15 +650835,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -651641,20 +650858,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 4 + NumLoadsB: 13 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -651740,26 +650957,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2496 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2493 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -651770,27 +650987,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -651807,7 +651024,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -651819,11 +651036,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -651834,88 +651051,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB4_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30720 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30720 - LdsOffsetMetadata_Blk: 45056 + LdsOffsetMetadata: 61056 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -652001,26 +651218,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2497 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2494 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -652031,27 +651248,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -652068,7 +651285,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -652095,68 +651312,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 64 LVCA: 8 - LVCB: 8 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 53760 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 53760 + LdsPadA: 32 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -652164,19 +651381,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 2 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -652262,26 +651479,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2498 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2495 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_4_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -652303,16 +651520,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -652345,7 +651562,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -652356,7 +651573,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -652365,36 +651582,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 107008 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -652402,42 +651619,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveTile: [10, 4] + MIWaveTileA: 10 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 4 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -652523,25 +651740,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2499 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2496 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 40 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 40 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -652553,13 +651770,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -652573,7 +651790,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -652590,7 +651807,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -652602,11 +651819,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -652617,34 +651834,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_8_NTB0_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61696 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 61696 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -652652,33 +651869,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 8] - MIWaveTileA: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 8] + MIWaveTileA: 5 MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -652686,19 +651903,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 2 - NumLoadsB: 32 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 10 + NumLoadsB: 4 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -652784,25 +652001,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2500 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2497 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_8_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 20 ThreadTile1: 8 - ThreadTileA: 32 + ThreadTileA: 20 ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true @@ -652814,7 +652031,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -652825,16 +652042,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -652867,7 +652084,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -652878,68 +652095,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_16_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_10_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 32 - LSPA: 16 + LSPA: 32 LSPB: 64 - LVCA: 16 + LVCA: 8 LVCB: 4 - LVPA: 2 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 16] - MIWaveTileA: 1 - MIWaveTileB: 16 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 10] + MIWaveTileA: 6 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -652947,19 +652164,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 256 - NumLoadsA: 2 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 3 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -653045,26 +652262,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2501 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_16_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2498 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_10_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 16 - ThreadTileA: 16 - ThreadTileB: 16 + ThreadTile0: 24 + ThreadTile1: 10 + ThreadTileA: 24 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -653075,13 +652292,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -653095,7 +652312,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -653112,7 +652329,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -653124,11 +652341,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -653139,42 +652356,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTB0_NTC3_NTD3_NLCA1_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_7_NTB4_NLCA3_SVW2_VWA2_WG64_4_1 LSCA: 128 - LSCB: 32 + LSCB: 64 LSPA: 16 - LSPB: 64 + LSPB: 8 LVCA: 16 - LVCB: 4 + LVCB: 32 LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + LVPB: 4 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 65408 + LdsNumElementsAlignedA: 50176 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 50176 + LdsOffsetB_Blk: 115712 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 65408 + LdsOffsetMetadata_Blk: 115712 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -653184,15 +652401,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 384 + MacroTile1: 112 + MacroTileA: 384 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -653207,20 +652424,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 12 + NumLoadsB: 14 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -653306,26 +652523,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2502 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_5_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2499 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_7_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -653336,27 +652553,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -653373,7 +652590,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -653400,32 +652617,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT14_1_NTB0_NLCA7_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 28672 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 28672 + LdsOffsetB_Blk: 94208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 94208 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -653434,8 +652651,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -653445,15 +652662,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 1] + MIWaveTileA: 14 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -653468,20 +652685,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 2 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -653567,26 +652784,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2503 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2500 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT14_1_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 224 + ThreadTile1: 1 + ThreadTileA: 224 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -653603,21 +652820,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -653634,7 +652851,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -653661,42 +652878,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB8_LRVW4_MIWT3_12_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB4_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26368 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 45312 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26368 - LdsOffsetMetadata_Blk: 45312 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 LdsPadA: 16 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -653706,15 +652923,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 12] - MIWaveTileA: 3 - MIWaveTileB: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -653730,19 +652947,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 7 + NumLoadsB: 7 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -653828,26 +653045,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2504 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB8_LRVW4_MIWT3_12_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2501 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 12 - ThreadTileA: 12 - ThreadTileB: 12 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -653864,21 +653081,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -653907,7 +653124,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -653922,36 +653139,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_18_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1280 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 21504 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21504 - LdsOffsetB_Blk: 87040 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 87040 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -653967,15 +653184,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 18] + MIWaveTileA: 2 + MIWaveTileB: 18 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -653991,19 +653208,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 40 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 4 + NumLoadsB: 9 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -654089,26 +653306,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2505 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2502 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_18_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 18 + ThreadTileA: 8 + ThreadTileB: 18 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -654125,7 +653342,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -654139,7 +653356,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -654168,11 +653385,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -654183,68 +653400,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 77824 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -654252,19 +653469,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 20 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -654350,26 +653567,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2506 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2503 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -654380,13 +653597,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -654400,7 +653617,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -654429,7 +653646,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -654444,34 +653661,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_NLCA3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA0_LPB4_LRVW4_MIWT20_2_NTB4_NLCA5_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 32 LSPA: 32 - LSPB: 64 + LSPB: 16 LVCA: 8 - LVCB: 4 + LVCB: 16 LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 29184 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 53248 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 77824 + LdsOffsetMetadata: 29184 + LdsOffsetMetadata_Blk: 53248 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -654490,14 +653707,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveTile: [20, 2] + MIWaveTileA: 20 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -654512,20 +653729,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -654611,15 +653828,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2507 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2504 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA0_LPB4_LRVW4_MIWT20_2_NTB4_NLCA5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 @@ -654627,10 +653844,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -654661,7 +653878,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -654690,7 +653907,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -654705,36 +653922,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_14_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NLCA5_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52736 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 41984 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 41984 + LdsOffsetB_Blk: 107520 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52736 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 107520 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -654750,15 +653967,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 14] - MIWaveTileA: 2 - MIWaveTileB: 14 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -654773,20 +653990,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 4 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 20 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -654872,26 +654089,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2508 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_14_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2505 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 14 - ThreadTileA: 8 - ThreadTileB: 14 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -654908,7 +654125,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -654922,7 +654139,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -654951,11 +654168,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -654966,33 +654183,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB0_NTC0_NTD0_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NTB4_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -655011,15 +654228,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -655034,20 +654251,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 10 + NumLoadsB: 18 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -655133,26 +654350,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2509 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB0_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2506 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -655163,13 +654380,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -655183,7 +654400,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -655200,7 +654417,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -655212,11 +654429,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -655227,42 +654444,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_6_NTB4_NTC0_NTD0_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x480x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_15_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59648 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 40832 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 32640 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59648 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 40832 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -655273,14 +654490,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 480 + MacroTileA: 128 + MacroTileB: 480 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -655295,20 +654512,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 2 + NumLoadsB: 30 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 30 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -655394,26 +654611,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2510 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_6_NTB4_NTC0_NTD0_NLCA7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2507 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x480x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_15_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -655424,7 +654641,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -655435,16 +654652,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -655488,36 +654705,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 8 - LVCA: 16 + LVCA: 8 LVCB: 32 - LVPA: 2 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -655533,15 +654750,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 16] - MIWaveTileA: 2 - MIWaveTileB: 16 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -655557,19 +654774,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 32 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 36 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -655655,26 +654872,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2511 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_16_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2508 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 16 - ThreadTileA: 8 - ThreadTileB: 16 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -655691,7 +654908,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -655705,7 +654922,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -655738,7 +654955,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -655749,33 +654966,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_6_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB0_NLCA7_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47104 - LdsNumElementsAlignedA: 16384 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 29184 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47104 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -655794,14 +655011,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 224 MacroTile1: 192 - MacroTileA: 128 + MacroTileA: 224 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -655818,18 +655035,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -655916,26 +655133,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2512 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2509 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -655946,13 +655163,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -655966,7 +655183,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -655999,7 +655216,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -656010,33 +655227,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_6_NTB4_NTC3_NTD3_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB4_NLCA7_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47104 - LdsNumElementsAlignedA: 16384 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 29184 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47104 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -656055,14 +655272,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 224 MacroTile1: 192 - MacroTileA: 128 + MacroTileA: 224 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -656079,18 +655296,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -656177,26 +655394,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2513 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_6_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2510 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB4_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -656207,13 +655424,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -656227,7 +655444,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -656244,7 +655461,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -656256,11 +655473,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -656271,42 +655488,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB0_NTC0_NTD0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NTB4_NLCA7_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 38784 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 38784 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -656316,15 +655533,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [7, 9] + MIWaveTileA: 7 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 448 + MacroTile1: 144 + MacroTileA: 448 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -656339,20 +655556,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 6 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 7 + NumLoadsB: 9 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -656438,26 +655655,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2514 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB0_NTC0_NTD0_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2511 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 9 + ThreadTileA: 28 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -656468,27 +655685,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -656505,7 +655722,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -656517,11 +655734,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -656532,42 +655749,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB4_NTC3_NTD3_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_9_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 27776 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 27776 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -656577,15 +655794,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -656600,20 +655817,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 6 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 2 + NumLoadsB: 18 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -656699,26 +655916,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2515 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB4_NTC3_NTD3_NLCA5_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2512 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_9_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -656729,27 +655946,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -656766,7 +655983,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -656782,7 +655999,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -656793,42 +656010,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA16_LPB16_LRVW8_MIWT3_12_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55552 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 28416 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55552 - LdsOffsetMetadata_Blk: 90368 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 28416 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -656839,14 +656056,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 12] - MIWaveTileA: 3 - MIWaveTileB: 12 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -656862,19 +656079,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 24 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 4 + NumLoadsB: 11 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -656960,26 +656177,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2516 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA16_LPB16_LRVW8_MIWT3_12_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2513 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 12 - ThreadTileA: 12 - ThreadTileB: 12 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -656990,7 +656207,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -657001,16 +656218,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -657027,7 +656244,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -657039,7 +656256,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -657054,42 +656271,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA16_LPB16_LRVW8_MIWT3_12_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_8_NTB0_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55552 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 29440 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 53504 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55552 - LdsOffsetMetadata_Blk: 90368 + LdsOffsetMetadata: 29440 + LdsOffsetMetadata_Blk: 53504 LdsPadA: 16 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -657100,14 +656317,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 12] - MIWaveTileA: 3 - MIWaveTileB: 12 + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -657122,20 +656339,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -657221,15 +656438,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2517 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA16_LPB16_LRVW8_MIWT3_12_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2514 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_8_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 @@ -657237,10 +656454,10 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 12 - ThreadTileA: 12 - ThreadTileB: 12 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -657262,16 +656479,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -657288,7 +656505,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -657300,11 +656517,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -657315,42 +656532,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB4_NTC3_NTD3_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NTB0_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 53504 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 53504 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -657360,15 +656577,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 11] + MIWaveTileA: 5 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 176 + MacroTileA: 320 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -657383,20 +656600,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 220 + NumGlobalWriteVectorsPerThread: 220 + NumLoadsA: 5 + NumLoadsB: 11 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -657482,26 +656699,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2518 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB4_NTC3_NTD3_NLCA7_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2515 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 11 + ThreadTileA: 20 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -657512,27 +656729,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -657565,7 +656782,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -657576,33 +656793,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NTB4_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 8 + LSPA: 32 LSPB: 16 - LVCA: 32 + LVCA: 8 LVCB: 16 - LVPA: 1 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 32768 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 16384 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 53504 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 + LdsOffsetMetadata_Blk: 53504 + LdsPadA: 16 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -657622,14 +656839,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveTile: [5, 11] + MIWaveTileA: 5 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 240 - MacroTileA: 256 - MacroTileB: 240 + MacroTile0: 320 + MacroTile1: 176 + MacroTileA: 320 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -657644,20 +656861,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 4 - NumLoadsB: 15 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 220 + NumGlobalWriteVectorsPerThread: 220 + NumLoadsA: 5 + NumLoadsB: 11 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -657743,8 +656960,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2519 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_15_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2516 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -657752,17 +656969,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 20 + ThreadTile1: 11 + ThreadTileA: 20 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -657773,7 +656990,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -657837,32 +657054,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB4_LRVW4_MIWT12_4_NTB4_NLCA3_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 32 - LSPA: 8 + LSPA: 16 LSPB: 16 - LVCA: 32 + LVCA: 16 LVCB: 16 - LVPA: 1 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30592 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 33280 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30592 - LdsOffsetMetadata_Blk: 49152 + LdsOffsetMetadata: 33280 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -657882,15 +657099,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 384 + MacroTile1: 128 + MacroTileA: 384 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -657905,20 +657122,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 4 - NumLoadsB: 13 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -658004,8 +657221,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2520 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2517 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB4_LRVW4_MIWT12_4_NTB4_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -658014,16 +657231,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -658040,7 +657257,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -658098,32 +657315,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB4_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 8 + LSPA: 16 LSPB: 8 - LVCA: 32 + LVCA: 16 LVCB: 32 - LVPA: 1 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61056 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61056 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 4 LdsPadMetadata: 0 @@ -658143,15 +657360,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 10] MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -658166,20 +657383,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -658265,8 +657482,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2521 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_13_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2518 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -658275,16 +657492,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 13 + ThreadTile1: 10 ThreadTileA: 16 - ThreadTileB: 13 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -658301,7 +657518,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -658332,7 +657549,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -658359,45 +657576,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 53760 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 53760 - LdsPadA: 32 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -658405,22 +657622,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -658435,12 +657652,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 160 NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 2 - NumLoadsCoalescedA: 5 + NumLoadsA: 4 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -658526,8 +657743,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2522 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB8_LRVW4_MIWT10_4_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2519 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -658536,16 +657753,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -658562,21 +657779,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -658593,7 +657810,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -658620,42 +657837,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NLCA7_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 64 LVCA: 8 - LVCB: 8 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 5120 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 41472 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41472 - LdsOffsetB_Blk: 107008 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 107008 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 94720 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -658666,13 +657883,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 + MIWaveTile: [14, 4] + MIWaveTileA: 14 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 448 MacroTile1: 128 - MacroTileA: 320 + MacroTileA: 448 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -658694,14 +657911,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 2 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -658787,8 +658004,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2523 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2520 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -658803,9 +658020,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 56 ThreadTile1: 4 - ThreadTileA: 40 + ThreadTileA: 56 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -658828,16 +658045,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -658866,11 +658083,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -658881,36 +658098,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_8_NTB0_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NTB4_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61696 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 63232 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61696 - LdsOffsetMetadata_Blk: 106752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63232 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -658927,14 +658144,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveTile: [4, 14] + MIWaveTileA: 4 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -658949,20 +658166,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 10 - NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 8 + NumLoadsB: 28 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -659048,8 +658265,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2524 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_8_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2521 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -659057,17 +658274,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 14 + ThreadTileA: 16 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -659078,7 +658295,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -659127,11 +658344,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -659142,34 +658359,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_10_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 29440 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 29440 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -659187,15 +658404,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 10] - MIWaveTileA: 6 - MIWaveTileB: 10 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -659216,14 +658433,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -659309,8 +658526,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2525 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_10_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2522 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -659318,17 +658535,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 10 - ThreadTileA: 24 - ThreadTileB: 10 + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -659339,13 +658556,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -659388,7 +658605,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -659403,45 +658620,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_7_NTB4_NLCA3_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65408 - LdsNumElementsAlignedA: 50176 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 50176 - LdsOffsetB_Blk: 115712 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65408 - LdsOffsetMetadata_Blk: 115712 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -659449,22 +658666,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 112 - MacroTileA: 384 - MacroTileB: 112 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -659477,14 +658694,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 12 - NumLoadsB: 14 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -659570,8 +658787,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2526 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_7_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2523 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -659580,16 +658797,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -659606,7 +658823,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -659653,7 +658870,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -659664,7 +658881,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT14_1_NTB0_NLCA7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_2_NTB4_NLCA5_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 32 LSPA: 32 @@ -659677,19 +658894,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 28672 + LdsNumBytes: 29696 + LdsNumElementsAlignedA: 20480 LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 28672 - LdsOffsetB_Blk: 94208 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 53248 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 94208 + LdsOffsetMetadata: 29696 + LdsOffsetMetadata_Blk: 53248 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -659709,14 +658926,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 1] - MIWaveTileA: 14 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 448 + MacroTile0: 320 MacroTile1: 128 - MacroTileA: 448 + MacroTileA: 320 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -659732,17 +658949,17 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 NumLoadsB: 2 - NumLoadsCoalescedA: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 2 @@ -659831,8 +659048,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2527 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT14_1_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2524 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_2_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -659840,17 +659057,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 224 - ThreadTile1: 1 - ThreadTileA: 224 - ThreadTileB: 1 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -659861,13 +659078,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -659898,7 +659115,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -659910,11 +659127,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -659925,42 +659142,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB4_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NTB0_NLCA5_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -659971,14 +659188,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveTile: [10, 6] + MIWaveTileA: 10 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -659993,20 +659210,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 7 - NumLoadsB: 7 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 5 + NumLoadsB: 12 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -660092,8 +659309,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2528 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2525 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -660101,17 +659318,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 6 + ThreadTileA: 40 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -660122,7 +659339,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -660133,16 +659350,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -660159,7 +659376,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -660175,7 +659392,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -660186,34 +659403,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_18_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTB4_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 86016 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 86016 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -660221,33 +659438,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 18] - MIWaveTileA: 2 - MIWaveTileB: 18 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -660260,14 +659477,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 4 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -660353,8 +659570,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2529 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA32_LPB16_LRVW8_MIWT2_18_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2526 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -660362,17 +659579,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 18 - ThreadTileA: 8 - ThreadTileB: 18 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -660383,7 +659600,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -660394,16 +659611,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -660420,7 +659637,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -660432,11 +659649,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -660447,34 +659664,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTB4_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -660482,53 +659699,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 4 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 32 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -660614,8 +659831,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2530 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2527 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTB4_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -660623,17 +659840,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -660644,27 +659861,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -660693,11 +659910,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -660708,68 +659925,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA0_LPB4_LRVW4_MIWT20_2_NTB4_NLCA5_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB4_NLCA3_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 LVPB: 8 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29184 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 53248 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29184 - LdsOffsetMetadata_Blk: 53248 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [20, 2] - MIWaveTileA: 20 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 2] + MIWaveTileA: 6 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 384 MacroTile1: 128 - MacroTileA: 320 + MacroTileA: 384 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -660782,14 +659999,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -660875,8 +660092,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2531 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA0_LPB4_LRVW4_MIWT20_2_NTB4_NLCA5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2528 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -660884,16 +660101,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 96 ThreadTile1: 2 - ThreadTileA: 80 + ThreadTileA: 96 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -660905,13 +660122,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -660954,11 +660171,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -660969,45 +660186,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NLCA5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 41984 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41984 - LdsOffsetB_Blk: 107520 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 107520 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -661015,42 +660232,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 20 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -661136,8 +660353,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2532 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2529 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB0_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -661145,17 +660362,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -661166,13 +660383,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -661203,7 +660420,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -661215,11 +660432,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -661230,42 +660447,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NTB4_NLCA5_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB4_NLCA7_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 8 + LSPB: 64 LVCA: 8 - LVCB: 32 + LVCB: 4 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 5120 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 106752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -661275,15 +660492,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -661304,14 +660521,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 10 - NumLoadsB: 18 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 2 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -661397,8 +660614,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2533 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2530 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB4_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -661406,17 +660623,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -661427,27 +660644,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -661480,7 +660697,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -661491,33 +660708,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x480x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_15_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTB4_NLCA7_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 32 - LSPA: 16 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 2 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40832 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 32640 + LdsNumBytes: 37632 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40832 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 + LdsOffsetMetadata: 37632 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -661536,15 +660753,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveGroup: [4, 1] + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 480 - MacroTileA: 128 - MacroTileB: 480 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -661559,20 +660776,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 2 - NumLoadsB: 30 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 7 + NumLoadsB: 8 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 30 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -661658,8 +660875,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2534 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x480x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_15_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2531 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -661667,17 +660884,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -661688,13 +660905,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -661737,7 +660954,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -661752,36 +660969,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -661798,14 +661015,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] + MIWaveTile: [6, 7] MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 288 + MacroTile1: 224 MacroTileA: 192 - MacroTileB: 288 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -661826,14 +661043,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 NumLoadsA: 6 - NumLoadsB: 36 + NumLoadsB: 7 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -661919,8 +661136,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2535 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2532 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -661936,9 +661153,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 9 + ThreadTile1: 7 ThreadTileA: 24 - ThreadTileB: 9 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -661956,7 +661173,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -661986,7 +661203,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -661998,11 +661215,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -662013,42 +661230,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB0_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NLCA7_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 38784 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 38784 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -662058,15 +661275,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [7, 9] + MIWaveTileA: 7 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 448 + MacroTile1: 144 + MacroTileA: 448 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -662087,14 +661304,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 NumLoadsA: 7 - NumLoadsB: 6 + NumLoadsB: 9 NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -662180,8 +661397,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2536 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2533 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -662189,17 +661406,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 9 + ThreadTileA: 28 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -662210,27 +661427,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -662263,7 +661480,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -662274,33 +661491,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB4_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_12_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 64 + LSPA: 8 LSPB: 32 - LVCA: 4 + LVCA: 32 LVCB: 8 - LVPA: 8 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 29184 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 32768 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -662319,14 +661536,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 224 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -662342,19 +661559,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -662441,8 +661658,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2537 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIWT14_3_NTB4_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2534 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_12_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -662450,17 +661667,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -662471,14 +661688,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -662508,7 +661725,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -662520,7 +661737,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -662535,88 +661752,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NTB4_NLCA7_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38784 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38784 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 9] - MIWaveTileA: 7 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 144 - MacroTileA: 448 - MacroTileB: 144 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 7 - NumLoadsB: 9 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -662702,8 +661919,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2538 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2535 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -662712,16 +661929,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 9 - ThreadTileA: 28 - ThreadTileB: 9 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -662739,20 +661956,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -662785,7 +662002,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -662796,68 +662013,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_9_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 32 - LSPA: 16 + LSPA: 8 LSPB: 16 - LVCA: 16 + LVCA: 32 LVCB: 16 - LVPA: 2 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27776 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27776 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -662870,14 +662087,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 2 - NumLoadsB: 18 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 4 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -662963,8 +662180,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2539 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_9_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2536 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -662972,17 +662189,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -662993,14 +662210,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -663030,7 +662247,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -663041,14 +662258,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -663057,44 +662274,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 64 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28416 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -663102,15 +662319,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -663125,20 +662342,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 4 - NumLoadsB: 11 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -663224,26 +662441,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2540 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_11_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2537 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -663254,27 +662471,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -663291,7 +662508,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -663302,14 +662519,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -663318,44 +662535,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_8_NTB0_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29440 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 53504 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29440 - LdsOffsetMetadata_Blk: 53504 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -663363,15 +662580,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -663386,20 +662603,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -663485,26 +662702,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2541 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_8_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2538 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -663521,21 +662738,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -663552,7 +662769,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -663563,14 +662780,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -663579,44 +662796,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NTB0_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 53504 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 53504 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -663624,15 +662841,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 11] - MIWaveTileA: 5 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 176 - MacroTileA: 320 - MacroTileB: 176 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -663647,20 +662864,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 220 - NumGlobalWriteVectorsPerThread: 220 - NumLoadsA: 5 - NumLoadsB: 11 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -663746,26 +662963,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2542 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2539 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 11 - ThreadTileA: 20 - ThreadTileB: 11 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -663782,21 +662999,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -663813,7 +663030,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -663840,44 +663057,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NTB4_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 64 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 53504 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 53504 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -663885,15 +663102,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 11] - MIWaveTileA: 5 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 176 - MacroTileA: 320 - MacroTileB: 176 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -663908,20 +663125,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 220 - NumGlobalWriteVectorsPerThread: 220 - NumLoadsA: 5 - NumLoadsB: 11 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 48 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -664007,26 +663224,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2543 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA16_LPB4_LRVW4_MIWT5_11_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2540 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 11 - ThreadTileA: 20 - ThreadTileB: 11 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -664043,21 +663260,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -664074,7 +663291,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -664086,11 +663303,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -664101,44 +663318,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB4_LRVW4_MIWT12_4_NTB4_NLCA3_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 16 - LVCA: 16 + LVCA: 2 LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33280 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33280 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -664146,15 +663363,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -664170,19 +663387,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -664268,26 +663485,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2544 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB4_LRVW4_MIWT12_4_NTB4_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2541 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -664298,27 +663515,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -664347,11 +663564,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -664362,36 +663579,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 40192 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 69888 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 40192 + LdsOffsetMetadata_Blk: 69888 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -664399,7 +663616,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -664408,14 +663625,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 32 + MacroTile1: 224 + MacroTileA: 32 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -664431,19 +663648,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 40 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 1 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -664529,26 +663746,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2545 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2542 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -664559,7 +663776,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -664579,7 +663796,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -664596,7 +663813,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -664623,34 +663840,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -664658,33 +663875,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -664692,19 +663909,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -664790,15 +664007,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2546 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_5_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2543 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -664806,10 +664023,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -664826,21 +664043,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -664857,7 +664074,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -664873,7 +664090,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -664884,44 +664101,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NLCA7_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -664930,14 +664147,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -664952,20 +664169,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 2 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -665051,26 +664268,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2547 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2544 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -665081,7 +664298,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -665092,16 +664309,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -665118,7 +664335,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -665130,11 +664347,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -665145,44 +664362,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NTB4_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63232 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63232 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -665190,15 +664407,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 14] - MIWaveTileA: 4 - MIWaveTileB: 14 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -665214,19 +664431,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 8 - NumLoadsB: 28 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -665312,26 +664529,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2548 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_14_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2545 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 14 - ThreadTileA: 16 - ThreadTileB: 14 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -665342,27 +664559,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -665379,7 +664596,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -665391,11 +664608,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -665406,44 +664623,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29440 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29440 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -665451,15 +664668,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 12] - MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 256 + MacroTileA: 32 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -665475,19 +664692,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -665573,26 +664790,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2549 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_12_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2546 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 12 - ThreadTileA: 16 - ThreadTileB: 12 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -665603,27 +664820,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -665640,7 +664857,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -665667,34 +664884,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -665702,33 +664919,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 32 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 32 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -665736,19 +664953,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -665834,26 +665051,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2550 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_6_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2547 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -665870,21 +665087,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -665901,7 +665118,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -665913,7 +665130,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -665928,88 +665145,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_2_NTB4_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB2_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 64 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29696 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 53248 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29696 - LdsOffsetMetadata_Blk: 53248 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 2] - MIWaveTileA: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 48 MacroTile1: 128 - MacroTileA: 320 + MacroTileA: 48 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 2 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 32 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -666095,15 +665312,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2551 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_2_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2548 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -666111,9 +665328,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 12 ThreadTile1: 2 - ThreadTileA: 80 + ThreadTileA: 12 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -666131,21 +665348,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -666162,7 +665379,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -666174,11 +665391,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -666189,44 +665406,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NTB0_NLCA5_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 16 - LVCA: 8 + LVCA: 2 LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -666234,15 +665451,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 6] - MIWaveTileA: 10 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -666257,20 +665474,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 5 - NumLoadsB: 12 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -666356,26 +665573,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2552 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2549 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 6 - ThreadTileA: 40 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -666386,27 +665603,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -666423,7 +665640,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -666450,45 +665667,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTB4_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 86016 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 86016 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -666496,22 +665713,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -666519,19 +665736,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 5 - NumLoadsB: 3 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -666617,26 +665834,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2553 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT5_3_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2550 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -666653,21 +665870,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -666696,11 +665913,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -666711,33 +665928,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTB4_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_8_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 24576 + LdsNumBytes: 45312 + LdsNumElementsAlignedA: 4352 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 69888 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 + LdsOffsetMetadata: 45312 + LdsOffsetMetadata_Blk: 69888 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -666748,7 +665965,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -666756,14 +665973,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 8] + MIWaveTileA: 1 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 32 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 32 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -666779,20 +665996,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 32 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 1 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -666878,26 +666095,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2554 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA0_LPB16_LRVW8_MIWT12_4_NTB4_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2551 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_8_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 8 + ThreadTileA: 4 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -666908,13 +666125,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -666928,7 +666145,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -666945,7 +666162,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -666961,7 +666178,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -666972,34 +666189,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB4_NLCA3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 48384 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 48384 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -667007,10 +666224,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -667018,42 +666235,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 2 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 7 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -667139,26 +666356,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2555 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2552 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -667169,27 +666386,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -667222,7 +666439,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -667233,7 +666450,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB0_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -667242,59 +666459,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -667302,19 +666519,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -667400,26 +666617,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2556 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_4_NTB0_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2553 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -667430,13 +666647,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -667450,7 +666667,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -667467,7 +666684,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -667483,7 +666700,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -667494,33 +666711,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB4_NLCA7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 64 + LSPB: 32 LVCA: 8 - LVCB: 4 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -667528,8 +666745,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -667539,15 +666756,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 384 + MacroTileA: 64 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -667562,20 +666779,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 2 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -667661,26 +666878,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2557 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB8_LRVW4_MIWT14_4_NTB4_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2554 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -667691,27 +666908,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -667728,7 +666945,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -667740,11 +666957,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -667755,44 +666972,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTB4_NLCA7_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37632 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37632 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -667800,15 +667017,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 9] + MIWaveTileA: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 288 + MacroTileA: 64 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -667824,19 +667041,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 7 - NumLoadsB: 8 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 2 + NumLoadsB: 9 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -667922,26 +667139,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2558 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_8_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2555 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 8 + ThreadTile1: 9 + ThreadTileA: 8 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -667952,27 +667169,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -667989,7 +667206,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -668001,11 +667218,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -668016,34 +667233,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 31744 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 36864 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 31744 + LdsOffsetMetadata_Blk: 36864 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -668051,10 +667268,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -668062,22 +667279,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 384 + MacroTileA: 64 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -668085,19 +667302,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 1 + NumLoadsB: 24 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -668183,26 +667400,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2559 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2556 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -668213,27 +667430,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -668250,7 +667467,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -668262,7 +667479,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -668277,42 +667494,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NLCA7_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38784 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 58624 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38784 - LdsOffsetMetadata_Blk: 94464 + LdsOffsetMetadata: 58624 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -668322,15 +667539,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 9] - MIWaveTileA: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 144 - MacroTileA: 448 - MacroTileB: 144 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -668345,17 +667562,17 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 7 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 NumLoadsB: 9 - NumLoadsCoalescedA: 7 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 9 @@ -668444,25 +667661,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2560 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA16_LPB4_LRVW4_MIWT7_9_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2557 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 12 ThreadTile1: 9 - ThreadTileA: 28 + ThreadTileA: 12 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -668480,21 +667697,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -668527,7 +667744,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -668538,33 +667755,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_12_NLCA1_SVW4_VWA4_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 8 + LSPA: 64 LSPB: 32 - LVCA: 32 + LVCA: 4 LVCB: 8 - LVPA: 1 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 58624 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 58624 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -668583,15 +667800,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 12] - MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -668606,20 +667823,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 9 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -668705,26 +667922,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2561 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA4096_LPA0_LPB16_LRVW8_MIWT4_12_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2558 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 12 - ThreadTileA: 16 - ThreadTileB: 12 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -668735,14 +667952,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -668755,7 +667972,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -668784,11 +668001,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -668799,34 +668016,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_7_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 LVPB: 8 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 25856 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 36864 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 25856 + LdsOffsetMetadata_Blk: 36864 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -668836,7 +668053,7 @@ LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -668845,14 +668062,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -668868,19 +668085,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 7 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 1 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -668966,26 +668183,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2562 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_7_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2559 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -668996,14 +668213,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -669016,7 +668233,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -669049,7 +668266,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -669060,7 +668277,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -669073,19 +668290,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -669105,15 +668322,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 384 + MacroTileA: 64 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -669129,19 +668346,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 2 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -669227,25 +668444,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2563 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT3_3_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2560 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 32 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 32 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -669257,14 +668474,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -669277,7 +668494,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -669306,11 +668523,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -669321,36 +668538,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 56320 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -669367,14 +668584,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTile: [2, 11] + MIWaveTileA: 2 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 352 + MacroTileA: 64 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -669389,20 +668606,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 40 + NumElementsPerThread: 88 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 2 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -669488,26 +668705,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2564 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIWT4_10_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2561 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 8 + ThreadTile1: 11 + ThreadTileA: 8 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -669518,14 +668735,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -669538,7 +668755,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -669555,7 +668772,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -669567,11 +668784,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -669582,34 +668799,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 53504 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 53504 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -669617,33 +668834,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 8] + MIWaveTileA: 3 MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 96 MacroTile1: 256 - MacroTileA: 256 + MacroTileA: 96 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -669651,19 +668868,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 4 - NumLoadsB: 16 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -669749,25 +668966,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2565 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2562 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 12 ThreadTile1: 8 - ThreadTileA: 32 + ThreadTileA: 12 ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true @@ -669779,27 +668996,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -669816,7 +669033,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -669827,14 +669044,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -669843,34 +669060,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 64 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 12288 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 77824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 49152 + LdsOffsetMetadata_Blk: 77824 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -669878,10 +669095,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -669889,22 +669106,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -669917,13 +669134,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 NumLoadsB: 32 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 @@ -670010,8 +669227,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2566 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2563 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -670020,15 +669237,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 48 ThreadTile1: 2 - ThreadTileA: 4 + ThreadTileA: 48 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -670046,17 +669263,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -670077,7 +669294,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -670088,14 +669305,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -670104,44 +669321,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x400x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA16_LPB4_LRVW4_MIAV0_MIWT1_25_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 31616 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 27264 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 37120 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 37120 LdsPadA: 16 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -670149,15 +669366,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [1, 25] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 25 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 400 + MacroTileA: 64 + MacroTileB: 400 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -670172,20 +669389,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 1 + NumLoadsB: 25 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 25 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -670271,8 +669488,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2567 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2564 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x400x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA16_LPB4_LRVW4_MIAV0_MIWT1_25_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -670281,16 +669498,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 25 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 25 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -670307,17 +669524,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -670338,7 +669555,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -670349,14 +669566,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -670365,44 +669582,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x352x64_MI16x16x1_SN_GRVWB8_LBSPPA768_LPA16_LPB8_LRVW4_MIAV0_MIWT3_11_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 50688 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -670410,15 +669627,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 11] + MIWaveTileA: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 352 + MacroTileA: 96 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -670433,20 +669650,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 132 + NumGlobalWriteVectorsPerThread: 132 + NumLoadsA: 3 + NumLoadsB: 11 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -670532,8 +669749,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2568 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2565 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x352x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LPA16_LPB8_LRVW4_MIAV0_MIWT3_11_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -670542,16 +669759,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 11 + ThreadTileA: 12 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -670568,17 +669785,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -670599,7 +669816,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -670611,7 +669828,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -670626,32 +669843,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 64 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 53504 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 53504 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -670660,10 +669877,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -670671,15 +669888,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 8] + MIWaveTileA: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -670694,20 +669911,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 48 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -670793,8 +670010,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2569 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2566 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -670803,16 +670020,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -670829,15 +670046,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -670860,7 +670077,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -670873,7 +670090,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -670887,32 +670104,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 78080 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -670921,10 +670138,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -670932,15 +670149,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 10] + MIWaveTileA: 3 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -670955,20 +670172,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -671054,8 +670271,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2570 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2567 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -671064,16 +670281,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 10 + ThreadTileA: 12 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -671090,15 +670307,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -671121,7 +670338,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -671137,7 +670354,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -671148,44 +670365,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40192 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 69888 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40192 - LdsOffsetMetadata_Blk: 69888 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -671193,15 +670410,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 224 - MacroTileA: 32 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -671217,19 +670434,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 1 - NumLoadsB: 7 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -671315,26 +670532,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2571 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_7_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2568 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 7 - ThreadTileA: 4 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -671345,27 +670562,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -671382,7 +670599,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -671398,7 +670615,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -671409,33 +670626,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -671443,10 +670660,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -671454,15 +670671,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -671478,19 +670695,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -671576,26 +670793,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2572 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2569 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -671606,27 +670823,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -671643,7 +670860,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -671659,7 +670876,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -671670,33 +670887,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -671704,10 +670921,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -671716,14 +670933,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -671739,19 +670956,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -671837,26 +671054,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2573 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2570 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -671867,7 +671084,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -671878,16 +671095,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -671904,7 +671121,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -671920,7 +671137,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -671931,88 +671148,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 22016 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 22016 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 4 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 2 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -672098,26 +671315,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2574 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2571 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -672128,27 +671345,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -672192,7 +671409,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -672201,23 +671418,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -672229,7 +671446,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -672238,13 +671455,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 4] - MIWaveTileA: 2 + MIWaveTile: [10, 4] + MIWaveTileA: 10 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 160 MacroTile1: 256 - MacroTileA: 32 + MacroTileA: 160 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -672261,16 +671478,16 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 1 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 @@ -672359,15 +671576,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2575 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_4_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2572 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -672375,9 +671592,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 40 ThreadTile1: 4 - ThreadTileA: 8 + ThreadTileA: 40 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -672409,7 +671626,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -672426,7 +671643,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -672442,7 +671659,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -672453,33 +671670,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 32 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -672487,10 +671704,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -672498,15 +671715,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -672522,19 +671739,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -672620,26 +671837,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2576 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2573 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -672650,27 +671867,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -672687,7 +671904,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -672699,11 +671916,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -672714,45 +671931,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB2_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 64 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 45056 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -672760,22 +671977,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 + MIWaveTile: [6, 2] + MIWaveTileA: 6 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -672783,19 +672000,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 3 - NumLoadsB: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -672881,25 +672098,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2577 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2574 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 96 ThreadTile1: 2 - ThreadTileA: 12 + ThreadTileA: 96 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -672911,27 +672128,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -672948,7 +672165,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -672964,7 +672181,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -672975,33 +672192,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -673009,10 +672226,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -673020,15 +672237,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -673044,19 +672261,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -673142,26 +672359,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2578 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2575 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -673172,27 +672389,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -673209,7 +672426,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -673236,88 +672453,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB4_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_8_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 4] + MIWaveGroup: [4, 1] + MIWaveTile: [1, 8] MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 128 - MacroTileA: 32 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 128 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -673403,15 +672620,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2579 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2576 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_8_NTB0_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -673419,10 +672636,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 4 - ThreadTileA: 4 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -673439,21 +672656,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -673497,7 +672714,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_8_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB0_NLCA7_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -673506,23 +672723,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45312 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 69888 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45312 - LdsOffsetMetadata_Blk: 69888 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -673534,7 +672751,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -673543,14 +672760,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 8] - MIWaveTileA: 1 - MIWaveTileB: 8 + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 256 - MacroTileA: 32 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -673566,19 +672783,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 1 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 7 + NumLoadsB: 7 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -673664,15 +672881,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2580 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_8_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2577 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB0_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -673680,10 +672897,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 8 - ThreadTileA: 4 - ThreadTileB: 8 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -673714,7 +672931,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -673747,7 +672964,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -673758,33 +672975,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48384 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48384 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -673795,7 +673012,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -673804,14 +673021,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -673827,19 +673044,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -673925,26 +673142,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2581 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2578 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -673955,7 +673172,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -673975,7 +673192,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -674019,32 +673236,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 @@ -674056,7 +673273,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -674064,15 +673281,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -674087,20 +673304,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -674186,26 +673403,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2582 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2579 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 5 + ThreadTile1: 9 ThreadTileA: 16 - ThreadTileB: 5 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -674222,7 +673439,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -674236,7 +673453,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -674269,7 +673486,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -674280,88 +673497,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 2 - NumLoadsB: 12 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -674447,26 +673664,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2583 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA0_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2580 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -674477,13 +673694,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -674497,7 +673714,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -674526,7 +673743,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -674541,36 +673758,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 1280 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 21504 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 21504 + LdsOffsetB_Blk: 87040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 87040 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -674578,7 +673795,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -674586,15 +673803,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 288 - MacroTileA: 64 - MacroTileB: 288 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -674609,20 +673826,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 2 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 40 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -674708,26 +673925,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2584 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2581 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -674744,7 +673961,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -674758,7 +673975,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -674775,7 +673992,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -674787,11 +674004,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -674802,34 +674019,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x32_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31744 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 36864 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31744 - LdsOffsetMetadata_Blk: 36864 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -674837,53 +674054,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 1 - NumLoadsB: 24 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -674969,26 +674186,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2585 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x32_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2582 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -674999,27 +674216,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -675048,11 +674265,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -675063,36 +674280,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_LBSPPA768_LPA32_LPB4_LRVW4_MIWT6_6_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 - LSPB: 32 + LSPB: 8 LVCA: 4 - LVCB: 8 + LVCB: 32 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 768 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58624 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 13312 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 13312 + LdsOffsetB_Blk: 78848 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58624 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 78848 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -675108,15 +674325,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 288 + MacroTile1: 384 MacroTileA: 96 - MacroTileB: 288 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -675131,20 +674348,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 NumLoadsA: 3 - NumLoadsB: 9 + NumLoadsB: 48 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -675230,26 +674447,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2586 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2583 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA768_LPA32_LPB4_LRVW4_MIWT6_6_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -675260,13 +674477,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -675280,7 +674497,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -675309,11 +674526,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -675324,36 +674541,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58624 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58624 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -675370,13 +674587,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 + MIWaveTile: [6, 9] + MIWaveTileA: 6 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 192 MacroTile1: 288 - MacroTileA: 96 + MacroTileA: 192 MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 @@ -675393,19 +674610,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 + NumElementsPerThread: 216 NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 9 + NumLoadsA: 6 + NumLoadsB: 36 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -675491,25 +674708,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2587 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2584 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 24 ThreadTile1: 9 - ThreadTileA: 12 + ThreadTileA: 24 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -675521,7 +674738,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -675541,7 +674758,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -675558,7 +674775,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -675570,11 +674787,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -675585,44 +674802,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_6_NTB4_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25856 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 59648 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 36864 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25856 - LdsOffsetMetadata_Blk: 36864 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 59648 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -675630,15 +674847,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -675653,20 +674870,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 20 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -675752,26 +674969,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2588 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA0_LPB4_LRVW4_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2585 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_6_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -675782,27 +674999,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -675819,7 +675036,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -675835,7 +675052,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -675846,45 +675063,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_3_NTB0_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 22016 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 22016 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -675892,22 +675109,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveTile: [8, 3] + MIWaveTileA: 8 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -675915,19 +675132,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -676013,20 +675230,20 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2589 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2586 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_3_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 @@ -676043,27 +675260,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -676092,7 +675309,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -676107,32 +675324,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 56320 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -676152,15 +675369,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 11] - MIWaveTileA: 2 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 352 - MacroTileA: 64 - MacroTileB: 352 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -676175,20 +675392,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 88 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 2 - NumLoadsB: 11 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 24 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -676274,26 +675491,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2590 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV0_MIWT2_11_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2587 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 11 - ThreadTileA: 8 - ThreadTileB: 11 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -676310,7 +675527,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -676324,7 +675541,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -676368,7 +675585,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -676377,23 +675594,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53504 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53504 - LdsOffsetMetadata_Blk: 78080 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 86272 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -676414,14 +675631,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -676437,19 +675654,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -676535,15 +675752,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2591 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2588 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -676551,10 +675768,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -676585,7 +675802,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -676602,7 +675819,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -676614,11 +675831,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -676629,45 +675846,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB2_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_4_NTB0_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 + LdsNumBytes: 30720 LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 12288 - LdsOffsetB_Blk: 77824 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49152 - LdsOffsetMetadata_Blk: 77824 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 45056 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -676675,42 +675892,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 96 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 3 - NumLoadsB: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -676796,26 +676013,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2592 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT3_2_NTB4_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2589 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_4_NTB0_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 48 - ThreadTile1: 2 + ThreadTile1: 4 ThreadTileA: 48 - ThreadTileB: 2 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -676826,27 +676043,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -676863,7 +676080,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -676875,11 +676092,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -676890,88 +676107,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x400x32_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA16_LPB4_LRVW4_MIAV0_MIWT1_25_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 27264 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 37120 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 37120 - LdsPadA: 16 - LdsPadB: 4 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 25] - MIWaveTileA: 1 - MIWaveTileB: 25 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 400 - MacroTileA: 64 - MacroTileB: 400 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 1 - NumLoadsB: 25 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 25 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -677057,26 +676274,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2593 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x400x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA16_LPB4_LRVW4_MIAV0_MIWT1_25_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2590 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 25 - ThreadTileA: 4 - ThreadTileB: 25 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -677087,7 +676304,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -677098,16 +676315,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -677151,7 +676368,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x352x64_MI16x16x1_SN_GRVWB8_LBSPPA768_LPA16_LPB8_LRVW4_MIAV0_MIWT3_11_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_8_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -677160,27 +676377,27 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 50688 + LdsNumBytes: 61696 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 61696 + LdsOffsetMetadata_Blk: 86272 LdsPadA: 16 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -677197,14 +676414,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 11] - MIWaveTileA: 3 - MIWaveTileB: 11 + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 352 - MacroTileA: 96 - MacroTileB: 352 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -677219,20 +676436,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 132 - NumGlobalWriteVectorsPerThread: 132 - NumLoadsA: 3 - NumLoadsB: 11 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -677318,15 +676535,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2594 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x352x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LPA16_LPB8_LRVW4_MIAV0_MIWT3_11_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2591 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_8_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -677334,10 +676551,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 11 - ThreadTileA: 12 - ThreadTileB: 11 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -677368,7 +676585,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -677401,7 +676618,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -677412,7 +676629,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -677421,24 +676638,24 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53504 - LdsNumElementsAlignedA: 12544 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53504 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -677457,14 +676674,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 160 MacroTile1: 256 - MacroTileA: 96 + MacroTileA: 160 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -677481,16 +676698,16 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 @@ -677579,26 +676796,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2595 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2592 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -677609,13 +676826,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -677629,7 +676846,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -677662,7 +676879,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -677673,68 +676890,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 10] - MIWaveTileA: 3 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -677742,19 +676959,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 3 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -677840,26 +677057,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2596 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_10_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2593 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 10 - ThreadTileA: 12 - ThreadTileB: 10 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -677870,7 +677087,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -677890,7 +677107,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -677934,32 +677151,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 LSCB: 32 - LSPA: 16 + LSPA: 8 LSPB: 64 - LVCA: 16 + LVCA: 32 LVCB: 4 - LVPA: 2 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -677979,15 +677196,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [2, 2] MIWaveTile: [8, 4] MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -678010,12 +677227,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 128 NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -678101,8 +677318,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2597 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2594 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -678111,10 +677328,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 @@ -678137,7 +677354,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -678184,7 +677401,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -678195,87 +677412,87 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB4_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 + LSPA: 8 LSPB: 32 - LVCA: 16 + LVCA: 32 LVCB: 8 - LVPA: 2 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 224 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 8 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -678362,8 +677579,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2598 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2595 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -678371,16 +677588,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 7 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -678392,13 +677609,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -678429,7 +677646,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -678441,11 +677658,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -678456,42 +677673,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NLCA5_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 31872 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 53760 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 16 + LdsOffsetMetadata: 31872 + LdsOffsetMetadata_Blk: 53760 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -678502,14 +677719,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -678530,14 +677747,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 10 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -678623,8 +677840,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2599 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_7_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2596 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -678632,17 +677849,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -678653,7 +677870,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -678664,16 +677881,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -678690,7 +677907,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -678702,11 +677919,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -678717,34 +677934,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NTB0_NLCA5_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 22016 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22016 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -678752,33 +677969,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -678791,14 +678008,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 2 - NumLoadsB: 3 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 10 + NumLoadsB: 18 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -678884,8 +678101,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2600 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2597 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -678893,17 +678110,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -678914,7 +678131,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -678925,16 +678142,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -678951,7 +678168,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -678963,7 +678180,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -678978,42 +678195,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTB4_NLCA3_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 90624 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -679023,15 +678240,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 384 + MacroTile1: 144 + MacroTileA: 384 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -679046,20 +678263,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 9 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -679145,8 +678362,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2601 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2598 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -679155,16 +678372,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -679181,21 +678398,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -679212,7 +678429,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -679224,11 +678441,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -679239,42 +678456,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTB0_NLCA3_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -679284,15 +678501,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 384 + MacroTile1: 144 + MacroTileA: 384 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -679307,20 +678524,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 9 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -679406,8 +678623,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2602 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2599 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -679415,17 +678632,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -679436,27 +678653,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -679489,7 +678706,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -679500,88 +678717,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_6_NTB4_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 LSCB: 32 - LSPA: 32 + LSPA: 8 LSPB: 64 - LVCA: 8 + LVCA: 32 LVCB: 4 - LVPA: 4 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30720 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30720 - LdsOffsetMetadata_Blk: 45056 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -679667,8 +678884,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2603 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2600 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_6_NTB4_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -679676,17 +678893,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -679697,7 +678914,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -679734,7 +678951,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -679746,11 +678963,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -679761,42 +678978,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA0_LPB4_LRVW4_MIWT20_3_NTB0_NLCA5_SVW4_VWA4_WG16_16_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 33536 + LdsNumElementsAlignedA: 20480 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 20480 + LdsOffsetB_Blk: 86016 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 33536 + LdsOffsetMetadata_Blk: 86016 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -679806,15 +679023,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -679829,20 +679046,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 12 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -679928,8 +679145,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2604 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3072_LPA32_LPB16_LRVW8_MIWT6_7_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2601 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA0_LPB4_LRVW4_MIWT20_3_NTB0_NLCA5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -679937,17 +679154,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -679958,27 +679175,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -680007,11 +679224,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -680022,68 +679239,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_8_NTB0_NLCA1_SVW1_VWA1_WG128_2_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NTB0_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 LVPB: 8 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 31616 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 8] - MIWaveTileA: 1 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -680096,14 +679313,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -680189,8 +679406,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2605 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT1_8_NTB0_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 2602 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -680198,17 +679415,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -680219,13 +679436,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -680272,7 +679489,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -680283,68 +679500,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB0_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB0_NLCA1_SVW2_VWA2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 64 + LSPA: 8 LSPB: 32 - LVCA: 4 + LVCA: 32 LVCB: 8 - LVPA: 8 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 256 MacroTile1: 224 - MacroTileA: 224 + MacroTileA: 256 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -680357,13 +679574,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 7 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 8 NumLoadsB: 7 - NumLoadsCoalescedA: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -680450,8 +679667,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2606 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_7_NTB0_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2603 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -680459,16 +679676,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 32 ThreadTile1: 7 - ThreadTileA: 28 + ThreadTileA: 32 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -680480,13 +679697,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -680517,7 +679734,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -680533,7 +679750,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -680544,34 +679761,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SVW2_VWA2_WG64_4_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 - LSPB: 32 + LSPB: 64 LVCA: 16 - LVCB: 8 + LVCB: 4 LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 90112 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -680579,10 +679796,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -680590,22 +679807,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 384 + MacroTile1: 128 + MacroTileA: 384 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -680618,14 +679835,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -680711,8 +679928,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2607 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2604 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -680720,17 +679937,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -680741,27 +679958,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -680778,7 +679995,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -680790,11 +680007,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -680805,42 +680022,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA32_LPB4_LRVW4_MIWT14_4_NTB0_NLCA7_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 16 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -680851,14 +680068,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -680873,20 +680090,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 8 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -680972,8 +680189,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2608 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIWT4_9_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2605 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA32_LPB4_LRVW4_MIWT14_4_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -680981,17 +680198,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -681002,7 +680219,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -681013,16 +680230,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -681039,7 +680256,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -681051,7 +680268,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -681066,45 +680283,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA32_LPB4_LRVW4_MIWT14_4_NTB4_NLCA7_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -681112,22 +680329,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -681140,14 +680357,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 8 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -681233,8 +680450,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2609 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_3_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2606 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA32_LPB4_LRVW4_MIWT14_4_NTB4_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -681243,16 +680460,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -681269,21 +680486,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -681300,7 +680517,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -681312,11 +680529,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -681327,45 +680544,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1280 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 21504 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 21504 - LdsOffsetB_Blk: 87040 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 87040 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -681373,22 +680590,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -681401,14 +680618,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 40 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -681494,8 +680711,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2610 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIWT10_5_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2607 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -681503,17 +680720,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -681524,27 +680741,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -681561,7 +680778,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -681573,11 +680790,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -681588,42 +680805,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_4_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 29696 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 29696 + LdsOffsetMetadata_Blk: 45056 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -681634,14 +680851,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -681656,20 +680873,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 6 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 16 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -681755,8 +680972,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2611 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2608 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_4_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -681764,17 +680981,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -681785,27 +681002,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -681834,7 +681051,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -681849,45 +681066,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_LBSPPA768_LPA32_LPB4_LRVW4_MIWT6_6_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 13312 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13312 - LdsOffsetB_Blk: 78848 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 78848 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -681895,22 +681112,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 6] + MIWaveTile: [6, 2] MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 384 - MacroTileA: 96 - MacroTileB: 384 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -681923,14 +681140,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 48 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -682016,8 +681233,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2612 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA768_LPA32_LPB4_LRVW4_MIWT6_6_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2609 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -682026,16 +681243,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -682052,8 +681269,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -682083,7 +681300,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -682110,32 +681327,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NLCA5_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 64 + LSCB: 32 LSPA: 32 - LSPB: 8 + LSPB: 16 LVCA: 8 - LVCB: 32 + LVCB: 16 LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + LVPB: 8 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 LdsPadB: 4 LdsPadMetadata: 0 @@ -682144,8 +681361,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -682156,14 +681373,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [10, 6] + MIWaveTileA: 10 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -682178,20 +681395,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 36 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 5 + NumLoadsB: 12 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -682277,8 +681494,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2613 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIWT6_9_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2610 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -682293,10 +681510,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 40 + ThreadTile1: 6 + ThreadTileA: 40 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -682314,20 +681531,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -682344,7 +681561,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -682355,14 +681572,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -682371,32 +681588,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_6_NTB4_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59648 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59648 - LdsOffsetMetadata_Blk: 94464 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 37376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -682405,10 +681622,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -682416,15 +681633,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -682440,19 +681657,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -682538,26 +681755,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2614 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIWT7_6_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2611 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -682574,21 +681791,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -682605,7 +681822,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -682616,14 +681833,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -682632,44 +681849,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_3_NTB0_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 - LSCB: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 22016 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22016 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -682678,13 +681895,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 3] - MIWaveTileA: 8 + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 128 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -682700,20 +681917,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 + NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 3 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -682799,25 +682016,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2615 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIWT8_3_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2612 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 32 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -682829,7 +682046,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -682839,17 +682056,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -682866,7 +682083,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -682877,14 +682094,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -682893,33 +682110,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -682927,10 +682144,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -682939,13 +682156,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 160 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -682961,20 +682178,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 24 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -683060,25 +682277,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2616 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_3_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2613 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 40 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -683090,7 +682307,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -683101,16 +682318,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -683127,7 +682344,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -683138,14 +682355,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -683154,32 +682371,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 86272 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -683188,10 +682405,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -683199,15 +682416,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -683222,20 +682439,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -683321,26 +682538,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2617 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2614 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -683357,21 +682574,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -683388,7 +682605,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -683399,14 +682616,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -683415,44 +682632,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_4_NTB0_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 16 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30720 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 12544 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 18688 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30720 - LdsOffsetMetadata_Blk: 45056 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 12544 + LdsOffsetMetadata_Blk: 18688 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -683461,14 +682678,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -683484,19 +682701,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -683582,26 +682799,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2618 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA0_LPB8_LRVW4_MIWT12_4_NTB0_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2615 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -683612,7 +682829,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -683623,16 +682840,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -683665,7 +682882,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -683676,45 +682893,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 9472 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 20736 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 9472 + LdsOffsetMetadata_Blk: 20736 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -683722,42 +682939,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -683843,26 +683060,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2619 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_4_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2616 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -683873,13 +683090,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -683893,7 +683110,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -683910,7 +683127,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -683937,32 +683154,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_8_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61696 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61696 - LdsOffsetMetadata_Blk: 86272 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 37376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -683971,10 +683188,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -683982,15 +683199,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -684006,19 +683223,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -684104,26 +683321,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2620 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIWT5_8_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2617 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -684140,21 +683357,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -684183,11 +683400,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -684198,33 +683415,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 - LSPB: 32 + LSPB: 8 LVCA: 4 - LVCB: 8 + LVCB: 32 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 29952 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 37120 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 + LdsOffsetMetadata: 29952 + LdsOffsetMetadata_Blk: 37120 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -684235,7 +683452,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -684243,15 +683460,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -684266,20 +683483,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 1 + NumLoadsB: 20 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -684365,26 +683582,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2621 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIWT10_4_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2618 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -684395,13 +683612,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -684415,7 +683632,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -684432,7 +683649,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -684459,34 +683676,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 27648 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 27648 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -684494,10 +683711,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -684505,42 +683722,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -684626,26 +683843,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2622 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2619 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -684662,21 +683879,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -684693,7 +683910,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -684709,7 +683926,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -684720,44 +683937,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -684765,14 +683982,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 32 MacroTile1: 128 - MacroTileA: 256 + MacroTileA: 32 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -684788,20 +684005,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -684887,26 +684104,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2623 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2620 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -684917,27 +684134,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -684966,7 +684183,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -684981,88 +684198,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB4_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LSPA: 64 + LSPB: 8 + LVCA: 4 + LVCB: 32 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 14848 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 14848 + LdsOffsetMetadata_Blk: 20992 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -685148,26 +684365,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2624 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2621 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -685184,7 +684401,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -685198,7 +684415,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -685215,7 +684432,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -685227,11 +684444,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -685242,44 +684459,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NLCA5_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31872 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 29952 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 53760 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 37120 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31872 - LdsOffsetMetadata_Blk: 53760 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 29952 + LdsOffsetMetadata_Blk: 37120 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -685288,13 +684505,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 + MIWaveTile: [1, 5] + MIWaveTileA: 1 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 32 MacroTile1: 160 - MacroTileA: 320 + MacroTileA: 32 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -685310,20 +684527,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 10 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 1 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -685409,25 +684626,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2625 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_5_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2622 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 4 ThreadTile1: 5 - ThreadTileA: 40 + ThreadTileA: 4 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -685439,7 +684656,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -685450,16 +684667,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -685488,7 +684705,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -685503,32 +684720,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NTB0_NLCA5_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 9472 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 20736 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 106752 + LdsOffsetMetadata: 9472 + LdsOffsetMetadata_Blk: 20736 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -685540,7 +684757,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -685548,15 +684765,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -685572,19 +684789,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 10 - NumLoadsB: 18 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -685670,26 +684887,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2626 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA5120_LPA16_LPB16_LRVW8_MIWT5_9_NTB0_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2623 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -685706,7 +684923,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -685720,7 +684937,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -685737,7 +684954,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -685749,11 +684966,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -685764,44 +684981,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTB4_NLCA3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 16 - LVCA: 16 + LVCA: 2 LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -685809,15 +685026,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 144 - MacroTileA: 384 - MacroTileB: 144 + MacroTile0: 48 + MacroTile1: 64 + MacroTileA: 48 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -685832,20 +685049,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 9 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 3 + NumLoadsB: 4 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -685931,26 +685148,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2627 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2624 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -685961,27 +685178,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -685998,7 +685215,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -686010,7 +685227,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -686025,44 +685242,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTB0_NLCA3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 3072 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 25088 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 90624 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 37376 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -686070,15 +685287,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 144 - MacroTileA: 384 - MacroTileB: 144 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -686094,19 +685311,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 9 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -686192,26 +685409,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2628 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3072_LPA32_LPB4_LRVW4_MIWT6_9_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2625 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -686228,21 +685445,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -686259,7 +685476,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -686275,7 +685492,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -686286,44 +685503,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_6_NTB4_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 64 - LVCA: 32 - LVCB: 4 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30208 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -686331,15 +685548,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 48 + MacroTile1: 64 + MacroTileA: 48 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -686355,19 +685572,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 3 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 3 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -686453,26 +685670,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2629 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB8_LRVW4_MIWT8_6_NTB4_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2626 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -686483,27 +685700,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -686520,7 +685737,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -686532,11 +685749,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -686547,44 +685764,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA0_LPB4_LRVW4_MIWT20_3_NTB0_NLCA5_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33536 - LdsNumElementsAlignedA: 20480 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 29184 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20480 - LdsOffsetB_Blk: 86016 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33536 - LdsOffsetMetadata_Blk: 86016 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 29184 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -686592,15 +685809,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -686621,14 +685838,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 12 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -686714,8 +685931,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2630 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA0_LPB4_LRVW4_MIWT20_3_NTB0_NLCA5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2627 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -686723,17 +685940,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -686744,27 +685961,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -686781,7 +685998,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -686793,11 +686010,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -686808,44 +686025,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NTB0_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 16 - LVCA: 32 - LVCB: 16 - LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 49152 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 49152 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -686854,14 +686071,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [2, 9] + MIWaveTileA: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 288 + MacroTileA: 64 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -686876,20 +686093,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 14 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 2 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -686975,8 +686192,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2631 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT8_7_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2628 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -686984,17 +686201,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 9 + ThreadTileA: 8 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -687005,7 +686222,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -687016,16 +686233,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -687058,7 +686275,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -687069,68 +686286,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB0_NLCA1_SVW2_VWA2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 8 + LSPA: 64 LSPB: 32 - LVCA: 32 + LVCA: 4 LVCB: 8 - LVPA: 1 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 58624 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 58624 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -687143,14 +686360,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 8 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 9 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -687236,8 +686453,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2632 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT2_7_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2629 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -687245,17 +686462,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -687266,13 +686483,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -687303,7 +686520,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -687319,7 +686536,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -687330,34 +686547,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 58624 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 58624 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -687365,10 +686582,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -687376,42 +686593,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 2 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 9 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -687497,8 +686714,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2633 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2630 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -687506,17 +686723,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -687527,27 +686744,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -687564,7 +686781,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -687576,7 +686793,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -687591,42 +686808,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA32_LPB4_LRVW4_MIWT14_4_NTB0_NLCA7_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 94720 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -687636,15 +686853,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -687665,14 +686882,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 8 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -687758,8 +686975,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2634 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA32_LPB4_LRVW4_MIWT14_4_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2631 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -687768,16 +686985,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -687794,21 +687011,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -687825,7 +687042,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -687837,11 +687054,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -687852,45 +687069,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_LBSPPA3584_LPA32_LPB4_LRVW4_MIWT14_4_NTB4_NLCA7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 3584 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -687898,42 +687115,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 448 + MacroTile0: 64 MacroTile1: 128 - MacroTileA: 448 + MacroTileA: 64 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 8 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -688019,8 +687236,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2635 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA3584_LPA32_LPB4_LRVW4_MIWT14_4_NTB4_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2632 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -688028,17 +687245,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -688049,27 +687266,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -688086,7 +687303,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -688113,34 +687330,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 0 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 + LdsNumBytes: 49152 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 49152 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -688148,10 +687365,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -688159,22 +687376,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 64 MacroTile1: 256 - MacroTileA: 128 + MacroTileA: 64 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -688187,14 +687404,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 2 - NumLoadsB: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -688280,8 +687497,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2636 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT4_2_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 2633 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -688290,16 +687507,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -688316,21 +687533,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -688347,7 +687564,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -688359,7 +687576,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -688374,44 +687591,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_4_NLCA3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NLCA1_SVW4_VWA4_WG16_16_1 LSCA: 64 - LSCB: 32 + LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29696 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29696 - LdsOffsetMetadata_Blk: 45056 + LdsOffsetMetadata: 49152 + LdsOffsetMetadata_Blk: 73728 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -688420,13 +687637,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 64 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 64 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -688442,20 +687659,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 16 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -688541,8 +687758,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2637 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA0_LPB4_LRVW4_MIWT12_4_NLCA3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 + SolutionIndex: 2634 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -688557,9 +687774,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -688578,20 +687795,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -688624,7 +687841,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -688635,68 +687852,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 53504 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 53504 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 8] + MIWaveTileA: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 96 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 96 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -688709,13 +687926,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 + NumElementsPerThread: 96 NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 + NumLoadsA: 3 NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -688802,8 +688019,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2638 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT6_2_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2635 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -688811,17 +688028,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -688832,14 +688049,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -688869,7 +688086,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -688881,7 +688098,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -688896,42 +688113,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NLCA5_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 2560 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -688941,15 +688158,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 6] - MIWaveTileA: 10 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -688964,20 +688181,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 5 - NumLoadsB: 12 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -689063,8 +688280,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2639 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2560_LPA32_LPB4_LRVW4_MIWT10_6_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2636 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -689073,16 +688290,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 6 - ThreadTileA: 40 - ThreadTileB: 6 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -689099,21 +688316,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -689130,7 +688347,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -689141,14 +688358,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -689157,33 +688374,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 16 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -689191,10 +688408,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -689203,14 +688420,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -689225,20 +688442,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -689324,26 +688541,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2640 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2637 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -689354,7 +688571,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -689365,16 +688582,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -689391,7 +688608,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -689402,14 +688619,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -689418,34 +688635,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -689453,10 +688670,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -689464,42 +688681,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -689585,26 +688802,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2641 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2638 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -689615,27 +688832,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -689652,7 +688869,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -689663,14 +688880,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -689679,33 +688896,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 28672 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 28672 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -689713,8 +688930,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -689725,14 +688942,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -689748,19 +688965,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -689846,26 +689063,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2642 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2639 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -689876,7 +689093,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -689887,16 +689104,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -689913,7 +689130,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -689924,14 +689141,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -689940,34 +689157,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 45056 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -689975,10 +689192,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -689986,42 +689203,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -690107,26 +689324,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2643 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2640 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NTB0_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 1 + ThreadTileA: 48 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -690143,21 +689360,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -690185,14 +689402,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -690201,33 +689418,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 32 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 16 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 12544 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 18688 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 12544 - LdsOffsetMetadata_Blk: 18688 - LdsPadA: 16 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -690247,14 +689464,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -690269,20 +689486,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -690368,26 +689585,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2644 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2641 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -690398,7 +689615,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -690414,11 +689631,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -690435,7 +689652,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -690451,7 +689668,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -690462,44 +689679,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC3_NTD3_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT8_7_NTB0_NLCA1_SVW8_VWA8_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 9472 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 20736 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 73728 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9472 - LdsOffsetMetadata_Blk: 20736 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 73728 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -690507,15 +689724,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 32 - MacroTileA: 32 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 448 + MacroTileA: 128 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -690531,19 +689748,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 1 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -690629,26 +689846,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2645 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2642 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT8_7_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -690659,27 +689876,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -690696,7 +689913,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -690712,7 +689929,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -690723,33 +689940,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC0_NTD0_NLCA1_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -690757,10 +689974,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -690768,15 +689985,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -690791,20 +690008,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 4 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -690890,26 +690107,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2646 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2643 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -690920,27 +690137,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -690969,11 +690186,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -690984,33 +690201,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29952 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 37120 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29952 - LdsOffsetMetadata_Blk: 37120 - LdsPadA: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -691021,7 +690238,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -691030,14 +690247,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -691052,20 +690269,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 20 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -691151,26 +690368,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2647 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2644 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -691181,7 +690398,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -691201,7 +690418,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -691218,7 +690435,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -691230,7 +690447,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -691245,44 +690462,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NTB4_NTC0_NTD0_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 8 LVCA: 4 - LVCB: 16 + LVCB: 32 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 1280 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27648 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 21504 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 21504 + LdsOffsetB_Blk: 87040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27648 - LdsOffsetMetadata_Blk: 41984 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 87040 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -691291,14 +690508,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -691313,20 +690530,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 40 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -691412,15 +690629,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2648 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NTB4_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2645 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -691428,10 +690645,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -691453,16 +690670,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -691479,7 +690696,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -691495,7 +690712,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -691506,33 +690723,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 - LSPB: 16 + LSPB: 32 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -691540,10 +690757,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -691551,15 +690768,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 128 - MacroTileA: 32 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -691575,19 +690792,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -691673,26 +690890,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2649 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NTB4_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2646 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -691703,27 +690920,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -691740,7 +690957,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -691767,44 +690984,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 8 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 14848 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 32384 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 14848 - LdsOffsetMetadata_Blk: 20992 + LdsOffsetMetadata: 32384 + LdsOffsetMetadata_Blk: 45568 LdsPadA: 32 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -691812,15 +691029,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -691836,19 +691053,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 18 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -691934,26 +691151,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2650 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2647 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -691970,21 +691187,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -692013,11 +691230,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -692028,36 +691245,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29952 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 37120 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29952 - LdsOffsetMetadata_Blk: 37120 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -692065,7 +691282,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -692074,14 +691291,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -692096,20 +691313,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 36 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -692195,26 +691412,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2651 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2648 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -692225,7 +691442,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -692245,7 +691462,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -692289,7 +691506,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC0_NTD0_NLCA1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB0_NLCA7_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -692298,23 +691515,23 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 9472 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 20736 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9472 - LdsOffsetMetadata_Blk: 20736 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -692326,7 +691543,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -692335,14 +691552,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 32 - MacroTileA: 32 - MacroTileB: 32 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -692358,19 +691575,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 1 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 7 + NumLoadsB: 7 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -692456,15 +691673,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2652 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_NTC0_NTD0_NLCA1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2649 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB0_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -692472,10 +691689,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -692506,7 +691723,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -692523,7 +691740,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -692550,32 +691767,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB0_NTC0_NTD0_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB4_NLCA7_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 45568 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -692584,10 +691801,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -692595,15 +691812,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 64 - MacroTileA: 48 - MacroTileB: 64 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -692618,20 +691835,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 7 + NumLoadsB: 7 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -692717,26 +691934,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2653 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB0_NTC0_NTD0_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2650 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -692753,21 +691970,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -692811,68 +692028,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25088 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25088 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 128 - MacroTileA: 32 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -692880,19 +692097,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 4 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -692978,15 +692195,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2654 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NTB0_NTC3_NTD3_NLCA1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2651 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -692994,10 +692211,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -693014,7 +692231,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -693028,7 +692245,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -693045,7 +692262,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -693061,7 +692278,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -693072,34 +692289,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB4_NTC3_NTD3_NLCA3_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -693107,10 +692324,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -693118,22 +692335,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 64 - MacroTileA: 48 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -693141,19 +692358,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -693239,26 +692456,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2655 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB4_NTC3_NTD3_NLCA3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2652 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -693269,27 +692486,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -693333,45 +692550,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29184 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29184 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -693383,38 +692600,38 @@ MIWaveTileA: 2 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -693500,8 +692717,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2656 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2653 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -693510,15 +692727,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 8 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -693536,7 +692753,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -693594,32 +692811,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -693631,7 +692848,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -693639,15 +692856,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 288 - MacroTileA: 64 - MacroTileB: 288 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -693662,20 +692879,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 2 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -693761,8 +692978,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2657 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA32_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2654 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -693771,16 +692988,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -693797,7 +693014,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -693844,7 +693061,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -693855,7 +693072,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -693864,24 +693081,24 @@ LVCB: 8 LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58624 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58624 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -693900,15 +693117,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -693923,20 +693140,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 9 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -694022,8 +693239,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2658 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2655 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -694031,17 +693248,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -694052,13 +693269,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -694089,7 +693306,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -694105,7 +693322,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -694116,42 +693333,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIAV0_MIWT6_6_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58624 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58624 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -694162,14 +693379,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -694184,20 +693401,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 NumLoadsA: 3 - NumLoadsB: 9 + NumLoadsB: 3 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -694283,8 +693500,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2659 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2656 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIAV0_MIWT6_6_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -694292,17 +693509,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -694313,7 +693530,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -694324,16 +693541,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -694377,45 +693594,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT6_2_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -694423,22 +693640,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] + MIWaveTile: [6, 2] MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -694451,14 +693668,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -694544,8 +693761,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2660 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2657 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT6_2_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -694554,16 +693771,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -694580,7 +693797,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -694627,7 +693844,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -694638,68 +693855,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NLCA1_SVW1_VWA1_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NLCA7_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -694712,14 +693929,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -694805,8 +694022,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2661 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2658 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -694814,17 +694031,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -694835,13 +694052,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -694888,7 +694105,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -694899,33 +694116,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB4_NLCA7_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 32 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 29184 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB: 29184 + LdsOffsetB_Blk: 94720 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49152 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 94720 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -694936,7 +694153,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -694945,14 +694162,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -694967,20 +694184,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -695066,8 +694283,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2662 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2659 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB4_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -695075,17 +694292,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -695096,7 +694313,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -695133,7 +694350,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -695145,7 +694362,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -695160,44 +694377,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_9_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 + LdsNumBytes: 27776 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 40960 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49152 - LdsOffsetMetadata_Blk: 73728 + LdsOffsetMetadata: 27776 + LdsOffsetMetadata_Blk: 40960 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -695205,15 +694422,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -695228,20 +694445,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -695327,8 +694544,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2663 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_4_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2660 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_9_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -695337,16 +694554,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 9 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -695363,21 +694580,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -695394,7 +694611,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -695410,7 +694627,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -695421,42 +694638,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 64 + LVCA: 8 + LVCB: 4 + LVPA: 4 + LVPB: 8 LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53504 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53504 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -695467,14 +694684,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -695495,14 +694712,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 NumLoadsA: 3 - NumLoadsB: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -695588,8 +694805,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2664 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2661 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -695597,17 +694814,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -695618,7 +694835,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -695629,16 +694846,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -695655,7 +694872,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -695667,11 +694884,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -695682,42 +694899,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -695727,14 +694944,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 16] + MIWaveTileA: 4 + MIWaveTileB: 16 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 256 MacroTile1: 256 - MacroTileA: 96 + MacroTileA: 256 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -695750,20 +694967,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 16 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -695849,8 +695066,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2665 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2662 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -695858,17 +695075,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 16 + ThreadTileA: 16 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -695879,27 +695096,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -695916,7 +695133,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -695932,7 +695149,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -695943,34 +695160,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NTB0_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 64 + LVCA: 32 + LVCB: 4 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -695978,10 +695195,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -695989,22 +695206,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 256 MacroTile1: 256 - MacroTileA: 96 + MacroTileA: 256 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -696017,14 +695234,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -696110,8 +695327,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2666 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2663 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -696119,17 +695336,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -696140,28 +695357,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 2 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -696177,7 +695394,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -696188,14 +695405,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 78 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -696204,68 +695421,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPB512_MIWT1_1_NLCB1_WSGRB0_WG16_4_2 + LSCA: 16 + LSCB: 256 + LSPA: 8 + LSPB: 4 + LVCA: 16 + LVCB: 32 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -696273,20 +695490,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -696371,25 +695588,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2667 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT2_1_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2664 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU78_LBSPPB512_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 4 ThreadTile1: 1 - ThreadTileA: 32 + ThreadTileA: 4 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -696401,28 +695618,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 78] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -696438,7 +695655,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -696449,14 +695666,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 79 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -696465,42 +695682,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPB512_MIWT1_1_NLCB1_WSGRB0_WG16_4_2 + LSCA: 16 + LSCB: 256 + LSPA: 8 + LSPB: 4 + LVCA: 16 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28672 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28672 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -696510,15 +695727,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -696533,21 +695750,21 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 - NumLoadsB: 16 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 16 - NumThreads: 256 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -696632,26 +695849,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2668 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2665 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU79_LBSPPB512_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -696662,28 +695879,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 79] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -696699,7 +695916,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -696712,7 +695929,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 75 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -696726,68 +695943,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NTB0_NLCA3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB0_WG32_4_1 LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 + LSCB: 256 + LSPA: 32 + LSPB: 4 LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30720 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30720 - LdsOffsetMetadata_Blk: 45056 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] - MIWaveTileA: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 128 - MacroTileA: 96 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -696795,20 +696012,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -696893,25 +696110,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2669 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV1_MIWT3_1_NTB0_NLCA3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2666 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU75_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG32_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 4 ThreadTile1: 1 - ThreadTileA: 48 + ThreadTileA: 4 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -696929,22 +696146,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 75] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -696960,7 +696177,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -696973,10 +696190,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -696987,33 +696204,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_1 LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 + LSCB: 256 + LSPA: 32 + LSPB: 2 LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -697021,8 +696238,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -697032,15 +696249,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -697055,21 +696272,21 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 - NumThreads: 256 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -697154,26 +696371,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2670 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2667 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU80_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -697184,28 +696401,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 80] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -697221,7 +696438,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -697234,10 +696451,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 74 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -697248,44 +696465,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT8_7_NTB0_NLCA1_SVW8_VWA8_WG16_16_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_1 + LSCA: 32 + LSCB: 256 + LSPA: 32 + LSPB: 2 + LVCA: 4 + LVCB: 32 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 73728 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 73728 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -697293,15 +696510,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -697317,20 +696534,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 7 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 - NumThreads: 256 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -697415,26 +696632,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2671 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA0_LPB8_LRVW4_MIAV0_MIWT8_7_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2668 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU74_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -697445,28 +696662,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 74] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -697482,7 +696699,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -697495,10 +696712,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -697509,44 +696726,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_2 + LSCA: 32 + LSCB: 256 + LSPA: 64 + LSPB: 4 + LVCA: 4 + LVCB: 32 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -697554,15 +696771,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -697578,19 +696795,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 NumLoadsA: 4 - NumLoadsB: 9 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -697676,26 +696893,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2672 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2669 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -697706,27 +696923,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 40] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -697743,7 +696960,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -697756,10 +696973,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 76 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -697770,33 +696987,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 + LSCB: 256 + LSPA: 32 + LSPB: 4 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -697804,10 +697021,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -697815,15 +697032,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 64 + MacroTile1: 16 + MacroTileA: 64 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -697838,20 +697055,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -697937,26 +697154,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2673 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LPA0_LPB16_LRVW8_MIAV0_MIWT4_9_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2670 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU76_LBSPPA1024_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -697967,27 +697184,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 76] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -698004,7 +697221,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -698016,8 +697233,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -698031,44 +697248,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_LBSPPA1280_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB512_LPA32_MIWT2_1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 + LSCA: 64 + LSCB: 256 + LSPA: 32 LSPB: 8 - LVCA: 4 + LVCA: 8 LVCB: 32 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1280 - LdsBlockSizePerPadB: 128 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 21504 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21504 - LdsOffsetB_Blk: 87040 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 87040 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -698076,15 +697293,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 16 + MacroTileA: 64 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -698100,19 +697317,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 40 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -698198,26 +697415,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2674 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1280_LPA32_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2671 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA1024_LBSPPB512_LPA32_MIWT2_1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -698234,21 +697451,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 40] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -698265,7 +697482,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -698278,10 +697495,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -698292,33 +697509,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -698326,10 +697543,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -698337,15 +697554,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 16 + MacroTileA: 128 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -698360,20 +697577,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -698459,26 +697676,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2675 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_NLCA5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2672 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU80_LBSPPA2048_LBSPPB256_LPA32_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -698489,27 +697706,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 80] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -698526,7 +697743,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -698538,11 +697755,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -698553,44 +697770,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x32_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x16x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB256_LPA16_MIWT3_1_NLCA3_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 LSCA: 64 - LSCB: 32 + LSCB: 128 LSPA: 32 LSPB: 16 LVCA: 8 LVCB: 16 LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + LVPB: 2 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32384 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 49664 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 49664 + LdsOffsetB_Blk: 115200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32384 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 115200 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -698598,15 +697815,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 288 + MacroTile1: 16 MacroTileA: 192 - MacroTileB: 288 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -698622,19 +697839,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 18 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 12 + NumLoadsB: 1 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -698720,26 +697937,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2676 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2673 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x16x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU80_LBSPPA3072_LBSPPB256_LPA16_MIWT3_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -698750,27 +697967,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 80] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -698787,7 +698004,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -698799,11 +698016,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -698814,44 +698031,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB4_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 37376 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 37376 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -698859,15 +698076,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 128 + MacroTile1: 16 + MacroTileA: 128 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -698882,20 +698099,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 36 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -698981,26 +698198,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2677 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1536_LPA32_LPB4_LRVW4_MIAV0_MIWT6_9_NTB4_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2674 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -699011,27 +698228,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 40] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -699060,11 +698277,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -699075,33 +698292,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB0_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + LSPA: 8 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 2 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -699112,7 +698329,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -699120,15 +698337,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 16 + MacroTileA: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -699144,19 +698361,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 7 - NumLoadsB: 7 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -699242,26 +698459,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2678 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB0_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2675 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU80_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -699272,17 +698489,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 80] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -699292,7 +698509,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -699321,8 +698538,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -699336,32 +698553,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB4_NLCA7_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x16x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_MIWT5_1_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + LSPA: 32 + LSPB: 4 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 43776 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 + LdsOffsetMetadata: 43776 + LdsOffsetMetadata_Blk: 106752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -699373,7 +698590,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -699381,15 +698598,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 1] + MIWaveTileA: 5 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 16 + MacroTileA: 320 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -699404,20 +698621,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 7 - NumLoadsB: 7 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 10 + NumLoadsB: 2 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -699503,26 +698720,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2679 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NTB4_NLCA7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2676 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x16x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU80_LBSPPA5120_LBSPPB128_LPA16_MIWT5_1_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 1 + ThreadTileA: 20 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -699536,14 +698753,14 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 80] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -699553,7 +698770,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -699582,8 +698799,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -699597,68 +698814,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x16x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA6144_LBSPPB128_LPA32_MIWT6_1_NLCA3_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 - LSPB: 32 + LSPB: 8 LVCA: 16 - LVCB: 8 + LVCB: 32 LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 6144 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 49664 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 49664 + LdsOffsetB_Blk: 115200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 115200 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 1] + MIWaveTileA: 6 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 384 + MacroTile1: 16 + MacroTileA: 384 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -699666,19 +698883,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 12 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -699764,26 +698981,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2680 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2677 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x16x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU80_LBSPPA6144_LBSPPB128_LPA32_MIWT6_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 1 + ThreadTileA: 24 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -699804,7 +699021,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 80] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -699814,7 +699031,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -699831,7 +699048,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -699844,7 +699061,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -699858,88 +699075,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTB4_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 LSCA: 128 - LSCB: 64 + LSCB: 128 LSPA: 16 - LSPB: 32 + LSPB: 16 LVCA: 16 - LVCB: 8 + LVCB: 16 LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 37376 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 37376 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 1] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 16 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -700025,26 +699242,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2681 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT4_2_NTB4_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2678 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -700061,21 +699278,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 20] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -700104,11 +699321,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 39 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -700119,88 +699336,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB4_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LSPA: 8 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 2 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 16 + MacroTileA: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -700286,26 +699503,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2682 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NTB4_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2679 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU39_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -700316,17 +699533,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 39] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -700336,7 +699553,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -700353,7 +699570,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -700366,7 +699583,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -700380,32 +699597,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB0_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -700414,10 +699631,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -700425,15 +699642,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 16 + MacroTileA: 128 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -700449,19 +699666,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -700547,26 +699764,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2683 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB0_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2680 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -700580,24 +699797,24 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 16] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -700626,11 +699843,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 26 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -700641,33 +699858,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB4_NLCA5_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 - LdsPadA: 32 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -700678,7 +699895,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -700686,15 +699903,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 16 + MacroTileA: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -700709,20 +699926,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -700808,26 +700025,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2684 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2560_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NTB4_NLCA5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2681 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU26_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -700838,17 +700055,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 26] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -700858,7 +700075,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -700875,7 +700092,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -700888,10 +700105,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -700902,44 +700119,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIAV0_MIWT6_6_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 37376 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 37376 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -700947,15 +700164,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 16 + MacroTileA: 128 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -700971,19 +700188,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -701069,26 +700286,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2685 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIAV0_MIWT6_6_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2682 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -701099,27 +700316,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 10] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -701148,11 +700365,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -701163,68 +700380,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT6_2_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 0 + LSPA: 8 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 2 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 16 + MacroTileA: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -701232,19 +700449,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -701330,26 +700547,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2686 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIAV0_MIWT6_2_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2683 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU20_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -701360,17 +700577,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 20] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -701380,7 +700597,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -701409,11 +700626,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -701424,33 +700641,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + LSPA: 8 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 2 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -701461,7 +700678,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -701469,15 +700686,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 16 + MacroTileA: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -701493,19 +700710,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -701591,26 +700808,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2687 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2684 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU16_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -701621,17 +700838,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 16] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -701641,7 +700858,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -701670,11 +700887,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 13 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -701685,33 +700902,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB4_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 64 - LSPB: 32 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 3584 + LSPA: 8 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 2 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 29184 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29184 - LdsOffsetB_Blk: 94720 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 94720 - LdsPadA: 32 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -701722,7 +700939,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -701730,15 +700947,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 16 + MacroTileA: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -701753,20 +700970,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -701852,26 +701069,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2688 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA3584_LPA32_LPB16_LRVW8_MIAV0_MIWT14_3_NTB4_NLCA7_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2685 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU13_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -701882,17 +701099,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 13] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -701902,7 +701119,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -701919,7 +701136,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -701932,7 +701149,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -701946,44 +701163,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_9_NTB0_NLCA1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27776 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27776 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -701991,15 +701208,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 16 + MacroTileA: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -702015,19 +701232,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 2 - NumLoadsB: 18 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -702113,26 +701330,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2689 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA0_LPB4_LRVW4_MIAV0_MIWT4_9_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2686 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU11_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 9 + ThreadTile1: 1 ThreadTileA: 16 - ThreadTileB: 9 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -702149,21 +701366,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 11] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -702180,7 +701397,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -702192,11 +701409,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -702207,44 +701424,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NTB0_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 32 - LSPA: 32 - LSPB: 64 - LVCA: 8 - LVCB: 4 - LVPA: 4 - LVPB: 8 - LdsBlockSizePerPadA: 1536 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 32 - LdsPadB: 8 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -702252,15 +701469,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 16 + MacroTileA: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -702276,19 +701493,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -702374,26 +701591,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2690 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1536_LPA32_LPB8_LRVW4_MIWT6_6_NTB0_NLCA3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2687 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU10_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -702404,27 +701621,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 10] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -702441,7 +701658,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -702454,7 +701671,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -702468,44 +701685,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NTB0_NLCA1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 16 + LSPB: 4 LVCA: 32 - LVCB: 16 + LVCB: 32 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 2048 + LVPB: 2 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -702514,14 +701731,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 16] + MIWaveTile: [4, 1] MIWaveTileA: 4 - MIWaveTileB: 16 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 16 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -702537,19 +701754,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -702635,15 +701852,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2691 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA2048_LPA0_LPB4_LRVW4_MIWT4_16_NTB0_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2688 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU8_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 @@ -702652,9 +701869,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 16 + ThreadTile1: 1 ThreadTileA: 16 - ThreadTileB: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -702668,24 +701885,24 @@ VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 8] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -702702,7 +701919,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -702714,11 +701931,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -702729,34 +701946,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NTB0_NLCA1_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 LSCA: 256 - LSCB: 32 + LSCB: 64 LSPA: 8 - LSPB: 64 + LSPB: 8 LVCA: 32 - LVCB: 4 + LVCB: 32 LVPA: 1 - LVPB: 8 - LdsBlockSizePerPadA: 0 + LVPB: 4 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -702764,33 +701981,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 16 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -702798,19 +702015,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -702896,26 +702113,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2692 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA0_LPA0_LPB8_LRVW8_MIWT8_2_NTB0_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2689 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU8_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -702926,28 +702143,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 8] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -702963,7 +702180,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -702974,14 +702191,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 78 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 7 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -702990,42 +702207,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPB512_MIWT1_1_NLCB1_WSGRB0_WG16_4_2 - LSCA: 16 - LSCB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 + LSCB: 64 LSPA: 8 - LSPB: 4 - LVCA: 16 + LSPB: 8 + LVCA: 32 LVCB: 32 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 16 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -703035,14 +702252,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 256 MacroTile1: 16 - MacroTileA: 16 + MacroTileA: 256 MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 @@ -703064,15 +702281,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -703157,8 +702374,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2693 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU78_LBSPPB512_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_4_2_WGM1 + SolutionIndex: 2690 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU7_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -703166,16 +702383,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 4 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 4 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 16 ThreadTile1: 1 - ThreadTileA: 4 + ThreadTileA: 16 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -703187,28 +702404,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 78] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 7] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -703224,7 +702441,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -703235,14 +702452,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 79 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -703251,42 +702468,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPB512_MIWT1_1_NLCB1_WSGRB0_WG16_4_2 - LSCA: 16 - LSCB: 256 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x16x64_MI16x16x1_SN_GRVWB2_LBSPPA6144_LBSPPB128_LPA32_MIWT6_1_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 LSPB: 4 LVCA: 16 LVCB: 32 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 6144 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 49664 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 49664 + LdsOffsetB_Blk: 115200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 115200 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -703296,14 +702513,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 1] + MIWaveTileA: 6 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 384 MacroTile1: 16 - MacroTileA: 16 + MacroTileA: 384 MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 @@ -703325,15 +702542,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 32 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 12 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -703418,8 +702635,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2694 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU79_LBSPPB512_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_4_2_WGM1 + SolutionIndex: 2691 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x16x64_MI16x16x1_SN_GRVWB2_GSU10_LBSPPA6144_LBSPPB128_LPA32_MIWT6_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -703427,16 +702644,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 4 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 24 ThreadTile1: 1 - ThreadTileA: 4 + ThreadTileA: 24 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -703448,23 +702665,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 79] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 10] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -703496,14 +702713,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 GlobalSplitU: 75 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -703512,42 +702729,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB0_WG32_4_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPB512_MIWT1_1_NLCB1_WSGRB0_WG16_8_2 + LSCA: 16 LSCB: 256 - LSPA: 32 - LSPB: 4 - LVCA: 4 + LSPA: 16 + LSPB: 8 + LVCA: 16 LVCB: 32 - LVPA: 4 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 41984 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -703557,15 +702774,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] + MIWaveGroup: [1, 2] MIWaveTile: [1, 1] MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -703586,15 +702803,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 16 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 16 NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -703679,8 +702896,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2695 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU75_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG32_4_1_WGM1 + SolutionIndex: 2692 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU75_LBSPPB512_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -703689,10 +702906,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -703715,7 +702932,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -703725,12 +702942,12 @@ _DepthUB: 256 _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -703746,7 +702963,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -703757,14 +702974,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 80 + GlobalSplitU: 79 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -703773,37 +702990,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_1 - LSCA: 32 - LSCB: 256 - LSPA: 32 - LSPB: 2 - LVCA: 4 - LVCB: 32 - LVPA: 4 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPB1024_MIWT1_1_NLCB1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 512 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 64 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 33792 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -703818,15 +703035,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] + MIWaveGroup: [1, 2] MIWaveTile: [1, 1] MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -703847,15 +703064,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 32 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 8 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -703940,8 +703157,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2696 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU80_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_1_WGM1 + SolutionIndex: 2693 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU79_LBSPPB1024_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -703950,10 +703167,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -703976,17 +703193,17 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 79] + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -704034,32 +703251,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_1 + LSCA: 16 LSCB: 256 - LSPA: 32 + LSPA: 64 LSPB: 2 - LVCA: 4 + LVCA: 2 LVCB: 32 - LVPA: 4 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 41984 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -704079,15 +703296,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] + MIWaveGroup: [1, 2] MIWaveTile: [1, 1] MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -704110,12 +703327,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -704201,8 +703418,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2697 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU74_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_1_WGM1 + SolutionIndex: 2694 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU74_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -704211,10 +703428,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -704237,7 +703454,7 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [16, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -704252,7 +703469,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -704281,7 +703498,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 76 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -704295,7 +703512,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 LSCA: 32 LSCB: 256 LSPA: 64 @@ -704308,29 +703525,29 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 + LdsNumBytes: 34816 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -704340,15 +703557,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] + MIWaveGroup: [2, 2] MIWaveTile: [1, 1] MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 16 + MacroTile1: 32 MacroTileA: 32 - MacroTileB: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -704369,14 +703586,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -704462,8 +703679,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2698 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2695 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU76_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -704473,9 +703690,9 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -704498,11 +703715,11 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] + WorkspaceCheck: [4, 0, 76] _DepthU: 256 _DepthUA: 256 _DepthUB: 256 @@ -704542,10 +703759,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 76 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -704556,42 +703773,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCB1_SVW2_VWA2_WSGRB2_WG16_8_2 + LSCA: 32 LSCB: 256 - LSPA: 32 + LSPA: 64 LSPB: 4 - LVCA: 8 + LVCA: 4 LVCB: 32 - LVPA: 4 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42496 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42496 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -704601,15 +703818,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 1] + MIWaveTileA: 2 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 16 - MacroTileA: 64 - MacroTileB: 16 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -704631,13 +703848,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -704723,8 +703940,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2699 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU76_LBSPPA1024_LBSPPB512_LPA16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2696 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -704732,16 +703949,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 1 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -704753,17 +703970,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 76] + WorkspaceCheck: [4, 0, 40] _DepthU: 256 _DepthUA: 256 _DepthUB: 256 @@ -704774,7 +703991,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -704790,7 +704007,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -704803,7 +704020,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 76 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -704817,37 +704034,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB512_LPA32_MIWT2_1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 LSCA: 64 - LSCB: 256 + LSCB: 128 LSPA: 32 - LSPB: 8 + LSPB: 4 LVCA: 8 - LVCB: 32 + LVCB: 16 LVPA: 4 LVPB: 1 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -704862,15 +704079,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] + MIWaveGroup: [2, 2] MIWaveTile: [2, 1] MIWaveTileA: 2 MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 16 + MacroTile1: 32 MacroTileA: 64 - MacroTileB: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -704891,13 +704108,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 @@ -704984,8 +704201,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2700 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA1024_LBSPPB512_LPA32_MIWT2_1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2697 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU76_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -704995,9 +704212,9 @@ StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 @@ -705017,25 +704234,25 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 76] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -705064,7 +704281,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 80 + GlobalSplitU: 38 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -705078,42 +704295,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 + LSCA: 64 LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 + LSPA: 32 + LSPB: 16 + LVCA: 8 LVCB: 16 - LVPA: 2 - LVPB: 1 - LdsBlockSizePerPadA: 2048 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -705123,15 +704340,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 1] + MIWaveGroup: [2, 1] + MIWaveTile: [2, 2] MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 16 - MacroTileA: 128 - MacroTileB: 16 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -705154,12 +704371,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 8 NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 1 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -705245,8 +704462,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2701 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU80_LBSPPA2048_LBSPPB256_LPA32_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2698 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU38_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -705255,16 +704472,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 8 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -705278,14 +704495,14 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] + WorkspaceCheck: [4, 0, 38] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -705325,10 +704542,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 80 + GlobalSplitU: 69 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -705339,33 +704556,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x16x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB256_LPA16_MIWT3_1_NLCA3_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 + LSPA: 16 + LSPB: 4 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 3072 + LVPA: 2 + LVPB: 1 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 49664 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 49664 - LdsOffsetB_Blk: 115200 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 115200 - LdsPadA: 16 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -705385,14 +704602,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 16 - MacroTileA: 192 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 32 + MacroTileA: 128 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -705413,14 +704630,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 12 - NumLoadsB: 1 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -705506,8 +704723,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2702 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x16x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU80_LBSPPA3072_LBSPPB256_LPA16_MIWT3_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2699 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU69_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -705515,17 +704732,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -705536,17 +704753,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] + WorkspaceCheck: [4, 0, 69] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -705557,7 +704774,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -705573,7 +704790,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -705586,10 +704803,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 68 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -705600,37 +704817,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37376 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 62720 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 57600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37376 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 24832 + LdsOffsetMetadata_Blk: 57600 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -705645,15 +704862,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 16 - MacroTileA: 128 - MacroTileB: 16 + MacroTile0: 192 + MacroTile1: 32 + MacroTileA: 192 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -705674,13 +704891,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 NumLoadsB: 1 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 @@ -705767,8 +704984,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2703 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2700 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU68_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -705776,17 +704993,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -705797,21 +705014,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 68] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -705834,7 +705051,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -705846,8 +705063,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 80 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 35 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -705861,22 +705078,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 4 - LVCA: 32 - LVCB: 32 - LVPA: 1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 + LdsNumBytes: 41984 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -705885,13 +705102,13 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 + LdsOffsetMetadata: 41984 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -705906,15 +705123,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 16 - MacroTileA: 256 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 32 + MacroTileA: 128 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -706028,8 +705245,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2704 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU80_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2701 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU35_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -706038,16 +705255,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -706061,18 +705278,18 @@ VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 35] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -706107,11 +705324,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 80 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -706122,33 +705339,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x16x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_MIWT5_1_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 32 - LSPB: 4 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 5120 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43776 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43776 - LdsOffsetMetadata_Blk: 106752 - LdsPadA: 16 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -706168,14 +705385,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 1] - MIWaveTileA: 5 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 16 - MacroTileA: 320 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 32 + MacroTileA: 256 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -706196,14 +705413,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 10 - NumLoadsB: 2 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -706289,8 +705506,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2705 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x16x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU80_LBSPPA5120_LBSPPB128_LPA16_MIWT5_1_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2702 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -706298,17 +705515,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 1 - ThreadTileA: 20 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -706319,17 +705536,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] + WorkspaceCheck: [4, 0, 64] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -706368,11 +705585,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 80 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -706383,33 +705600,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x16x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA6144_LBSPPB128_LPA32_MIWT6_1_NLCA3_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x32x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIWT5_2_NLCA5_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 6144 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 49664 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 46336 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 49664 - LdsOffsetB_Blk: 115200 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 115200 - LdsPadA: 32 + LdsOffsetMetadata: 46336 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -706429,14 +705646,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [6, 1] - MIWaveTileA: 6 - MIWaveTileB: 1 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 16 - MacroTileA: 384 - MacroTileB: 16 + MacroTile0: 320 + MacroTile1: 32 + MacroTileA: 320 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -706457,14 +705674,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 12 - NumLoadsB: 2 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 10 + NumLoadsB: 1 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -706550,8 +705767,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2706 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x16x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU80_LBSPPA6144_LBSPPB128_LPA32_MIWT6_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2703 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x32x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIWT5_2_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -706559,17 +705776,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 1 - ThreadTileA: 24 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 2 + ThreadTileA: 20 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -706580,7 +705797,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -706590,7 +705807,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] + WorkspaceCheck: [4, 0, 64] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -706617,7 +705834,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -706630,10 +705847,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -706644,37 +705861,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x32x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIWT6_2_NLCA3_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 LSCA: 128 - LSCB: 128 + LSCB: 64 LSPA: 16 - LSPB: 16 + LSPB: 32 LVCA: 16 - LVCB: 16 + LVCB: 8 LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 6144 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37376 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 49664 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 49664 + LdsOffsetB_Blk: 115200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37376 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 115200 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -706689,15 +705906,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 16 - MacroTileA: 128 - MacroTileB: 16 + MacroTile0: 384 + MacroTile1: 32 + MacroTileA: 384 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -706718,13 +705935,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 12 NumLoadsB: 1 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 @@ -706811,8 +706028,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2707 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2704 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x32x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIWT6_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -706820,17 +706037,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 + StoreVectorWidth: 2 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 2 + ThreadTileA: 24 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -706841,21 +706058,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 64] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -706890,8 +706107,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 39 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -706905,22 +706122,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_2_2 LSCA: 256 LSCB: 64 LSPA: 8 LSPB: 4 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 1 - LVPB: 2 - LdsBlockSizePerPadA: 4096 + LVPB: 1 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 + LdsNumBytes: 65536 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -706929,44 +706146,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 + LdsOffsetMetadata: 37376 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] + MIWaveGroup: [2, 1] MIWaveTile: [4, 1] MIWaveTileA: 4 MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 16 + MacroTile1: 32 MacroTileA: 256 - MacroTileB: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -706979,14 +706196,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -707072,8 +706289,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2708 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU39_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2705 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU32_LBSPPA0_LBSPPB128_LPA0_LPB8_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_2_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -707082,15 +706299,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 64 ThreadTile1: 1 - ThreadTileA: 16 + ThreadTileA: 64 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -707108,11 +706325,11 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [64, 2, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 39] + WorkspaceCheck: [4, 0, 32] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -707139,7 +706356,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -707152,10 +706369,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -707166,33 +706383,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -707200,8 +706417,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -707212,14 +706429,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 16 - MacroTileA: 128 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 32 + MacroTileA: 256 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -707240,8 +706457,8 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 NumLoadsB: 1 NumLoadsCoalescedA: 1 @@ -707333,8 +706550,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2709 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2706 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU32_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -707342,17 +706559,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -707363,21 +706580,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 32] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -707400,7 +706617,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -707412,11 +706629,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 26 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -707427,33 +706644,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -707461,8 +706678,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -707473,14 +706690,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 16 - MacroTileA: 256 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 32 + MacroTileA: 128 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -707502,7 +706719,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 NumLoadsB: 2 NumLoadsCoalescedA: 1 @@ -707594,8 +706811,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2710 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU26_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2707 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -707603,17 +706820,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -707624,7 +706841,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -707634,11 +706851,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 26] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 16] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -707661,7 +706878,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -707674,7 +706891,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 10 + GlobalSplitU: 23 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -707688,22 +706905,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37376 + LdsNumBytes: 37888 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 4608 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -707712,13 +706929,13 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37376 + LdsOffsetMetadata: 37888 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -707733,15 +706950,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 1] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 16 - MacroTileA: 128 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 32 + MacroTileA: 256 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -707762,8 +706979,8 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 NumLoadsB: 1 NumLoadsCoalescedA: 1 @@ -707855,8 +707072,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2711 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x16x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA2048_LBSPPB256_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2708 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU23_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -707865,16 +707082,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -707888,18 +707105,18 @@ VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 23] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -707934,7 +707151,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -707949,22 +707166,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 LSCA: 256 LSCB: 64 LSPA: 8 - LSPB: 4 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 1 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 + LdsNumBytes: 37888 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -707973,7 +707190,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 + LdsOffsetMetadata: 37888 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 @@ -707995,14 +707212,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 16 + MacroTile1: 32 MacroTileA: 256 - MacroTileB: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -708023,14 +707240,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -708116,8 +707333,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2712 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU20_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2709 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -708133,9 +707350,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -708149,7 +707366,7 @@ VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] @@ -708195,8 +707412,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 16 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -708210,22 +707427,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 LSCA: 256 LSCB: 64 LSPA: 8 LSPB: 4 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 1 - LVPB: 2 + LVPB: 1 LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 + LdsNumBytes: 37888 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -708234,7 +707451,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 + LdsOffsetMetadata: 37888 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 @@ -708256,14 +707473,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 16 + MacroTile1: 32 MacroTileA: 256 - MacroTileB: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -708284,14 +707501,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -708377,8 +707594,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2713 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU16_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2710 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -708394,9 +707611,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -708417,7 +707634,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 20] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -708456,8 +707673,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 13 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -708471,22 +707688,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 LSCA: 256 LSCB: 64 LSPA: 8 LSPB: 4 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 1 - LVPB: 2 + LVPB: 1 LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 + LdsNumBytes: 37888 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -708495,7 +707712,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 + LdsOffsetMetadata: 37888 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 @@ -708517,14 +707734,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 16 + MacroTile1: 32 MacroTileA: 256 - MacroTileB: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -708545,14 +707762,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -708638,8 +707855,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2714 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU13_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2711 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -708655,9 +707872,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -708678,7 +707895,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 13] + WorkspaceCheck: [4, 0, 16] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -708717,8 +707934,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 11 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 13 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -708732,22 +707949,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 LSCA: 256 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 4 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 1 - LVPB: 4 + LVPB: 1 LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 + LdsNumBytes: 37888 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -708756,7 +707973,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 + LdsOffsetMetadata: 37888 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 @@ -708778,14 +707995,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 16 + MacroTile1: 32 MacroTileA: 256 - MacroTileB: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -708806,14 +708023,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -708899,8 +708116,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2715 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU11_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2712 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU13_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -708916,9 +708133,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -708932,14 +708149,14 @@ VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] + WorkspaceCheck: [4, 0, 13] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -708966,7 +708183,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -708977,14 +708194,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 10 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 39 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -708993,42 +708210,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPB1024_MIWT1_1_NLCB1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 512 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 64 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 33792 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -709038,15 +708255,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 16 - MacroTileA: 256 - MacroTileB: 16 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -709067,14 +708284,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 32 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -709160,8 +708377,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2716 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU10_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2713 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPB1024_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -709169,16 +708386,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 4 ThreadTile1: 1 - ThreadTileA: 16 + ThreadTileA: 4 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -709190,23 +708407,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 39] + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -709227,7 +708444,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -709239,11 +708456,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 38 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -709254,42 +708471,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 512 + LSPA: 128 LSPB: 4 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 2 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LVCA: 2 + LVCB: 64 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 33792 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -709299,15 +708516,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 16 - MacroTileA: 256 - MacroTileB: 16 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -709328,14 +708545,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -709421,8 +708638,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2717 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU8_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2714 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU38_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -709430,16 +708647,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 4 ThreadTile1: 1 - ThreadTileA: 16 + ThreadTileA: 4 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -709451,21 +708668,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 38] + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -709488,7 +708705,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -709500,11 +708717,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -709515,42 +708732,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCB1_SVW2_VWA2_WSGRB2_WG16_8_2 + LSCA: 32 + LSCB: 256 + LSPA: 64 + LSPB: 4 + LVCA: 4 LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -709560,15 +708777,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 1] + MIWaveTileA: 2 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 16 - MacroTileA: 256 - MacroTileB: 16 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -709589,14 +708806,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -709682,8 +708899,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2718 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU8_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2715 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU32_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -709691,16 +708908,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 8 ThreadTile1: 1 - ThreadTileA: 16 + ThreadTileA: 8 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -709712,21 +708929,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 32] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -709749,7 +708966,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -709761,11 +708978,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 7 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -709776,42 +708993,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_2 + LSCA: 32 + LSCB: 256 + LSPA: 64 + LSPB: 4 + LVCA: 4 LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -709821,15 +709038,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 16 - MacroTileA: 256 - MacroTileB: 16 + MacroTile0: 32 + MacroTile1: 48 + MacroTileA: 32 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -709850,14 +709067,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -709943,8 +709160,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2719 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x16x64_MI16x16x1_SN_GRVWB2_GSU7_LBSPPA4096_LBSPPB128_LPA0_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2716 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -709952,17 +709169,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 + StoreVectorWidth: 1 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -709973,28 +709190,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 7] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 40] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -710010,7 +709227,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -710022,11 +709239,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 10 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -710037,33 +709254,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x16x64_MI16x16x1_SN_GRVWB2_LBSPPA6144_LBSPPB128_LPA32_MIWT6_1_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 4 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 6144 - LdsBlockSizePerPadB: 128 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 49664 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 49664 - LdsOffsetB_Blk: 115200 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 115200 - LdsPadA: 32 + LdsOffsetMetadata: 16896 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -710071,8 +709288,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -710083,14 +709300,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [6, 1] - MIWaveTileA: 6 - MIWaveTileB: 1 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 16 - MacroTileA: 384 - MacroTileB: 16 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -710111,14 +709328,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 + NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 12 - NumLoadsB: 2 - NumLoadsCoalescedA: 3 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -710204,8 +709421,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2720 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x16x64_MI16x16x1_SN_GRVWB2_GSU10_LBSPPA6144_LBSPPB128_LPA32_MIWT6_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2717 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU80_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -710213,17 +709430,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 1 - ThreadTileA: 24 - ThreadTileB: 1 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -710234,7 +709451,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -710244,11 +709461,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 80] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -710271,7 +709488,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -710282,14 +709499,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 75 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -710298,33 +709515,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPB512_MIWT1_1_NLCB1_WSGRB0_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 16 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -710332,8 +709549,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -710343,15 +709560,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -710372,14 +709589,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 16 - NumLoadsB: 4 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -710465,8 +709682,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2721 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU75_LBSPPB512_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_8_2_WGM1 + SolutionIndex: 2718 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU40_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -710474,17 +709691,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -710495,28 +709712,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 75] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 40] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -710532,7 +709749,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -710543,14 +709760,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 79 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -710559,33 +709776,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPB1024_MIWT1_1_NLCB1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 512 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 4 - LVCA: 16 - LVCB: 64 - LVPA: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 33792 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -710593,8 +709810,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -710604,15 +709821,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -710633,14 +709850,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 32 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -710726,8 +709943,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2722 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU79_LBSPPB1024_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2719 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU40_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -710735,17 +709952,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -710756,28 +709973,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 79] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + WorkspaceCheck: [4, 0, 40] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -710793,7 +710010,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -710806,10 +710023,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 74 + GlobalSplitU: 72 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -710820,33 +710037,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_1 - LSCA: 16 - LSCB: 256 - LSPA: 64 - LSPB: 2 - LVCA: 2 - LVCB: 32 - LVPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 2 LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 47616 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 16 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -710854,8 +710071,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -710865,15 +710082,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -710894,15 +710111,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -710987,8 +710204,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2723 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWB8_GSU74_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_1_WGM1 + SolutionIndex: 2720 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU72_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -710996,17 +710213,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -711017,21 +710234,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 74] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 72] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -711054,7 +710271,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -711067,10 +710284,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 76 + GlobalSplitU: 36 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -711081,42 +710298,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 256 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 LSPB: 4 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LVCA: 16 + LVCB: 16 + LVPA: 2 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 + LdsOffsetMetadata: 46592 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -711126,15 +710343,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 32 - MacroTileA: 32 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -711155,14 +710372,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -711248,8 +710465,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2724 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU76_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2721 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU36_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -711257,17 +710474,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -711278,21 +710495,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 76] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 36] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -711315,7 +710532,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -711327,11 +710544,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 68 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -711342,42 +710559,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCB1_SVW2_VWA2_WSGRB2_WG16_8_2 - LSCA: 32 - LSCB: 256 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 LSPB: 4 - LVCA: 4 + LVCA: 32 LVCB: 32 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 1 + LVPB: 2 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 32 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -711387,15 +710604,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 32 - MacroTileA: 32 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 48 + MacroTileA: 256 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -711416,14 +710633,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -711509,8 +710726,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2725 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2722 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU68_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -711518,17 +710735,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -711539,28 +710756,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 68] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -711576,7 +710793,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -711588,11 +710805,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 76 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 67 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -711603,33 +710820,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x48x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIWT5_3_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 LSCA: 64 - LSCB: 128 + LSCB: 64 LSPA: 32 LSPB: 4 LVCA: 8 - LVCB: 16 + LVCB: 32 LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LVPB: 2 + LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 48896 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 32 + LdsOffsetMetadata: 48896 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -711637,8 +710854,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -711648,15 +710865,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 320 + MacroTile1: 48 + MacroTileA: 320 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -711677,14 +710894,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 10 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -711770,8 +710987,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2726 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU76_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2723 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x48x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU67_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIWT5_3_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -711779,17 +710996,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -711800,28 +711017,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 76] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 67] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -711837,7 +711054,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -711849,8 +711066,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 38 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 66 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -711864,37 +711081,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x48x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 6144 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 57344 + LdsNumElementsAlignedA: 49664 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 49664 + LdsOffsetB_Blk: 115200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 57344 + LdsOffsetMetadata_Blk: 115200 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -711909,15 +711126,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 384 + MacroTile1: 48 + MacroTileA: 384 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -711938,14 +711155,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -712031,8 +711248,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2727 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU38_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2724 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x48x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU66_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -712041,16 +711258,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -712067,15 +711284,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 38] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 66] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -712111,10 +711328,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 69 + GlobalSplitU: 17 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -712125,42 +711342,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 - LSPB: 4 + LSPB: 16 LVCA: 16 LVCB: 16 LVPA: 2 - LVPB: 1 + LVPB: 2 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 46592 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -712170,15 +711387,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 32 + MacroTile1: 48 MacroTileA: 128 - MacroTileB: 32 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -712199,14 +711416,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -712292,8 +711509,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2728 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU69_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2725 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU17_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -712301,17 +711518,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 + StoreVectorWidth: 4 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -712322,17 +711539,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 69] + WorkspaceCheck: [4, 0, 17] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -712343,7 +711560,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -712371,11 +711588,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 68 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 36 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -712386,33 +711603,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62720 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 57600 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 24832 - LdsOffsetMetadata_Blk: 57600 - LdsPadA: 16 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -712432,14 +711649,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 32 - MacroTileA: 192 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 48 + MacroTileA: 256 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -712460,14 +711677,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 1 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -712553,8 +711770,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2729 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU68_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2726 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_GSU36_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -712562,17 +711779,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -712583,7 +711800,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -712593,7 +711810,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 68] + WorkspaceCheck: [4, 0, 36] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -712633,10 +711850,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 35 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -712647,42 +711864,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 LSCA: 128 LSCB: 128 LSPA: 16 - LSPB: 16 + LSPB: 4 LVCA: 16 LVCB: 16 LVPA: 2 - LVPB: 2 + LVPB: 1 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 47616 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -712692,15 +711909,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 32 + MacroTile1: 48 MacroTileA: 128 - MacroTileB: 32 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -712721,14 +711938,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -712814,8 +712031,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2730 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU35_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2727 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -712823,17 +712040,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 + StoreVectorWidth: 2 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -712844,17 +712061,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 35] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -712893,8 +712110,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 24 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -712908,22 +712125,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 LSCA: 256 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 1 LVPB: 4 LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 + LdsNumBytes: 40448 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 5120 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -712932,7 +712149,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 + LdsOffsetMetadata: 40448 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 @@ -712954,14 +712171,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 32 + MacroTile1: 48 MacroTileA: 256 - MacroTileB: 32 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -712982,14 +712199,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 1 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -713075,8 +712292,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2731 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2728 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_GSU24_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -713092,9 +712309,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -713115,7 +712332,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] + WorkspaceCheck: [4, 0, 24] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -713154,11 +712371,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -713169,33 +712386,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x32x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIWT5_2_NLCA5_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 4 - LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46336 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46336 - LdsOffsetMetadata_Blk: 106752 - LdsPadA: 16 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -713215,14 +712432,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 32 - MacroTileA: 320 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 48 + MacroTileA: 256 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -713243,14 +712460,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 10 - NumLoadsB: 1 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -713336,8 +712553,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2732 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x32x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIWT5_2_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2729 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_GSU20_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -713345,17 +712562,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 2 - ThreadTileA: 20 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -713366,7 +712583,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -713376,7 +712593,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] + WorkspaceCheck: [4, 0, 20] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -713415,11 +712632,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -713430,33 +712647,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x32x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIWT6_2_NLCA3_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 LSCB: 64 - LSPA: 16 - LSPB: 32 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 6144 + LSPA: 8 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 2 + LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 49664 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 49664 - LdsOffsetB_Blk: 115200 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 115200 - LdsPadA: 32 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -713476,14 +712693,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 32 - MacroTileA: 384 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 48 + MacroTileA: 256 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -713505,13 +712722,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 12 - NumLoadsB: 1 - NumLoadsCoalescedA: 3 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -713597,8 +712814,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2733 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x32x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIWT6_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2730 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_GSU20_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -713606,17 +712823,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 2 - ThreadTileA: 24 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -713627,17 +712844,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] + WorkspaceCheck: [4, 0, 20] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -713664,7 +712881,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -713675,14 +712892,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 75 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -713691,68 +712908,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIWT4_1_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_2_2 - LSCA: 256 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 256 + LSPA: 16 LSPB: 4 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LVCA: 16 + LVCB: 32 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37376 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 32 - MacroTileA: 256 - MacroTileB: 32 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -713765,14 +712982,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 1 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 16 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -713858,8 +713075,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2734 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU32_LBSPPA0_LBSPPB128_LPA0_LPB8_MIWT4_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_2_2_WGM1 + SolutionIndex: 2731 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU75_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -713867,17 +713084,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 32 SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 1 - ThreadTileA: 64 - ThreadTileB: 1 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -713888,23 +713105,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 2, 2] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 75] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -713925,7 +713142,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -713938,10 +713155,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 75 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -713952,33 +713169,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 256 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 32 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -713986,8 +713203,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -713997,15 +713214,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 32 - MacroTileA: 256 - MacroTileB: 32 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -714026,14 +713243,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 1 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -714119,8 +713336,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2735 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU32_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2732 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU75_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -714128,17 +713345,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -714149,28 +713366,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 75] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -714199,7 +713416,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 79 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -714213,32 +713430,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 + LSPA: 64 + LSPB: 4 + LVCA: 4 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 41984 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -714258,15 +713475,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 2] + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 32 - MacroTileA: 128 - MacroTileB: 32 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -714287,14 +713504,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -714380,8 +713597,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2736 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2733 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU79_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -714390,16 +713607,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 2 + ThreadTile1: 1 ThreadTileA: 8 - ThreadTileB: 2 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -714413,14 +713630,14 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 79] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -714431,7 +713648,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -714447,7 +713664,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -714460,10 +713677,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 23 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -714474,33 +713691,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_1_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 12800 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -714508,8 +713725,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -714519,15 +713736,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 32 - MacroTileA: 256 - MacroTileB: 32 + MacroTile0: 48 + MacroTile1: 64 + MacroTileA: 48 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -714548,14 +713765,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 1 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 3 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -714641,8 +713858,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2737 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU23_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2734 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU80_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -714650,17 +713867,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -714671,21 +713888,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 23] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 80] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -714708,7 +713925,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -714721,10 +713938,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -714735,33 +713952,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 4 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -714769,8 +713986,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -714780,15 +713997,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 32 - MacroTileA: 256 - MacroTileB: 32 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -714809,14 +714026,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 + NumElementsPerThread: 16 NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 1 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -714902,8 +714119,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2738 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2735 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -714911,16 +714128,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 8 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 8 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -714932,21 +714149,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 64] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -714969,7 +714186,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -714982,10 +714199,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -714996,33 +714213,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 LSPB: 4 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LVCA: 4 + LVCB: 16 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -715030,8 +714247,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -715041,15 +714258,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 32 - MacroTileA: 256 - MacroTileB: 32 + MacroTile0: 96 + MacroTile1: 64 + MacroTileA: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -715070,14 +714287,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 1 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -715163,8 +714380,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2739 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2736 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -715172,16 +714389,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 12 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 12 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -715193,21 +714410,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 64] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -715230,7 +714447,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -715243,10 +714460,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 68 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -715257,33 +714474,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 LSPB: 4 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LVCA: 4 + LVCB: 16 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -715291,8 +714508,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -715302,15 +714519,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 32 - MacroTileA: 256 - MacroTileB: 32 + MacroTile0: 96 + MacroTile1: 64 + MacroTileA: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -715331,14 +714548,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 1 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -715424,8 +714641,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2740 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2737 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU68_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -715433,16 +714650,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 12 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 12 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -715454,21 +714671,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 68] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -715491,7 +714708,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -715504,10 +714721,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 13 + GlobalSplitU: 33 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -715518,37 +714735,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_4_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 4 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LVCA: 8 + LVCB: 16 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -715563,15 +714780,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 32 - MacroTileA: 256 - MacroTileB: 32 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -715592,14 +714809,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 + NumElementsPerThread: 16 NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 1 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -715685,8 +714902,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2741 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x32x64_MI16x16x1_SN_GRVWB8_GSU13_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2738 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU33_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -715694,17 +714911,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -715715,21 +714932,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 13] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 33] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -715752,7 +714969,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -715763,14 +714980,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 39 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -715779,42 +714996,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPB1024_MIWT1_1_NLCB1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 4 + LSPB: 16 LVCA: 16 - LVCB: 64 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 1024 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 33792 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -715824,15 +715041,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -715853,14 +715070,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 32 - NumLoadsB: 8 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -715946,8 +715163,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2742 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPB1024_MIWT1_1_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2739 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -715955,17 +715172,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -715976,28 +715193,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 39] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + WorkspaceCheck: [4, 0, 64] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -716013,7 +715230,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -716026,7 +715243,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 38 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -716040,42 +715257,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 512 - LSPA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x64x64_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIWT5_2_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 LSPB: 4 - LVCA: 2 - LVCB: 64 - LVPA: 16 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 33792 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 53504 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 20736 + LdsOffsetMetadata_Blk: 53504 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -716085,15 +715302,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 160 + MacroTile1: 64 + MacroTileA: 160 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -716114,14 +715331,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 + NumLoadsB: 2 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -716207,8 +715424,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2743 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU38_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2740 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x64x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU64_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIWT5_2_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -716217,16 +715434,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 2 + ThreadTileA: 20 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -716243,15 +715460,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 38] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + WorkspaceCheck: [4, 0, 64] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -716274,7 +715491,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -716287,10 +715504,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -716301,42 +715518,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCB1_SVW2_VWA2_WSGRB2_WG16_8_2 - LSCA: 32 - LSCB: 256 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_4_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 LSPB: 4 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 35072 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 32 + LdsOffsetMetadata: 35072 + LdsOffsetMetadata_Blk: 90368 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -716346,15 +715563,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 32 - MacroTileA: 32 - MacroTileB: 32 + MacroTile0: 192 + MacroTile1: 64 + MacroTileA: 192 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -716375,14 +715592,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -716468,8 +715685,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2744 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU32_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2741 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -716477,17 +715694,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -716498,21 +715715,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -716535,7 +715752,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -716548,10 +715765,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 31 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -716562,34 +715779,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_2 - LSCA: 32 - LSCB: 256 - LSPA: 64 - LSPB: 4 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG64_2_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 2 @@ -716597,10 +715814,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -716608,22 +715825,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 1] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 48 - MacroTileA: 32 - MacroTileB: 48 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -716636,14 +715853,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -716729,8 +715946,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2745 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2742 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA0_LBSPPB256_LPA0_LPB8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_2_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -716738,17 +715955,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -716759,28 +715976,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 2, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 31] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -716796,7 +716013,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -716809,10 +716026,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 80 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -716823,34 +716040,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 LSPB: 4 - LVCA: 8 - LVCB: 16 - LVPA: 4 + LVCA: 32 + LVCB: 8 + LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 16896 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -716858,10 +716075,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -716869,22 +716086,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 64 + MacroTileA: 256 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -716897,14 +716114,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -716990,8 +716207,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2746 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU80_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2743 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -716999,17 +716216,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -717020,28 +716237,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -717057,7 +716274,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -717070,7 +716287,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -717084,44 +716301,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x64x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 1 + LdsBlockSizePerPadA: 6144 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 49664 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 49664 + LdsOffsetB_Blk: 115200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 115200 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -717129,15 +716346,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 384 + MacroTile1: 64 + MacroTileA: 384 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -717158,14 +716375,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 3 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 12 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -717251,8 +716468,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2747 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU40_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2744 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x64x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -717261,16 +716478,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -717284,25 +716501,25 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -717331,10 +716548,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -717345,42 +716562,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_8_1 + LSCA: 128 LSCB: 128 - LSPA: 32 - LSPB: 4 - LVCA: 8 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 1024 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 32 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -717390,15 +716607,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -717419,14 +716636,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -717512,8 +716729,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2748 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU40_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2745 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -717521,17 +716738,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -717542,17 +716759,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] + WorkspaceCheck: [4, 0, 20] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -717579,7 +716796,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -717592,10 +716809,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 72 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -717606,33 +716823,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_4_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47616 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -717640,8 +716857,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -717652,14 +716869,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 64 + MacroTileA: 256 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -717680,14 +716897,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 8 - NumLoadsB: 3 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -717773,8 +716990,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2749 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU72_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2746 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_GSU32_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -717782,17 +716999,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -717803,21 +717020,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 72] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 32] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -717853,7 +717070,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 36 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -717867,7 +717084,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -717880,9 +717097,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 + LdsNumBytes: 51200 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -717891,18 +717108,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46592 + LdsOffsetMetadata: 51200 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -717912,15 +717129,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 48 + MacroTile1: 64 MacroTileA: 128 - MacroTileB: 48 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -717941,14 +717158,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 3 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -718034,8 +717251,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2750 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU36_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2747 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -718045,15 +717262,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -718070,11 +717287,11 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 36] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -718113,8 +717330,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 68 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 21 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -718128,22 +717345,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_4_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 LSCA: 256 LSCB: 64 LSPA: 8 - LSPB: 4 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 1 - LVPB: 2 + LVPB: 4 LdsBlockSizePerPadA: 4096 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 + LdsNumBytes: 43008 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 7680 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -718152,7 +717369,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 + LdsOffsetMetadata: 43008 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 @@ -718174,14 +717391,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 3] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 48 + MacroTile1: 64 MacroTileA: 256 - MacroTileB: 48 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -718202,14 +717419,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -718295,8 +717512,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2751 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU68_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2748 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_GSU21_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -718312,9 +717529,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 4 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -718328,14 +717545,14 @@ VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 68] + WorkspaceCheck: [4, 0, 21] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -718362,7 +717579,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -718373,14 +717590,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 67 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 26 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -718389,42 +717606,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x48x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIWT5_3_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 512 + LSPA: 16 LSPB: 4 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 5120 - LdsBlockSizePerPadB: 128 + LVCA: 16 + LVCB: 64 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48896 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 33792 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48896 - LdsOffsetMetadata_Blk: 106752 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -718434,15 +717651,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 48 - MacroTileA: 320 - MacroTileB: 48 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -718463,14 +717680,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 10 - NumLoadsB: 6 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 32 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -718556,8 +717773,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2752 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x48x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU67_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIWT5_3_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2749 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU26_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -718566,16 +717783,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -718592,17 +717809,17 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 67] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 26] + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -718623,7 +717840,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -718635,11 +717852,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 66 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 26 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -718650,42 +717867,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x48x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 6144 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 512 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 64 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57344 - LdsNumElementsAlignedA: 49664 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 33792 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 49664 - LdsOffsetB_Blk: 115200 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57344 - LdsOffsetMetadata_Blk: 115200 - LdsPadA: 32 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -718695,15 +717912,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 48 - MacroTileA: 384 - MacroTileB: 48 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -718724,14 +717941,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -718817,8 +718034,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2753 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x48x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU66_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2750 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU26_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -718826,17 +718043,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -718847,21 +718064,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 66] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 26] + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -718884,7 +718101,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -718897,10 +718114,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 17 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -718911,42 +718128,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 + LSCB: 256 + LSPA: 64 + LSPB: 4 + LVCA: 4 + LVCB: 32 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46592 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -718956,15 +718173,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -718985,14 +718202,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -719078,8 +718295,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2754 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU17_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2751 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -719087,17 +718304,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -719108,21 +718325,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 17] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 40] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -719145,7 +718362,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -719157,11 +718374,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 36 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -719172,42 +718389,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x80x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_2 + LSCA: 32 + LSCB: 256 + LSPA: 64 + LSPB: 4 + LVCA: 4 LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -719217,15 +718434,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 48 - MacroTileA: 256 - MacroTileB: 48 + MacroTile0: 32 + MacroTile1: 80 + MacroTileA: 32 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -719246,14 +718463,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -719339,8 +718556,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2755 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_GSU36_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2752 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x80x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -719348,17 +718565,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 + StoreVectorWidth: 1 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -719369,21 +718586,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 36] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 40] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -719419,10 +718636,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 72 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -719433,33 +718650,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 LSCB: 128 - LSPA: 16 + LSPA: 32 LSPB: 4 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 2 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47616 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 39936 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 39936 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -719479,14 +718696,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 64 + MacroTile1: 80 + MacroTileA: 64 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -719507,14 +718724,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -719600,8 +718817,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2756 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2753 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU72_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -719609,17 +718826,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -719630,7 +718847,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -719640,7 +718857,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 72] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -719667,7 +718884,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -719679,11 +718896,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 24 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 36 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -719694,37 +718911,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 4 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -719739,15 +718956,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 48 - MacroTileA: 256 - MacroTileB: 48 + MacroTile0: 64 + MacroTile1: 80 + MacroTileA: 64 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -719768,14 +718985,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -719861,8 +719078,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2757 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_GSU24_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2754 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU36_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -719870,17 +719087,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -719891,21 +719108,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 24] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 36] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -719928,7 +719145,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -719940,11 +719157,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 20 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 66 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -719955,33 +719172,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -719989,8 +719206,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -720001,14 +719218,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 48 - MacroTileA: 256 - MacroTileB: 48 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -720029,14 +719246,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -720122,8 +719339,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2758 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_GSU20_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2755 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU66_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -720131,17 +719348,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -720152,21 +719369,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 66] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -720202,10 +719419,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 20 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -720216,33 +719433,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 4 - LVCA: 32 + LVCA: 8 LVCB: 32 - LVPA: 1 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 37632 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 37632 + LdsOffsetMetadata_Blk: 90368 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -720262,14 +719479,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 48 - MacroTileA: 256 - MacroTileB: 48 + MacroTile0: 192 + MacroTile1: 80 + MacroTileA: 192 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -720290,14 +719507,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -720383,8 +719600,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2759 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_GRVWB2_GSU20_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2756 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -720392,17 +719609,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -720413,7 +719630,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -720423,7 +719640,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] + WorkspaceCheck: [4, 0, 64] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -720450,7 +719667,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -720461,14 +719678,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 75 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -720477,42 +719694,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 16 - LSPB: 4 - LVCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 37632 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 37632 + LdsOffsetMetadata_Blk: 90368 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -720522,15 +719739,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 80 + MacroTileA: 192 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -720551,14 +719768,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 16 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 10 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -720644,8 +719861,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2760 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU75_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2757 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -720654,16 +719871,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -720677,20 +719894,20 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 75] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 64] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -720711,7 +719928,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -720724,10 +719941,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 75 + GlobalSplitU: 34 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -720738,33 +719955,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 256 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -720772,8 +719989,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -720783,15 +720000,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -720812,14 +720029,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -720905,8 +720122,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2761 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU75_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2758 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU34_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -720914,17 +720131,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -720935,28 +720152,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 75] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 34] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -720972,7 +720189,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -720984,11 +720201,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 79 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -720999,33 +720216,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 LSPB: 4 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 2 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 32 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -721033,8 +720250,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -721044,15 +720261,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -721073,14 +720290,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -721166,8 +720383,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2762 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU79_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2759 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -721175,17 +720392,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -721196,28 +720413,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 79] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 64] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -721233,7 +720450,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -721245,11 +720462,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 80 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -721260,33 +720477,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_1_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x80x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_5_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 LSPB: 4 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 6144 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 49664 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 49664 + LdsOffsetB_Blk: 115200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 12800 - LdsOffsetMetadata_Blk: 45568 - LdsPadA: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 115200 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -721294,10 +720511,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -721305,15 +720522,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 64 - MacroTileA: 48 - MacroTileB: 64 + MacroTile0: 384 + MacroTile1: 80 + MacroTileA: 384 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -721334,14 +720551,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 3 - NumLoadsB: 4 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 10 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -721427,8 +720644,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2763 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU80_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2760 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x80x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU57_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -721436,17 +720653,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -721457,21 +720674,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -721507,7 +720724,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -721521,32 +720738,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 LSCB: 128 - LSPA: 32 + LSPA: 16 LSPB: 4 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 2 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -721566,15 +720783,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -721595,14 +720812,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -721688,8 +720905,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2764 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2761 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -721698,16 +720915,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 2 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 2 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -721724,11 +720941,11 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] + WorkspaceCheck: [4, 0, 20] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -721755,7 +720972,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -721767,11 +720984,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 36 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -721782,33 +720999,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 LSPB: 4 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 256 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 2 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 16 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -721816,8 +721033,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -721827,15 +721044,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 64 - MacroTileA: 96 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -721856,14 +721073,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -721949,8 +721166,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2765 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2762 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU36_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -721958,17 +721175,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -721979,21 +721196,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 36] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -722029,10 +721246,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 68 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -722043,33 +721260,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 LSCB: 128 - LSPA: 64 + LSPA: 16 LSPB: 4 - LVCA: 4 + LVCA: 16 LVCB: 16 - LVPA: 8 + LVPA: 2 LVPB: 1 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 16 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -722088,15 +721305,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 64 - MacroTileA: 96 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -722117,14 +721334,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -722210,8 +721427,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2766 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU68_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2763 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -722219,17 +721436,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -722240,17 +721457,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 68] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -722290,7 +721507,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 33 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -722304,42 +721521,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_4_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 + LSCA: 128 LSCB: 128 - LSPA: 32 - LSPB: 4 - LVCA: 8 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 1024 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -722349,15 +721566,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 4] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -722378,14 +721595,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -722471,8 +721688,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2767 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU33_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2764 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -722481,16 +721698,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -722504,14 +721721,14 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 33] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -722538,7 +721755,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -722549,14 +721766,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 75 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -722565,37 +721782,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_8_1 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 256 LSPA: 16 - LSPB: 16 + LSPB: 4 LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + LVCB: 32 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -722610,15 +721827,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -722639,14 +721856,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 16 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -722732,8 +721949,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2768 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_8_1_WGM1 + SolutionIndex: 2765 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU75_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -722741,17 +721958,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -722762,28 +721979,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 75] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -722799,7 +722016,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -722812,7 +722029,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -722826,32 +722043,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x64x64_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIWT5_2_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 LSCA: 32 - LSCB: 64 + LSCB: 128 LSPA: 64 LSPB: 4 LVCA: 4 - LVCB: 8 + LVCB: 16 LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 36352 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 53504 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 20736 - LdsOffsetMetadata_Blk: 53504 + LdsOffsetMetadata: 36352 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -722860,8 +722077,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -722872,14 +722089,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 64 - MacroTileA: 160 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 96 + MacroTileA: 32 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -722900,14 +722117,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 - NumLoadsB: 2 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -722993,8 +722210,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2769 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x64x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU64_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIWT5_2_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2766 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU80_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -723009,10 +722226,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 2 - ThreadTileA: 20 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -723033,11 +722250,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 80] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -723060,7 +722277,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -723073,10 +722290,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -723087,37 +722304,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_4_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_8_2 + LSCA: 32 + LSCB: 128 + LSPA: 64 LSPB: 4 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LVCA: 4 + LVCB: 16 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35072 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35072 - LdsOffsetMetadata_Blk: 90368 - LdsPadA: 16 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -723132,15 +722349,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 64 - MacroTileA: 192 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 96 + MacroTileA: 32 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -723161,14 +722378,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 2 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 2 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -723254,8 +722471,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2770 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2767 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -723263,17 +722480,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 4 - ThreadTileA: 12 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -723284,21 +722501,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 40] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -723334,7 +722551,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 31 + GlobalSplitU: 68 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -723348,68 +722565,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG64_2_2 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 + LSPA: 32 + LSPB: 4 + LVCA: 8 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 0 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -723422,14 +722639,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -723515,8 +722732,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2771 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA0_LBSPPB256_LPA0_LPB8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_2_2_WGM1 + SolutionIndex: 2768 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU68_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -723525,16 +722742,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -723548,14 +722765,14 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 2, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 31] + WorkspaceCheck: [4, 0, 68] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -723582,7 +722799,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -723595,10 +722812,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 68 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -723609,34 +722826,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_3_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 LSPB: 4 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LVCA: 4 + LVCB: 16 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -723644,33 +722861,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 64 - MacroTileA: 256 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -723683,14 +722900,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 2 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -723776,8 +722993,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2772 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 + SolutionIndex: 2769 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU68_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -723785,17 +723002,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -723806,28 +723023,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 68] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -723856,10 +723073,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 68 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -723870,33 +723087,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x64x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x64_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_MIWT3_3_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 16 + LSPA: 64 LSPB: 4 - LVCA: 16 + LVCA: 4 LVCB: 8 - LVPA: 2 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 6144 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 49664 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 60672 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 49664 - LdsOffsetB_Blk: 115200 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 45312 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 115200 - LdsPadA: 32 + LdsOffsetMetadata: 12544 + LdsOffsetMetadata_Blk: 45312 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -723907,7 +723124,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -723915,15 +723132,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 64 - MacroTileA: 384 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -723944,14 +723161,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 12 - NumLoadsB: 2 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 3 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -724037,8 +723254,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2773 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x64x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2770 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU68_LBSPPA1536_LBSPPB128_LPA16_LPB16_MIWT3_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -724046,17 +723263,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -724067,17 +723284,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] + WorkspaceCheck: [4, 0, 68] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -724117,7 +723334,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 33 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -724131,42 +723348,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_8_2 + LSCA: 64 LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 + LSPA: 32 + LSPB: 4 + LVCA: 8 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -724176,15 +723393,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [1, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -724205,14 +723422,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -724298,8 +723515,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2774 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_8_1_WGM1 + SolutionIndex: 2771 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU33_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -724308,16 +723525,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -724331,14 +723548,14 @@ VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] + WorkspaceCheck: [4, 0, 33] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -724365,7 +723582,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -724378,7 +723595,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -724392,22 +723609,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_4_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 + LdsNumBytes: 60416 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 10240 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -724416,7 +723633,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 + LdsOffsetMetadata: 60416 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 16 @@ -724426,8 +723643,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -724437,15 +723654,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 64 - MacroTileA: 256 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -724466,14 +723683,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -724559,8 +723776,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2775 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_GSU32_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2772 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -724569,16 +723786,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -724592,18 +723809,18 @@ VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 64] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -724626,7 +723843,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -724639,10 +723856,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -724653,33 +723870,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIWT5_3_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 2 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 36096 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 36096 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -724687,8 +723904,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -724699,14 +723916,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -724727,14 +723944,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -724820,8 +724037,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2776 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2773 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIWT5_3_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -724829,17 +724046,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -724850,7 +724067,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -724860,11 +724077,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 64] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -724900,10 +724117,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 21 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -724914,33 +724131,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_4_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 + LSPA: 32 + LSPB: 4 + LVCA: 8 LVCB: 8 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -724959,15 +724176,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 64 - MacroTileA: 256 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -724988,14 +724205,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 2 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -725081,8 +724298,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2777 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWB8_GSU21_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2774 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -725090,17 +724307,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -725111,17 +724328,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 21] + WorkspaceCheck: [4, 0, 64] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -725148,7 +724365,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -725159,14 +724376,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 26 + GlobalSplitU: 31 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -725175,42 +724392,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 4 + LSPB: 16 LVCA: 16 - LVCB: 64 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 1024 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 33792 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -725220,15 +724437,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -725249,14 +724466,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 32 - NumLoadsB: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -725342,8 +724559,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2778 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU26_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2775 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -725351,17 +724568,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -725372,23 +724589,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 26] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + WorkspaceCheck: [4, 0, 31] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -725409,7 +724626,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -725422,10 +724639,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 26 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -725436,68 +724653,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 512 - LSPA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 LSPB: 4 - LVCA: 2 - LVCB: 64 - LVPA: 16 + LVCA: 32 + LVCB: 8 + LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 33792 + LdsNumBytes: 46592 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 46592 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -725510,14 +724727,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -725603,8 +724820,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2779 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_LDSB1_GRVWB8_GSU26_LBSPPA256_LBSPPB1024_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2776 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -725612,17 +724829,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -725633,21 +724850,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 26] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -725670,7 +724887,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -725683,10 +724900,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -725697,33 +724914,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 - LSCB: 256 - LSPA: 64 - LSPB: 4 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIAV0_MIWT5_6_NLCA5_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 32 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -725731,10 +724948,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -725742,15 +724959,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 320 + MacroTile1: 96 + MacroTileA: 320 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -725771,14 +724988,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 10 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -725864,8 +725081,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2780 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2777 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIAV0_MIWT5_6_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -725873,17 +725090,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -725894,21 +725111,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -725931,7 +725148,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -725944,7 +725161,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -725958,68 +725175,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x80x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_2 - LSCA: 32 - LSCB: 256 - LSPA: 64 - LSPB: 4 - LVCA: 4 - LVCB: 32 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT3_3_NLCA3_NLCB1_SVW1_VWA1_WSGRB0_WG128_2_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 49152 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 49152 + LdsOffsetB_Blk: 114688 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 114688 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 80 - MacroTileA: 32 - MacroTileB: 80 + MacroTile0: 384 + MacroTile1: 96 + MacroTileA: 384 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -726032,14 +725249,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 12 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -726125,8 +725342,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2781 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x80x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2778 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT3_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -726136,15 +725353,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -726158,18 +725375,18 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -726205,10 +725422,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 72 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -726219,33 +725436,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 + LSCA: 128 LSCB: 128 - LSPA: 32 + LSPA: 16 LSPB: 4 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 2 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 39936 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 39936 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -726264,15 +725481,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 80 - MacroTileA: 64 - MacroTileB: 80 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -726293,14 +725510,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -726386,8 +725603,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2782 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU72_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2779 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -726395,17 +725612,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -726416,17 +725633,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 72] + WorkspaceCheck: [4, 0, 20] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -726453,7 +725670,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -726466,7 +725683,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 36 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -726480,68 +725697,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 - LSCA: 64 - LSCB: 128 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 LSPB: 4 - LVCA: 8 - LVCB: 16 - LVPA: 4 + LVCA: 32 + LVCB: 8 + LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 46592 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 46592 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 5] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 80 - MacroTileA: 64 - MacroTileB: 80 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -726554,14 +725771,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -726647,8 +725864,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2783 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU36_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2780 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU40_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -726658,15 +725875,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -726683,15 +725900,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 36] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 40] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -726714,7 +725931,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -726725,14 +725942,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 66 + GlobalSplitU: 39 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -726741,37 +725958,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 256 LSPA: 16 LSPB: 4 LVCA: 16 - LVCB: 16 - LVPA: 2 + LVCB: 32 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -726786,15 +726003,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -726815,14 +726032,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 16 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -726908,8 +726125,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2784 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU66_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2781 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -726917,17 +726134,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -726938,23 +726155,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 66] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 39] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -726975,7 +726192,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -726987,8 +726204,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 64 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 39 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -727002,42 +726219,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 256 + LSPA: 128 LSPB: 4 - LVCA: 8 + LVCA: 2 LVCB: 32 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37632 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37632 - LdsOffsetMetadata_Blk: 90368 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -727047,15 +726264,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 80 - MacroTileA: 192 - MacroTileB: 80 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -727076,14 +726293,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -727169,8 +726386,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2785 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2782 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -727179,16 +726396,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -727205,15 +726422,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 39] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -727236,7 +726453,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -727248,11 +726465,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 64 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -727263,33 +726480,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG16_16_1 + LSCA: 32 + LSCB: 256 + LSPA: 64 LSPB: 8 - LVCA: 8 + LVCA: 4 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37632 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37632 - LdsOffsetMetadata_Blk: 90368 - LdsPadA: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -727297,8 +726514,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -727308,15 +726525,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 80 - MacroTileA: 192 - MacroTileB: 80 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -727337,14 +726554,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -727430,8 +726647,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2786 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2783 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -727439,17 +726656,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -727460,21 +726677,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 40] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -727510,10 +726727,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 34 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -727524,42 +726741,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x112x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_7_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_2 + LSCA: 32 LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 + LSPA: 64 + LSPB: 4 + LVCA: 4 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -727569,15 +726786,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 32 + MacroTile1: 112 + MacroTileA: 32 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -727598,14 +726815,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 14 + NumGlobalWriteVectorsPerThread: 14 + NumLoadsA: 2 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -727691,8 +726908,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2787 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU34_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2784 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x112x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -727700,17 +726917,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 + StoreVectorWidth: 1 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -727721,17 +726938,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 34] + WorkspaceCheck: [4, 0, 40] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -727758,7 +726975,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -727770,11 +726987,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 64 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 68 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -727785,33 +727002,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_7_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 4 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 2 - LdsBlockSizePerPadA: 4096 - LdsBlockSizePerPadB: 128 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 49152 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -727819,8 +727036,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -727831,14 +727048,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 80 - MacroTileA: 256 - MacroTileB: 80 + MacroTile0: 64 + MacroTile1: 112 + MacroTileA: 64 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -727859,14 +727076,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 10 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -727952,8 +727169,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2788 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2785 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU68_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -727961,17 +727178,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -727982,7 +727199,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -727992,11 +727209,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 68] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -728019,7 +727236,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -728031,8 +727248,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 57 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 34 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -728046,44 +727263,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x80x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_5_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_7_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 4 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 6144 - LdsBlockSizePerPadB: 128 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 49664 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 57344 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 49664 - LdsOffsetB_Blk: 115200 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 115200 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -728091,15 +727308,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 80 - MacroTileA: 384 - MacroTileB: 80 + MacroTile0: 64 + MacroTile1: 112 + MacroTileA: 64 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -728120,14 +727337,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 14 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -728213,8 +727430,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2789 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x80x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU57_LBSPPA6144_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2786 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU34_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -728223,16 +727440,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -728249,15 +727466,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 34] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -728280,7 +727497,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -728292,8 +727509,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -728307,32 +727524,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_MIWT2_7_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 LSCA: 128 - LSCB: 128 + LSCB: 64 LSPA: 16 LSPB: 4 LVCA: 16 - LVCB: 16 + LVCB: 32 LVPA: 2 - LVPB: 1 + LVPB: 2 LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -728341,8 +727558,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -728353,14 +727570,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] + MIWaveTile: [2, 7] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 80 + MacroTile1: 112 MacroTileA: 128 - MacroTileB: 80 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -728381,14 +727598,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -728474,8 +727691,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2790 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2787 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA2048_LBSPPB128_LPA32_LPB16_MIWT2_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -728491,9 +727708,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -728514,11 +727731,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 64] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -728554,10 +727771,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 36 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -728568,33 +727785,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_7_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 4 - LVCA: 32 + LVCA: 8 LVCB: 32 - LVPA: 1 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 42752 + LdsNumElementsAlignedA: 24832 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 24832 + LdsOffsetB_Blk: 90368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 42752 + LdsOffsetMetadata_Blk: 90368 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -728614,14 +727831,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 80 - MacroTileA: 256 - MacroTileB: 80 + MacroTile0: 192 + MacroTile1: 112 + MacroTileA: 192 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -728642,14 +727859,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 14 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -728735,8 +727952,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2791 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWB2_GSU36_LBSPPA4096_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2788 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_7_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -728744,17 +727961,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -728765,7 +727982,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -728775,7 +727992,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 36] + WorkspaceCheck: [4, 0, 64] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -728818,7 +728035,7 @@ GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -728829,42 +728046,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_4_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 - LSPB: 4 + LSPB: 16 LVCA: 16 LVCB: 16 LVPA: 2 - LVPB: 1 + LVPB: 2 LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -728874,15 +728091,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 80 + MacroTile1: 64 MacroTileA: 128 - MacroTileB: 80 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -728903,14 +728120,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -728996,8 +728213,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2792 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2789 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -729005,17 +728222,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 + StoreVectorWidth: 4 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -729026,13 +728243,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -729063,7 +728280,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -729075,11 +728292,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -729090,33 +728307,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 32 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -729124,10 +728341,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -729136,14 +728353,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 256 + MacroTile1: 112 + MacroTileA: 256 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -729164,14 +728381,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -729257,8 +728474,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2793 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA32_LPB16_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2790 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU57_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -729266,17 +728483,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -729287,21 +728504,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -729324,7 +728541,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -729335,14 +728552,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 75 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -729351,44 +728568,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 LSPB: 4 - LVCA: 16 + LVCA: 8 LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 59136 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 59136 + LdsOffsetMetadata_Blk: 106752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -729396,15 +728613,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 320 + MacroTile1: 112 + MacroTileA: 320 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -729425,14 +728642,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 16 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 10 + NumLoadsB: 14 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -729518,8 +728735,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2794 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU75_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2791 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU57_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -729528,16 +728745,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -729554,17 +728771,17 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 75] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -729585,7 +728802,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -729597,11 +728814,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 80 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -729612,44 +728829,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 LSPB: 4 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVCA: 16 + LVCB: 32 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36352 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65408 + LdsNumElementsAlignedA: 50176 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 50176 + LdsOffsetB_Blk: 115712 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36352 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65408 + LdsOffsetMetadata_Blk: 115712 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -729657,15 +728874,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 96 - MacroTileA: 32 - MacroTileB: 96 + MacroTile0: 384 + MacroTile1: 112 + MacroTileA: 384 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -729686,14 +728903,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 12 + NumLoadsB: 14 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -729779,8 +728996,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2795 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU80_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2792 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU57_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -729788,17 +729005,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -729809,21 +729026,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -729846,7 +729063,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -729858,11 +729075,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 30 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -729873,44 +729090,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_8_2 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 4 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -729918,15 +729135,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 96 - MacroTileA: 32 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 112 + MacroTileA: 256 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -729947,14 +729164,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 2 - NumLoadsB: 6 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 8 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -730040,8 +729257,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2796 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2793 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU30_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -730049,17 +729266,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -730070,21 +729287,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 30] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -730118,14 +729335,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 68 + GlobalSplitU: 79 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -730134,33 +729351,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 32 + LSPA: 16 LSPB: 4 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -730179,15 +729396,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -730208,14 +729425,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -730301,8 +729518,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2797 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU68_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2794 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU79_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -730310,17 +729527,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -730331,23 +729548,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 68] + WorkspaceCheck: [4, 0, 79] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -730368,7 +729585,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -730381,7 +729598,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 68 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -730395,32 +729612,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_3_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 256 + LSPA: 128 LSPB: 4 - LVCA: 4 - LVCB: 16 - LVPA: 8 + LVCA: 2 + LVCB: 32 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52736 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52736 - LdsOffsetMetadata_Blk: 90624 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -730429,8 +729646,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -730440,15 +729657,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -730469,14 +729686,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -730562,8 +729779,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2798 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU68_LBSPPA1536_LBSPPB256_LPA16_LPB16_MIWT3_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2795 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -730572,16 +729789,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -730598,22 +729815,22 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 68] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 40] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -730629,7 +729846,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -730642,10 +729859,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 68 + GlobalSplitU: 73 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -730656,33 +729873,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x64_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_MIWT3_3_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 LSCA: 32 - LSCB: 64 + LSCB: 128 LSPA: 64 LSPB: 4 LVCA: 4 - LVCB: 8 + LVCB: 16 LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60672 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 45312 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 12544 - LdsOffsetMetadata_Blk: 45312 - LdsPadA: 16 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -730690,8 +729907,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -730701,15 +729918,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -730730,14 +729947,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -730823,8 +730040,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2799 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x64_MI16x16x1_SN_LDSB0_GRVWB8_GSU68_LBSPPA1536_LBSPPB128_LPA16_LPB16_MIWT3_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2796 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU73_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -730832,17 +730049,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -730853,21 +730070,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 68] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 73] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -730903,10 +730120,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 33 + GlobalSplitU: 80 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -730917,42 +730134,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_8_2 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 32 + LSPA: 128 LSPB: 4 - LVCA: 8 + LVCA: 2 LVCB: 16 - LVPA: 4 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 768 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -730962,15 +730179,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -730992,13 +730209,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -731084,8 +730301,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2800 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU33_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2797 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU80_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -731093,17 +730310,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -731114,17 +730331,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 33] + WorkspaceCheck: [4, 0, 80] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -731178,32 +730395,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_16_1 + LSCA: 64 LSCB: 128 - LSPA: 16 + LSPA: 32 LSPB: 4 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 2 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 @@ -731223,15 +730440,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -731252,14 +730469,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -731345,8 +730562,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2801 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2798 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -731355,16 +730572,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -731381,7 +730598,7 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -731396,7 +730613,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -731439,7 +730656,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIWT5_3_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_LDSB0_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIWT3_1_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -731448,59 +730665,59 @@ LVCB: 8 LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36096 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36096 - LdsOffsetMetadata_Blk: 86272 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 12288 + LdsOffsetMetadata_Blk: 45056 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 96 - MacroTileA: 160 - MacroTileB: 96 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -731513,14 +730730,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -731606,8 +730823,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2802 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIWT5_3_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2799 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_LDSB0_GRVWB8_GSU64_LBSPPA0_LBSPPB128_LPA0_LPB8_MIWT3_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -731616,16 +730833,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 1 + ThreadTileA: 48 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -731673,7 +730890,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -731686,7 +730903,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 31 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -731700,68 +730917,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 LSCA: 64 - LSCB: 64 + LSCB: 128 LSPA: 32 - LSPB: 4 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LVPB: 2 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40448 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -731774,14 +730991,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -731867,8 +731084,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2803 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2800 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA0_LBSPPB256_LPA0_LPB8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -731877,16 +731094,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 64 + SubGroupA: 2 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -731900,18 +731117,18 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 31] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -731934,7 +731151,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -731947,10 +731164,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 31 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -731961,34 +731178,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 LSCA: 128 - LSCB: 128 + LSCB: 64 LSPA: 16 - LSPB: 16 + LSPB: 4 LVCA: 16 - LVCB: 16 + LVCB: 8 LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + LVPB: 1 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -731996,10 +731213,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -732007,22 +731224,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 96 + MacroTile1: 128 MacroTileA: 128 - MacroTileB: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -732035,14 +731252,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -732128,8 +731345,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2804 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_8_1_WGM1 + SolutionIndex: 2801 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -732137,17 +731354,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -732158,21 +731375,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 31] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -732222,68 +731439,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 4 - LVCA: 32 + LVCA: 8 LVCB: 8 - LVPA: 1 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46592 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46592 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -732298,12 +731515,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 96 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 3 - NumLoadsCoalescedA: 1 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -732389,8 +731606,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2805 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 + SolutionIndex: 2802 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -732405,10 +731622,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -732425,7 +731642,7 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -732456,7 +731673,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -732469,10 +731686,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 15 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -732483,68 +731700,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIAV0_MIWT5_6_NLCA5_NLCB1_SVW1_VWA1_WSGRB0_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 5120 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_2_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 1 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 106752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 96 - MacroTileA: 320 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -732557,14 +731774,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 10 - NumLoadsB: 3 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -732650,8 +731867,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2806 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA5120_LBSPPB128_LPA16_LPB16_MIAV0_MIWT5_6_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2803 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU15_LBSPPA0_LBSPPB256_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_2_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -732659,17 +731876,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -732680,21 +731897,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [64, 2, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 15] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -732733,7 +731950,7 @@ GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -732744,32 +731961,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT3_3_NLCA3_NLCB1_SVW1_VWA1_WSGRB0_WG128_2_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 + LSPA: 8 LSPB: 32 - LVCA: 16 + LVCA: 32 LVCB: 8 - LVPA: 2 + LVPA: 1 LVPB: 4 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 49152 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 49152 - LdsOffsetB_Blk: 114688 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 114688 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -732790,14 +732007,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 96 - MacroTileA: 384 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -732818,14 +732035,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 12 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -732911,8 +732128,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2807 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT3_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG128_2_1_WGM1 + SolutionIndex: 2804 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -732920,17 +732137,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -732941,7 +732158,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -732978,7 +732195,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -732991,10 +732208,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -733005,33 +732222,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 2 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 61696 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 61696 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -733039,10 +732256,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -733050,15 +732267,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -733079,14 +732296,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 10 + NumLoadsB: 4 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -733172,8 +732389,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2808 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIAV1_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2805 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -733181,17 +732398,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -733202,21 +732419,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -733252,7 +732469,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 30 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -733266,68 +732483,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 4 - LVCA: 32 + LVCA: 8 LVCB: 8 - LVPA: 1 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46592 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46592 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -733342,12 +732559,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 96 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 3 - NumLoadsCoalescedA: 1 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -733433,8 +732650,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2809 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWB8_GSU40_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 + SolutionIndex: 2806 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU30_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -733449,10 +732666,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -733469,11 +732686,11 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] + WorkspaceCheck: [4, 0, 30] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -733500,7 +732717,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -733513,7 +732730,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 39 + GlobalSplitU: 75 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -733527,32 +732744,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 LSCA: 16 - LSCB: 256 + LSCB: 128 LSPA: 16 LSPB: 4 LVCA: 16 - LVCB: 32 + LVCB: 16 LVPA: 16 LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -733561,8 +732778,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -733573,14 +732790,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 2] - MIWaveTile: [1, 2] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 160 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -733601,14 +732818,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 16 - NumLoadsB: 8 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -733694,8 +732911,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2810 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2807 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU75_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -733711,9 +732928,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 5 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -733734,11 +732951,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 39] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 75] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -733774,7 +732991,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 39 + GlobalSplitU: 37 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -733788,7 +733005,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 LSCA: 16 LSCB: 256 LSPA: 128 @@ -733801,9 +733018,9 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -733812,7 +733029,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 @@ -733834,14 +733051,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 2] - MIWaveTile: [1, 2] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 96 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -733862,14 +733079,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -733955,8 +733172,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2811 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2808 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU37_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -733972,9 +733189,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -733995,7 +733212,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 39] + WorkspaceCheck: [4, 0, 37] _DepthU: 256 _DepthUA: 256 _DepthUB: 256 @@ -734022,7 +733239,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -734035,10 +733252,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 73 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -734049,33 +733266,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 LSCA: 32 - LSCB: 256 + LSCB: 128 LSPA: 64 - LSPB: 8 + LSPB: 4 LVCA: 4 - LVCB: 32 + LVCB: 16 LVPA: 8 LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 32 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -734083,8 +733300,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -734094,15 +733311,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 64 + MacroTile1: 160 MacroTileA: 32 - MacroTileB: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -734123,14 +733340,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -734216,8 +733433,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2812 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB512_LPA32_LPB16_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG16_16_1_WGM1 + SolutionIndex: 2809 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU73_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -734225,17 +733442,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -734246,21 +733463,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 73] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -734296,10 +733513,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 39 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -734310,7 +733527,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x112x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_7_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_8_2 LSCA: 32 LSCB: 128 LSPA: 64 @@ -734323,20 +733540,20 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -734355,15 +733572,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 112 + MacroTile1: 160 MacroTileA: 32 - MacroTileB: 112 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -734384,14 +733601,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 14 - NumGlobalWriteVectorsPerThread: 14 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 10 NumLoadsA: 2 - NumLoadsB: 7 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -734477,8 +733694,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2813 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x112x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2810 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -734486,17 +733703,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 7 - ThreadTileA: 4 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -734507,17 +733724,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] + WorkspaceCheck: [4, 0, 39] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -734557,10 +733774,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 68 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -734571,7 +733788,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_7_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 LSCA: 64 LSCB: 128 LSPA: 32 @@ -734584,20 +733801,20 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49152 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -734616,15 +733833,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 112 + MacroTile1: 160 MacroTileA: 64 - MacroTileB: 112 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -734645,14 +733862,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 7 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -734738,8 +733955,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2814 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU68_LBSPPA1024_LBSPPB256_LPA16_LPB16_MIWT1_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2811 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -734747,17 +733964,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 7 - ThreadTileA: 4 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -734768,17 +733985,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 68] + WorkspaceCheck: [4, 0, 64] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -734805,7 +734022,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -734818,10 +734035,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 34 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -734832,37 +734049,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_7_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 - LSCA: 64 - LSCB: 128 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 LSPB: 4 - LVCA: 8 - LVCB: 16 - LVPA: 4 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57344 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 38144 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 38144 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -734877,15 +734094,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 112 - MacroTileA: 64 - MacroTileB: 112 + MacroTile0: 96 + MacroTile1: 160 + MacroTileA: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -734906,14 +734123,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 14 - NumLoadsA: 4 - NumLoadsB: 7 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -734999,8 +734216,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2815 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU34_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2812 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1536_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -735008,17 +734225,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -735029,21 +734246,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 34] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 64] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -735066,7 +734283,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -735078,8 +734295,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 64 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 34 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -735093,32 +734310,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA2048_LBSPPB128_LPA32_LPB16_MIWT2_7_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 32 - LVPA: 2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_8_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -735127,8 +734344,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -735138,15 +734355,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 112 - MacroTileA: 128 - MacroTileB: 112 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -735167,14 +734384,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 14 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -735260,8 +734477,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2816 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA2048_LBSPPB128_LPA32_LPB16_MIWT2_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2813 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU34_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -735270,16 +734487,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 7 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 7 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -735293,18 +734510,18 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 34] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -735339,11 +734556,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 64 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -735354,33 +734571,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_7_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 4 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 3072 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 1 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42752 - LdsNumElementsAlignedA: 24832 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24832 - LdsOffsetB_Blk: 90368 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42752 - LdsOffsetMetadata_Blk: 90368 - LdsPadA: 16 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -735399,15 +734616,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 112 - MacroTileA: 192 - MacroTileB: 112 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -735428,14 +734645,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 14 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -735521,8 +734738,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2817 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU64_LBSPPA3072_LBSPPB128_LPA16_LPB16_MIWT3_7_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2814 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2048_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -735530,17 +734747,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -735551,17 +734768,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] + WorkspaceCheck: [4, 0, 57] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -735588,7 +734805,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -735601,10 +734818,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -735615,44 +734832,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_4_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIAV0_MIWT5_5_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 4 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 46336 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 46336 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -735660,15 +734877,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -735689,14 +734906,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 5 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -735782,8 +734999,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2818 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU16_LBSPPA2048_LBSPPB256_LPA0_LPB16_MIWT4_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2815 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIAV0_MIWT5_5_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -735791,17 +735008,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -735812,21 +735029,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -735861,11 +735078,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -735876,33 +735093,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_5_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 4 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 2 - LdsBlockSizePerPadA: 4096 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 50688 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 17920 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -735921,15 +735138,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 112 - MacroTileA: 256 - MacroTileB: 112 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -735950,14 +735167,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 8 - NumLoadsB: 14 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -736043,8 +735260,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2819 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU57_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2816 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -736052,17 +735269,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -736073,13 +735290,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -736122,7 +735339,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -736137,32 +735354,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_MIAV0_MIWT7_5_NLCA7_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 4 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 5120 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59136 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 54528 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59136 - LdsOffsetMetadata_Blk: 106752 + LdsOffsetMetadata: 54528 + LdsOffsetMetadata_Blk: 94464 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -736182,15 +735399,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 112 - MacroTileA: 320 - MacroTileB: 112 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -736213,12 +735430,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 140 NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 10 - NumLoadsB: 14 - NumLoadsCoalescedA: 5 + NumLoadsA: 7 + NumLoadsB: 5 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -736304,8 +735521,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2820 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU57_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2817 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3584_LBSPPB128_LPA16_LPB16_MIAV0_MIWT7_5_NLCA7_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -736314,16 +735531,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -736340,7 +735557,7 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -736383,8 +735600,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 57 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -736398,45 +735615,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 + LSCA: 256 LSCB: 64 - LSPA: 16 + LSPA: 8 LSPB: 4 - LVCA: 16 - LVCB: 32 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 3072 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65408 - LdsNumElementsAlignedA: 50176 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 50176 - LdsOffsetB_Blk: 115712 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65408 - LdsOffsetMetadata_Blk: 115712 - LdsPadA: 32 - LdsPadB: 4 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -736444,22 +735661,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 112 - MacroTileA: 384 - MacroTileB: 112 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -736472,14 +735689,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 12 - NumLoadsB: 14 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -736565,8 +735782,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2821 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU57_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIAV0_MIWT6_7_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2818 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -736575,16 +735792,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -736601,11 +735818,11 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] + WorkspaceCheck: [4, 0, 64] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -736644,11 +735861,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 30 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -736659,36 +735876,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG64_4_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB8_LRVW4_MIAV0_MIWT10_5_NLCA5_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 4 - LdsBlockSizePerPadA: 4096 + LSPA: 32 + LSPB: 4 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 2560 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 41984 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 41984 + LdsOffsetB_Blk: 107520 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 16 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 107520 + LdsPadA: 32 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -736704,15 +735921,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 112 - MacroTileA: 256 - MacroTileB: 112 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -736733,14 +735950,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 8 - NumLoadsB: 14 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 5 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -736826,8 +736043,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2822 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWB2_GSU30_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG64_4_1_WGM1 + SolutionIndex: 2819 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA2560_LBSPPB128_LPA32_LPB8_LRVW4_MIAV0_MIWT10_5_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -736835,17 +736052,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -736856,17 +736073,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 30] + WorkspaceCheck: [4, 0, 64] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -736920,7 +736137,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 LSPA: 16 @@ -736933,9 +736150,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -736944,7 +736161,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 @@ -736966,14 +736183,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -736994,14 +736211,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -737087,8 +736304,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2823 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU79_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2820 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU79_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -737104,9 +736321,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -737167,7 +736384,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 25 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -737348,8 +736565,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2824 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2821 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU25_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -737388,7 +736605,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] + WorkspaceCheck: [4, 0, 25] _DepthU: 256 _DepthUA: 256 _DepthUB: 256 @@ -737428,7 +736645,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 73 + GlobalSplitU: 69 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -737442,7 +736659,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 LSCA: 32 LSCB: 128 LSPA: 64 @@ -737455,9 +736672,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 + LdsNumBytes: 64512 LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -737466,7 +736683,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 + LdsOffsetMetadata: 64512 LdsOffsetMetadata_Blk: 74752 LdsPadA: 32 LdsPadB: 16 @@ -737488,14 +736705,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 32 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -737516,14 +736733,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -737609,8 +736826,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2825 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU73_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2822 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU69_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -737626,9 +736843,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 8 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -737649,7 +736866,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 73] + WorkspaceCheck: [4, 0, 69] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -737689,7 +736906,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 80 + GlobalSplitU: 38 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -737870,8 +737087,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2826 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU80_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2823 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU38_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -737910,7 +737127,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 80] + WorkspaceCheck: [4, 0, 38] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -737950,10 +737167,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 31 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -737964,7 +737181,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 LSCA: 64 LSCB: 128 LSPA: 32 @@ -737977,20 +737194,20 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -738009,15 +737226,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 128 + MacroTile1: 96 MacroTileA: 64 - MacroTileB: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -738038,14 +737255,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -738131,8 +737348,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2827 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2824 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -738140,17 +737357,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -738161,17 +737378,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] + WorkspaceCheck: [4, 0, 31] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -738182,7 +737399,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -738214,7 +737431,7 @@ GlobalSplitU: 64 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -738225,7 +737442,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_LDSB0_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIWT3_1_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -738234,36 +737451,36 @@ LVCB: 8 LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 12288 - LdsOffsetMetadata_Blk: 45056 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -738271,22 +737488,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 96 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -738299,14 +737516,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 3 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -738392,8 +737609,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2828 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_LDSB0_GRVWB8_GSU64_LBSPPA0_LBSPPB128_LPA0_LPB8_MIWT3_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2825 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1536_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -738401,17 +737618,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 1 - ThreadTileA: 48 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -738422,13 +737639,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -738472,10 +737689,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 31 + GlobalSplitU: 15 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -738486,22 +737703,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_8_2 LSCA: 64 LSCB: 128 LSPA: 32 - LSPB: 16 + LSPB: 4 LVCA: 8 LVCB: 16 LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 0 + LVPB: 1 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 49152 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -738510,21 +737727,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 + LdsOffsetMetadata: 44032 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -738532,22 +737749,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 128 + MacroTile1: 96 MacroTileA: 64 - MacroTileB: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -738560,14 +737777,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -738653,8 +737870,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2829 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA0_LBSPPB256_LPA0_LPB8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2826 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU15_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -738662,17 +737879,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 64 - SubGroupA: 2 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -738683,17 +737900,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 31] + WorkspaceCheck: [4, 0, 15] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -738747,7 +737964,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -738760,9 +737977,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 + LdsNumBytes: 44032 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -738771,7 +737988,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 + LdsOffsetMetadata: 44032 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 @@ -738784,7 +738001,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -738793,14 +738010,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -738821,14 +738038,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -738914,8 +738131,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2830 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2827 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -738931,9 +738148,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 32 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -738997,7 +738214,7 @@ GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -739008,7 +738225,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT3_3_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -739017,36 +738234,36 @@ LVCB: 8 LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 24576 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -739054,22 +738271,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 192 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -739082,14 +738299,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 NumLoadsA: 6 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -739175,8 +738392,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2831 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2828 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT3_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -739184,17 +738401,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -739205,13 +738422,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -739242,7 +738459,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -739255,10 +738472,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 15 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -739269,68 +738486,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_2_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_MIAV0_MIWT7_6_NLCA7_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 2 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 59648 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59648 + LdsOffsetMetadata_Blk: 94464 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -739343,14 +738560,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -739436,8 +738653,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2832 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU15_LBSPPA0_LBSPPB256_LPA0_LPB8_MIAV1_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_2_2_WGM1 + SolutionIndex: 2829 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3584_LBSPPB128_LPA16_LPB16_MIAV0_MIWT7_6_NLCA7_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -739445,17 +738662,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 + StoreVectorWidth: 1 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -739466,21 +738683,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 2, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 15] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -739516,7 +738733,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 35 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -739530,22 +738747,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG128_2_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 LSCA: 256 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 4 LVCA: 32 LVCB: 8 LVPA: 1 - LVPB: 4 + LVPB: 1 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 + LdsNumBytes: 46592 LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -739554,7 +738771,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 + LdsOffsetMetadata: 46592 LdsOffsetMetadata_Blk: 98304 LdsPadA: 0 LdsPadB: 8 @@ -739576,14 +738793,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 96 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -739604,14 +738821,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -739697,8 +738914,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2833 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG128_2_1_WGM1 + SolutionIndex: 2830 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU35_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -739714,9 +738931,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 3 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -739730,14 +738947,14 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] + WorkspaceCheck: [4, 0, 35] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -739764,7 +738981,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -739775,14 +738992,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -739791,32 +739008,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 4 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LVCA: 16 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 5120 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61696 - LdsNumElementsAlignedA: 41216 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41216 - LdsOffsetB_Blk: 106752 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61696 - LdsOffsetMetadata_Blk: 106752 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -739825,10 +739042,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -739836,14 +739053,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 16 MacroTile1: 128 - MacroTileA: 320 + MacroTileA: 16 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -739865,14 +739082,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 10 - NumLoadsB: 4 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -739958,8 +739175,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2834 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_8_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2831 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -739968,16 +739185,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -739994,17 +739211,17 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 40] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -740025,7 +739242,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -740038,10 +739255,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 30 + GlobalSplitU: 40 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -740052,33 +739269,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 4 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LVCA: 2 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -740086,10 +739303,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -740097,14 +739314,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 16 MacroTile1: 128 - MacroTileA: 192 + MacroTileA: 16 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -740126,14 +739343,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -740219,8 +739436,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2835 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU30_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2832 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -740228,17 +739445,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -740249,21 +739466,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 30] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 40] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -740297,14 +739514,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 75 + GlobalSplitU: 36 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -740313,42 +739530,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 16 + LSPA: 64 LSPB: 4 - LVCA: 16 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -740358,15 +739575,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -740387,14 +739604,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 8 - NumLoadsB: 10 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -740480,8 +739697,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2836 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU75_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2833 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU36_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -740489,17 +739706,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -740510,23 +739727,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 75] + WorkspaceCheck: [4, 0, 36] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -740547,7 +739764,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -740560,7 +739777,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 37 + GlobalSplitU: 38 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -740574,37 +739791,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 - LSCB: 256 + LSCB: 128 LSPA: 128 LSPB: 4 LVCA: 2 - LVCB: 32 + LVCB: 16 LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -740619,15 +739836,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -740648,14 +739865,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 2 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -740741,8 +739958,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2837 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU37_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2834 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU38_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -740752,15 +739969,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -740777,15 +739994,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 37] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 38] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -740821,10 +740038,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 73 + GlobalSplitU: 30 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -740835,33 +740052,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_16_1 + LSCA: 64 LSCB: 128 - LSPA: 64 + LSPA: 32 LSPB: 4 - LVCA: 4 + LVCA: 8 LVCB: 16 - LVPA: 8 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -740880,15 +740097,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -740909,14 +740126,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -741002,8 +740219,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2838 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU73_LBSPPA512_LBSPPB256_LPA16_LPB16_MIWT1_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2835 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU30_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -741011,17 +740228,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -741032,17 +740249,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 73] + WorkspaceCheck: [4, 0, 30] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -741069,7 +740286,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -741082,10 +740299,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 39 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -741096,37 +740313,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_7_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 LSPB: 4 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 48384 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 48384 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -741141,15 +740358,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -741170,14 +740387,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 2 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -741263,8 +740480,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2839 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2836 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_7_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -741272,17 +740489,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 + StoreVectorWidth: 1 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -741293,21 +740510,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 39] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -741343,7 +740560,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 15 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -741357,7 +740574,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_7_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 LSCA: 64 LSCB: 128 LSPA: 32 @@ -741370,9 +740587,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 57344 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -741381,18 +740598,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 + LdsOffsetMetadata: 49664 LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -741402,15 +740619,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] + MIWaveGroup: [2, 1] + MIWaveTile: [2, 7] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 160 + MacroTile1: 112 MacroTileA: 64 - MacroTileB: 160 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -741431,14 +740648,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 14 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -741524,8 +740741,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2840 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2837 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU15_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -741535,15 +740752,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -741560,11 +740777,11 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] + WorkspaceCheck: [4, 0, 15] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -741604,10 +740821,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -741618,33 +740835,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 4 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 1 - LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38144 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38144 - LdsOffsetMetadata_Blk: 78080 - LdsPadA: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -741655,7 +740872,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -741664,14 +740881,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 160 - MacroTileA: 96 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -741692,14 +740909,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -741785,8 +741002,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2841 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1536_LBSPPB128_LPA16_LPB16_MIWT3_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2838 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -741794,17 +741011,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -741815,7 +741032,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -741825,7 +741042,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] + WorkspaceCheck: [4, 0, 57] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -741852,7 +741069,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -741865,10 +741082,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 34 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -741879,33 +741096,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_8_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 4 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -741913,10 +741130,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -741925,14 +741142,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -741953,14 +741170,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -742046,8 +741263,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2842 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU34_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_8_1_WGM1 + SolutionIndex: 2839 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -742055,17 +741272,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -742076,21 +741293,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 34] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -742129,7 +741346,7 @@ GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -742140,33 +741357,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 16 + LSPA: 32 LSPB: 4 - LVCA: 16 + LVCA: 8 LVCB: 8 - LVPA: 2 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 3072 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -742177,7 +741394,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -742186,14 +741403,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -742214,14 +741431,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -742307,8 +741524,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2843 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2048_LBSPPB128_LPA0_LPB16_MIAV1_MIWT4_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2840 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -742316,17 +741533,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -742337,7 +741554,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -742401,7 +741618,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIAV0_MIWT5_5_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -742410,23 +741627,23 @@ LVCB: 8 LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 3584 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46336 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 64768 + LdsNumElementsAlignedA: 28928 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 28928 + LdsOffsetB_Blk: 94464 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46336 - LdsOffsetMetadata_Blk: 86272 + LdsOffsetMetadata: 64768 + LdsOffsetMetadata_Blk: 94464 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -742447,14 +741664,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 160 - MacroTileA: 160 - MacroTileB: 160 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -742475,14 +741692,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 5 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 7 + NumLoadsB: 7 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -742568,8 +741785,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2844 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2560_LBSPPB128_LPA16_LPB16_MIAV0_MIWT5_5_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2841 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -742584,10 +741801,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -742635,7 +741852,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -742646,14 +741863,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 36 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -742662,33 +741879,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_5_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 4 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LVCA: 16 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -742696,10 +741913,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -742707,15 +741924,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -742736,14 +741953,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -742829,8 +742046,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2845 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3072_LBSPPB128_LPA32_LPB16_MIAV0_MIWT6_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2842 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU36_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -742838,17 +742055,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -742859,23 +742076,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 36] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -742896,7 +742113,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -742907,14 +742124,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -742923,32 +742140,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_MIAV0_MIWT7_5_NLCA7_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCB2_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 3584 - LdsBlockSizePerPadB: 128 + LVCA: 16 + LVCB: 64 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54528 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54528 - LdsOffsetMetadata_Blk: 94464 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -742957,10 +742174,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -742968,15 +742185,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -742997,14 +742214,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 7 - NumLoadsB: 5 - NumLoadsCoalescedA: 7 - NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 16 + NumLoadsB: 32 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 2 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -743090,8 +742307,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2846 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3584_LBSPPB128_LPA16_LPB16_MIAV0_MIWT7_5_NLCA7_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2843 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB2_GSU16_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCB2_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -743100,16 +742317,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -743126,17 +742343,17 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 16] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -743157,7 +742374,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -743170,10 +742387,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 39 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -743184,34 +742401,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 - LSCA: 256 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 4 - LVCA: 32 - LVCB: 8 - LVPA: 1 + LVCA: 2 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -743219,33 +742436,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -743258,14 +742475,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -743351,8 +742568,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2847 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 + SolutionIndex: 2844 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -743360,17 +742577,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -743381,21 +742598,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 39] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -743418,7 +742635,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -743431,7 +742648,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 31 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -743445,44 +742662,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB8_LRVW4_MIAV0_MIWT10_5_NLCA5_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 LSPB: 4 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LVCA: 4 + LVCB: 16 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 41984 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41984 - LdsOffsetB_Blk: 107520 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 107520 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 32 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -743490,15 +742707,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -743519,14 +742736,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 5 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -743612,8 +742829,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2848 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA2560_LBSPPB128_LPA32_LPB8_LRVW4_MIAV0_MIWT10_5_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2845 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -743622,16 +742839,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -743648,15 +742865,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 31] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -743690,14 +742907,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 79 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -743706,32 +742923,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 16 + LSPA: 128 LSPB: 4 - LVCA: 16 + LVCA: 2 LVCB: 16 LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 768 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -743752,14 +742969,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -743780,14 +742997,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -743873,8 +743090,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2849 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU79_LBSPPA256_LBSPPB256_LPA16_LPB16_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2846 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU32_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -743889,10 +743106,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -743913,13 +743130,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 79] + WorkspaceCheck: [4, 0, 32] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -743953,7 +743170,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 25 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -743967,7 +743184,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 256 LSPA: 128 @@ -744134,8 +743351,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2850 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU25_LBSPPA256_LBSPPB512_LPA16_LPB16_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2847 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU16_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -744174,7 +743391,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 25] + WorkspaceCheck: [4, 0, 16] _DepthU: 256 _DepthUA: 256 _DepthUB: 256 @@ -744201,7 +743418,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -744214,7 +743431,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 69 + GlobalSplitU: 15 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -744228,32 +743445,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 LSCA: 32 - LSCB: 128 + LSCB: 256 LSPA: 64 LSPB: 4 LVCA: 4 - LVCB: 16 + LVCB: 32 LVPA: 8 LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -744262,8 +743479,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -744274,14 +743491,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 192 + MacroTile1: 64 MacroTileA: 32 - MacroTileB: 192 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -744302,14 +743519,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -744395,8 +743612,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2851 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU69_LBSPPA512_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2848 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU15_LBSPPA512_LBSPPB512_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -744412,9 +743629,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -744435,18 +743652,18 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 69] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 15] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -744475,7 +743692,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 38 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -744489,7 +743706,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 LSPA: 128 @@ -744502,19 +743719,19 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 + LdsNumBytes: 64000 LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 12800 + LdsOffsetMetadata_Blk: 45568 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -744535,14 +743752,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] + MIWaveTile: [3, 1] MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 48 - MacroTile1: 128 + MacroTile1: 64 MacroTileA: 48 - MacroTileB: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -744563,14 +743780,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 3 - NumLoadsB: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -744656,8 +743873,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2852 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU38_LBSPPA768_LBSPPB256_LPA16_LPB16_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2849 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU16_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -744673,9 +743890,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 2 + ThreadTile1: 1 ThreadTileA: 12 - ThreadTileB: 2 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -744696,7 +743913,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 38] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -744736,10 +743953,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 31 + GlobalSplitU: 28 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -744750,7 +743967,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_16_1 LSCA: 64 LSCB: 128 LSPA: 32 @@ -744763,20 +743980,20 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -744795,15 +744012,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 96 + MacroTile1: 128 MacroTileA: 64 - MacroTileB: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -744824,14 +744041,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -744917,8 +744134,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2853 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA1024_LBSPPB256_LPA32_LPB16_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2850 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU28_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -744926,17 +744143,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -744947,17 +744164,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 31] + WorkspaceCheck: [4, 0, 28] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -744997,7 +744214,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 64 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -745011,7 +744228,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -745024,9 +744241,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 + LdsNumBytes: 53760 LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -745035,7 +744252,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 + LdsOffsetMetadata: 53760 LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 LdsPadB: 16 @@ -745048,7 +744265,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -745057,14 +744274,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] + MIWaveTile: [6, 4] MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 192 + MacroTile1: 256 MacroTileA: 96 - MacroTileB: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -745085,14 +744302,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 3 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -745178,8 +744395,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2854 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU64_LBSPPA1536_LBSPPB128_LPA32_LPB16_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2851 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -745195,9 +744412,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 3 + ThreadTile1: 4 ThreadTileA: 24 - ThreadTileB: 3 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -745218,7 +744435,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 64] + WorkspaceCheck: [4, 0, 57] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -745258,10 +744475,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 15 + GlobalSplitU: 14 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -745272,22 +744489,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 LSCA: 64 LSCB: 128 LSPA: 32 - LSPB: 4 + LSPB: 16 LVCA: 8 LVCB: 16 LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 1024 + LVPB: 2 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 + LdsNumBytes: 65536 LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -745296,21 +744513,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 + LdsOffsetMetadata: 51200 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -745318,22 +744535,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 96 + MacroTile1: 128 MacroTileA: 64 - MacroTileB: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -745346,14 +744563,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -745439,8 +744656,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2855 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU15_LBSPPA1024_LBSPPB256_LPA0_LPB16_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2852 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU14_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -745448,17 +744665,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 64 + SubGroupA: 2 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -745469,17 +744686,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 15] + WorkspaceCheck: [4, 0, 14] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -745506,7 +744723,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -745519,7 +744736,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 28 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -745533,34 +744750,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 4 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LVCA: 8 + LVCB: 16 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -745568,10 +744785,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -745579,22 +744796,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -745607,14 +744824,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -745700,8 +744917,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2856 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2853 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU28_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -745710,16 +744927,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -745736,15 +744953,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 28] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -745783,7 +745000,7 @@ GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -745794,68 +745011,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT3_3_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 LSCB: 64 - LSPA: 32 + LSPA: 64 LSPB: 4 - LVCA: 8 + LVCA: 4 LVCB: 8 - LVPA: 4 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -745868,14 +745085,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 10 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -745961,8 +745178,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2857 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT3_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2854 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -745970,17 +745187,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -745991,13 +745208,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -746028,7 +745245,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -746041,10 +745258,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 7 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -746055,44 +745272,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_MIAV0_MIWT7_6_NLCA7_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_8_2 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LVCA: 8 + LVCB: 16 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 3584 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59648 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59648 - LdsOffsetMetadata_Blk: 94464 - LdsPadA: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -746100,15 +745317,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [1, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -746129,14 +745346,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -746222,8 +745439,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2858 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3584_LBSPPB128_LPA16_LPB16_MIAV0_MIWT7_6_NLCA7_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2855 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU7_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -746231,17 +745448,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 + StoreVectorWidth: 4 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -746252,21 +745469,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 7] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -746302,7 +745519,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 35 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -746316,32 +745533,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 LSCB: 64 - LSPA: 8 + LSPA: 16 LSPB: 4 - LVCA: 32 + LVCA: 16 LVCB: 8 - LVPA: 1 + LVPA: 2 LVPB: 1 LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46592 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46592 - LdsOffsetMetadata_Blk: 98304 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 LdsPadB: 8 LdsPadMetadata: 0 @@ -746361,15 +745578,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -746390,14 +745607,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -746483,8 +745700,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2859 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU35_LBSPPA0_LBSPPB128_LPA0_LPB8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG128_2_1_WGM1 + SolutionIndex: 2856 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -746493,16 +745710,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 3 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 3 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -746519,11 +745736,11 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 35] + WorkspaceCheck: [4, 0, 57] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -746550,7 +745767,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -746561,14 +745778,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -746577,33 +745794,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 16 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -746611,10 +745828,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -746623,14 +745840,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -746651,13 +745868,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -746744,8 +745961,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2860 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2857 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -746753,17 +745970,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -746774,7 +745991,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -746784,13 +746001,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -746811,7 +746028,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -746824,7 +746041,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 40 + GlobalSplitU: 57 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -746838,34 +746055,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 LSPB: 4 - LVCA: 2 - LVCB: 16 - LVPA: 16 + LVCA: 8 + LVCB: 8 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 24576 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 24576 + LdsOffsetB_Blk: 90112 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 90112 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -746873,33 +746090,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -746912,13 +746129,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -747005,8 +746222,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2861 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU40_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2858 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -747021,10 +746238,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -747041,15 +746258,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 40] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 57] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -747085,10 +746302,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 36 + GlobalSplitU: 19 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -747099,33 +746316,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_8_1 + LSCA: 128 LSCB: 128 - LSPA: 64 - LSPB: 4 - LVCA: 4 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 512 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -747144,15 +746361,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 128 - MacroTileA: 32 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -747173,14 +746390,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -747266,8 +746483,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2862 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU36_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2859 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU19_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -747275,17 +746492,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -747296,17 +746513,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 36] + WorkspaceCheck: [4, 0, 19] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -747333,7 +746550,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -747346,7 +746563,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 38 + GlobalSplitU: 30 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -747360,32 +746577,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 LSPB: 4 - LVCA: 2 - LVCB: 16 - LVPA: 16 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 46336 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 46336 + LdsOffsetMetadata_Blk: 86272 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -747394,10 +746611,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -747405,15 +746622,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -747434,14 +746651,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 5 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -747527,8 +746744,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2863 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU38_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2860 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU30_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -747537,16 +746754,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -747563,15 +746780,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 38] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 30] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -747605,14 +746822,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 30 + GlobalSplitU: 35 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -747621,33 +746838,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 32 + LSPA: 16 LSPB: 4 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -747667,14 +746884,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -747695,14 +746912,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -747788,8 +747005,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2864 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU30_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2861 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU35_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -747797,17 +747014,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -747818,7 +747035,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -747828,13 +747045,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 30] + WorkspaceCheck: [4, 0, 35] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -747855,7 +747072,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -747866,14 +747083,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -747882,32 +747099,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_7_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LVCA: 16 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48384 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48384 - LdsOffsetMetadata_Blk: 78080 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -747916,8 +747133,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -747927,15 +747144,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -747956,14 +747173,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -748049,8 +747266,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2865 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_7_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2862 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -748059,16 +747276,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -748085,17 +747302,17 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 20] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -748129,10 +747346,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 15 + GlobalSplitU: 24 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -748143,42 +747360,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_7_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_4_2 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 32 + LSPA: 128 LSPB: 4 - LVCA: 8 + LVCA: 2 LVCB: 16 - LVPA: 4 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57344 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -748188,15 +747405,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 112 - MacroTileA: 64 - MacroTileB: 112 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -748217,14 +747434,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 14 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -748310,8 +747527,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2866 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU15_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_4_2_WGM1 + SolutionIndex: 2863 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU24_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -748319,17 +747536,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -748340,17 +747557,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 15] + WorkspaceCheck: [4, 0, 24] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -748377,7 +747594,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -748390,10 +747607,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -748404,33 +747621,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG32_8_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 LSPB: 4 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LVCA: 4 + LVCB: 16 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -748438,10 +747655,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -748449,15 +747666,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -748478,14 +747695,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -748571,8 +747788,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2867 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIAV0_MIWT4_7_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2864 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -748580,17 +747797,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -748601,21 +747818,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 20] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -748638,7 +747855,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -748651,7 +747868,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 21 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -748665,32 +747882,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LVCA: 2 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 86272 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -748699,10 +747916,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -748710,15 +747927,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -748739,14 +747956,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -748832,8 +748049,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2868 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2865 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU21_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -748842,16 +748059,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -748868,15 +748085,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 21] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -748899,7 +748116,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -748912,10 +748129,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -748926,33 +748143,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 256 + LSPA: 128 LSPB: 4 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LVCA: 2 + LVCB: 32 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 25088 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25088 - LdsOffsetB_Blk: 90624 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 90624 - LdsPadA: 32 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -748960,10 +748177,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -748971,15 +748188,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -749000,14 +748217,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -749093,8 +748310,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2869 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_7_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2866 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU11_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -749102,17 +748319,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -749123,21 +748340,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 11] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -749160,7 +748377,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -749173,7 +748390,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -749187,32 +748404,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LVCA: 2 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 3584 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64768 - LdsNumElementsAlignedA: 28928 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28928 - LdsOffsetB_Blk: 94464 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64768 - LdsOffsetMetadata_Blk: 94464 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -749221,10 +748438,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -749232,15 +748449,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -749261,14 +748478,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 7 - NumLoadsB: 7 - NumLoadsCoalescedA: 7 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -749354,8 +748571,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2870 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA3584_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_7_NLCA7_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2867 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -749364,16 +748581,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -749390,15 +748607,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 20] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -749432,14 +748649,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 36 + GlobalSplitU: 14 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -749448,33 +748665,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 16 + LSPA: 32 LSPB: 4 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 16 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -749493,15 +748710,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -749522,14 +748739,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -749615,8 +748832,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2871 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU36_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2868 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU14_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -749624,17 +748841,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -749645,23 +748862,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 36] + WorkspaceCheck: [4, 0, 14] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -749682,7 +748899,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -749693,14 +748910,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 16 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 29 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -749709,33 +748926,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB2_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCB2_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 LSPB: 4 - LVCA: 16 - LVCB: 64 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 1 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -749743,8 +748960,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -749755,14 +748972,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -749783,14 +749000,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 16 - NumLoadsB: 32 - NumLoadsCoalescedA: 1 - NumLoadsCoalescedB: 2 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 16 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -749876,8 +749093,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2872 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB2_GSU16_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCB2_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2869 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU29_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -749885,17 +749102,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -749906,7 +749123,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -749916,13 +749133,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 29] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -749956,10 +749173,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 39 + GlobalSplitU: 7 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -749970,42 +749187,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_8_2 + LSCA: 64 LSCB: 128 - LSPA: 128 + LSPA: 32 LSPB: 4 - LVCA: 2 + LVCA: 8 LVCB: 16 - LVPA: 16 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -750015,15 +749232,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -750044,14 +749261,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -750137,8 +749354,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2873 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU39_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2870 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU7_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -750146,17 +749363,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -750167,17 +749384,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 39] + WorkspaceCheck: [4, 0, 7] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -750204,7 +749421,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -750217,10 +749434,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 31 + GlobalSplitU: 19 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -750231,33 +749448,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 LSCA: 32 - LSCB: 128 + LSCB: 64 LSPA: 64 LSPB: 4 LVCA: 4 - LVCB: 16 + LVCB: 8 LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 33024 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 78080 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 33024 + LdsOffsetMetadata_Blk: 78080 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -750265,8 +749482,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -750276,14 +749493,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 96 MacroTile1: 128 - MacroTileA: 32 + MacroTileA: 96 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -750305,14 +749522,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -750398,8 +749615,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2874 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU31_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2871 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU19_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -750407,17 +749624,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -750428,21 +749645,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 31] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 19] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -750465,7 +749682,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -750478,10 +749695,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 34 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -750492,34 +749709,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 LSPB: 4 - LVCA: 2 - LVCB: 16 - LVPA: 16 + LVCA: 16 + LVCB: 8 + LVPA: 2 LVPB: 1 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -750527,33 +749744,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -750566,14 +749783,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -750659,8 +749876,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2875 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU32_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2872 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU34_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -750668,17 +749885,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -750689,21 +749906,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 34] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -750726,7 +749943,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -750737,14 +749954,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 25 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -750753,32 +749970,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 - LSCB: 256 - LSPA: 128 + LSCB: 128 + LSPA: 16 LSPB: 4 - LVCA: 2 - LVCB: 32 + LVCA: 16 + LVCB: 16 LVPA: 16 LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -750787,8 +750004,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -750799,14 +750016,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -750827,14 +750044,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -750920,8 +750137,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2876 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU16_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2873 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU25_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -750937,9 +750154,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -750960,13 +750177,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 25] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -750987,7 +750204,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -750998,14 +750215,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 15 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -751014,33 +750231,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB512_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 - LSCB: 256 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 4 - LVCA: 4 - LVCB: 32 - LVPA: 8 + LVCA: 16 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 32 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -751048,8 +750265,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -751060,14 +750277,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -751089,12 +750306,12 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -751181,8 +750398,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2877 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU15_LBSPPA512_LBSPPB512_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2874 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -751190,17 +750407,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -751211,7 +750428,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -751221,18 +750438,18 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 15] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 16] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -751261,7 +750478,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 18 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -751275,7 +750492,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB0_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 LSPA: 128 @@ -751284,23 +750501,23 @@ LVCB: 16 LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 45568 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 12800 - LdsOffsetMetadata_Blk: 45568 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -751321,14 +750538,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 64 - MacroTileA: 48 - MacroTileB: 64 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -751349,14 +750566,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 3 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -751442,8 +750659,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2878 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB0_GRVWB8_GSU16_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2875 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU18_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -751458,10 +750675,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -751482,7 +750699,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 18] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -751522,10 +750739,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 28 + GlobalSplitU: 15 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -751536,33 +750753,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 32 + LSPA: 64 LSPB: 4 - LVCA: 8 + LVCA: 4 LVCB: 16 - LVPA: 4 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -751582,13 +750799,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveTile: [2, 2] + MIWaveTileA: 2 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 32 MacroTile1: 128 - MacroTileA: 64 + MacroTileA: 32 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -751610,13 +750827,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 + NumElementsPerThread: 16 NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 + NumLoadsA: 2 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -751703,8 +750920,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2879 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU28_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2876 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -751712,16 +750929,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 8 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 8 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -751733,7 +750950,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -751743,7 +750960,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 28] + WorkspaceCheck: [4, 0, 15] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -751770,7 +750987,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -751783,10 +751000,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -751797,22 +751014,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LVCA: 2 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 + LdsNumBytes: 49664 LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -751821,9 +751038,9 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 + LdsOffsetMetadata: 49664 LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -751831,10 +751048,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -751843,14 +751060,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -751871,8 +751088,8 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 3 NumLoadsB: 8 NumLoadsCoalescedA: 3 @@ -751964,8 +751181,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2880 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2877 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -751973,17 +751190,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -751994,7 +751211,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -752004,11 +751221,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 16] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -752044,10 +751261,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 14 + GlobalSplitU: 25 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -752058,68 +751275,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB0_WG32_4_2 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 + LSPA: 128 + LSPB: 4 + LVCA: 2 LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 0 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -752132,14 +751349,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -752225,8 +751442,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2881 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI32x32x1_SN_LDSB1_GRVWB8_GSU14_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIAV1_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB0_WG32_4_2_WGM1 + SolutionIndex: 2878 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU25_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -752234,17 +751451,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 64 - SubGroupA: 2 + SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -752255,17 +751472,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 14] + WorkspaceCheck: [4, 0, 25] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -752305,10 +751522,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 28 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -752319,33 +751536,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 32 + LSPA: 128 LSPB: 4 - LVCA: 8 + LVCA: 2 LVCB: 16 - LVPA: 4 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -752364,15 +751581,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -752393,14 +751610,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -752486,8 +751703,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2882 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU28_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2879 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -752495,17 +751712,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -752516,17 +751733,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 28] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -752553,7 +751770,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -752566,10 +751783,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 15 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -752580,33 +751797,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG16_16_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -752614,10 +751831,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -752626,14 +751843,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -752654,14 +751871,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -752747,8 +751964,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2883 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_5_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2880 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -752756,17 +751973,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -752777,21 +751994,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 15] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -752814,7 +752031,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -752827,10 +752044,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 7 + GlobalSplitU: 30 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -752841,44 +752058,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_8_2 - LSCA: 64 - LSCB: 128 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 LSPB: 4 - LVCA: 8 - LVCB: 16 - LVPA: 4 + LVCA: 4 + LVCB: 8 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -752886,15 +752103,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -752915,14 +752132,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -753008,8 +752225,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2884 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU7_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2881 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU30_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -753017,17 +752234,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -753038,21 +752255,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 7] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 30] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -753075,7 +752292,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -753088,10 +752305,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 15 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -753102,17 +752319,17 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_16_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 4 - LVCA: 16 - LVCB: 8 - LVPA: 2 + LVCA: 8 + LVCB: 16 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 53248 @@ -753129,7 +752346,7 @@ LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 81920 LdsPadA: 0 - LdsPadB: 8 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -753137,33 +752354,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -753176,8 +752393,8 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 @@ -753269,8 +752486,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2885 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_4_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2882 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -753278,17 +752495,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -753299,21 +752516,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 15] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -753349,7 +752566,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -753363,7 +752580,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 LSCA: 32 LSCB: 64 LSPA: 64 @@ -753372,23 +752589,23 @@ LVCB: 8 LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadA: 1536 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 20992 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20992 - LdsOffsetB_Blk: 86528 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 86528 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -753400,7 +752617,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -753409,14 +752626,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -753437,14 +752654,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 8 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -753530,8 +752747,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2886 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA2560_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT10_4_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2883 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -753546,10 +752763,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -753570,7 +752787,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] + WorkspaceCheck: [4, 0, 20] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -753597,7 +752814,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -753608,14 +752825,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 57 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -753624,34 +752841,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 LSPB: 4 - LVCA: 8 - LVCB: 8 - LVPA: 4 + LVCA: 16 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 24576 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24576 - LdsOffsetB_Blk: 90112 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 90112 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -753659,33 +752876,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -753698,14 +752915,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -753791,8 +753008,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2887 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU57_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT3_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2884 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -753807,10 +753024,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -753827,17 +753044,17 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 57] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 20] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -753869,14 +753086,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 19 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -753885,33 +753102,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG32_8_1 - LSCA: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 LSPA: 16 - LSPB: 16 + LSPB: 4 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -753930,15 +753147,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -753959,14 +753176,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -754052,8 +753269,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2888 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU19_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG32_8_1_WGM1 + SolutionIndex: 2885 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -754061,17 +753278,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -754082,23 +753299,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 19] + WorkspaceCheck: [4, 0, 11] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -754119,7 +753336,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -754132,7 +753349,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 30 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -754146,32 +753363,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NLCA5_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LVCA: 2 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 2560 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46336 - LdsNumElementsAlignedA: 20736 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 20736 - LdsOffsetB_Blk: 86272 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46336 - LdsOffsetMetadata_Blk: 86272 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -754180,10 +753397,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -754191,15 +753408,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 160 - MacroTileA: 160 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -754220,14 +753437,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 5 - NumLoadsCoalescedA: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -754313,8 +753530,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2889 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU30_LBSPPA2560_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NLCA5_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2886 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -754323,16 +753540,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -754349,15 +753566,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 30] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 20] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -754391,14 +753608,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 35 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -754407,33 +753624,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 16 + LSPA: 64 LSPB: 4 - LVCA: 16 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -754453,13 +753670,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 32 MacroTile1: 192 - MacroTileA: 16 + MacroTileA: 32 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -754481,13 +753698,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 + NumElementsPerThread: 24 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 + NumLoadsA: 2 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -754574,8 +753791,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2890 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU35_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2887 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -754583,16 +753800,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -754604,7 +753821,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -754614,13 +753831,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 35] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -754652,14 +753869,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 12 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -754668,32 +753885,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 16 + LSPA: 128 LSPB: 4 - LVCA: 16 + LVCA: 2 LVCB: 16 LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 768 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -754714,13 +753931,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 48 MacroTile1: 128 - MacroTileA: 16 + MacroTileA: 48 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -754742,13 +753959,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -754835,8 +754052,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2891 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2888 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU12_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -754851,9 +754068,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 12 ThreadTile1: 2 - ThreadTileA: 4 + ThreadTileA: 12 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -754875,13 +754092,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] + WorkspaceCheck: [4, 0, 12] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -754915,7 +754132,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 24 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -754929,7 +754146,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 LSPA: 128 @@ -755096,8 +754313,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2892 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU24_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2889 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -755136,7 +754353,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 24] + WorkspaceCheck: [4, 0, 11] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -755176,10 +754393,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -755190,33 +754407,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 64 + LSPA: 128 LSPB: 4 - LVCA: 4 + LVCA: 2 LVCB: 16 - LVPA: 8 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 768 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -755236,13 +754453,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 48 MacroTile1: 128 - MacroTileA: 32 + MacroTileA: 48 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -755264,13 +754481,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -755357,8 +754574,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2893 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2890 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -755366,16 +754583,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 12 ThreadTile1: 2 - ThreadTileA: 8 + ThreadTileA: 12 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -755387,7 +754604,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -755397,7 +754614,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] + WorkspaceCheck: [4, 0, 11] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -755437,10 +754654,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 21 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -755451,33 +754668,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 128 + LSPA: 32 LSPB: 4 - LVCA: 2 + LVCA: 8 LVCB: 16 - LVPA: 16 + LVPA: 4 LVPB: 1 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -755496,15 +754713,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -755525,14 +754742,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -755618,8 +754835,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2894 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU21_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2891 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -755627,17 +754844,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -755648,17 +754865,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 21] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -755685,7 +754902,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -755696,14 +754913,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 11 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -755712,32 +754929,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 - LSCB: 256 - LSPA: 128 + LSCB: 128 + LSPA: 16 LSPB: 4 - LVCA: 2 - LVCB: 32 + LVCA: 16 + LVCB: 16 LVPA: 16 LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -755746,8 +754963,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -755758,14 +754975,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] + MIWaveTile: [1, 2] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 128 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -755786,13 +755003,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -755879,8 +755096,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2895 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWB8_GSU11_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2892 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -755896,9 +755113,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -755919,13 +755136,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 10] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -755957,14 +755174,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -755973,32 +755190,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 128 + LSPA: 16 LSPB: 4 - LVCA: 2 + LVCA: 16 LVCB: 16 LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -756019,13 +755236,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 + MIWaveTile: [1, 2] + MIWaveTileA: 1 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 16 MacroTile1: 128 - MacroTileA: 48 + MacroTileA: 16 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -756047,13 +755264,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -756140,8 +755357,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2896 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU20_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2893 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -756156,9 +755373,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 4 ThreadTile1: 2 - ThreadTileA: 12 + ThreadTileA: 4 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -756180,13 +755397,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] + WorkspaceCheck: [4, 0, 8] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -756218,14 +755435,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 14 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -756234,33 +755451,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 32 - LSPB: 4 - LVCA: 8 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 1024 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -756279,15 +755496,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -756308,14 +755525,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 + NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -756401,8 +755618,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2897 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU14_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2894 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -756410,16 +755627,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 8 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -756431,23 +755648,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 14] + WorkspaceCheck: [4, 0, 10] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -756468,7 +755685,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -756481,10 +755698,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 29 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -756495,33 +755712,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -756529,8 +755746,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -756541,14 +755758,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -756569,14 +755786,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -756662,8 +755879,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2898 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU29_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2895 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -756671,17 +755888,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -756692,21 +755909,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 29] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 10] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -756742,10 +755959,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 7 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -756756,42 +755973,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_8_2 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 32 + LSPA: 64 LSPB: 4 - LVCA: 8 + LVCA: 4 LVCB: 16 - LVPA: 4 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -756801,15 +756018,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -756831,13 +756048,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -756923,8 +756140,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2899 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWB8_GSU7_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2896 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -756932,16 +756149,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 16 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -756953,17 +756170,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 7] + WorkspaceCheck: [4, 0, 11] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -756990,7 +756207,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -757003,7 +756220,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 19 + GlobalSplitU: 9 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -757017,32 +756234,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_LDSB1_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG32_8_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 + LVCA: 2 + LVCB: 16 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33024 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 78080 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33024 - LdsOffsetMetadata_Blk: 78080 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -757051,8 +756268,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -757062,14 +756279,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 48 MacroTile1: 128 - MacroTileA: 96 + MacroTileA: 48 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -757091,14 +756308,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 3 - NumLoadsB: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -757184,8 +756401,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2900 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_LDSB1_GRVWB8_GSU19_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2897 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU9_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -757194,16 +756411,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 4 + ThreadTile1: 2 ThreadTileA: 12 - ThreadTileB: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -757220,15 +756437,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 19] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 9] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -757251,7 +756468,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -757264,10 +756481,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 34 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -757278,34 +756495,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LDSB1_GRVWB8_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 8 - LVPA: 2 - LVPB: 1 - LdsBlockSizePerPadA: 0 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -757313,33 +756530,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -757352,14 +756569,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -757445,8 +756662,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2901 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LDSB1_GRVWB8_GSU34_LBSPPA0_LBSPPB128_LPA0_LPB8_LRVW8_MIAV0_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG64_4_1_WGM1 + SolutionIndex: 2898 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -757454,17 +756671,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -757475,21 +756692,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 34] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 8] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -757523,14 +756740,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 25 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -757539,12 +756756,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 16 + LSPA: 128 LSPB: 4 - LVCA: 16 + LVCA: 2 LVCB: 16 LVPA: 16 LVPB: 1 @@ -757615,11 +756832,11 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 + NumLoadsA: 1 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -757706,8 +756923,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2902 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU25_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2899 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -757746,13 +756963,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 25] + WorkspaceCheck: [4, 0, 10] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -757784,14 +757001,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -757800,33 +757017,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 16 + LSPA: 64 LSPB: 4 - LVCA: 16 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 1 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -757846,14 +757063,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -757874,14 +757091,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -757967,8 +757184,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2903 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2900 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -757976,17 +757193,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -757997,7 +757214,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -758007,13 +757224,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 10] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -758034,7 +757251,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -758045,14 +757262,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 18 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -758061,37 +757278,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 LSCA: 16 - LSCB: 128 - LSPA: 128 + LSCB: 256 + LSPA: 16 LSPB: 4 - LVCA: 2 - LVCB: 16 + LVCA: 16 + LVCB: 32 LVPA: 16 LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -758106,15 +757323,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 128 + MacroTile1: 96 MacroTileA: 16 - MacroTileB: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -758135,14 +757352,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 16 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -758228,8 +757445,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2904 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU18_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2901 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -758239,15 +757456,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -758264,17 +757481,17 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 18] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -758295,7 +757512,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -758308,10 +757525,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 15 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -758322,22 +757539,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPB16_LRVW8_MIWT1_3_NLCB1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 256 + LSPA: 128 LSPB: 4 - LVCA: 4 - LVCB: 16 - LVPA: 8 + LVCA: 2 + LVCB: 32 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -758346,13 +757563,13 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -758367,15 +757584,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 128 - MacroTileA: 32 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -758396,14 +757613,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -758489,8 +757706,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2905 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2902 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB512_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -758498,17 +757715,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -758519,21 +757736,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 15] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -758567,14 +757784,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -758583,32 +757800,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 128 + LSPA: 16 LSPB: 4 - LVCA: 2 + LVCA: 16 LVCB: 16 LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -758629,13 +757846,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 + MIWaveTile: [1, 2] + MIWaveTileA: 1 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 16 MacroTile1: 128 - MacroTileA: 48 + MacroTileA: 16 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -758657,13 +757874,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -758750,8 +757967,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2906 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2903 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -758766,9 +757983,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 4 ThreadTile1: 2 - ThreadTileA: 12 + ThreadTileA: 4 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -758790,13 +758007,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 5] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -758828,14 +758045,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 25 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -758844,15 +758061,15 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 LVPA: 16 - LVPB: 1 + LVPB: 2 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 @@ -758920,11 +758137,11 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 + NumLoadsA: 8 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -759011,8 +758228,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2907 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU25_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2904 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -759044,6 +758261,267 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 + WorkGroupMappingXCC: 1 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 6] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: true + ActivationFused: true + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, + UseUniversalArgs: true} + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsInitCVgprs: false + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: false + TransposeB: false + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2905 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SourceSwap: 1 + StaggerU: 0 + StaggerUMapping: 0 + StaggerUStride: 0 + StorePriorityOpt: 0 + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 @@ -759051,13 +758529,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 25] + WorkspaceCheck: [4, 0, 4] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -759091,7 +758569,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -759105,7 +758583,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_2_NLCB1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 LSPA: 128 @@ -759272,8 +758750,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2908 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2906 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -759312,7 +758790,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 5] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -759339,7 +758817,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -759352,10 +758830,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 15 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -759366,37 +758844,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB0_WG16_16_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPB16_LRVW8_MIWT1_3_NLCB1_WSGRB2_WG16_8_2 + LSCA: 16 + LSCB: 256 + LSPA: 128 + LSPB: 4 + LVCA: 2 + LVCB: 32 + LVPA: 16 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -759411,15 +758889,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -759440,14 +758918,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -759533,8 +759011,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2909 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB0_WG16_16_1_WGM1 + SolutionIndex: 2907 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB512_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -759542,17 +759020,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -759563,21 +759041,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 15] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -759600,7 +759078,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -759613,10 +759091,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 30 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -759627,44 +759105,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_5_NLCB1_WSGRB0_WG16_8_2 + LSCA: 16 + LSCB: 128 + LSPA: 128 + LSPB: 16 + LVCA: 2 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -759672,15 +759150,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 160 + MacroTileA: 16 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -759701,14 +759179,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 1 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -759794,8 +759272,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2910 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWB8_GSU30_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV0_MIWT6_4_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2908 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_5_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -759803,17 +759281,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -759824,21 +759302,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 30] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 5] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -759872,14 +759350,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 15 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -759888,33 +759366,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SVW4_VWA4_WSGRB2_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 32 + LSPA: 16 LSPB: 4 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 16384 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16384 - LdsOffsetB_Blk: 81920 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 81920 - LdsPadA: 0 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -759934,14 +759412,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -759962,14 +759440,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -760055,8 +759533,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2911 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWB8_GSU15_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIAV1_MIWT4_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW4_VWA4_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2909 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -760064,17 +759542,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -760085,7 +759563,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -760095,13 +759573,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 15] + WorkspaceCheck: [4, 0, 5] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -760122,7 +759600,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -760133,14 +759611,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -760149,33 +759627,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 - LSCB: 64 - LSPA: 64 - LSPB: 4 - LVCA: 4 - LVCB: 8 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 + LSCA: 16 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 32 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -760183,8 +759661,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -760195,13 +759673,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 96 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -760223,14 +759701,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -760316,8 +759794,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2912 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIAV1_MIWT6_3_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2910 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -760325,16 +759803,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 24 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -760346,23 +759824,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 5] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -760383,7 +759861,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -760396,7 +759874,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -760410,37 +759888,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 LSCA: 16 - LSCB: 128 + LSCB: 256 LSPA: 16 LSPB: 4 LVCA: 16 - LVCB: 16 + LVCB: 32 LVPA: 16 LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -760455,15 +759933,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [1, 2] MIWaveTile: [1, 3] MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 192 + MacroTile1: 96 MacroTileA: 16 - MacroTileB: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -760484,13 +759962,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 16 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 16 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -760577,8 +760055,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2913 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2911 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -760588,9 +760066,9 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -760613,15 +760091,15 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -760655,14 +760133,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 11 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -760671,22 +760149,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_6_NLCB1_WSGRB0_WG16_8_2 LSCA: 16 LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 + LSPA: 128 + LSPB: 16 + LVCA: 2 LVCB: 16 LVPA: 16 - LVPB: 1 + LVPB: 2 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -760695,18 +760173,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -760716,15 +760194,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -760745,14 +760223,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -760838,8 +760316,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2914 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2912 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_6_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -760849,15 +760327,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 6 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -760871,20 +760349,20 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] + WorkspaceCheck: [4, 0, 5] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -760916,14 +760394,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 20 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -760932,15 +760410,15 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 LVPA: 16 - LVPB: 1 + LVPB: 2 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 @@ -761008,11 +760486,11 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 + NumLoadsA: 8 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -761099,8 +760577,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2915 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU20_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2913 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -761132,20 +760610,20 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] + WorkspaceCheck: [4, 0, 3] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -761177,14 +760655,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -761193,33 +760671,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + LSCA: 16 LSCB: 128 - LSPA: 64 + LSPA: 16 LSPB: 4 - LVCA: 4 + LVCA: 16 LVCB: 16 - LVPA: 8 + LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -761239,13 +760717,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 32 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -761261,19 +760739,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 + NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 + NumLoadsA: 8 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -761360,8 +760838,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2916 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2914 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -761369,16 +760847,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 8 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -761390,7 +760868,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 2 @@ -761400,13 +760878,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 3] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -761438,14 +760916,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 12 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -761454,32 +760932,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 LSCA: 16 LSCB: 128 - LSPA: 128 + LSPA: 16 LSPB: 4 - LVCA: 2 + LVCA: 16 LVCB: 16 LVPA: 16 LVPB: 1 - LdsBlockSizePerPadA: 768 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -761500,13 +760978,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 + MIWaveTile: [1, 2] + MIWaveTileA: 1 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 16 MacroTile1: 128 - MacroTileA: 48 + MacroTileA: 16 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -761522,19 +761000,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -761621,8 +761099,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2917 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU12_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2915 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -761637,9 +761115,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 4 ThreadTile1: 2 - ThreadTileA: 12 + ThreadTileA: 4 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -761661,13 +761139,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 12] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -761699,14 +761177,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 11 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -761715,12 +761193,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 LSCA: 16 LSCB: 128 - LSPA: 128 + LSPA: 16 LSPB: 4 - LVCA: 2 + LVCA: 16 LVCB: 16 LVPA: 16 LVPB: 1 @@ -761728,9 +761206,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 + LdsNumBytes: 50688 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -761739,18 +761217,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 + LdsOffsetMetadata: 50688 LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -761760,15 +761238,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 128 + MacroTile1: 160 MacroTileA: 16 - MacroTileB: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -761783,20 +761261,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -761882,8 +761360,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2918 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2916 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -761893,15 +761371,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 5 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -761918,17 +761396,17 @@ WaveSeparateGlobalReadB: 2 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -761960,14 +761438,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 11 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -761976,42 +761454,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCB1_SVW1_VWA1_WSGRB0_WG16_8_2 LSCA: 16 LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 768 + LVPB: 2 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -762021,15 +761499,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 160 + MacroTileA: 16 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -762050,14 +761528,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 8 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -762143,8 +761621,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2919 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2917 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -762154,15 +761632,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -762176,20 +761654,20 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -762221,14 +761699,14 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 1 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: false + GuaranteeNoPartialA: true GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] @@ -762237,42 +761715,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_NLCB1_SVW1_VWA1_WSGRB0_WG16_8_2 + LSCA: 16 LSCB: 128 - LSPA: 32 - LSPB: 4 - LVCA: 8 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 1024 + LVPA: 16 + LVPB: 2 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 32 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -762282,15 +761760,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -762305,20 +761783,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -762404,8 +761882,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2920 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWB8_GSU16_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIAV1_MIWT2_5_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG32_8_1_WGM1 + SolutionIndex: 2918 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -762413,17 +761891,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 6 + ThreadTileA: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -762434,23 +761912,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: false + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -762469,7 +761947,6 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' DepthU: 128 DirectToLds: false @@ -762480,51 +761957,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NEPBS16_NLCA1_SVW2_VWA2_WG16_16_1 + LSCA: 32 LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 + LSPA: 64 + LSPB: 16 + LVCA: 4 LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 + LdsNumElements: 13824 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 16384 LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 13824 + LdsOffsetMetadata_Blk: 20992 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -762535,7 +762009,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -762544,14 +762018,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -762573,13 +762047,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -762588,7 +762062,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -762641,7 +762115,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -762652,8 +762125,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -762665,26 +762138,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2921 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2919 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NEPBS16_NLCA1_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -762695,23 +762168,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -762730,7 +762203,6 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' DepthU: 128 DirectToLds: false @@ -762741,50 +762213,47 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NEPBS16_NLCA1_SVW1_VWA1_WG64_4_1 + LSCA: 64 LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 + LSPA: 32 + LSPB: 16 + LVCA: 8 LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElements: 15360 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 6912 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 24832 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 15360 + LdsOffsetMetadata_Blk: 24832 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -762796,7 +762265,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -762804,15 +762273,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -762833,14 +762302,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -762849,7 +762318,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -762902,7 +762371,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -762913,8 +762381,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -762926,26 +762394,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2922 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2920 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NEPBS16_NLCA1_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -762959,20 +762427,20 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -762991,7 +762459,6 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' DepthU: 128 DirectToLds: false @@ -763002,51 +762469,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 - GroupLoadStore: false - GuaranteeNoPartialA: true + GlobalWriteVectorWidth: 4 + GroupLoadStore: 0 + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NEPBS0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 LSCB: 128 - LSPA: 16 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 16 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 26624 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -763057,7 +762521,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -763066,14 +762530,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -763093,15 +762557,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -763110,7 +762574,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -763163,7 +762627,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -763174,8 +762637,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -763187,26 +762650,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2923 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 + SolutionIndex: 2921 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NEPBS0_NLCA1_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -763217,23 +762680,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -763252,9 +762715,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -763263,14 +762725,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -763278,36 +762738,35 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT96x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_1_NEPBS16_NLCA3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElements: 11520 + LdsNumElementsAlignedA: 6400 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 6400 + LdsOffsetB_Blk: 22784 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 11520 + LdsOffsetMetadata_Blk: 22784 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -763315,10 +762774,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -763327,14 +762786,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [6, 1] + MIWaveTileA: 6 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 64 + MacroTileA: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -763355,14 +762814,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 3 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -763371,7 +762830,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -763424,7 +762883,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -763435,8 +762893,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -763448,26 +762906,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2924 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 + SolutionIndex: 2922 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT96x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_1_NEPBS16_NLCA3_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 1 + ThreadTileA: 24 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -763478,27 +762936,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -763513,7 +762971,6 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' DepthU: 128 DirectToLds: false @@ -763524,50 +762981,47 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 11 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 - GroupLoadStore: false + GroupLoadStore: 0 GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 LSCB: 128 - LSPA: 64 - LSPB: 4 - LVCA: 4 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 - LVPA: 8 - LVPB: 1 - LdsBlockSizePerPadA: 512 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 28416 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 11520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 28416 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -763579,7 +763033,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -763587,15 +763041,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -763615,15 +763069,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -763632,7 +763086,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -763685,7 +763139,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -763696,8 +763149,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -763709,26 +763162,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2925 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU11_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2923 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -763742,14 +763195,14 @@ VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -763774,9 +763227,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -763785,51 +763237,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 9 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 - GroupLoadStore: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: 0 GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_7_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 768 - LdsBlockSizePerPadB: 256 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 36864 + LdsNumElements: 17408 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 8960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -763837,10 +763286,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -763848,15 +763297,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 112 + MacroTileA: 128 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -763876,15 +763325,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 - NumLoadsCoalescedA: 3 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -763893,7 +763342,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -763946,7 +763395,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -763957,8 +763405,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -763970,26 +763418,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2926 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWB8_GSU9_LBSPPA768_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2924 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_7_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -764000,27 +763448,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 9] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -764035,9 +763483,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -764046,50 +763493,47 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 4 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 - GroupLoadStore: false + GroupLoadStore: 0 GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT112x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_LBSPPA1792_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_4_NEPBS0_NLCA7_SVW1_VWA1_WG16_16_1 LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 1792 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElements: 27776 + LdsNumElementsAlignedA: 7296 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 7296 + LdsOffsetB_Blk: 40064 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 27776 + LdsOffsetMetadata_Blk: 40064 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -764098,10 +763542,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -764110,14 +763554,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -764137,12 +763581,12 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 NumLoadsB: 8 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 8 @@ -764154,7 +763598,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -764207,7 +763651,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -764218,8 +763661,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -764231,12 +763674,12 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2927 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 + SolutionIndex: 2925 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT112x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSU1_LBSPPA1792_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_4_NEPBS0_NLCA7_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 @@ -764247,10 +763690,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -764268,20 +763711,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -764296,9 +763739,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -764307,14 +763749,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 10 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -764322,47 +763762,46 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x144x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_9_NEPBS16_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 9344 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 4992 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 20736 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 9344 + LdsOffsetMetadata_Blk: 20736 + LdsPadA: 32 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -764370,15 +763809,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 9] + MIWaveTileA: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 144 + MacroTileA: 128 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -764399,14 +763838,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 2 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -764415,7 +763854,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -764468,7 +763907,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -764479,8 +763917,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -764492,26 +763930,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2928 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2926 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x144x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_9_NEPBS16_NLCA1_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 9 + ThreadTileA: 8 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -764522,28 +763960,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 + _staggerStrideShift: 2 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -764557,7 +763995,6 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' DepthU: 128 DirectToLds: false @@ -764568,14 +764005,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -764583,36 +764018,35 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SVW2_VWA2_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS16_NLCA1_SVW1_VWA1_WG32_4_1 LSCA: 32 LSCB: 128 - LSPA: 64 - LSPB: 4 + LSPA: 32 + LSPB: 8 LVCA: 4 LVCB: 16 - LVPA: 8 + LVPA: 4 LVPB: 1 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 14848 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 2304 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 12544 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 32 + LdsOffsetMetadata: 4352 + LdsOffsetMetadata_Blk: 12544 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -764623,7 +764057,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -764631,15 +764065,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 192 + MacroTile1: 16 MacroTileA: 32 - MacroTileB: 192 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -764660,15 +764094,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -764676,7 +764110,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -764729,7 +764163,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -764740,8 +764173,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -764753,26 +764186,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2929 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWB8_GSU10_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2927 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS16_NLCA1_SVW1_VWA1_WG32_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -764783,17 +764216,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -764818,9 +764251,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -764829,62 +764261,59 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 - GroupLoadStore: false - GuaranteeNoPartialA: true + GlobalWriteVectorWidth: 4 + GroupLoadStore: 0 + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA3072_LBSPPB128_LPA0_LPB16_LRVW8_MIWT12_2_NEPBS0_NLCA3_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 52224 + LdsNumElements: 22528 + LdsNumElementsAlignedA: 12288 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12288 + LdsOffsetB_Blk: 45056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 + LdsOffsetMetadata: 22528 + LdsOffsetMetadata_Blk: 45056 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -764892,15 +764321,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 2] + MIWaveTileA: 12 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -764920,15 +764349,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 16 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -764937,7 +764366,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -764990,7 +764419,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -765001,8 +764429,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -765014,26 +764442,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2930 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2928 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA0_LPB16_LRVW8_MIWT12_2_NEPBS0_NLCA3_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 2 + ThreadTileA: 48 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -765044,27 +764472,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -765079,9 +764507,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -765090,14 +764517,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -765105,47 +764530,46 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPB16_LRVW8_MIWT1_3_NLCB1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_4_NEPBS16_NLCA1_SVW8_VWA8_WG32_8_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 52224 + LdsNumElements: 12544 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 4352 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 24576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 12544 + LdsOffsetMetadata_Blk: 24576 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -765153,15 +764577,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -765182,14 +764606,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -765198,7 +764622,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -765251,7 +764675,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -765262,8 +764685,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -765275,26 +764698,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2931 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB512_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2929 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_4_NEPBS16_NLCA1_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 8 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -765305,27 +764728,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -765340,9 +764763,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -765351,51 +764773,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NEPBS16_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElements: 9472 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 20736 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 9472 + LdsOffsetMetadata_Blk: 20736 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -765403,10 +764822,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -765414,15 +764833,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -765443,14 +764862,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 + NumElementsPerThread: 16 NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -765459,7 +764878,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -765512,7 +764931,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -765523,8 +764941,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -765536,25 +764954,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2932 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2930 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NEPBS16_NLCA1_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 2 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -765566,27 +764984,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -765601,7 +765019,6 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' DepthU: 128 DirectToLds: false @@ -765612,51 +765029,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NEPBS16_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 16 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 16 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 13312 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 25088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 13312 + LdsOffsetMetadata_Blk: 25088 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -765667,7 +765081,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -765675,15 +765089,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -765704,14 +765118,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -765720,7 +765134,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -765773,7 +765187,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -765784,8 +765197,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -765797,26 +765210,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2933 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU6_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 + SolutionIndex: 2931 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NEPBS16_NLCA1_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -765827,23 +765240,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -765862,9 +765275,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -765873,51 +765285,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_2_NEPBS16_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElements: 14336 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 20480 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 14336 + LdsOffsetMetadata_Blk: 20480 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -765925,10 +765334,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -765937,13 +765346,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 64 MacroTile1: 128 - MacroTileA: 16 + MacroTileA: 64 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -765965,14 +765374,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 + NumElementsPerThread: 32 NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -765981,7 +765390,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -766034,7 +765443,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -766045,8 +765453,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -766058,25 +765466,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2934 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2932 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_2_NEPBS16_NLCA1_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 16 ThreadTile1: 2 - ThreadTileA: 4 + ThreadTileA: 16 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -766088,27 +765496,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -766123,9 +765531,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -766134,51 +765541,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 - GroupLoadStore: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: 0 GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_2_NLCB1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 4 - LVCA: 2 - LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_4_NEPBS0_NLCA1_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElements: 24576 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 36864 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 24576 + LdsOffsetMetadata_Blk: 36864 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -766186,10 +765590,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -766198,14 +765602,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -766225,14 +765629,14 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -766242,7 +765646,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -766295,7 +765699,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -766306,8 +765709,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -766319,26 +765722,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2935 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_2_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2933 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_4_NEPBS0_NLCA1_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -766349,28 +765752,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 + _staggerStrideShift: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -766384,9 +765787,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -766395,13 +765797,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false @@ -766410,47 +765810,46 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPB16_LRVW8_MIWT1_3_NLCB1_WSGRB2_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS16_NLCA1_SVW1_VWA1_WG16_4_1 LSCA: 16 - LSCB: 256 - LSPA: 128 + LSCB: 128 + LSPA: 32 LSPB: 4 LVCA: 2 - LVCB: 32 - LVPA: 16 + LVCB: 16 + LVPA: 4 LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 52224 + LdsNumElements: 12800 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 2304 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 10496 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 2304 + LdsOffsetMetadata_Blk: 10496 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -766458,15 +765857,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 96 + MacroTile1: 16 MacroTileA: 16 - MacroTileB: 96 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -766487,15 +765886,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 64 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -766503,7 +765902,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -766556,7 +765955,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -766567,8 +765965,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -766580,26 +765978,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2936 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB512_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2934 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS16_NLCA1_SVW1_VWA1_WG16_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -766613,18 +766011,18 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -766645,9 +766043,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -766656,62 +766053,59 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 4 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 - GroupLoadStore: false + GroupLoadStore: 0 GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_5_NLCB1_WSGRB0_WG16_8_2 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT112x192x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_LBSPPA1792_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_3_NEPBS0_NLCA7_SVW1_VWA1_WG16_16_1 LSCA: 16 - LSCB: 128 - LSPA: 128 - LSPB: 16 - LVCA: 2 - LVCB: 16 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 1792 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumElements: 22656 + LdsNumElementsAlignedA: 7296 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 7296 + LdsOffsetB_Blk: 40064 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 22656 + LdsOffsetMetadata_Blk: 40064 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -766719,15 +766113,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 3] + MIWaveTileA: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 112 + MacroTile1: 192 + MacroTileA: 112 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -766747,15 +766141,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 1 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 6 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -766764,7 +766158,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -766817,7 +766211,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -766828,8 +766221,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -766841,26 +766234,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2937 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_5_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_8_2_WGM1 + SolutionIndex: 2935 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT112x192x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSU1_LBSPPA1792_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_3_NEPBS0_NLCA7_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 3 + ThreadTileA: 28 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -766877,21 +766270,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -766906,9 +766299,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -766917,51 +766309,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 - GroupLoadStore: false - GuaranteeNoPartialA: true + GlobalWriteVectorWidth: 2 + GroupLoadStore: 0 + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_3_NEPBS0_NLCA3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 20224 + LdsNumElementsAlignedA: 12544 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12544 + LdsOffsetB_Blk: 45312 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 20224 + LdsOffsetMetadata_Blk: 45312 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -766969,10 +766358,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -766980,15 +766369,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -767008,15 +766397,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -767025,7 +766414,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -767078,7 +766467,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -767089,8 +766477,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -767102,25 +766490,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2938 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2936 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_3_NEPBS0_NLCA3_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 24 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 24 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -767132,27 +766520,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -767167,9 +766555,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -767178,51 +766565,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 - GroupLoadStore: false - GuaranteeNoPartialA: true + GlobalWriteVectorWidth: 4 + GroupLoadStore: 0 + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 - LSCA: 16 - LSCB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_8_NEPBS0_NLCA1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 64 LSPA: 16 - LSPB: 16 + LSPB: 32 LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 28672 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 28672 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -767230,10 +766614,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -767241,15 +766625,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -767269,15 +766653,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -767286,7 +766670,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -767339,7 +766723,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -767350,8 +766733,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -767363,26 +766746,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2939 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 + SolutionIndex: 2937 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_8_NEPBS0_NLCA1_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -767393,27 +766776,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -767428,9 +766811,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -767439,62 +766821,59 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 - GroupLoadStore: false - GuaranteeNoPartialA: true + GroupLoadStore: 0 + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 256 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 32 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_5_NEPBS0_NLCA3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 52224 + LdsNumElements: 19072 + LdsNumElementsAlignedA: 6272 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 6272 + LdsOffsetB_Blk: 39040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 19072 + LdsOffsetMetadata_Blk: 39040 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -767502,15 +766881,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 96 + MacroTile1: 160 + MacroTileA: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -767530,15 +766909,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 16 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -767547,7 +766926,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -767600,7 +766979,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -767611,8 +766989,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -767624,26 +767002,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2940 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2938 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_5_NEPBS0_NLCA3_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -767657,24 +767035,24 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -767689,7 +767067,6 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' DepthU: 128 DirectToLds: false @@ -767700,62 +767077,59 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 - GroupLoadStore: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: 0 GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_6_NLCB1_WSGRB0_WG16_8_2 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NEPBS0_NLCA1_SVW2_VWA2_WG32_8_1 + LSCA: 64 LSCB: 128 - LSPA: 128 + LSPA: 32 LSPB: 16 - LVCA: 2 + LVCA: 8 LVCB: 16 - LVPA: 16 + LVPA: 4 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 22528 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 22528 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -767763,15 +767137,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -767791,15 +767165,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 24 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -767808,7 +767182,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -767861,7 +767235,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -767872,8 +767245,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -767885,26 +767258,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2941 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPB16_LRVW8_MIWT1_6_NLCB1_SU0_SUM0_SUS0_WSGRB0_WG16_8_2_WGM1 + SolutionIndex: 2939 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NEPBS0_NLCA1_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -767915,17 +767288,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -767936,7 +767309,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -767950,7 +767323,6 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' DepthU: 128 DirectToLds: false @@ -767961,50 +767333,47 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 - GroupLoadStore: false - GuaranteeNoPartialA: true + GroupLoadStore: 0 + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCB1_SVW1_VWA1_WSGRB0_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS0_NLCA1_SVW1_VWA1_WG32_8_1 + LSCA: 32 LSCB: 128 - LSPA: 16 + LSPA: 64 LSPB: 16 - LVCA: 16 + LVCA: 4 LVCB: 16 - LVPA: 16 + LVPA: 8 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 25344 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 20736 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 4352 + LdsOffsetMetadata_Blk: 20736 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -768016,7 +767385,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -768024,15 +767393,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -768052,15 +767421,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -768069,7 +767438,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -768122,7 +767491,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -768133,8 +767501,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -768146,26 +767514,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2942 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_16_1_WGM1 + SolutionIndex: 2940 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS0_NLCA1_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -768182,17 +767550,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -768211,9 +767579,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -768222,50 +767589,47 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 4 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT80x128x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_LBSPPA1280_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_2_NEPBS16_NLCA5_SVW1_VWA1_WG16_16_1 LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 16 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPB: 4 + LdsBlockSizePerPadA: 1280 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElements: 15488 + LdsNumElementsAlignedA: 5248 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 5248 + LdsOffsetB_Blk: 21632 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 15488 + LdsOffsetMetadata_Blk: 21632 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -768274,10 +767638,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -768286,14 +767650,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 80 + MacroTile1: 128 + MacroTileA: 80 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -768308,20 +767672,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 - NumLoadsCoalescedA: 1 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 + NumLoadsB: 4 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -768330,7 +767694,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -768383,7 +767747,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -768394,8 +767757,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -768407,13 +767770,13 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2943 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2941 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT80x128x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSU1_LBSPPA1280_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_2_NEPBS16_NLCA5_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 @@ -768423,10 +767786,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 2 + ThreadTileA: 20 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -768440,24 +767803,24 @@ VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -768472,9 +767835,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -768483,51 +767845,48 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCB1_SVW1_VWA1_WSGRB2_WG16_16_1 - LSCA: 16 - LSCB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_6_NEPBS16_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 LSPA: 16 - LSPB: 4 + LSPB: 32 LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElements: 16128 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 24832 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 16128 + LdsOffsetMetadata_Blk: 24832 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -768535,10 +767894,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -768546,15 +767905,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -768569,20 +767928,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -768591,7 +767950,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -768644,7 +768003,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -768655,8 +768013,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -768668,26 +768026,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2944 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_16_1_WGM1 + SolutionIndex: 2942 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_6_NEPBS16_NLCA1_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -768698,27 +768056,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -768733,9 +768091,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -768744,62 +768101,59 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 - GroupLoadStore: false - GuaranteeNoPartialA: true + GlobalWriteVectorWidth: 2 + GroupLoadStore: 0 + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCB1_SVW1_VWA1_WSGRB2_WG16_8_2 - LSCA: 16 - LSCB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_14_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 64 LSPA: 16 - LSPB: 4 + LSPB: 32 LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumElements: 26368 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 26368 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -768807,15 +768161,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 14] + MIWaveTileA: 2 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -768830,20 +768184,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 8 - NumLoadsB: 10 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -768852,7 +768206,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -768905,7 +768259,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -768916,8 +768269,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -768929,26 +768282,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2945 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB4_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB2_WG16_8_2_WGM1 + SolutionIndex: 2943 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_14_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 14 + ThreadTileA: 8 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -768959,27 +768312,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 2 + WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -768994,9 +768347,8 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default - ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -769005,62 +768357,59 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 - GroupLoadStore: false - GuaranteeNoPartialA: true + GlobalWriteVectorWidth: 2 + GroupLoadStore: 0 + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCB1_SVW1_VWA1_WSGRB0_WG16_8_2 - LSCA: 16 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT224x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIWT14_2_NEPBS0_NLCA7_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 3584 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumElements: 24832 + LdsNumElementsAlignedA: 14592 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 14592 + LdsOffsetB_Blk: 47360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 + LdsOffsetMetadata: 24832 + LdsOffsetMetadata_Blk: 47360 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -769068,15 +768417,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 2] + MIWaveTileA: 14 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -769096,15 +768445,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 8 - NumLoadsB: 10 - NumLoadsCoalescedA: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 7 + NumLoadsB: 4 + NumLoadsCoalescedA: 7 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -769113,7 +768462,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -769166,7 +768515,6 @@ SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 - StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -769177,8 +768525,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -769190,26 +768538,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2946 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_8_2_WGM1 + SolutionIndex: 2944 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT224x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIWT14_2_NEPBS0_NLCA7_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 56 + ThreadTile1: 2 + ThreadTileA: 56 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: false @@ -769220,31 +768568,33 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -769257,10 +768607,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DebugStreamK: 0 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -769268,60 +768621,63 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 1 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 GroupLoadStore: false - GuaranteeNoPartialA: true + GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_NLCB1_SVW1_VWA1_WSGRB0_WG16_8_2 - LSCA: 16 - LSCB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_K1_LBSPPA1024_LBSPPB256_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SVW8_VWA8_VWB4_WG16_16_1 + LSCA: 128 + LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 - LVPA: 16 - LVPB: 2 - LdsBlockSizePerPadA: 256 + LVCB: 4 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25600 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -769329,15 +768685,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -769352,20 +768708,21 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -769391,6 +768748,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -769422,6 +768780,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -769451,28 +768810,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2947 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB4_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WSGRB0_WG16_8_2_WGM1 + SolutionIndex: 2945 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_VWB4_WG16_16_1_WGM16_WGMXCC1_WGMXCCGn1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -769481,31 +768845,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 - VectorWidthB: 1 + VectorWidthA: 8 + VectorWidthB: 4 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 + WorkGroupMappingXCCGroup: -1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -769516,21 +768883,28 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DebugStreamK: 0 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false @@ -769539,36 +768913,39 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NEPBS16_NLCA1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_K1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_VWB2_WG128_2_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 0 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 58880 LdsInitCVgprs: false - LdsNumElements: 13824 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 13824 - LdsOffsetMetadata_Blk: 20992 - LdsPadA: 32 - LdsPadB: 16 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -769576,33 +768953,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -769610,19 +768987,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -769631,7 +769009,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -769648,6 +769026,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -769679,11 +769058,13 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true TLUA: true @@ -769694,8 +769075,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: 0 - TransposeB: 0 + TransposeA: false + TransposeB: false UseBeta: true UseBias: 1 UseE: false @@ -769707,28 +769088,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2948 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NEPBS16_NLCA1_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2946 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_GSUC0_GSUWGMRR0_K1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_VWB2_WG128_2_1_WGM16_WGMXCC1_WGMXCCGn1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -769738,30 +769124,33 @@ Valid: true VectorStore: -1 VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 + WorkGroupMappingXCCGroup: -1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 + _staggerStrideShift: 1 + - 1LDSBuffer: 0 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -769772,21 +769161,28 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DebugStreamK: 0 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 4 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false @@ -769795,34 +769191,37 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NEPBS16_NLCA1_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_VWB1_WG16_16_1 + LSCA: 16 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 16 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 28928 LdsInitCVgprs: false - LdsNumElements: 15360 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 6912 + LdsNumBytes: 28928 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 16384 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 24832 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 18688 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 15360 - LdsOffsetMetadata_Blk: 24832 + LdsOffsetMetadata: 2304 + LdsOffsetMetadata_Blk: 18688 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -769831,8 +769230,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -769842,15 +769241,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -769870,15 +769269,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -769887,7 +769287,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -769904,6 +769304,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -769935,13 +769336,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -769963,28 +769368,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2949 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NEPBS16_NLCA1_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 2947 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 128 StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -769999,25 +769409,28 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -770028,58 +769441,68 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 - GroupLoadStore: 0 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NEPBS0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_VWB1_WG32_4_1 + LSCA: 32 LSCB: 128 LSPA: 32 - LSPB: 16 - LVCA: 8 + LSPB: 8 + LVCA: 4 LVCB: 16 LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 + LVPB: 1 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 29696 LdsInitCVgprs: false - LdsNumElements: 26624 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 29696 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 25088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 25088 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -770098,15 +769521,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -770126,16 +769549,17 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 256 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -770143,7 +769567,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -770160,6 +769584,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -770191,13 +769616,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -770219,28 +769648,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2950 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NEPBS0_NLCA1_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2948 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG32_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -770249,15 +769683,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 128 @@ -770270,10 +769705,12 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -770284,22 +769721,29 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -770307,35 +769751,38 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT96x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_1_NEPBS16_NLCA3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_VWB1_WG32_4_1 LSCA: 32 LSCB: 64 - LSPA: 64 - LSPB: 32 + LSPA: 32 + LSPB: 16 LVCA: 4 LVCB: 8 - LVPA: 8 - LVPB: 4 - LdsBlockSizePerPadA: 1536 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 15104 LdsInitCVgprs: false - LdsNumElements: 11520 - LdsNumElementsAlignedA: 6400 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 15104 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 6400 - LdsOffsetB_Blk: 22784 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 12544 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 11520 - LdsOffsetMetadata_Blk: 22784 - LdsPadA: 32 + LdsOffsetMetadata: 4352 + LdsOffsetMetadata_Blk: 12544 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -770354,15 +769801,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 1] - MIWaveTileA: 6 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 64 - MacroTileA: 96 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -770382,16 +769829,17 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 3 - NumLoadsB: 2 - NumLoadsCoalescedA: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 - NumThreads: 256 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 1 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -770399,7 +769847,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -770416,6 +769864,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -770447,13 +769896,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -770475,28 +769928,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2951 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT96x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_1_NEPBS16_NLCA3_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2949 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG32_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 128 StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 4 ThreadTile1: 1 - ThreadTileA: 24 + ThreadTileA: 4 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -770505,15 +769963,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -770525,11 +769984,13 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -770540,57 +770001,67 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DebugStreamK: 0 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 2 - GroupLoadStore: 0 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 30208 LdsInitCVgprs: false - LdsNumElements: 28416 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 11520 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 25088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28416 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 25088 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -770599,8 +770070,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -770610,15 +770081,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -770638,15 +770109,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -770655,7 +770127,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -770672,6 +770144,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -770703,13 +770176,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -770731,28 +770208,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2952 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2950 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 5 + ThreadTile1: 1 ThreadTileA: 8 - ThreadTileB: 5 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -770767,15 +770249,16 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -770784,8 +770267,10 @@ _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -770796,57 +770281,67 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 2 - GroupLoadStore: 0 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_7_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 64 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 26624 LdsInitCVgprs: false - LdsNumElements: 17408 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 8960 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 41216 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17408 - LdsOffsetMetadata_Blk: 41216 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 @@ -770855,8 +770350,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -770866,15 +770361,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 112 - MacroTileA: 128 - MacroTileB: 112 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -770894,15 +770389,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 4 - NumLoadsB: 7 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -770911,7 +770407,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -770928,6 +770424,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -770959,13 +770456,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -770987,28 +770488,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2953 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_7_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2951 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 7 + ThreadTile1: 1 ThreadTileA: 8 - ThreadTileB: 7 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -771023,25 +770529,28 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -771052,58 +770561,68 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 - GroupLoadStore: 0 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT112x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_LBSPPA1792_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_4_NEPBS0_NLCA7_SVW1_VWA1_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 16 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1792 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 17920 LdsInitCVgprs: false - LdsNumElements: 27776 - LdsNumElementsAlignedA: 7296 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 17920 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 7296 - LdsOffsetB_Blk: 40064 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27776 - LdsOffsetMetadata_Blk: 40064 - LdsPadA: 16 + LdsOffsetMetadata: 17920 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -771122,15 +770641,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -771150,15 +770669,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 8 - NumLoadsCoalescedA: 7 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -771167,7 +770687,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -771184,6 +770704,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -771215,13 +770736,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -771243,28 +770768,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2954 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT112x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSU1_LBSPPA1792_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_4_NEPBS0_NLCA7_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2952 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -771273,15 +770803,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 - VectorWidthB: 1 + VectorWidthA: 2 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -771293,11 +770824,13 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -771308,21 +770841,28 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false @@ -771331,44 +770871,47 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x144x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_9_NEPBS16_NLCA1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB512_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 2 - LVPB: 8 + LVPA: 4 + LVPB: 2 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 34816 LdsInitCVgprs: false - LdsNumElements: 9344 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 4992 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 20736 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9344 - LdsOffsetMetadata_Blk: 20736 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 32 - LdsPadB: 4 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -771378,15 +770921,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 9] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 144 - MacroTileA: 128 - MacroTileB: 144 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -771406,15 +770949,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 2 - NumLoadsB: 9 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -771423,7 +770967,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -771440,6 +770984,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -771471,13 +771016,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -771499,8 +771048,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2955 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x144x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_9_NEPBS16_NLCA1_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2953 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB512_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -771509,18 +771058,23 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 9 + ThreadTile1: 2 ThreadTileA: 8 - ThreadTileB: 9 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -771530,30 +771084,33 @@ Valid: true VectorStore: -1 VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -771564,22 +771121,29 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DebugStreamK: 0 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -771587,35 +771151,38 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS16_NLCA1_SVW1_VWA1_WG32_4_1 - LSCA: 32 - LSCB: 128 - LSPA: 32 - LSPB: 8 - LVCA: 4 - LVCB: 16 - LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 41984 LdsInitCVgprs: false - LdsNumElements: 14848 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 2304 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 8192 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 12544 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4352 - LdsOffsetMetadata_Blk: 12544 - LdsPadA: 16 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -771623,8 +771190,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -771634,15 +771201,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -771662,16 +771229,17 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumLoadsPerpendicularB: 5 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -771679,7 +771247,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -771696,6 +771264,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -771727,13 +771296,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -771755,28 +771328,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2956 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS16_NLCA1_SVW1_VWA1_WG32_4_1_WGM8 + SolutionIndex: 2954 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 128 StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -771785,21 +771363,22 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 @@ -771808,8 +771387,10 @@ _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -771820,57 +771401,67 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 4 - GroupLoadStore: 0 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA3072_LBSPPB128_LPA0_LPB16_LRVW8_MIWT12_2_NEPBS0_NLCA3_SVW4_VWA4_WG16_16_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 3072 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25600 LdsInitCVgprs: false - LdsNumElements: 22528 - LdsNumElementsAlignedA: 12288 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 12288 - LdsOffsetB_Blk: 45056 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22528 - LdsOffsetMetadata_Blk: 45056 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49152 LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 @@ -771890,15 +771481,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 2] - MIWaveTileA: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -771918,15 +771509,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 4 - NumLoadsCoalescedA: 3 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -771935,7 +771527,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -771952,6 +771544,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -771983,13 +771576,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -772011,28 +771608,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2957 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA0_LPB16_LRVW8_MIWT12_2_NEPBS0_NLCA3_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2955 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 16 ThreadTile1: 2 - ThreadTileA: 48 + ThreadTileA: 16 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -772042,14 +771644,15 @@ Valid: true VectorStore: -1 VectorWidthA: 4 - VectorWidthB: 1 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -772061,11 +771664,13 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -772076,22 +771681,29 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -772099,44 +771711,47 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_4_NEPBS16_NLCA1_SVW8_VWA8_WG32_8_1 - LSCA: 256 - LSCB: 32 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 1 - LVPB: 8 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 47616 LdsInitCVgprs: false - LdsNumElements: 12544 - LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 4352 + LdsNumBytes: 47616 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 24576 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 12544 - LdsOffsetMetadata_Blk: 24576 - LdsPadA: 0 - LdsPadB: 4 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -772146,15 +771761,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -772174,15 +771789,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -772191,7 +771807,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -772208,6 +771824,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -772239,13 +771856,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -772267,8 +771888,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2958 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_4_NEPBS16_NLCA1_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 2956 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -772276,19 +771897,24 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -772297,31 +771923,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -772332,22 +771961,29 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -772355,35 +771991,38 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NEPBS16_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25600 LdsInitCVgprs: false - LdsNumElements: 9472 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 20736 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9472 - LdsOffsetMetadata_Blk: 20736 - LdsPadA: 32 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -772403,13 +772042,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 128 MacroTile1: 64 - MacroTileA: 64 + MacroTileA: 128 MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 @@ -772430,14 +772069,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 + NumElementsPerThread: 32 NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 + NumLoadsA: 4 NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 @@ -772447,7 +772087,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -772464,6 +772104,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -772495,13 +772136,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -772523,28 +772168,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2959 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_2_NEPBS16_NLCA1_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2957 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 128 StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 16 ThreadTile1: 2 - ThreadTileA: 8 + ThreadTileA: 16 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -772553,31 +772204,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthA: 4 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -772588,22 +772242,29 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -772611,35 +772272,38 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NEPBS16_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 128 LSCB: 128 - LSPA: 32 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 + LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 50176 LdsInitCVgprs: false - LdsNumElements: 13312 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 25088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 13312 - LdsOffsetMetadata_Blk: 25088 - LdsPadA: 32 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -772659,14 +772323,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -772686,15 +772350,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -772703,7 +772368,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -772720,6 +772385,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -772751,13 +772417,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -772779,8 +772449,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2960 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_1_NEPBS16_NLCA1_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2958 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -772788,19 +772458,25 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -772809,22 +772485,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthA: 4 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 - _GlobalAccumulation: MultipleBuffer + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 @@ -772832,8 +772509,10 @@ _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -772844,22 +772523,29 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -772867,9 +772553,11 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_2_NEPBS16_NLCA1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SVW2_VWA2_VWB2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -772879,23 +772567,24 @@ LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 17920 LdsInitCVgprs: false - LdsNumElements: 14336 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 17920 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 20480 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 14336 - LdsOffsetMetadata_Blk: 20480 - LdsPadA: 0 + LdsOffsetMetadata: 17920 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -772914,15 +772603,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 128 + MacroTile1: 64 MacroTileA: 64 - MacroTileB: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -772942,15 +772631,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 + NumElementsPerThread: 16 NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 2 - NumLoadsB: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -772959,7 +772649,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -772976,6 +772666,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -773007,13 +772698,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -773035,28 +772730,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2961 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_2_NEPBS16_NLCA1_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2959 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 128 StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 8 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 8 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -773065,31 +772766,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 - VectorWidthB: 1 + VectorWidthA: 2 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -773100,58 +772804,68 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 - GroupLoadStore: 0 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_4_NEPBS0_NLCA1_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NLCA1_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 56832 LdsInitCVgprs: false - LdsNumElements: 24576 - LdsNumElementsAlignedA: 4096 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4096 - LdsOffsetB_Blk: 36864 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 24576 - LdsOffsetMetadata_Blk: 36864 - LdsPadA: 0 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -773159,8 +772873,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -773170,15 +772884,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -773198,15 +772912,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 8 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -773215,7 +772930,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -773232,6 +772947,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -773263,13 +772979,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -773291,28 +773011,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2962 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_4_NEPBS0_NLCA1_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2960 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_5_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -773321,31 +773047,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -773356,22 +773085,29 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -773379,35 +773115,38 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS16_NLCA1_SVW1_VWA1_WG16_4_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 LSCB: 128 - LSPA: 32 - LSPB: 4 - LVCA: 2 + LSPA: 16 + LSPB: 16 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 1 - LdsBlockSizePerPadA: 256 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60416 LdsInitCVgprs: false - LdsNumElements: 12800 - LdsNumElementsAlignedA: 2304 - LdsNumElementsAlignedB: 2304 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 8192 - LdsOffsetB: 2304 - LdsOffsetB_Blk: 10496 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 2304 - LdsOffsetMetadata_Blk: 10496 - LdsPadA: 16 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -773426,15 +773165,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -773454,16 +773193,17 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 - NumThreads: 64 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -773471,7 +773211,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -773488,6 +773228,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -773519,13 +773260,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -773547,8 +773292,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2963 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS16_NLCA1_SVW1_VWA1_WG16_4_1_WGM8 + SolutionIndex: 2961 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -773556,19 +773301,25 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -773577,22 +773328,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 - _GlobalAccumulation: MultipleBuffer + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 @@ -773600,8 +773352,10 @@ _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -773612,58 +773366,68 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 - GroupLoadStore: 0 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT112x192x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_LBSPPA1792_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_3_NEPBS0_NLCA7_SVW1_VWA1_WG16_16_1 - LSCA: 16 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_VWB4_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 16 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1792 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 33792 LdsInitCVgprs: false - LdsNumElements: 22656 - LdsNumElementsAlignedA: 7296 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 7296 - LdsOffsetB_Blk: 40064 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22656 - LdsOffsetMetadata_Blk: 40064 - LdsPadA: 16 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -773682,15 +773446,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 3] - MIWaveTileA: 7 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 192 - MacroTileA: 112 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -773710,15 +773474,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 6 - NumLoadsCoalescedA: 7 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -773727,7 +773492,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -773744,6 +773509,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -773775,13 +773541,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -773803,28 +773573,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2964 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT112x192x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSU1_LBSPPA1792_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_3_NEPBS0_NLCA7_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2962 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 3 - ThreadTileA: 28 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -773833,31 +773609,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 - VectorWidthB: 1 + VectorWidthA: 4 + VectorWidthB: 4 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -773868,58 +773647,68 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 - GroupLoadStore: 0 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_3_NEPBS0_NLCA3_SVW2_VWA2_WG32_8_1 - LSCA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 - LVPA: 4 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 41984 LdsInitCVgprs: false - LdsNumElements: 20224 - LdsNumElementsAlignedA: 12544 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12544 - LdsOffsetB_Blk: 45312 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 20224 - LdsOffsetMetadata_Blk: 45312 - LdsPadA: 32 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -773939,14 +773728,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -773966,15 +773755,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 - NumLoadsCoalescedA: 3 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -773983,7 +773773,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -774000,6 +773790,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -774031,13 +773822,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -774059,28 +773854,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2965 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_3_NEPBS0_NLCA3_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2963 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -774089,7 +773890,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -774097,23 +773898,26 @@ WavefrontSize: 64 WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -774124,67 +773928,77 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 4 - GroupLoadStore: 0 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_8_NEPBS0_NLCA1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_3_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 LSCA: 128 - LSCB: 64 + LSCB: 32 LSPA: 16 LSPB: 32 LVCA: 16 LVCB: 8 LVPA: 2 - LVPB: 4 - LdsBlockSizePerPadA: 2048 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 31104 LdsInitCVgprs: false - LdsNumElements: 28672 + LdsNumBytes: 31104 LdsNumElementsAlignedA: 8192 - LdsNumElementsAlignedB: 20480 + LdsNumElementsAlignedB: 6528 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 16384 LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetB_Blk: 24576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28672 - LdsOffsetMetadata_Blk: 40960 + LdsOffsetMetadata: 8192 + LdsOffsetMetadata_Blk: 24576 LdsPadA: 0 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -774195,14 +774009,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 8] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 96 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -774222,15 +774036,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -774239,7 +774054,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -774256,6 +774071,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -774287,13 +774103,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -774315,28 +774135,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2966 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_8_NEPBS0_NLCA1_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2964 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_3_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 64 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 8 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -774353,23 +774179,26 @@ WavefrontSize: 64 WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -774380,58 +774209,68 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 - GroupLoadStore: 0 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_5_NEPBS0_NLCA3_SVW1_VWA1_WG32_8_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_6_NLCA1_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 128 LSCB: 64 - LSPA: 64 + LSPA: 16 LSPB: 32 - LVCA: 4 + LVCA: 16 LVCB: 8 - LVPA: 8 + LVPA: 2 LVPB: 4 - LdsBlockSizePerPadA: 1536 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 44032 LdsInitCVgprs: false - LdsNumElements: 19072 - LdsNumElementsAlignedA: 6272 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 6272 - LdsOffsetB_Blk: 39040 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19072 - LdsOffsetMetadata_Blk: 39040 - LdsPadA: 16 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -774451,14 +774290,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 160 - MacroTileA: 96 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -774478,15 +774317,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 5 - NumLoadsCoalescedA: 3 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -774495,7 +774335,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -774512,6 +774352,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -774543,13 +774384,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -774571,28 +774416,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2967 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1536_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_5_NEPBS0_NLCA3_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 2965 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_6_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -774601,15 +774451,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 - VectorWidthB: 1 + VectorWidthA: 4 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -774621,11 +774472,13 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -774636,58 +774489,68 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DebugStreamK: 0 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 - GroupLoadStore: 0 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NEPBS0_NLCA1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 128 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_7_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 52224 LdsInitCVgprs: false - LdsNumElements: 22528 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22528 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 32 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -774695,8 +774558,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -774707,14 +774570,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -774734,15 +774597,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -774751,7 +774615,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -774768,6 +774632,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -774799,13 +774664,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -774827,28 +774696,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2968 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NEPBS0_NLCA1_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2966 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_7_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -774857,7 +774731,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -774865,23 +774739,26 @@ WavefrontSize: 64 WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -774892,67 +774769,77 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DebugStreamK: 0 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 - GroupLoadStore: 0 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS0_NLCA1_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 128 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 2 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA1024_LBSPPB256_LPA0_LPB4_LRVW4_MIWT4_4_NLCA1_SVW4_VWA4_VWB4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 16640 LdsInitCVgprs: false - LdsNumElements: 25344 - LdsNumElementsAlignedA: 4352 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 16640 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 8448 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4352 - LdsOffsetB_Blk: 20736 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4352 - LdsOffsetMetadata_Blk: 20736 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 16640 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -774963,14 +774850,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 32 - MacroTileA: 32 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -774990,15 +774877,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 2 - NumLoadsB: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -775007,7 +774895,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -775024,6 +774912,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -775055,13 +774944,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -775083,28 +774976,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2969 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT32x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NEPBS0_NLCA1_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 2967 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA0_LPB4_LRVW4_MIWT4_4_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 64 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -775113,22 +775012,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 - VectorWidthB: 1 + VectorWidthA: 4 + VectorWidthB: 4 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 - _GlobalAccumulation: MultipleBuffer + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 @@ -775136,8 +775036,10 @@ _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -775148,21 +775050,28 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false @@ -775171,44 +775080,47 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT80x128x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_LBSPPA1280_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_2_NEPBS16_NLCA5_SVW1_VWA1_WG16_16_1 - LSCA: 16 - LSCB: 64 - LSPA: 64 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2560_LBSPPB256_LPA16_LPB4_LRVW4_MIWT5_12_NLCA5_SVW1_VWA1_VWB4_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 16 - LVPB: 4 - LdsBlockSizePerPadA: 1280 - LdsBlockSizePerPadB: 128 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 33408 LdsInitCVgprs: false - LdsNumElements: 15488 - LdsNumElementsAlignedA: 5248 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 33408 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 12672 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 5248 - LdsOffsetB_Blk: 21632 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 15488 - LdsOffsetMetadata_Blk: 21632 + LdsOffsetMetadata: 33408 + LdsOffsetMetadata_Blk: 86272 LdsPadA: 16 - LdsPadB: 16 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -775218,15 +775130,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [5, 12] MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 128 - MacroTileA: 80 - MacroTileB: 128 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -775246,15 +775158,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 40 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 NumLoadsA: 5 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -775263,7 +775176,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -775280,6 +775193,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -775311,13 +775225,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -775339,28 +775257,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2970 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT80x128x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSU1_LBSPPA1280_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_2_NEPBS16_NLCA5_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2968 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2560_LBSPPB256_LPA16_LPB4_LRVW4_MIWT5_12_NLCA5_SU8_SUM0_SUS64_SVW1_VWA1_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 64 StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 - ThreadTile1: 2 + ThreadTile1: 12 ThreadTileA: 20 - ThreadTileB: 2 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -775370,30 +775293,33 @@ Valid: true VectorStore: -1 VectorWidthA: 1 - VectorWidthB: 1 + VectorWidthB: 4 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -775404,22 +775330,29 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -775427,9 +775360,11 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_6_NEPBS16_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB1024_LPA0_LPB16_LRVW8_MIWT4_8_NLCA1_SVW4_VWA4_VWB8_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -775439,23 +775374,24 @@ LVPA: 2 LVPB: 4 LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 50176 LdsInitCVgprs: false - LdsNumElements: 16128 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 33792 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 24832 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 16128 - LdsOffsetMetadata_Blk: 24832 - LdsPadA: 32 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -775474,15 +775410,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 96 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -775502,15 +775438,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -775519,7 +775456,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -775536,6 +775473,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -775567,13 +775505,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -775595,28 +775537,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2971 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_6_NEPBS16_NLCA1_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2969 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB1024_LPA0_LPB16_LRVW8_MIWT4_8_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB8_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 128 StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 6 - ThreadTileA: 8 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -775625,15 +775572,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthA: 4 + VectorWidthB: 8 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -775645,11 +775593,13 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -775660,32 +775610,41 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 - GroupLoadStore: 0 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_14_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_9_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 LSCA: 128 LSCB: 64 LSPA: 16 @@ -775697,21 +775656,22 @@ LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 62464 LdsInitCVgprs: false - LdsNumElements: 26368 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 41216 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26368 - LdsOffsetMetadata_Blk: 41216 - LdsPadA: 32 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -775730,15 +775690,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 14] - MIWaveTileA: 2 - MIWaveTileB: 14 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 224 + MacroTile1: 288 MacroTileA: 128 - MacroTileB: 224 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -775758,15 +775718,16 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 4 - NumLoadsB: 7 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -775775,7 +775736,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -775792,6 +775753,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -775823,13 +775785,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -775851,28 +775817,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2972 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_14_NEPBS0_NLCA1_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2970 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_9_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 14 - ThreadTileA: 8 - ThreadTileB: 14 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -775881,15 +775852,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -775901,11 +775873,13 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -775916,58 +775890,68 @@ CUCount: null ClusterLocalRead: 1 CodeObjectVersion: default + ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 - GroupLoadStore: 0 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true GuaranteeNoPartialMetadata: true ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomWGM: true, SupportUserGSU: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT224x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIWT14_2_NEPBS0_NLCA7_SVW2_VWA2_WG16_16_1 - LSCA: 32 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA5120_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT5_8_NLCA5_SVW1_VWA1_VWB8_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 64 + LSPA: 32 LSPB: 32 - LVCA: 4 + LVCA: 8 LVCB: 8 - LVPA: 8 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 3584 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 58112 LdsInitCVgprs: false - LdsNumElements: 24832 - LdsNumElementsAlignedA: 14592 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 58112 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 14592 - LdsOffsetB_Blk: 47360 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 24832 - LdsOffsetMetadata_Blk: 47360 - LdsPadA: 32 + LdsOffsetMetadata: 58112 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 @@ -775986,14 +775970,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 2] - MIWaveTileA: 14 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 320 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 320 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -776014,14 +775998,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 7 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 10 NumLoadsB: 4 - NumLoadsCoalescedA: 7 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -776031,7 +776016,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -776048,6 +776033,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -776079,13 +776065,17 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] SilentHighPrecisionAccumulate: false Sparse: 0 + StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -776107,28 +776097,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2973 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_HAS_SAV_MT224x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA3584_LBSPPB128_LPA32_LPB16_LRVW8_MIWT14_2_NEPBS0_NLCA7_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2971 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA5120_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT5_8_NLCA5_SU8_SUM0_SUS128_SVW1_VWA1_VWB8_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 2 - ThreadTileA: 56 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: false UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -776137,15 +776132,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthA: 1 + VectorWidthB: 8 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -776157,10 +776153,10 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true AssertAIGreaterThanEqual: -1 AssertAILessThanEqual: -1 @@ -776177,7 +776173,7 @@ ConvertAfterDS: false CustomKernelName: '' DebugStreamK: 0 - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -776196,7 +776192,7 @@ GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalSplitUWorkGroupMappingRoundRobin: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -776208,45 +776204,45 @@ SupportUserGSU: true, UseUniversalArgs: true} Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_K1_LBSPPA1024_LBSPPB256_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SVW8_VWA8_VWB4_WG16_16_1 - LSCA: 128 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 2 - LVPB: 8 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA5120_LBSPPB512_LPA32_LPB16_LRVW8_MIWT10_4_NLCA5_SVW2_VWA2_VWB4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 - LdsBytesNoAmax: 25600 + LdsBytesNoAmax: 58880 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 8192 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 41472 LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8192 - LdsOffsetB_Blk: 40960 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 40960 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 107008 + LdsPadA: 32 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -776254,15 +776250,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] + MIWaveTileA: 10 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -776278,17 +776274,17 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 NumLoadsB: 4 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 4 @@ -776358,6 +776354,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -776366,8 +776364,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -776379,15 +776377,295 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2974 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA0_LPB8_LRVW4_MIWT8_4_NLCA1_SU8_SUM0_SUS256_SVW8_VWA8_VWB4_WG16_16_1_WGM16_WGMXCC1_WGMXCCGn1 + SolutionIndex: 2972 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA5120_LBSPPB512_LPA32_LPB16_LRVW8_MIWT10_4_NLCA5_SU8_SUM0_SUS128_SVW2_VWA2_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_3_NLCA1_SVW8_VWA8_VWB1_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 21248 + LdsInitCVgprs: false + LdsNumBytes: 21248 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21248 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 3] + MIWaveTileA: 8 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2973 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_3_NLCA1_SU8_SUM0_SUS64_SVW8_VWA8_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 StoreVectorWidth: 8 StreamK: 0 StreamKAtomic: 0 @@ -776399,9 +776677,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 3 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true ULSGRODoubleG2L: 0 @@ -776415,15 +776693,15 @@ Valid: true VectorStore: -1 VectorWidthA: 8 - VectorWidthB: 4 + VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 - WorkGroupMappingXCC: 1 - WorkGroupMappingXCCGroup: -1 + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 32 @@ -776435,10 +776713,10 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true AssertAIGreaterThanEqual: -1 AssertAILessThanEqual: -1 @@ -776474,7 +776752,7 @@ GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalSplitUWorkGroupMappingRoundRobin: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: false GuaranteeNoPartialB: true @@ -776486,46 +776764,46 @@ SupportUserGSU: true, UseUniversalArgs: true} Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_K1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_VWB2_WG128_2_1 - LSCA: 256 + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA5120_LBSPPB256_LPA16_LPB16_LRVW8_MIWT5_10_NLCA5_SVW1_VWA1_VWB2_WG64_4_1 + LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 - LVPA: 1 + LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 0 + LdsBlockSizePerPadA: 5120 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 - LdsBytesNoAmax: 58880 + LdsBytesNoAmax: 64256 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 32768 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32768 - LdsOffsetB_Blk: 98304 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 98304 - LdsPadA: 0 - LdsPadB: 8 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -776533,22 +776811,582 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 + MIWaveTile: [5, 10] + MIWaveTileA: 5 + MIWaveTileB: 10 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 200 + NumLoadsA: 10 + NumLoadsB: 5 + NumLoadsCoalescedA: 5 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2974 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA5120_LBSPPB256_LPA16_LPB16_LRVW8_MIWT5_10_NLCA5_SU8_SUM0_SUS128_SVW1_VWA1_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 10 + ThreadTileA: 20 + ThreadTileB: 10 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2560_LBSPPB128_LPA32_LPB4_LRVW4_MIWT10_5_NLCA5_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 63744 + LdsInitCVgprs: false + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 41984 + LdsNumElementsAlignedB: 21760 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41984 + LdsOffsetB_Blk: 107520 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 107520 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 10 + NumLoadsCoalescedA: 5 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2975 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2560_LBSPPB128_LPA32_LPB4_LRVW4_MIWT10_5_NLCA5_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2560_LBSPPB128_LPA32_LPB4_LRVW4_MIWT10_6_NLCA5_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 34048 + LdsInitCVgprs: false + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 86528 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 86528 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 6] + MIWaveTileA: 10 MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 320 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 320 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -776556,19 +777394,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 5 NumLoadsB: 6 - NumLoadsCoalescedA: 1 + NumLoadsCoalescedA: 5 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -776636,6 +777474,23830 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2976 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2560_LBSPPB128_LPA32_LPB4_LRVW4_MIWT10_6_NLCA5_SU8_SUM0_SUS64_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 6 + ThreadTileA: 40 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB512_LPA0_LPB4_LRVW4_MIWT4_8_NLCA1_SVW4_VWA4_VWB8_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 24832 + LdsInitCVgprs: false + LdsNumBytes: 24832 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 16640 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 24832 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2977 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB512_LPA0_LPB4_LRVW4_MIWT4_8_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB8_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2560_LBSPPB128_LPA32_LPB4_LRVW4_MIWT10_5_NLCA5_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 64640 + LdsInitCVgprs: false + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 53760 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 20992 + LdsOffsetMetadata_Blk: 53760 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 5 + NumLoadsCoalescedA: 5 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2978 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x160x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2560_LBSPPB128_LPA32_LPB4_LRVW4_MIWT10_5_NLCA5_SU8_SUM0_SUS64_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB512_LPA32_LPB4_LRVW4_MIWT2_8_NLCA1_SVW2_VWA2_VWB8_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 17024 + LdsInitCVgprs: false + LdsNumBytes: 17024 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 8320 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 17024 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2979 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB512_LPA32_LPB4_LRVW4_MIWT2_8_NLCA1_SU8_SUM0_SUS64_SVW2_VWA2_VWB8_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_7_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 23424 + LdsInitCVgprs: false + LdsNumBytes: 23424 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 15232 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 23424 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2980 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_7_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_5_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 19072 + LdsInitCVgprs: false + LdsNumBytes: 19072 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 19072 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2981 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_5_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2560_LBSPPB256_LPA16_LPB4_LRVW4_MIWT5_12_NLCA5_SVW1_VWA1_VWB4_WG64_4_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 33408 + LdsInitCVgprs: false + LdsNumBytes: 33408 + LdsNumElementsAlignedA: 20736 + LdsNumElementsAlignedB: 12672 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 20736 + LdsOffsetB_Blk: 86272 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 33408 + LdsOffsetMetadata_Blk: 86272 + LdsPadA: 16 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 12] + MIWaveTileA: 5 + MIWaveTileB: 12 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 5 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2982 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2560_LBSPPB256_LPA16_LPB4_LRVW4_MIWT5_12_NLCA5_SU8_SUM0_SUS64_SVW1_VWA1_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 12 + ThreadTileA: 20 + ThreadTileB: 12 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_9_NLCA5_SVW1_VWA1_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 64256 + LdsInitCVgprs: false + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 41216 + LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41216 + LdsOffsetB_Blk: 106752 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 106752 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 10 + NumLoadsB: 9 + NumLoadsCoalescedA: 5 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2983 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA5120_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_9_NLCA5_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 31744 + LdsInitCVgprs: false + LdsNumBytes: 31744 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 31744 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2984 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 27392 + LdsInitCVgprs: false + LdsNumBytes: 27392 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 24832 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 8448 + LdsOffsetMetadata_Blk: 24832 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 16 + MacroTileA: 64 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2985 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_VWB1_WG32_8_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25856 + LdsInitCVgprs: false + LdsNumBytes: 25856 + LdsNumElementsAlignedA: 4352 + LdsNumElementsAlignedB: 5120 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4352 + LdsOffsetB_Blk: 20736 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 4352 + LdsOffsetMetadata_Blk: 20736 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2986 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x48x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 32512 + LdsInitCVgprs: false + LdsNumBytes: 32512 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 7680 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 24832 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 8448 + LdsOffsetMetadata_Blk: 24832 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2987 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x48x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SVW2_VWA2_VWB2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 21504 + LdsInitCVgprs: false + LdsNumBytes: 21504 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 4608 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21504 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 32 + MacroTileA: 128 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2988 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NLCA1_SVW1_VWA1_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 39936 + LdsInitCVgprs: false + LdsNumBytes: 39936 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 39936 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 80 + MacroTileA: 64 + MacroTileB: 80 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2989 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60416 + LdsInitCVgprs: false + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2990 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 31744 + LdsInitCVgprs: false + LdsNumBytes: 31744 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 31744 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2991 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NLCA1_SVW2_VWA2_VWB2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 30720 + LdsInitCVgprs: false + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2992 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_2_NLCA1_SVW8_VWA8_VWB2_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 16896 + LdsInitCVgprs: false + LdsNumBytes: 16896 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 16896 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2993 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_2_NLCA1_SU8_SUM0_SUS64_SVW8_VWA8_VWB2_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_5_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 19072 + LdsInitCVgprs: false + LdsNumBytes: 19072 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 19072 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2994 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_5_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA5120_LBSPPB128_LPA32_LPB16_LRVW8_MIWT10_3_NLCA5_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 5120 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 56832 + LdsInitCVgprs: false + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 107008 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 96 + MacroTileA: 320 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 10 + NumLoadsB: 3 + NumLoadsCoalescedA: 5 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2995 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA5120_LBSPPB128_LPA32_LPB16_LRVW8_MIWT10_3_NLCA5_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2560_LBSPPB256_LPA32_LPB4_LRVW4_MIWT10_4_NLCA5_SVW2_VWA2_VWB4_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 2560 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 62208 + LdsInitCVgprs: false + LdsNumBytes: 62208 + LdsNumElementsAlignedA: 20992 + LdsNumElementsAlignedB: 8448 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 20992 + LdsOffsetB_Blk: 53760 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 20992 + LdsOffsetMetadata_Blk: 53760 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 4 + NumLoadsCoalescedA: 5 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2996 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2560_LBSPPB256_LPA32_LPB4_LRVW4_MIWT10_4_NLCA5_SU8_SUM0_SUS64_SVW2_VWA2_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_6_NLCA1_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 21248 + LdsInitCVgprs: false + LdsNumBytes: 21248 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21248 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2997 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_6_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA0_LPB4_LRVW4_MIWT8_4_NLCA1_SVW8_VWA8_VWB4_WG16_16_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25088 + LdsInitCVgprs: false + LdsNumBytes: 25088 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 16896 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2998 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA0_LPB4_LRVW4_MIWT8_4_NLCA1_SU8_SUM0_SUS64_SVW8_VWA8_VWB4_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SVW1_VWA1_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 30720 + LdsInitCVgprs: false + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 2999 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 47616 + LdsInitCVgprs: false + LdsNumBytes: 47616 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3000 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 24064 + LdsInitCVgprs: false + LdsNumBytes: 24064 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 24064 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3001 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_7_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 52224 + LdsInitCVgprs: false + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3002 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_7_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 50176 + LdsInitCVgprs: false + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3003 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_2_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 41984 + LdsInitCVgprs: false + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 81920 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 81920 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3004 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSUAMBSK_K1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_5_NLCA1_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 30528 + LdsInitCVgprs: false + LdsNumBytes: 30528 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 5504 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 25088 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 25088 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3005 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_5_NLCA1_SU8_SUM0_SUS64_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60416 + LdsInitCVgprs: false + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3006 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_3_NLCA1_SU8_SUM0_SUS256_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x112x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSUAMBSK_K1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_7_NLCA1_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 32704 + LdsInitCVgprs: false + LdsNumBytes: 32704 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 7680 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 25088 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 25088 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 112 + MacroTileA: 128 + MacroTileB: 112 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3007 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x112x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_7_NLCA1_SU8_SUM0_SUS64_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB1024_LPA32_LPB16_LRVW8_MIWT2_8_NLCA1_SVW2_VWA2_VWB8_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 33792 + LdsInitCVgprs: false + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16896 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3008 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB1024_LPA32_LPB16_LRVW8_MIWT2_8_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB8_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA512_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_3_NLCA1_SVW4_VWA4_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 17152 + LdsInitCVgprs: false + LdsNumBytes: 17152 + LdsNumElementsAlignedA: 4096 + LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4096 + LdsOffsetB_Blk: 36864 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 17152 + LdsOffsetMetadata_Blk: 36864 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 192 + MacroTileA: 64 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3009 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x192x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_3_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_VWB1_WG16_4_1 + LSCA: 16 + LSCB: 128 + LSPA: 32 + LSPB: 4 + LVCA: 2 + LVCB: 16 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25600 + LdsInitCVgprs: false + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 4608 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 64 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3010 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG16_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x16x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 128 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 21504 + LdsInitCVgprs: false + LdsNumBytes: 21504 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 4608 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21504 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 16 + MacroTileA: 64 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3011 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x16x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_VWB1_WG32_8_1 + LSCA: 32 + LSCB: 128 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 17920 + LdsInitCVgprs: false + LdsNumBytes: 17920 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 17920 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3012 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 24064 + LdsInitCVgprs: false + LdsNumBytes: 24064 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 24064 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3013 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_6_NLCA1_SVW2_VWA2_VWB2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 31616 + LdsInitCVgprs: false + LdsNumBytes: 31616 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 6528 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 25088 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 25088 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3014 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA32_LPB4_LRVW4_MIWT2_6_NLCA1_SU8_SUM0_SUS64_SVW2_VWA2_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA0_LPB4_LRVW4_MIWT4_4_NLCA1_SVW4_VWA4_VWB4_WG32_8_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 16640 + LdsInitCVgprs: false + LdsNumBytes: 16640 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 8448 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 16640 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3015 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA0_LPB4_LRVW4_MIWT4_4_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_1_NLCA1_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 21504 + LdsInitCVgprs: false + LdsNumBytes: 21504 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 5120 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21504 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 32 + MacroTileA: 128 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3016 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_1_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA3072_LBSPPB512_LPA32_LPB16_LRVW8_MIWT6_4_NLCA3_SVW2_VWA2_VWB4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 42496 + LdsInitCVgprs: false + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3017 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB512_LPA32_LPB16_LRVW8_MIWT6_4_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA3072_LBSPPB256_LPA32_LPB16_LRVW8_MIWT6_2_NLCA3_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 34304 + LdsInitCVgprs: false + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 64 + MacroTileA: 192 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3018 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB256_LPA32_LPB16_LRVW8_MIWT6_2_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 2 + ThreadTileA: 24 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA4096_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_4_NLCA1_SVW4_VWA4_VWB4_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 41472 + LdsInitCVgprs: false + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 64 + MacroTileA: 256 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3019 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA4096_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_4_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 45568 + LdsInitCVgprs: false + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 12800 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3020 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA4096_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_6_NLCA1_SVW4_VWA4_VWB2_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 46592 + LdsInitCVgprs: false + LdsNumBytes: 46592 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 46592 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3021 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA4096_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_6_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA3072_LBSPPB512_LPA32_LPB16_LRVW8_MIWT6_4_NLCA3_SVW2_VWA2_VWB4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 42496 + LdsInitCVgprs: false + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3022 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB512_LPA32_LPB16_LRVW8_MIWT6_4_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x160x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_5_NLCA3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 23680 + LdsInitCVgprs: false + LdsNumBytes: 23680 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 23680 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3023 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x160x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_5_NLCA3_SU8_SUM0_SUS64_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_5_NLCA3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 50688 + LdsInitCVgprs: false + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3024 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_5_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_9_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 58944 + LdsInitCVgprs: false + LdsNumBytes: 58944 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 9856 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 16384 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 144 + MacroTileA: 256 + MacroTileB: 144 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3025 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_9_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x48x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_GSUAMBSK_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_3_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 19712 + LdsInitCVgprs: false + LdsNumBytes: 19712 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 3328 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 19712 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 48 + MacroTileA: 256 + MacroTileB: 48 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3026 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x48x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_3_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_9_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 55808 + LdsInitCVgprs: false + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 144 + MacroTileA: 256 + MacroTileB: 144 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 8 + NumLoadsB: 9 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 9 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3027 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_9_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA4096_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_10_NLCA1_SVW4_VWA4_VWB2_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 55808 + LdsInitCVgprs: false + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3028 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA4096_LBSPPB256_LPA0_LPB16_LRVW8_MIWT4_10_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x112x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSUAMB_K1_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_7_NLCA3_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 65472 + LdsInitCVgprs: false + LdsNumBytes: 65472 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 7680 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 57856 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 57856 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 384 + MacroTile1: 112 + MacroTileA: 384 + MacroTileB: 112 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3029 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x112x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_7_NLCA3_SU8_SUM0_SUS64_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA4096_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_12_NLCA1_SVW4_VWA4_VWB4_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 58880 + LdsInitCVgprs: false + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 26112 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3030 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA4096_LBSPPB512_LPA0_LPB16_LRVW8_MIWT4_12_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA3072_LBSPPB512_LPA32_LPB4_LRVW4_MIWT6_8_NLCA3_SVW2_VWA2_VWB8_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 33408 + LdsInitCVgprs: false + LdsNumBytes: 33408 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 8320 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 33408 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 384 + MacroTile1: 128 + MacroTileA: 384 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3031 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB512_LPA32_LPB4_LRVW4_MIWT6_8_NLCA3_SU8_SUM0_SUS64_SVW2_VWA2_VWB8_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x240x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 65408 + LdsInitCVgprs: false + LdsNumBytes: 65408 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 32640 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 65408 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 8 + NumLoadsB: 15 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 15 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3032 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x240x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 65472 + LdsInitCVgprs: false + LdsNumBytes: 65472 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 16384 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 16384 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 4 + NumLoadsB: 15 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 15 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3033 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB2_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_15_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x96x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_6_NLCA1_SVW4_VWA4_VWB2_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 22912 + LdsInitCVgprs: false + LdsNumBytes: 22912 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 6528 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 22912 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3034 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x96x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_6_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60928 + LdsInitCVgprs: false + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3035 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_7_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2048_LBSPPB512_LPA0_LPB4_LRVW4_MIWT4_8_NLCA1_SVW4_VWA4_VWB8_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 24704 + LdsInitCVgprs: false + LdsNumBytes: 24704 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 8320 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 24704 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3036 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB512_LPA0_LPB4_LRVW4_MIWT4_8_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB8_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_7_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 24064 + LdsInitCVgprs: false + LdsNumBytes: 24064 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 7680 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 24064 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 112 + MacroTileA: 256 + MacroTileB: 112 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3037 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_7_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61056 + LdsInitCVgprs: false + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 28288 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61056 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 13 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 13 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3038 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_13_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x16x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 19456 + LdsInitCVgprs: false + LdsNumBytes: 19456 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 19456 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 16 + MacroTileA: 128 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3039 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x16x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SVW2_VWA2_VWB1_WG16_16_1 + LSCA: 32 + LSCB: 64 + LSPA: 64 + LSPB: 32 + LVCA: 4 + LVCB: 8 + LVPA: 8 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 31232 + LdsInitCVgprs: false + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 10240 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3040 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x64x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_1_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_1_NLCA3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 30208 + LdsInitCVgprs: false + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 5120 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 57856 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 30208 + LdsOffsetMetadata_Blk: 57856 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 1] + MIWaveTileA: 6 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 32 + MacroTileA: 192 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 6 + NumLoadsB: 1 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3041 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_1_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 1 + ThreadTileA: 24 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_5_NLCA3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 50688 + LdsInitCVgprs: false + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3042 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_5_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 64 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 4 + LdsBlockSizePerPadA: 4096 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 45568 + LdsInitCVgprs: false + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 32768 + LdsNumElementsAlignedB: 12800 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 32768 + LdsOffsetB_Blk: 98304 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 98304 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3043 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA4096_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_5_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x96x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_3_NLCA3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 19328 + LdsInitCVgprs: false + LdsNumBytes: 19328 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 6528 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 19328 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3044 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x96x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_3_NLCA3_SU8_SUM0_SUS64_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x96x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_6_NLCA3_SVW2_VWA2_VWB2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 64384 + LdsInitCVgprs: false + LdsNumBytes: 64384 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 6528 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 57856 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 57856 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 384 + MacroTile1: 96 + MacroTileA: 384 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3045 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x96x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_6_NLCA3_SU8_SUM0_SUS64_SVW2_VWA2_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x64x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2048_LBSPPB256_LPA0_LPB4_LRVW4_MIWT4_4_NLCA1_SVW4_VWA4_VWB4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 20608 + LdsInitCVgprs: false + LdsNumBytes: 20608 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 4224 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 20608 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 64 + MacroTileA: 256 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3046 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x64x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA0_LPB4_LRVW4_MIWT4_4_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA3072_LBSPPB1024_LPA32_LPB16_LRVW8_MIWT6_8_NLCA3_SVW2_VWA2_VWB8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 58880 + LdsInitCVgprs: false + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 33792 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3047 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB1024_LPA32_LPB16_LRVW8_MIWT6_8_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB8_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_10_NLCA3_SVW2_VWA2_VWB2_WG64_4_1 + LSCA: 128 + LSCB: 32 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 8 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 35968 + LdsInitCVgprs: false + LdsNumBytes: 35968 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 35968 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 10] + MIWaveTileA: 6 + MIWaveTileB: 10 + MIWaveTileMetadata: 0 + MacroTile0: 384 + MacroTile1: 160 + MacroTileA: 384 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 6 + NumLoadsB: 5 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3048 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_10_NLCA3_SU8_SUM0_SUS64_SVW2_VWA2_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 10 + ThreadTileA: 24 + ThreadTileB: 10 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA3072_LBSPPB256_LPA32_LPB16_LRVW8_MIWT6_6_NLCA3_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 52736 + LdsInitCVgprs: false + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3049 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB256_LPA32_LPB16_LRVW8_MIWT6_6_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_1_NLCA1_SVW4_VWA4_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 18432 + LdsInitCVgprs: false + LdsNumBytes: 18432 + LdsNumElementsAlignedA: 8192 + LdsNumElementsAlignedB: 10240 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8192 + LdsOffsetB_Blk: 40960 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 18432 + LdsOffsetMetadata_Blk: 40960 + LdsPadA: 0 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3050 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA0_LPB16_LRVW8_MIWT4_1_NLCA1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SVW2_VWA2_VWB2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 21504 + LdsInitCVgprs: false + LdsNumBytes: 21504 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 4608 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21504 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 32 + MacroTileA: 128 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3051 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA6144_LBSPPB256_LPA32_LPB16_LRVW8_MIWT6_6_NLCA3_SVW2_VWA2_VWB2_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 32 + LVCA: 16 + LVCB: 8 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 6144 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 63488 + LdsInitCVgprs: false + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 49664 + LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 49664 + LdsOffsetB_Blk: 115200 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 115200 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 384 + MacroTile1: 96 + MacroTileA: 384 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 12 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3052 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA6144_LBSPPB256_LPA32_LPB16_LRVW8_MIWT6_6_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_2_NLCA3_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 17152 + LdsInitCVgprs: false + LdsNumBytes: 17152 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 4352 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 17152 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 64 + MacroTileA: 192 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3053 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_2_NLCA3_SU8_SUM0_SUS64_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 2 + ThreadTileA: 24 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_5_NLCA1_SVW8_VWA8_VWB1_WG32_8_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60032 + LdsInitCVgprs: false + LdsNumBytes: 60032 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 16384 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3054 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_5_NLCA1_SU8_SUM0_SUS64_SVW8_VWA8_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_7_NLCA3_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 65408 + LdsInitCVgprs: false + LdsNumBytes: 65408 + LdsNumElementsAlignedA: 50176 + LdsNumElementsAlignedB: 15232 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 50176 + LdsOffsetB_Blk: 115712 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 65408 + LdsOffsetMetadata_Blk: 115712 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 384 + MacroTile1: 112 + MacroTileA: 384 + MacroTileB: 112 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 12 + NumLoadsB: 7 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3055 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_7_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SVW1_VWA1_VWB1_WG16_4_1 + LSCA: 16 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 2 + LVCB: 8 + LVPA: 4 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 13056 + LdsInitCVgprs: false + LdsNumBytes: 13056 + LdsNumElementsAlignedA: 2304 + LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 2304 + LdsOffsetB_Blk: 10496 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 2304 + LdsOffsetMetadata_Blk: 10496 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 64 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3056 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG16_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA2048_LBSPPB512_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SVW2_VWA2_VWB2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 42496 + LdsInitCVgprs: false + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 32 + MacroTileA: 128 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3057 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB512_LPA32_LPB16_LRVW8_MIWT2_2_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x48x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 4 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 24576 + LdsInitCVgprs: false + LdsNumBytes: 24576 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 7680 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 24576 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3058 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x48x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA32_LPB16_LRVW8_MIWT2_3_NLCA1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_2_NLCA3_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 8 + LdsBlockSizePerPadA: 1536 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 17152 + LdsInitCVgprs: false + LdsNumBytes: 17152 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 4352 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 17152 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 32 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 64 + MacroTileA: 192 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 2 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3059 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1536_LBSPPB128_LPA32_LPB4_LRVW4_MIWT6_2_NLCA3_SU8_SUM0_SUS64_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 2 + ThreadTileA: 24 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA3072_LBSPPB512_LPA32_LPB16_LRVW8_MIWT6_4_NLCA3_SVW2_VWA2_VWB4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 42496 + LdsInitCVgprs: false + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3060 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB512_LPA32_LPB16_LRVW8_MIWT6_4_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_3_NLCA3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 3072 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 40448 + LdsInitCVgprs: false + LdsNumBytes: 40448 + LdsNumElementsAlignedA: 25088 + LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25088 + LdsOffsetB_Blk: 90624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 90624 + LdsPadA: 32 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 + NumLoadsCoalescedA: 3 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: true TLUB: false Tensor0: 0 @@ -776644,8 +801306,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: false - TransposeB: false + TransposeA: 0 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -776657,15 +801319,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2975 - SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_GSUC0_GSUWGMRR0_K1_LBSPPA0_LBSPPB256_LPA0_LPB8_LRVW8_MIWT2_6_NLCA1_SU8_SUM0_SUS256_SVW2_VWA2_VWB2_WG128_2_1_WGM16_WGMXCC1_WGMXCCGn1 + SolutionIndex: 3061 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA3072_LBSPPB128_LPA32_LPB16_LRVW8_MIWT6_3_NLCA3_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 StreamK: 0 StreamKAtomic: 0 @@ -776675,11 +801337,12 @@ SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true ULSGRODoubleG2L: 0 @@ -776693,27 +801356,868 @@ Valid: true VectorStore: -1 VectorWidthA: 2 - VectorWidthB: 2 + VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 - WorkGroupMappingXCC: 1 - WorkGroupMappingXCCGroup: -1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x64x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA2048_LBSPPB256_LPA0_LPB4_LRVW4_MIWT4_4_NLCA1_SVW4_VWA4_VWB4_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 20608 + LdsInitCVgprs: false + LdsNumBytes: 20608 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 4224 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 20608 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 64 + MacroTileA: 256 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3062 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x64x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB256_LPA0_LPB4_LRVW4_MIWT4_4_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x80x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_5_NLCA1_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 16 + LVCA: 32 + LVCB: 16 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 21888 + LdsInitCVgprs: false + LdsNumBytes: 21888 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 5504 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21888 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3063 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x80x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB2_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT4_5_NLCA1_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: false _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: false + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x96x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_3_NLCA1_SVW8_VWA8_VWB1_WG32_8_1 + LSCA: 256 + LSCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 1 + LVPB: 8 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 22912 + LdsInitCVgprs: false + LdsNumBytes: 22912 + LdsNumElementsAlignedA: 16384 + LdsNumElementsAlignedB: 6528 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16384 + LdsOffsetB_Blk: 49152 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 22912 + LdsOffsetMetadata_Blk: 49152 + LdsPadA: 0 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 3] + MIWaveTileA: 8 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [0, 3, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 1 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: true + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 0 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3064 + SolutionNameMin: Cijk_Ailk_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x96x32_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA2048_LBSPPB128_LPA0_LPB4_LRVW4_MIWT8_3_NLCA1_SU8_SUM0_SUS64_SVW8_VWA8_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: false + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: false + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 - [2, 3, 0, 1] - - - [7, 16, 1, 2048] - [0, 0.0] @@ -777178,7 +802682,7 @@ - - [1792, 32, 1, 32768] - [140, 0.0] - - [2048, 32, 1, 2048] - - [2969, 0.0] + - [2940, 0.0] - - [2048, 32, 1, 8192] - [142, 0.0] - - [2048, 32, 1, 32768] @@ -777190,7 +802694,7 @@ - - [2304, 32, 1, 32768] - [143, 0.0] - - [2560, 32, 1, 2048] - - [2969, 0.0] + - [2940, 0.0] - - [2560, 32, 1, 8192] - [143, 0.0] - - [2560, 32, 1, 32768] @@ -777832,7 +803336,7 @@ - - [3072, 64, 1, 32768] - [350, 0.0] - - [3584, 64, 1, 2048] - - [2960, 0.0] + - [2931, 0.0] - - [3584, 64, 1, 8192] - [352, 0.0] - - [3584, 64, 1, 32768] @@ -778996,7 +804500,7 @@ - - [448, 128, 1, 32768] - [680, 0.0] - - [512, 128, 1, 2048] - - [2956, 0.0] + - [2927, 0.0] - - [512, 128, 1, 8192] - [682, 0.0] - - [512, 128, 1, 32768] @@ -779318,13 +804822,13 @@ - - [576, 160, 1, 32768] - [772, 0.0] - - [640, 160, 1, 2048] - - [597, 0.0] + - [2951, 17.01] - - [640, 160, 1, 8192] - [773, 0.0] - - [640, 160, 1, 32768] - [773, 0.0] - - [768, 160, 1, 2048] - - [597, 0.0] + - [3050, 19.66] - - [768, 160, 1, 8192] - [774, 0.0] - - [768, 160, 1, 32768] @@ -779626,13 +805130,13 @@ - - [576, 192, 1, 32768] - [848, 0.0] - - [640, 192, 1, 2048] - - [511, 0.0] + - [2951, 20.42] - - [640, 192, 1, 8192] - [849, 0.0] - - [640, 192, 1, 32768] - [849, 0.0] - - [768, 192, 1, 2048] - - [511, 0.0] + - [3050, 23.07] - - [768, 192, 1, 8192] - [850, 0.0] - - [768, 192, 1, 32768] @@ -779934,13 +805438,13 @@ - - [576, 224, 1, 32768] - [933, 0.0] - - [640, 224, 1, 2048] - - [777, 0.0] + - [2951, 23.67] - - [640, 224, 1, 8192] - [934, 0.0] - - [640, 224, 1, 32768] - [934, 0.0] - - [768, 224, 1, 2048] - - [603, 0.0] + - [3016, 22.41] - - [768, 224, 1, 8192] - [604, 0.0] - - [768, 224, 1, 32768] @@ -780230,7 +805734,7 @@ - - [112, 320, 1, 32768] - [997, 0.0] - - [128, 256, 1, 2048] - - [2956, 0.0] + - [2927, 0.0] - - [128, 256, 1, 8192] - [678, 0.0] - - [128, 256, 1, 32768] @@ -780338,61 +805842,61 @@ - - [576, 256, 1, 32768] - [1025, 0.0] - - [640, 256, 1, 2048] - - [777, 0.0] + - [2951, 26.94] - - [640, 256, 1, 8192] - [1026, 0.0] - - [640, 256, 1, 32768] - [1027, 0.0] - - [768, 256, 1, 2048] - - [1028, 0.0] + - [3016, 25.47] - - [768, 256, 1, 8192] - - [1029, 0.0] + - [1028, 0.0] - - [768, 256, 1, 32768] - - [1029, 0.0] + - [1028, 0.0] - - [896, 256, 1, 2048] - [781, 0.0] - - [896, 256, 1, 8192] - - [1030, 0.0] + - [1029, 0.0] - - [896, 256, 1, 32768] - - [1031, 0.0] + - [1030, 0.0] - - [512, 320, 1, 2048] - [777, 0.0] - - [512, 320, 1, 8192] - [347, 0.0] - - [512, 320, 1, 32768] - - [1032, 0.0] + - [1031, 0.0] - - [576, 320, 1, 2048] - - [1033, 0.0] + - [1032, 0.0] - - [576, 320, 1, 8192] - - [1034, 0.0] + - [1033, 0.0] - - [576, 320, 1, 32768] - - [1034, 0.0] + - [1033, 0.0] - - [640, 320, 1, 2048] - - [1035, 0.0] + - [2999, 27.79] - - [640, 320, 1, 8192] - - [1035, 0.0] + - [1034, 0.0] - - [640, 320, 1, 32768] - - [1036, 0.0] + - [1035, 0.0] - - [768, 320, 1, 2048] - - [781, 0.0] + - [3016, 31.61] - - [768, 320, 1, 8192] - - [1037, 0.0] + - [1036, 0.0] - - [768, 320, 1, 32768] - - [1037, 0.0] + - [1036, 0.0] - - [896, 320, 1, 2048] - [781, 0.0] - - [896, 320, 1, 8192] - [785, 0.0] - - [896, 320, 1, 32768] - - [1038, 0.0] + - [1037, 0.0] - - [1024, 256, 1, 2048] - [693, 0.0] - - [1024, 256, 1, 8192] - [522, 0.0] - - [1024, 256, 1, 32768] - - [1039, 0.0] + - [1038, 0.0] - - [1280, 256, 1, 2048] - - [1040, 0.0] + - [1039, 0.0] - - [1280, 256, 1, 8192] - [613, 0.0] - - [1280, 256, 1, 32768] @@ -780400,21 +805904,21 @@ - - [1536, 256, 1, 2048] - [700, 0.0] - - [1536, 256, 1, 8192] - - [1041, 0.0] + - [1040, 0.0] - - [1536, 256, 1, 32768] - - [1042, 0.0] + - [1041, 0.0] - - [1792, 256, 1, 2048] - [700, 0.0] - - [1792, 256, 1, 8192] - [701, 0.0] - - [1792, 256, 1, 32768] - - [1043, 0.0] + - [1042, 0.0] - - [1024, 320, 1, 2048] - - [1040, 0.0] + - [1039, 0.0] - - [1024, 320, 1, 8192] - [613, 0.0] - - [1024, 320, 1, 32768] - - [1044, 0.0] + - [1043, 0.0] - - [1280, 320, 1, 2048] - [614, 0.0] - - [1280, 320, 1, 8192] @@ -780424,7 +805928,7 @@ - - [1536, 320, 1, 2048] - [700, 0.0] - - [1536, 320, 1, 8192] - - [1045, 0.0] + - [1044, 0.0] - - [1536, 320, 1, 32768] - [791, 0.0] - - [1792, 320, 1, 2048] @@ -780436,1127 +805940,1127 @@ - - [2048, 256, 1, 2048] - [943, 0.0] - - [2048, 256, 1, 8192] - - [1046, 0.0] + - [1045, 0.0] - - [2048, 256, 1, 32768] - - [1047, 0.0] + - [1046, 0.0] - - [2304, 256, 1, 2048] - [943, 0.0] - - [2304, 256, 1, 8192] - - [1048, 0.0] + - [1047, 0.0] - - [2304, 256, 1, 32768] - - [1048, 0.0] + - [1047, 0.0] - - [2560, 256, 1, 2048] - [943, 0.0] - - [2560, 256, 1, 8192] - - [1048, 0.0] + - [1047, 0.0] - - [2560, 256, 1, 32768] - - [1048, 0.0] + - [1047, 0.0] - - [2816, 256, 1, 2048] - [947, 0.0] - - [2816, 256, 1, 8192] - - [1049, 0.0] + - [1048, 0.0] - - [2816, 256, 1, 32768] - - [1049, 0.0] + - [1048, 0.0] - - [3072, 256, 1, 2048] - [947, 0.0] - - [3072, 256, 1, 8192] - - [1050, 0.0] + - [1049, 0.0] - - [3072, 256, 1, 32768] - - [1050, 0.0] + - [1049, 0.0] - - [3584, 256, 1, 512] - - [1051, 0.0] + - [1050, 0.0] - - [3584, 256, 1, 2048] - - [1052, 0.0] + - [1051, 0.0] - - [3584, 256, 1, 8192] - - [1053, 0.0] + - [1052, 0.0] - - [2048, 320, 1, 2048] - [943, 0.0] - - [2048, 320, 1, 8192] - - [1054, 0.0] + - [1053, 0.0] - - [2048, 320, 1, 32768] - - [1055, 0.0] + - [1054, 0.0] - - [2304, 320, 1, 2048] - [947, 0.0] - - [2304, 320, 1, 8192] - - [1055, 0.0] + - [1054, 0.0] - - [2304, 320, 1, 32768] - - [1055, 0.0] + - [1054, 0.0] - - [2560, 320, 1, 2048] - [947, 0.0] - - [2560, 320, 1, 8192] - - [1055, 0.0] + - [1054, 0.0] - - [2560, 320, 1, 32768] - - [1055, 0.0] + - [1054, 0.0] - - [2816, 320, 1, 2048] - [950, 0.0] - - [2816, 320, 1, 8192] - - [1056, 0.0] + - [1055, 0.0] - - [2816, 320, 1, 32768] - - [1057, 0.0] + - [1056, 0.0] - - [3072, 320, 1, 512] - - [1058, 0.0] + - [1057, 0.0] - - [3072, 320, 1, 2048] - - [1051, 0.0] + - [1050, 0.0] - - [3072, 320, 1, 8192] - - [1057, 0.0] + - [1056, 0.0] - - [3584, 320, 1, 512] - - [1052, 0.0] + - [1051, 0.0] - - [3584, 320, 1, 2048] - - [1052, 0.0] + - [1051, 0.0] - - [3584, 320, 1, 8192] - - [1052, 0.0] + - [1051, 0.0] - - [4096, 256, 1, 512] - - [1059, 0.0] + - [1058, 0.0] - - [4096, 256, 1, 2048] - - [1060, 0.0] + - [1059, 0.0] - - [4096, 256, 1, 8192] - - [1060, 0.0] - - - [4608, 256, 1, 512] - [1059, 0.0] + - - [4608, 256, 1, 512] + - [1058, 0.0] - - [4608, 256, 1, 2048] - - [1060, 0.0] + - [1059, 0.0] - - [4608, 256, 1, 8192] - - [1060, 0.0] - - - [5120, 256, 1, 512] - [1059, 0.0] + - - [5120, 256, 1, 512] + - [1058, 0.0] - - [5120, 256, 1, 2048] - - [1060, 0.0] + - [1059, 0.0] - - [5120, 256, 1, 8192] - - [1060, 0.0] + - [1059, 0.0] - - [5632, 256, 1, 512] - - [1061, 0.0] + - [1060, 0.0] - - [5632, 256, 1, 2048] - - [1062, 0.0] + - [1061, 0.0] - - [5632, 256, 1, 8192] - - [1063, 0.0] + - [1062, 0.0] - - [6144, 256, 1, 512] - - [1064, 0.0] + - [1063, 0.0] - - [6144, 256, 1, 2048] - - [1062, 0.0] + - [1061, 0.0] - - [6144, 256, 1, 8192] - - [1063, 0.0] + - [1062, 0.0] - - [7168, 256, 1, 512] - [721, 0.0] - - [7168, 256, 1, 2048] - [721, 0.0] - - [7168, 256, 1, 8192] - - [1065, 0.0] + - [1064, 0.0] - - [4096, 320, 1, 512] - - [1066, 0.0] + - [1065, 0.0] - - [4096, 320, 1, 2048] - - [1067, 0.0] + - [1066, 0.0] - - [4096, 320, 1, 8192] - - [1067, 0.0] + - [1066, 0.0] - - [4608, 320, 1, 512] - - [1068, 0.0] + - [1067, 0.0] - - [4608, 320, 1, 2048] - - [1069, 0.0] + - [1068, 0.0] - - [4608, 320, 1, 8192] - - [1070, 0.0] + - [1069, 0.0] - - [5120, 320, 1, 512] - - [1068, 0.0] + - [1067, 0.0] - - [5120, 320, 1, 2048] - - [1069, 0.0] + - [1068, 0.0] - - [5120, 320, 1, 8192] - - [1070, 0.0] + - [1069, 0.0] - - [5632, 320, 1, 512] - - [1071, 0.0] + - [1070, 0.0] - - [5632, 320, 1, 2048] - [962, 0.0] - - [5632, 320, 1, 8192] - - [1072, 0.0] + - [1071, 0.0] - - [6144, 320, 1, 512] - [961, 0.0] - - [6144, 320, 1, 2048] - [962, 0.0] - - [6144, 320, 1, 8192] - - [1072, 0.0] + - [1071, 0.0] - - [7168, 320, 1, 512] - [880, 0.0] - - [7168, 320, 1, 2048] - [880, 0.0] - - [7168, 320, 1, 8192] - - [1073, 0.0] + - [1072, 0.0] - - [8192, 256, 1, 512] - - [1074, 0.0] + - [1073, 0.0] - - [8192, 256, 1, 2048] - - [1074, 0.0] + - [1073, 0.0] - - [8192, 256, 1, 8192] - - [1074, 0.0] + - [1073, 0.0] - - [10240, 256, 1, 512] - - [1074, 0.0] + - [1073, 0.0] - - [10240, 256, 1, 2048] - - [1074, 0.0] + - [1073, 0.0] - - [10240, 256, 1, 8192] - - [1074, 0.0] + - [1073, 0.0] - - [12288, 256, 1, 512] - - [1075, 0.0] + - [1074, 0.0] - - [12288, 256, 1, 2048] - - [1075, 0.0] + - [1074, 0.0] - - [12288, 256, 1, 8192] - - [1076, 0.0] + - [1075, 0.0] - - [14336, 256, 1, 512] - - [1077, 0.0] + - [1076, 0.0] - - [14336, 256, 1, 2048] - - [1078, 0.0] + - [1077, 0.0] - - [14336, 256, 1, 8192] - - [1079, 0.0] + - [1078, 0.0] - - [8192, 320, 1, 512] - - [1080, 0.0] + - [1079, 0.0] - - [8192, 320, 1, 2048] - - [1080, 0.0] + - [1079, 0.0] - - [8192, 320, 1, 8192] - - [1080, 0.0] + - [1079, 0.0] - - [10240, 320, 1, 512] - - [1081, 0.0] + - [1080, 0.0] - - [10240, 320, 1, 2048] - - [1082, 0.0] - - - [10240, 320, 1, 8192] - [1081, 0.0] + - - [10240, 320, 1, 8192] + - [1080, 0.0] - - [12288, 320, 1, 512] - - [1083, 0.0] + - [1082, 0.0] - - [12288, 320, 1, 2048] - - [1084, 0.0] + - [1083, 0.0] - - [12288, 320, 1, 8192] - - [1085, 0.0] + - [1084, 0.0] - - [14336, 320, 1, 512] - - [1086, 0.0] + - [1085, 0.0] - - [14336, 320, 1, 2048] - - [1087, 0.0] + - [1086, 0.0] - - [14336, 320, 1, 8192] - - [1088, 0.0] + - [1087, 0.0] - - [16384, 256, 1, 512] - - [1089, 0.0] + - [1088, 0.0] - - [16384, 256, 1, 2048] - - [1090, 0.0] + - [1089, 0.0] - - [16384, 256, 1, 8192] - - [1090, 0.0] + - [1089, 0.0] - - [20480, 256, 1, 512] - - [1091, 0.0] + - [1090, 0.0] - - [20480, 256, 1, 2048] - - [1092, 0.0] + - [1091, 0.0] - - [20480, 256, 1, 8192] - - [1092, 0.0] + - [1091, 0.0] - - [24576, 256, 1, 512] - - [1093, 0.0] + - [1092, 0.0] - - [24576, 256, 1, 2048] - - [1093, 0.0] + - [1092, 0.0] - - [24576, 256, 1, 8192] - - [1094, 0.0] + - [1093, 0.0] - - [28672, 256, 1, 512] - - [1094, 0.0] + - [1093, 0.0] - - [28672, 256, 1, 2048] - - [1094, 0.0] + - [1093, 0.0] - - [28672, 256, 1, 8192] - - [1095, 0.0] + - [1094, 0.0] - - [16384, 320, 1, 512] - - [1096, 0.0] + - [1095, 0.0] - - [16384, 320, 1, 2048] - - [1096, 0.0] + - [1095, 0.0] - - [16384, 320, 1, 8192] - - [1096, 0.0] + - [1095, 0.0] - - [20480, 320, 1, 512] - - [1097, 0.0] + - [1096, 0.0] - - [20480, 320, 1, 2048] - - [1098, 0.0] + - [1097, 0.0] - - [20480, 320, 1, 8192] - - [1099, 0.0] + - [1098, 0.0] - - [24576, 320, 1, 512] - - [1100, 0.0] + - [1099, 0.0] - - [24576, 320, 1, 2048] - - [1097, 0.0] - - - [24576, 320, 1, 8192] - [1096, 0.0] + - - [24576, 320, 1, 8192] + - [1095, 0.0] - - [28672, 320, 1, 512] - - [1096, 0.0] + - [1095, 0.0] - - [28672, 320, 1, 2048] - - [1096, 0.0] + - [1095, 0.0] - - [28672, 320, 1, 8192] - - [1096, 0.0] + - [1095, 0.0] - - [32768, 256, 1, 512] - - [1101, 0.0] + - [1100, 0.0] - - [32768, 256, 1, 2048] - - [1102, 0.0] + - [1101, 0.0] - - [32768, 256, 1, 8192] - - [1103, 0.0] + - [1102, 0.0] - - [40960, 256, 1, 512] - - [1104, 0.0] + - [1103, 0.0] - - [40960, 256, 1, 2048] - - [1105, 0.0] + - [1104, 0.0] - - [40960, 256, 1, 8192] - - [1106, 0.0] + - [1105, 0.0] - - [49152, 256, 1, 512] - - [1101, 0.0] + - [1100, 0.0] - - [49152, 256, 1, 2048] - - [1103, 0.0] + - [1102, 0.0] - - [49152, 256, 1, 8192] - - [1103, 0.0] + - [1102, 0.0] - - [57344, 256, 1, 512] - - [1101, 0.0] + - [1100, 0.0] - - [57344, 256, 1, 2048] - - [1103, 0.0] + - [1102, 0.0] - - [57344, 256, 1, 8192] - - [1103, 0.0] + - [1102, 0.0] - - [32768, 320, 1, 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115.97] + - - [768, 9728, 1, 512] + - [3036, 94.11] + - - [768, 10240, 1, 128] + - [3036, 54.15] + - - [768, 12160, 1, 128] + - [3036, 53.82] + - - [768, 12160, 1, 8192] + - [3033, 133.44] + - - [768, 12288, 1, 4096] + - [3033, 131.36] + - - [768, 14336, 1, 4096] + - [3037, 125.53] + - - [768, 14592, 1, 4096] + - [3030, 127.68] + - - [768, 17024, 1, 2048] + - [3036, 129.51] + - - [768, 19456, 1, 512] + - [3036, 101.76] + - - [768, 20480, 1, 128] + - [3036, 62.27] + - - [768, 20480, 1, 8192] + - [3036, 140.08] + - - [768, 24320, 1, 4096] + - [3033, 130.83] + - - [768, 24576, 1, 4096] + - [3033, 131.99] + - - [768, 16, 1, 128] + - [3056, 0.43] + - - [768, 40, 1, 512] + - [2948, 3.14] + - - [768, 48, 1, 512] + - [2948, 4.03] + - - [768, 56, 1, 512] + - [3011, 4.0] + - - [768, 64, 1, 512] + - [3012, 4.91] + - - [768, 80, 1, 512] + - [3011, 6.01] + - - [768, 96, 1, 512] + - [3012, 7.35] + - - [768, 112, 1, 512] + - [2951, 7.31] + - - [768, 128, 1, 512] + - [2950, 8.87] + - - [768, 160, 1, 512] + - [2950, 11.11] + - - [768, 256, 1, 128] + - [2952, 5.96] + - - [768, 320, 1, 512] + - [2952, 19.36] + - - [768, 512, 1, 128] + - [2955, 10.39] + - - [768, 608, 1, 512] + - [3058, 29.9] + - - [768, 768, 1, 128] + - [2955, 15.35] + - - [768, 1024, 1, 128] + - [3059, 17.37] + - - [768, 1216, 1, 2048] + - [2961, 81.02] + - - [768, 1280, 1, 4096] + - [3060, 87.4] + - - [768, 1792, 1, 4096] + - [3020, 94.95] + - - [768, 1824, 1, 512] + - [3061, 59.45] + - - [768, 2048, 1, 4096] + - [3020, 108.2] + - - [768, 2432, 1, 512] + - [3022, 69.81] + - - [768, 2560, 1, 4096] + - [3022, 114.68] + - - [768, 3040, 1, 2048] + - [3024, 105.93] + - - [768, 3072, 1, 128] + - [3062, 38.03] + - - [768, 3584, 1, 4096] + - [3027, 116.05] + - - [768, 3648, 1, 2048] + - [3049, 109.88] + - - [768, 4096, 1, 128] + - [3063, 39.04] + - - [768, 4256, 1, 4096] + - [3035, 121.72] + - - [768, 4864, 1, 512] + - [3031, 86.17] + - - [768, 5120, 1, 4096] + - [3047, 131.03] + - - [768, 6080, 1, 2048] + - [3033, 119.71] + - - [768, 7168, 1, 128] + - [3064, 43.46] + - - [768, 7296, 1, 4096] + - [3027, 119.99] + - - [768, 8512, 1, 512] + - [3037, 89.73] + - - [768, 9728, 1, 128] + - [3036, 51.54] + - - [768, 9728, 1, 8192] + - [3036, 131.05] + - - [768, 10240, 1, 4096] + - [3036, 133.52] + - - [768, 12160, 1, 4096] + - [3033, 129.62] + - - [768, 14592, 1, 2048] + - [3037, 121.89] + - - [768, 17024, 1, 512] + - [3036, 103.06] + - - [768, 19456, 1, 128] + - [3036, 59.7] + - - [768, 19456, 1, 8192] + - [3036, 133.8] + - - [768, 20480, 1, 4096] + - [3036, 136.54] + - - [768, 24320, 1, 2048] + - [3033, 124.05] - null - null - DeviceEfficiency diff --git a/library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_80cu/GridBased/aquavanjaram_Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml b/library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_80cu/GridBased/aquavanjaram_Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml index 1fdf464445..a45f6d042b 100644 --- a/library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_80cu/GridBased/aquavanjaram_Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml +++ b/library/src/amd_detail/rocblaslt/src/Tensile/Logic/asm_full/aquavanjaram/gfx942_80cu/GridBased/aquavanjaram_Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs.yaml @@ -347204,267 +347204,6 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 - ActivationAlt: false - ActivationFuncCall: true - ActivationFused: true - AssertFree0ElementMultiple: 1 - AssertFree1ElementMultiple: 1 - AssertSummationElementMultiple: 1 - AssignedDerivedParameters: true - AssignedProblemIndependentDerivedParameters: true - BufferLoad: true - BufferStore: true - CUCount: null - ClusterLocalRead: 1 - CodeObjectVersion: default - ConvertAfterDS: false - CustomKernelName: '' - DepthU: 128 - DirectToLds: false - DirectToLdsA: false - DirectToLdsB: false - DirectToVgprSparseMetadata: false - EdgeType: ShiftPtr - EnableF32XdlMathOp: false - EnableMatrixInstruction: true - ExpandPointerSwap: 0 - ForceDisableShadowInit: false - GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 - GroupLoadStore: false - GuaranteeNoPartialA: true - GuaranteeNoPartialB: true - GuaranteeNoPartialMetadata: true - ISA: [9, 4, 2] - InnerUnroll: 1 - InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} - KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_6_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 - LdsBlockSizePerPadMetadata: 0 - LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 - LdsNumElementsAlignedMetadata: 0 - LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 - LdsOffsetBias: 0 - LdsOffsetBiasGSU: 0 - LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 - LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 - LocalWritePerMfma: -1 - LocalWriteUseSgprA: false - LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 - MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] - MIInputPerThread: 4 - MIInputPerThreadA: 4 - MIInputPerThreadB: 4 - MIInputPerThreadMetadata: 4 - MIOutputVectorWidth: 4 - MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 - MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 - MagicDivAlg: 2 - MatrixInstB: 1 - MatrixInstBM: 1 - MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] - MaxOccupancy: 40 - NoLdsWriteCode: false - NoReject: false - NoTailLoop: false - NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 - NonTemporalE: 0 - NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 8 - NumLoadsB: 6 - NumLoadsCoalescedA: 1 - NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 - NumThreads: 256 - OptNoLoadLoop: 1 - PackedC0IdxChars: [I] - PackedC0IndicesX: [0] - PackedC1IdxChars: [J] - PackedC1IndicesX: [1] - PrefetchGlobalRead: 2 - PrefetchLocalRead: 1 - PreloadKernArgs: true - ProblemType: - Activation: true - ActivationComputeDataType: 0 - ActivationNoGuard: false - ActivationType: hipblaslt_all - AllowNoFreeDims: false - AssignedDerivedParameters: true - Batched: true - BetaOnlyUseBias: false - BiasDataTypeList: [0, 4] - BiasSrc: D - ComplexConjugateA: false - ComplexConjugateB: false - ComputeDataType: 0 - DataType: 4 - DataTypeA: 4 - DataTypeB: 4 - DataTypeE: 4 - DestDataType: 4 - F32XdlMathOp: 0 - Gradient: false - GroupedGemm: false - HighPrecisionAccumulate: true - Index0: 0 - Index01A: 0 - Index01B: 1 - Index1: 1 - IndexAssignmentsA: [3, 0, 2] - IndexAssignmentsB: [3, 1, 2] - IndexAssignmentsLD: [4, 5, 6, 7] - IndexAssignmentsMetadata: [3, 0, 2] - IndexUnroll: 3 - IndexUnrollA: 0 - IndexUnrollB: 0 - IndexUnrollM: 0 - IndicesBatch: [2] - IndicesFree: [0, 1] - IndicesSummation: [3] - MirrorDimsA: [] - MirrorDimsB: [] - MirrorDimsMetadata: [] - NumIndicesBatch: 1 - NumIndicesC: 3 - NumIndicesFree: 2 - NumIndicesLD: 4 - NumIndicesSummation: 1 - OperationType: GEMM - SetConstStrideA: [] - SetConstStrideB: [] - SetConstStrideBias: [] - SilentHighPrecisionAccumulate: false - Sparse: 0 - StochasticRounding: false - StridedBatched: true - SupportUserArgs: true - TLUA: false - TLUB: false - Tensor0: 0 - Tensor1: 1 - TileA: 0 - TileAwareSelection: false - TileB: 1 - TotalIndices: 4 - TransposeA: true - TransposeB: false - UseBeta: true - UseBias: 1 - UseE: false - UseInitialStridesAB: false - UseInitialStridesCD: false - UseScaleAB: '' - UseScaleAlphaVec: 1 - UseScaleCD: false - ScheduleGlobalRead: 1 - ScheduleIterAlg: 3 - ScheduleLocalWrite: 1 - SolutionIndex: 1330 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_6_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 - SourceSwap: 1 - StaggerU: 0 - StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 - StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 - SuppressNoLoadLoop: false - ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 6 - ThreadTileA: 8 - ThreadTileB: 6 - TransposeLDS: 1 - TransposeLDSMetadata: true - UnrollMajorLDSA: true - UnrollMajorLDSB: true - UnrollMajorLDSMetadata: true - Use64bShadowLimit: 1 - UseInstOffsetForGRO: 0 - UseSgprForGRO: -1 - Valid: true - VectorStore: -1 - VectorWidthA: 2 - VectorWidthB: 1 - WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 - WaveSeparateGlobalReadMetadata: 0 - WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 - WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 - _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 - _VectorStore: 1 - _WorkspaceSizePerElemBias: 0 - _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -347675,7 +347414,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1331 + SolutionIndex: 1330 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -347936,7 +347675,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1332 + SolutionIndex: 1331 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT11_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -348197,7 +347936,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1333 + SolutionIndex: 1332 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -348458,7 +348197,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1334 + SolutionIndex: 1333 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -348719,7 +348458,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1335 + SolutionIndex: 1334 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -348980,7 +348719,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1336 + SolutionIndex: 1335 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -349241,7 +348980,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1337 + SolutionIndex: 1336 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -349502,7 +349241,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1338 + SolutionIndex: 1337 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -349763,7 +349502,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1339 + SolutionIndex: 1338 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -350024,7 +349763,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1340 + SolutionIndex: 1339 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT8_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -350285,7 +350024,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1341 + SolutionIndex: 1340 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -350546,7 +350285,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1342 + SolutionIndex: 1341 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -350807,7 +350546,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1343 + SolutionIndex: 1342 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -351068,7 +350807,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1344 + SolutionIndex: 1343 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -351329,7 +351068,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1345 + SolutionIndex: 1344 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -351590,7 +351329,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1346 + SolutionIndex: 1345 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -351851,7 +351590,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1347 + SolutionIndex: 1346 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -352112,7 +351851,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1348 + SolutionIndex: 1347 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -352373,7 +352112,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1349 + SolutionIndex: 1348 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -352634,7 +352373,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1350 + SolutionIndex: 1349 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT13_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -352895,7 +352634,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1351 + SolutionIndex: 1350 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -353156,7 +352895,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1352 + SolutionIndex: 1351 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -353417,7 +353156,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1353 + SolutionIndex: 1352 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -353678,7 +353417,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1354 + SolutionIndex: 1353 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -353939,7 +353678,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1355 + SolutionIndex: 1354 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -354200,7 +353939,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1356 + SolutionIndex: 1355 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -354461,7 +354200,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1357 + SolutionIndex: 1356 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -354722,7 +354461,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1358 + SolutionIndex: 1357 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -354983,7 +354722,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1359 + SolutionIndex: 1358 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -355244,7 +354983,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1360 + SolutionIndex: 1359 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -355505,7 +355244,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1361 + SolutionIndex: 1360 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -355766,7 +355505,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1362 + SolutionIndex: 1361 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -356027,7 +355766,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1363 + SolutionIndex: 1362 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -356288,7 +356027,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1364 + SolutionIndex: 1363 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -356549,7 +356288,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1365 + SolutionIndex: 1364 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -356810,7 +356549,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1366 + SolutionIndex: 1365 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -357071,7 +356810,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1367 + SolutionIndex: 1366 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -357332,7 +357071,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1368 + SolutionIndex: 1367 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -357593,7 +357332,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1369 + SolutionIndex: 1368 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -357854,7 +357593,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1370 + SolutionIndex: 1369 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -358115,7 +357854,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1371 + SolutionIndex: 1370 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -358376,7 +358115,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1372 + SolutionIndex: 1371 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -358637,7 +358376,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1373 + SolutionIndex: 1372 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -358898,7 +358637,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1374 + SolutionIndex: 1373 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -359159,7 +358898,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1375 + SolutionIndex: 1374 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -359420,7 +359159,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1376 + SolutionIndex: 1375 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -359681,7 +359420,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1377 + SolutionIndex: 1376 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -359942,7 +359681,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1378 + SolutionIndex: 1377 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT6_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -360203,7 +359942,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1379 + SolutionIndex: 1378 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -360464,7 +360203,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1380 + SolutionIndex: 1379 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -360725,7 +360464,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1381 + SolutionIndex: 1380 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -360986,7 +360725,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1382 + SolutionIndex: 1381 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -361247,7 +360986,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1383 + SolutionIndex: 1382 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -361508,7 +361247,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1384 + SolutionIndex: 1383 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -361769,7 +361508,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1385 + SolutionIndex: 1384 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -362030,7 +361769,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1386 + SolutionIndex: 1385 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -362291,7 +362030,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1387 + SolutionIndex: 1386 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -362552,7 +362291,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1388 + SolutionIndex: 1387 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -362813,7 +362552,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 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ScheduleLocalWrite: 1 - SolutionIndex: 1392 + SolutionIndex: 1391 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT240x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT15_4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -363857,7 +363596,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1393 + SolutionIndex: 1392 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -364118,7 +363857,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1394 + SolutionIndex: 1393 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -364379,7 +364118,7 @@ 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SourceSwap: 1 StaggerU: 8 @@ -365945,7 +365684,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1401 + SolutionIndex: 1400 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -366206,7 +365945,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1402 + SolutionIndex: 1401 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -366467,7 +366206,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1403 + SolutionIndex: 1402 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -366728,7 +366467,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1404 + SolutionIndex: 1403 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NLCA1_NLCB1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -366989,7 +366728,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1405 + SolutionIndex: 1404 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU5_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -367250,7 +366989,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1406 + SolutionIndex: 1405 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU10_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -367511,7 +367250,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1407 + SolutionIndex: 1406 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -367772,7 +367511,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1408 + SolutionIndex: 1407 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -368033,7 +367772,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1409 + SolutionIndex: 1408 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU11_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -368294,7 +368033,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1410 + SolutionIndex: 1409 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU5_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -368555,7 +368294,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1411 + SolutionIndex: 1410 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU11_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -368816,7 +368555,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1412 + SolutionIndex: 1411 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU5_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -369077,7 +368816,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1413 + SolutionIndex: 1412 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT1_1_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -369338,7 +369077,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1414 + SolutionIndex: 1413 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_6_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -369599,7 +369338,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1415 + SolutionIndex: 1414 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU5_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -369860,7 +369599,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1416 + SolutionIndex: 1415 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU9_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -370121,7 +369860,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1417 + SolutionIndex: 1416 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -370382,7 +370121,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1418 + SolutionIndex: 1417 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU6_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -370643,7 +370382,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1419 + SolutionIndex: 1418 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -370904,7 +370643,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1420 + SolutionIndex: 1419 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -371165,7 +370904,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1421 + SolutionIndex: 1420 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -371426,7 +371165,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1422 + SolutionIndex: 1421 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -371687,7 +371426,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1423 + SolutionIndex: 1422 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -371948,7 +371687,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1424 + SolutionIndex: 1423 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -372209,7 +371948,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1425 + SolutionIndex: 1424 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -372470,7 +372209,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1426 + SolutionIndex: 1425 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -372731,7 +372470,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1427 + SolutionIndex: 1426 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -372992,7 +372731,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1428 + SolutionIndex: 1427 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -373253,7 +372992,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1429 + SolutionIndex: 1428 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -373514,7 +373253,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1430 + SolutionIndex: 1429 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -373775,7 +373514,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1431 + SolutionIndex: 1430 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -374036,7 +373775,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1432 + SolutionIndex: 1431 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -374297,7 +374036,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1433 + SolutionIndex: 1432 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -374558,7 +374297,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1434 + SolutionIndex: 1433 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -374819,7 +374558,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1435 + SolutionIndex: 1434 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -375080,7 +374819,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1436 + SolutionIndex: 1435 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -375341,7 +375080,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1437 + SolutionIndex: 1436 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -375602,7 +375341,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1438 + SolutionIndex: 1437 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -375863,7 +375602,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1439 + SolutionIndex: 1438 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 @@ -376124,7 +375863,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 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ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1443 + SolutionIndex: 1442 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -377168,7 +376907,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1444 + SolutionIndex: 1443 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -377429,7 +377168,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1445 + SolutionIndex: 1444 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -377690,7 +377429,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1446 + SolutionIndex: 1445 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -377951,7 +377690,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1447 + SolutionIndex: 1446 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -378212,7 +377951,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1448 + SolutionIndex: 1447 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -378473,7 +378212,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1449 + SolutionIndex: 1448 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -378734,7 +378473,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1450 + SolutionIndex: 1449 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -378995,7 +378734,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1451 + SolutionIndex: 1450 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -379256,7 +378995,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1452 + SolutionIndex: 1451 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -379517,7 +379256,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1453 + SolutionIndex: 1452 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -379778,7 +379517,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1454 + SolutionIndex: 1453 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -380039,7 +379778,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1455 + SolutionIndex: 1454 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -380300,7 +380039,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1456 + SolutionIndex: 1455 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -380561,7 +380300,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1457 + SolutionIndex: 1456 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -380822,7 +380561,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1458 + SolutionIndex: 1457 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU9_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -381083,7 +380822,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1459 + SolutionIndex: 1458 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -381344,7 +381083,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1460 + SolutionIndex: 1459 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU9_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -381605,7 +381344,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1461 + SolutionIndex: 1460 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU9_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -381866,7 +381605,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1462 + SolutionIndex: 1461 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU9_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -382127,7 +381866,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1463 + SolutionIndex: 1462 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU6_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_6_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -382388,7 +382127,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1464 + SolutionIndex: 1463 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU6_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -382649,7 +382388,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1465 + SolutionIndex: 1464 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x112x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 @@ -382910,7 +382649,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1466 + SolutionIndex: 1465 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU6_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -383171,7 +382910,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1467 + SolutionIndex: 1466 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU6_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -383432,7 +383171,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1468 + SolutionIndex: 1467 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU10_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -383693,7 +383432,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1469 + SolutionIndex: 1468 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -383954,7 +383693,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1470 + SolutionIndex: 1469 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -384215,7 +383954,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1471 + SolutionIndex: 1470 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_6_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -384476,7 +384215,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1472 + SolutionIndex: 1471 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_2_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -384737,7 +384476,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1473 + SolutionIndex: 1472 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU9_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_8_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -384998,7 +384737,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1474 + SolutionIndex: 1473 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU10_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT12_5_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -385259,7 +384998,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1475 + SolutionIndex: 1474 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU7_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -385520,7 +385259,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1476 + SolutionIndex: 1475 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU6_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -385781,7 +385520,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1477 + SolutionIndex: 1476 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU7_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -386042,7 +385781,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1478 + SolutionIndex: 1477 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_1_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -386303,7 +386042,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1479 + SolutionIndex: 1478 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU7_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -386564,7 +386303,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1480 + SolutionIndex: 1479 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU10_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -386825,7 +386564,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1481 + SolutionIndex: 1480 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU7_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -387086,7 +386825,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1482 + SolutionIndex: 1481 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -387347,7 +387086,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1483 + SolutionIndex: 1482 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU10_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_10_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -387608,7 +387347,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1484 + SolutionIndex: 1483 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -387869,7 +387608,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1485 + SolutionIndex: 1484 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU7_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -388130,7 +387869,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1486 + SolutionIndex: 1485 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -388391,7 +388130,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1487 + SolutionIndex: 1486 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU6_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -388652,7 +388391,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1488 + SolutionIndex: 1487 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -388913,7 +388652,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1489 + SolutionIndex: 1488 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -389174,7 +388913,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1490 + SolutionIndex: 1489 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU7_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -389435,7 +389174,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1491 + SolutionIndex: 1490 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -389696,7 +389435,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1492 + SolutionIndex: 1491 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -389957,7 +389696,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1493 + SolutionIndex: 1492 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -390218,7 +389957,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1494 + SolutionIndex: 1493 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -390479,7 +390218,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1495 + SolutionIndex: 1494 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -390740,7 +390479,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1496 + SolutionIndex: 1495 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -391001,7 +390740,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1497 + SolutionIndex: 1496 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -391262,7 +391001,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1498 + SolutionIndex: 1497 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -391523,7 +391262,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1499 + SolutionIndex: 1498 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT11_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -391784,7 +391523,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1500 + SolutionIndex: 1499 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -392045,7 +391784,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1501 + SolutionIndex: 1500 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -392306,7 +392045,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1502 + SolutionIndex: 1501 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -392567,7 +392306,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1503 + SolutionIndex: 1502 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -392828,7 +392567,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1504 + SolutionIndex: 1503 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -393089,7 +392828,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1505 + SolutionIndex: 1504 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -393350,7 +393089,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1506 + SolutionIndex: 1505 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -393611,7 +393350,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1507 + SolutionIndex: 1506 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -393872,7 +393611,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1508 + SolutionIndex: 1507 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -394133,7 +393872,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1509 + SolutionIndex: 1508 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -394394,7 +394133,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1510 + SolutionIndex: 1509 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -394655,7 +394394,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1511 + SolutionIndex: 1510 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -394916,7 +394655,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1512 + SolutionIndex: 1511 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -394994,12 +394733,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -395010,32 +394749,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -395047,7 +394786,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -395055,15 +394794,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -395079,19 +394818,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 4 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -395177,8 +394916,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1513 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 1512 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -395186,16 +394925,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 20 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -395207,13 +394946,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -395255,12 +394994,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -395271,32 +395010,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 16896 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -395317,13 +395056,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 + MIWaveTile: [7, 4] + MIWaveTileA: 7 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 112 MacroTile1: 256 - MacroTileA: 128 + MacroTileA: 112 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -395340,18 +395079,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 14 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -395438,8 +395177,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1514 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 1513 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -395447,16 +395186,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 28 ThreadTile1: 4 - ThreadTileA: 32 + ThreadTileA: 28 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -395468,7 +395207,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -395516,12 +395255,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -395532,68 +395271,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -395601,19 +395340,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 8 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -395699,268 +395438,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1515 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 - SourceSwap: 1 - StaggerU: 0 - StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 - StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 - SuppressNoLoadLoop: false - ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 - TransposeLDS: 1 - TransposeLDSMetadata: true - UnrollMajorLDSA: true - UnrollMajorLDSB: true - UnrollMajorLDSMetadata: true - Use64bShadowLimit: 1 - UseInstOffsetForGRO: 0 - UseSgprForGRO: -1 - Valid: true - VectorStore: -1 - VectorWidthA: 1 - VectorWidthB: 1 - WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 - WaveSeparateGlobalReadMetadata: 0 - WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 - WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 - _VectorStore: 1 - _WorkspaceSizePerElemBias: 0 - _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 - ActivationAlt: false - ActivationFuncCall: true - ActivationFused: true - AssertFree0ElementMultiple: 1 - AssertFree1ElementMultiple: 1 - AssertSummationElementMultiple: 1 - AssignedDerivedParameters: true - AssignedProblemIndependentDerivedParameters: true - BufferLoad: true - BufferStore: true - CUCount: null - ClusterLocalRead: 1 - CodeObjectVersion: default - ConvertAfterDS: false - CustomKernelName: '' - DepthU: 64 - DirectToLds: false - DirectToLdsA: false - DirectToLdsB: false - DirectToVgprSparseMetadata: false - EdgeType: ShiftPtr - EnableF32XdlMathOp: false - EnableMatrixInstruction: true - ExpandPointerSwap: 0 - ForceDisableShadowInit: false - GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 - GroupLoadStore: false - GuaranteeNoPartialA: true - GuaranteeNoPartialB: true - GuaranteeNoPartialMetadata: true - ISA: [9, 4, 2] - InnerUnroll: 1 - InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} - KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 - LdsBlockSizePerPadMetadata: 0 - LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 - LdsNumElementsAlignedMetadata: 0 - LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 - LdsOffsetBias: 0 - LdsOffsetBiasGSU: 0 - LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 - LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 - LocalWritePerMfma: -1 - LocalWriteUseSgprA: false - LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 - MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] - MIInputPerThread: 4 - MIInputPerThreadA: 4 - MIInputPerThreadB: 4 - MIInputPerThreadMetadata: 4 - MIOutputVectorWidth: 4 - MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 - MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 - MagicDivAlg: 2 - MatrixInstB: 1 - MatrixInstBM: 1 - MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] - MaxOccupancy: 40 - NoLdsWriteCode: false - NoReject: false - NoTailLoop: false - NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 - NonTemporalE: 0 - NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 4 - NumLoadsCoalescedA: 1 - NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 - NumThreads: 256 - OptNoLoadLoop: 1 - PackedC0IdxChars: [I] - PackedC0IndicesX: [0] - PackedC1IdxChars: [J] - PackedC1IndicesX: [1] - PrefetchGlobalRead: 2 - PrefetchLocalRead: 1 - PreloadKernArgs: true - ProblemType: - Activation: true - ActivationComputeDataType: 0 - ActivationNoGuard: false - ActivationType: hipblaslt_all - AllowNoFreeDims: false - AssignedDerivedParameters: true - Batched: true - BetaOnlyUseBias: false - BiasDataTypeList: [0, 4] - BiasSrc: D - ComplexConjugateA: false - ComplexConjugateB: false - ComputeDataType: 0 - DataType: 4 - DataTypeA: 4 - DataTypeB: 4 - DataTypeE: 4 - DestDataType: 4 - F32XdlMathOp: 0 - Gradient: false - GroupedGemm: false - HighPrecisionAccumulate: true - Index0: 0 - Index01A: 0 - Index01B: 1 - Index1: 1 - IndexAssignmentsA: [3, 0, 2] - IndexAssignmentsB: [3, 1, 2] - IndexAssignmentsLD: [4, 5, 6, 7] - IndexAssignmentsMetadata: [3, 0, 2] - IndexUnroll: 3 - IndexUnrollA: 0 - IndexUnrollB: 0 - IndexUnrollM: 0 - IndicesBatch: [2] - IndicesFree: [0, 1] - IndicesSummation: [3] - MirrorDimsA: [] - MirrorDimsB: [] - MirrorDimsMetadata: [] - NumIndicesBatch: 1 - NumIndicesC: 3 - NumIndicesFree: 2 - NumIndicesLD: 4 - NumIndicesSummation: 1 - OperationType: GEMM - SetConstStrideA: [] - SetConstStrideB: [] - SetConstStrideBias: [] - SilentHighPrecisionAccumulate: false - Sparse: 0 - StochasticRounding: false - StridedBatched: true - SupportUserArgs: true - TLUA: false - TLUB: false - Tensor0: 0 - Tensor1: 1 - TileA: 0 - TileAwareSelection: false - TileB: 1 - TotalIndices: 4 - TransposeA: true - TransposeB: false - UseBeta: true - UseBias: 1 - UseE: false - UseInitialStridesAB: false - UseInitialStridesCD: false - UseScaleAB: '' - UseScaleAlphaVec: 1 - UseScaleCD: false - ScheduleGlobalRead: 1 - ScheduleIterAlg: 3 - ScheduleLocalWrite: 1 - SolutionIndex: 1516 + SolutionIndex: 1514 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -396221,7 +395699,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1517 + SolutionIndex: 1515 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -396482,7 +395960,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1518 + SolutionIndex: 1516 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -396743,7 +396221,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1519 + SolutionIndex: 1517 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -397004,7 +396482,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1520 + SolutionIndex: 1518 SolutionNameMin: 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1523 + SolutionIndex: 1521 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -398048,7 +397526,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1524 + SolutionIndex: 1522 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -398309,7 +397787,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1525 + SolutionIndex: 1523 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -398570,7 +398048,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1526 + SolutionIndex: 1524 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -398831,7 +398309,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1527 + SolutionIndex: 1525 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -399092,7 +398570,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1528 + SolutionIndex: 1526 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -399353,7 +398831,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1529 + SolutionIndex: 1527 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -399614,7 +399092,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1530 + SolutionIndex: 1528 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -399875,7 +399353,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1531 + SolutionIndex: 1529 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -400136,7 +399614,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1532 + SolutionIndex: 1530 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -400397,7 +399875,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1533 + SolutionIndex: 1531 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 @@ -400658,7 +400136,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1534 + SolutionIndex: 1532 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -400919,7 +400397,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1535 + SolutionIndex: 1533 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -401180,7 +400658,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1536 + SolutionIndex: 1534 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 @@ -401441,7 +400919,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1537 + SolutionIndex: 1535 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_15_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -401702,7 +401180,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1538 + SolutionIndex: 1536 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -401963,7 +401441,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1539 + SolutionIndex: 1537 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -402224,7 +401702,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1540 + SolutionIndex: 1538 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 @@ -402485,7 +401963,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1541 + SolutionIndex: 1539 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 @@ -402746,7 +402224,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1542 + SolutionIndex: 1540 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 @@ -403007,7 +402485,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1543 + SolutionIndex: 1541 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -403268,7 +402746,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1544 + SolutionIndex: 1542 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 @@ -403529,7 +403007,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1545 + SolutionIndex: 1543 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -403790,7 +403268,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1546 + SolutionIndex: 1544 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 8 @@ -404051,7 +403529,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1547 + SolutionIndex: 1545 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -404312,7 +403790,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1548 + SolutionIndex: 1546 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -404573,7 +404051,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1549 + SolutionIndex: 1547 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 @@ -404834,7 +404312,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1550 + SolutionIndex: 1548 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -405095,7 +404573,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1551 + SolutionIndex: 1549 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -405356,7 +404834,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1552 + SolutionIndex: 1550 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -405617,7 +405095,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1553 + SolutionIndex: 1551 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -405878,7 +405356,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1554 + SolutionIndex: 1552 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -406139,7 +405617,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1555 + SolutionIndex: 1553 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -406400,7 +405878,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1556 + SolutionIndex: 1554 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -406661,7 +406139,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1557 + SolutionIndex: 1555 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -406922,7 +406400,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1558 + SolutionIndex: 1556 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -407183,7 +406661,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1559 + SolutionIndex: 1557 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT3_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -407444,7 +406922,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1560 + SolutionIndex: 1558 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -407705,7 +407183,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1561 + SolutionIndex: 1559 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIWT3_3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -407966,7 +407444,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1562 + SolutionIndex: 1560 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU6_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -408227,7 +407705,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1563 + SolutionIndex: 1561 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -408488,7 +407966,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1564 + SolutionIndex: 1562 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -408749,7 +408227,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1565 + SolutionIndex: 1563 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -409010,7 +408488,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1566 + SolutionIndex: 1564 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -409271,7 +408749,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1567 + SolutionIndex: 1565 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -409532,7 +409010,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1568 + SolutionIndex: 1566 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU7_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -409793,7 +409271,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1569 + SolutionIndex: 1567 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU6_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -410054,7 +409532,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1570 + SolutionIndex: 1568 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -410315,7 +409793,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1571 + SolutionIndex: 1569 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU7_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_9_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -410576,7 +410054,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1572 + SolutionIndex: 1570 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU7_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -410837,7 +410315,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1573 + SolutionIndex: 1571 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU5_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -411098,7 +410576,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1574 + SolutionIndex: 1572 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -411359,7 +410837,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1575 + SolutionIndex: 1573 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -411620,7 +411098,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1576 + SolutionIndex: 1574 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -411881,7 +411359,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1577 + SolutionIndex: 1575 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -412142,7 +411620,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 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ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1581 + SolutionIndex: 1579 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -413186,7 +412664,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1582 + SolutionIndex: 1580 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -413447,7 +412925,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1583 + SolutionIndex: 1581 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -413708,7 +413186,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1584 + SolutionIndex: 1582 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -413969,7 +413447,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1585 + SolutionIndex: 1583 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -414230,7 +413708,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1586 + SolutionIndex: 1584 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -414491,7 +413969,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1587 + SolutionIndex: 1585 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -414752,7 +414230,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1588 + SolutionIndex: 1586 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -415013,7 +414491,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1589 + SolutionIndex: 1587 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -415274,7 +414752,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1590 + SolutionIndex: 1588 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -415535,7 +415013,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1591 + SolutionIndex: 1589 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -415796,7 +415274,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1592 + SolutionIndex: 1590 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -416057,7 +415535,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1593 + SolutionIndex: 1591 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -416318,7 +415796,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1594 + SolutionIndex: 1592 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -416579,7 +416057,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1595 + SolutionIndex: 1593 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -416840,7 +416318,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1596 + SolutionIndex: 1594 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT1_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -417101,7 +416579,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1597 + SolutionIndex: 1595 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 @@ -417362,7 +416840,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1598 + SolutionIndex: 1596 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -417429,7 +416907,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -417440,12 +416918,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -417456,42 +416934,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT6_5_NTC0_NTD0_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29568 - LdsNumElementsAlignedA: 6528 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 6528 - LdsOffsetB_Blk: 39296 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29568 - LdsOffsetMetadata_Blk: 39296 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -417501,15 +416979,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -417525,19 +417003,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -417623,8 +417101,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1599 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT6_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 1597 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -417632,17 +417110,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -417653,282 +417131,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 - _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 - _VectorStore: 1 - _WorkspaceSizePerElemBias: 0 - _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 - ActivationAlt: false - ActivationFuncCall: true - ActivationFused: true - AssertFree0ElementMultiple: 1 - AssertFree1ElementMultiple: 1 - AssertSummationElementMultiple: 1 - AssignedDerivedParameters: true - AssignedProblemIndependentDerivedParameters: true - BufferLoad: true - BufferStore: true - CUCount: null - ClusterLocalRead: 1 - CodeObjectVersion: default - ConvertAfterDS: false - CustomKernelName: '' - DepthU: 64 - DirectToLds: false - DirectToLdsA: false - DirectToLdsB: false - DirectToVgprSparseMetadata: false - EdgeType: ShiftPtr - EnableF32XdlMathOp: false - EnableMatrixInstruction: true - ExpandPointerSwap: 0 - ForceDisableShadowInit: false - GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 - GroupLoadStore: false - GuaranteeNoPartialA: true - GuaranteeNoPartialB: true - GuaranteeNoPartialMetadata: true - ISA: [9, 4, 2] - InnerUnroll: 1 - InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} - KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 - LdsBlockSizePerPadMetadata: 0 - LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 - LdsNumElementsAlignedMetadata: 0 - LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 - LdsOffsetBias: 0 - LdsOffsetBiasGSU: 0 - LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 - LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 - LocalWritePerMfma: -1 - LocalWriteUseSgprA: false - LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 - MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] - MIInputPerThread: 4 - MIInputPerThreadA: 4 - MIInputPerThreadB: 4 - MIInputPerThreadMetadata: 4 - MIOutputVectorWidth: 4 - MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 - MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 - MagicDivAlg: 2 - MatrixInstB: 1 - MatrixInstBM: 1 - MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] - MaxOccupancy: 40 - NoLdsWriteCode: false - NoReject: false - NoTailLoop: false - NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 - NonTemporalE: 0 - NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 - NumLoadsCoalescedA: 1 - NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 - NumThreads: 256 - OptNoLoadLoop: 1 - PackedC0IdxChars: [I] - PackedC0IndicesX: [0] - PackedC1IdxChars: [J] - PackedC1IndicesX: [1] - PrefetchGlobalRead: 2 - PrefetchLocalRead: 1 - PreloadKernArgs: true - ProblemType: - Activation: true - ActivationComputeDataType: 0 - ActivationNoGuard: false - ActivationType: hipblaslt_all - AllowNoFreeDims: false - AssignedDerivedParameters: true - Batched: true - BetaOnlyUseBias: false - BiasDataTypeList: [0, 4] - BiasSrc: D - ComplexConjugateA: false - ComplexConjugateB: false - ComputeDataType: 0 - DataType: 4 - DataTypeA: 4 - DataTypeB: 4 - DataTypeE: 4 - DestDataType: 4 - F32XdlMathOp: 0 - Gradient: false - GroupedGemm: false - HighPrecisionAccumulate: true - Index0: 0 - Index01A: 0 - Index01B: 1 - Index1: 1 - IndexAssignmentsA: [3, 0, 2] - IndexAssignmentsB: [3, 1, 2] - IndexAssignmentsLD: [4, 5, 6, 7] - IndexAssignmentsMetadata: [3, 0, 2] - IndexUnroll: 3 - IndexUnrollA: 0 - IndexUnrollB: 0 - IndexUnrollM: 0 - IndicesBatch: [2] - IndicesFree: [0, 1] - IndicesSummation: [3] - MirrorDimsA: [] - MirrorDimsB: [] - MirrorDimsMetadata: [] - NumIndicesBatch: 1 - NumIndicesC: 3 - NumIndicesFree: 2 - NumIndicesLD: 4 - NumIndicesSummation: 1 - OperationType: GEMM - SetConstStrideA: [] - SetConstStrideB: [] - SetConstStrideBias: [] - SilentHighPrecisionAccumulate: false - Sparse: 0 - StochasticRounding: false - StridedBatched: true - SupportUserArgs: true - TLUA: false - TLUB: false - Tensor0: 0 - Tensor1: 1 - TileA: 0 - TileAwareSelection: false - TileB: 1 - TotalIndices: 4 - TransposeA: true - TransposeB: false - UseBeta: true - UseBias: 1 - UseE: false - UseInitialStridesAB: false - UseInitialStridesCD: false - UseScaleAB: '' - UseScaleAlphaVec: 1 - UseScaleCD: false - ScheduleGlobalRead: 1 - ScheduleIterAlg: 3 - ScheduleLocalWrite: 1 - SolutionIndex: 1600 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 - SourceSwap: 1 - StaggerU: 0 - StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 - StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 - SuppressNoLoadLoop: false - ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 - TransposeLDS: 1 - TransposeLDSMetadata: true - UnrollMajorLDSA: true - UnrollMajorLDSB: true - UnrollMajorLDSMetadata: true - Use64bShadowLimit: 1 - UseInstOffsetForGRO: 0 - UseSgprForGRO: -1 - Valid: true - VectorStore: -1 - VectorWidthA: 4 - VectorWidthB: 1 - WaveSeparateGlobalReadA: 0 - WaveSeparateGlobalReadB: 0 - WaveSeparateGlobalReadMetadata: 0 - WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 - WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -418145,7 +417362,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1601 + SolutionIndex: 1598 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -418406,7 +417623,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1602 + SolutionIndex: 1599 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -418667,7 +417884,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1603 + SolutionIndex: 1600 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -418928,7 +418145,7 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1604 + SolutionIndex: 1601 SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 @@ -418995,7 +418212,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -419006,12 +418223,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -419022,42 +418239,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_6_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -419067,15 +418284,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 112 + MacroTile1: 384 + MacroTileA: 112 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -419091,19 +418308,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -419189,8 +418406,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1605 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1602 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -419198,17 +418415,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -419219,21 +418436,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -419283,7 +418500,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_14_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -419296,23 +418513,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -419328,14 +418545,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 14] + MIWaveTileA: 3 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 192 MacroTile1: 224 - MacroTileA: 160 + MacroTileA: 192 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -419352,18 +418569,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 24 NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 @@ -419450,8 +418667,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1606 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 1603 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_14_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -419460,16 +418677,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 14 + ThreadTileA: 12 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -419486,8 +418703,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -419517,7 +418734,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -419529,7 +418746,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -419544,42 +418761,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_6_NTC0_NTD0_SVW1_VWA1_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_14_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 7680 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 91648 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -419589,15 +418806,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 14] + MIWaveTileA: 3 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 384 - MacroTileA: 112 - MacroTileB: 384 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -419613,19 +418830,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 168 NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 - NumLoadsB: 6 + NumLoadsA: 24 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -419711,8 +418928,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1607 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 1604 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_14_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -419721,16 +418938,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 12 + ThreadTile1: 14 + ThreadTileA: 12 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -419747,17 +418964,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -419790,11 +419007,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -419805,45 +419022,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_14_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -419851,22 +419068,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 14] - MIWaveTileA: 3 - MIWaveTileB: 14 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -419874,19 +419091,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 24 - NumLoadsB: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -419972,8 +419189,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1608 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_14_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1605 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -419981,17 +419198,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 14 - ThreadTileA: 12 - ThreadTileB: 14 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -420002,13 +419219,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -420050,12 +419267,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -420066,45 +419283,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_14_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -420112,22 +419329,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 14] - MIWaveTileA: 3 - MIWaveTileB: 14 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -420140,14 +419357,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 24 - NumLoadsB: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -420233,8 +419450,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1609 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_14_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 1606 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -420242,17 +419459,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 14 - ThreadTileA: 12 - ThreadTileB: 14 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -420263,13 +419480,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -420279,7 +419496,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -420312,11 +419529,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -420327,22 +419544,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_11_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 + LdsNumBytes: 62976 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -420351,21 +419568,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 + LdsOffsetMetadata: 62976 LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -420373,22 +419590,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 176 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -420396,19 +419613,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 32 - NumLoadsB: 5 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -420494,8 +419711,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1610 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 1607 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -420503,17 +419720,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -420524,14 +419741,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -420572,12 +419789,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -420588,68 +419805,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -420657,19 +419874,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -420755,8 +419972,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1611 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1608 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -420764,17 +419981,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -420785,13 +420002,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -420801,7 +420018,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -420838,7 +420055,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -420849,7 +420066,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_11_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -420858,27 +420075,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -420894,15 +420111,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -420923,14 +420140,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -421016,8 +420233,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1612 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1609 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -421025,17 +420242,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -421046,13 +420263,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -421083,7 +420300,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -421095,11 +420312,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -421110,68 +420327,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -421179,19 +420396,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 - NumLoadsB: 36 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -421277,8 +420494,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1613 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 1610 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -421286,17 +420503,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -421307,23 +420524,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -421344,7 +420561,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -421356,11 +420573,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -421371,68 +420588,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -421445,14 +420662,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -421538,8 +420755,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1614 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1611 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -421547,17 +420764,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -421568,23 +420785,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -421605,7 +420822,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -421632,32 +420849,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_SVW2_VWA2_WG128_2_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -421666,8 +420883,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -421678,14 +420895,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -421706,14 +420923,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 16 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -421799,8 +421016,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1615 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1612 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -421816,9 +421033,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 8 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -421840,12 +421057,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -421882,7 +421099,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -421893,7 +421110,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -421902,36 +421119,36 @@ LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 33920 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 76416 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 + LdsOffsetMetadata: 33920 + LdsOffsetMetadata_Blk: 76416 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -421939,22 +421156,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -421967,14 +421184,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 16 - NumLoadsB: 4 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -422060,8 +421277,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1616 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1613 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -422069,17 +421286,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -422090,13 +421307,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -422139,7 +421356,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -422154,68 +421371,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 320 MacroTile1: 160 - MacroTileA: 256 + MacroTileA: 320 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -422223,19 +421440,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -422321,8 +421538,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1617 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1614 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -422337,9 +421554,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 40 ThreadTile1: 5 - ThreadTileA: 32 + ThreadTileA: 40 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -422357,7 +421574,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -422415,7 +421632,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_10_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -422428,19 +421645,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33920 - LdsNumElementsAlignedA: 10880 + LdsNumBytes: 36096 + LdsNumElementsAlignedA: 13056 LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 76416 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 78592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33920 - LdsOffsetMetadata_Blk: 76416 + LdsOffsetMetadata: 36096 + LdsOffsetMetadata_Blk: 78592 LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 @@ -422460,14 +421677,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 10] + MIWaveTileA: 6 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 192 MacroTile1: 320 - MacroTileA: 160 + MacroTileA: 192 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -422484,18 +421701,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 12 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularA: 12 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -422582,8 +421799,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1618 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1615 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_10_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -422592,16 +421809,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 10 + ThreadTileA: 24 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -422618,7 +421835,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -422649,7 +421866,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -422661,11 +421878,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -422676,45 +421893,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTC0_NTD0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -422722,22 +421939,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 + MIWaveTile: [3, 5] + MIWaveTileA: 3 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -422745,19 +421962,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 20 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -422843,8 +422060,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1619 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1616 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -422852,16 +422069,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 48 ThreadTile1: 5 - ThreadTileA: 40 + ThreadTileA: 48 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -422873,23 +422090,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -422910,7 +422127,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -422922,11 +422139,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -422937,42 +422154,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_5_NTC0_NTD0_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 31360 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 107776 + LdsOffsetMetadata: 31360 + LdsOffsetMetadata_Blk: 41088 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -422982,15 +422199,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 5] + MIWaveTileA: 8 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -423006,19 +422223,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 20 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -423104,8 +422321,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1620 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1617 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -423113,16 +422330,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 40 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -423134,23 +422351,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -423171,7 +422388,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -423182,7 +422399,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -423198,68 +422415,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_10_NTC0_NTD0_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36096 - LdsNumElementsAlignedA: 13056 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 78592 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36096 - LdsOffsetMetadata_Blk: 78592 - LdsPadA: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 10] - MIWaveTileA: 6 - MIWaveTileB: 10 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -423272,13 +422489,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 12 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -423365,8 +422582,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1621 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_10_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1618 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -423381,10 +422598,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 10 - ThreadTileA: 24 - ThreadTileB: 10 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -423401,15 +422618,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -423432,7 +422649,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -423444,7 +422661,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -423459,45 +422676,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -423505,22 +422722,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -423533,14 +422750,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 28 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -423626,8 +422843,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1622 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1619 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -423636,16 +422853,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -423662,17 +422879,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -423693,7 +422910,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -423705,7 +422922,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -423720,42 +422937,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_5_NTC0_NTD0_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31360 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31360 - LdsOffsetMetadata_Blk: 41088 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -423765,15 +422982,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -423789,19 +423006,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -423887,8 +423104,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1623 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 1620 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -423897,16 +423114,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -423923,17 +423140,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -423965,12 +423182,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -423981,68 +423198,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -424050,19 +423267,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -424148,8 +423365,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1624 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 1621 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -424157,7 +423374,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -424165,9 +423382,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -424178,13 +423395,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -424194,7 +423411,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -424215,7 +423432,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -424227,7 +423444,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -424242,42 +423459,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT7_6_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 29056 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 48000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata: 29056 + LdsOffsetMetadata_Blk: 48000 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -424288,14 +423505,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] + MIWaveTile: [7, 6] MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 224 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 224 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -424311,19 +423528,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 28 - NumLoadsB: 28 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 14 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -424409,8 +423626,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1625 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 1622 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT7_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -424426,9 +423643,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 28 - ThreadTile1: 7 + ThreadTile1: 6 ThreadTileA: 28 - ThreadTileB: 7 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -424446,16 +423663,16 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -424488,11 +423705,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -424503,36 +423720,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT14_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 32256 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 32256 + LdsOffsetB_Blk: 97792 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 97792 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -424548,15 +423765,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -424577,14 +423794,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 28 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -424670,8 +423887,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1626 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1623 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT14_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -424679,17 +423896,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -424700,14 +423917,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -424716,7 +423933,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -424749,11 +423966,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -424764,34 +423981,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 96000 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -424810,14 +424027,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -424833,19 +424050,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 28 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -424931,8 +424148,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1627 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1624 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -424940,17 +424157,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -424961,14 +424178,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -425014,7 +424231,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -425025,7 +424242,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT7_6_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -425034,59 +424251,59 @@ LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29056 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 48000 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29056 - LdsOffsetMetadata_Blk: 48000 - LdsPadA: 4 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -425094,19 +424311,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 14 - NumLoadsB: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -425192,26 +424409,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1628 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT7_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1625 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -425222,7 +424439,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -425242,7 +424459,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -425271,11 +424488,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -425286,36 +424503,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT14_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 32256 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32256 - LdsOffsetB_Blk: 97792 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 97792 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -425331,15 +424548,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -425355,19 +424572,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 28 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -425453,26 +424670,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1629 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT14_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1626 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -425483,13 +424700,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -425499,11 +424716,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -425520,7 +424737,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -425531,12 +424748,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -425547,45 +424764,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -425593,22 +424810,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -425616,19 +424833,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 28 - NumLoadsB: 24 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -425714,26 +424931,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1630 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1627 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -425744,27 +424961,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -425793,7 +425010,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -425808,68 +425025,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 31872 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 31872 + LdsOffsetMetadata_Blk: 49408 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -425882,14 +425099,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 16 - NumLoadsB: 4 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -425975,8 +425192,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1631 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1628 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -425985,16 +425202,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -426236,8 +425453,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1632 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1629 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -426273,7 +425490,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -426314,12 +425531,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -426330,45 +425547,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 32 LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 31872 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 31872 + LdsOffsetMetadata_Blk: 49408 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -426376,22 +425593,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -426404,14 +425621,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 16 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -426497,8 +425714,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1633 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1630 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -426506,17 +425723,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -426527,13 +425744,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -426580,7 +425797,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -426591,7 +425808,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_16_SVW4_VWA4_WG64_4_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -426600,23 +425817,23 @@ LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31872 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31872 - LdsOffsetMetadata_Blk: 49408 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -426636,15 +425853,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 16] + MIWaveTileA: 4 + MIWaveTileB: 16 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -426665,14 +425882,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 16 - NumLoadsB: 14 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -426758,8 +425975,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1634 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 1631 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -426767,17 +425984,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 16 + ThreadTileA: 16 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -426788,13 +426005,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -426825,7 +426042,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -426837,11 +426054,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -426852,42 +426069,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 35712 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 35712 + LdsOffsetMetadata_Blk: 78208 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -426897,15 +426114,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -426926,14 +426143,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -427019,8 +426236,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1635 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1632 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -427028,17 +426245,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -427049,27 +426266,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -427098,11 +426315,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -427113,45 +426330,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SVW1_VWA1_WG64_4_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31872 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31872 - LdsOffsetMetadata_Blk: 49408 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -427159,22 +426376,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -427187,14 +426404,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 16 - NumLoadsB: 14 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -427280,8 +426497,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1636 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1633 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -427289,17 +426506,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -427310,14 +426527,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -427363,7 +426580,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -427374,7 +426591,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_16_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT16_4_SVW8_VWA8_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -427383,23 +426600,23 @@ LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 16896 + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 16640 LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 82176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 82176 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -427419,10 +426636,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 16] - MIWaveTileA: 4 - MIWaveTileB: 16 + MIWaveGroup: [1, 4] + MIWaveTile: [16, 4] + MIWaveTileA: 16 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 256 @@ -427449,7 +426666,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 16 NumLoadsB: 16 NumLoadsCoalescedA: 1 @@ -427541,8 +426758,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1637 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1634 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT16_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -427550,17 +426767,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 16 - ThreadTileA: 16 - ThreadTileB: 16 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -427571,13 +426788,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -427608,7 +426825,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -427620,11 +426837,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -427635,42 +426852,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -427680,15 +426897,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 320 + MacroTile1: 288 MacroTileA: 192 - MacroTileB: 320 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -427709,14 +426926,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -427802,8 +427019,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1638 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1635 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -427811,17 +427028,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -427832,27 +427049,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -427885,7 +427102,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -427896,7 +427113,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SVW4_VWA4_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -427905,59 +427122,59 @@ LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 8 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -427971,13 +427188,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 12 - NumLoadsB: 5 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -428063,8 +427280,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1639 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1636 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -428072,17 +427289,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -428093,14 +427310,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -428157,7 +427374,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT16_4_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -428170,19 +427387,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 + LdsNumBytes: 31872 LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 16640 - LdsOffsetB_Blk: 82176 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 82176 + LdsOffsetMetadata: 31872 + LdsOffsetMetadata_Blk: 49408 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -428202,15 +427419,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [16, 4] - MIWaveTileA: 16 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -428231,14 +427448,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 16 - NumLoadsB: 16 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -428324,8 +427541,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1640 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT16_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 1637 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -428334,16 +427551,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -428360,8 +427577,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -428391,7 +427608,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -428402,12 +427619,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -428418,44 +427635,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -428463,15 +427680,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -428487,19 +427704,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -428585,26 +427802,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1641 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 1638 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -428615,27 +427832,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -428652,7 +427869,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -428663,12 +427880,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -428679,44 +427896,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -428725,13 +427942,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 320 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -428748,19 +427965,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -428846,25 +428063,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1642 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 1639 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -428876,27 +428093,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -428913,7 +428130,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -428924,12 +428141,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -428940,44 +428157,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31872 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31872 - LdsOffsetMetadata_Blk: 49408 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -428985,15 +428202,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -429008,20 +428225,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 16 - NumLoadsB: 14 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -429107,26 +428324,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1643 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn8 + SolutionIndex: 1640 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -429137,27 +428354,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -429190,7 +428407,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -429201,7 +428418,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTB0_SVW2_VWA2_WG16_16_1 LSCA: 256 LSCB: 256 LSPA: 8 @@ -429210,23 +428427,23 @@ LVCB: 32 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 16896 LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -429247,13 +428464,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 + MIWaveTile: [2, 1] + MIWaveTileA: 2 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 32 MacroTile1: 64 - MacroTileA: 16 + MacroTileA: 32 MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 @@ -429275,13 +428492,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 + NumElementsPerThread: 8 NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -429368,8 +428585,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1644 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1641 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -429377,16 +428594,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 1 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -429398,7 +428615,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -429448,7 +428665,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -429462,7 +428679,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIWT1_1_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -429475,32 +428692,32 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 16 LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -429508,22 +428725,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -429536,14 +428753,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -429629,8 +428846,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1645 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1642 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -429639,16 +428856,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -429665,11 +428882,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -429696,7 +428913,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -429709,10 +428926,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -429723,22 +428940,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_NTB4_SVW2_VWA2_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 + LdsNumBytes: 45568 LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -429747,7 +428964,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 + LdsOffsetMetadata: 45568 LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 @@ -429757,8 +428974,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -429769,14 +428986,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -429797,8 +429014,8 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 2 NumLoadsB: 8 NumLoadsCoalescedA: 1 @@ -429890,8 +429107,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1646 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1643 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -429899,17 +429116,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -429920,7 +429137,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -429930,11 +429147,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -429957,7 +429174,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -429973,7 +429190,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -429984,32 +429201,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTB0_SVW2_VWA2_WG16_16_1 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51712 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51712 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 46592 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -430018,8 +429235,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -430030,13 +429247,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 + MIWaveTile: [3, 1] + MIWaveTileA: 3 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 48 MacroTile1: 64 - MacroTileA: 32 + MacroTileA: 48 MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 @@ -430058,14 +429275,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 3 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -430151,8 +429368,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1647 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1644 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -430160,16 +429377,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 12 ThreadTile1: 1 - ThreadTileA: 8 + ThreadTileA: 12 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -430181,7 +429398,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -430192,10 +429409,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -430245,7 +429462,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIWT1_1_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -430258,32 +429475,32 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 + LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -430291,22 +429508,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 48 MacroTile1: 128 - MacroTileA: 32 + MacroTileA: 48 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -430319,13 +429536,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -430412,8 +429629,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1648 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1645 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -430422,16 +429639,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -430448,7 +429665,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -430495,7 +429712,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -430506,7 +429723,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_NTB4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -430515,23 +429732,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 8704 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 13824 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -430552,13 +429769,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 48 MacroTile1: 128 - MacroTileA: 32 + MacroTileA: 48 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -430580,13 +429797,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -430673,8 +429890,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1649 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1646 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -430682,16 +429899,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 12 ThreadTile1: 2 - ThreadTileA: 8 + ThreadTileA: 12 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -430703,7 +429920,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -430740,7 +429957,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -430751,9 +429968,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -430767,32 +429984,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_3_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 46592 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 46592 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 73216 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -430801,8 +430018,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -430813,14 +430030,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] + MIWaveTile: [3, 3] MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 48 - MacroTile1: 64 + MacroTile1: 192 MacroTileA: 48 - MacroTileB: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -430841,14 +430058,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 3 - NumLoadsB: 4 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -430934,8 +430151,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1650 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1647 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -430951,9 +430168,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 1 + ThreadTile1: 3 ThreadTileA: 12 - ThreadTileB: 1 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -430974,11 +430191,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -431014,10 +430231,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -431028,7 +430245,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_1_NTB0_PLR1_SVW4_VWA4_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -431037,23 +430254,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -431074,14 +430291,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -431102,14 +430319,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -431195,8 +430412,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1651 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1648 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_1_NTB0_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -431204,17 +430421,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -431225,7 +430442,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -431235,7 +430452,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -431275,10 +430492,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -431289,7 +430506,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -431298,23 +430515,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -431334,15 +430551,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -431357,20 +430574,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -431456,8 +430673,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1652 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1649 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -431465,17 +430682,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -431486,17 +430703,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 3] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -431523,7 +430740,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -431534,12 +430751,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -431550,32 +430767,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_3_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 7680 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -431584,8 +430801,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -431595,15 +430812,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 192 - MacroTileA: 48 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -431618,20 +430835,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -431717,8 +430934,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1653 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1650 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -431726,17 +430943,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -431747,21 +430964,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -431797,10 +431014,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -431811,7 +431028,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_1_NTB0_PLR1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -431820,23 +431037,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -431857,14 +431074,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 1] - MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 80 + MacroTile1: 128 + MacroTileA: 80 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -431885,14 +431102,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -431978,8 +431195,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1654 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_1_NTB0_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1651 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -431987,17 +431204,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 2 + ThreadTileA: 20 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -432008,7 +431225,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -432018,7 +431235,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -432045,7 +431262,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -432056,12 +431273,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -432072,32 +431289,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -432106,10 +431323,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -432117,15 +431334,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 5] + MIWaveTileA: 5 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 80 + MacroTile1: 320 + MacroTileA: 80 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -432146,13 +431363,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 10 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -432239,8 +431456,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1655 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1652 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU6_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -432248,16 +431465,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 20 ThreadTile1: 5 - ThreadTileA: 8 + ThreadTileA: 20 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -432269,21 +431486,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 6] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -432319,10 +431536,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -432333,7 +431550,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB4_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -432342,23 +431559,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -432378,15 +431595,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 80 + MacroTile1: 128 + MacroTileA: 80 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -432408,13 +431625,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -432500,8 +431717,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1656 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1653 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -432509,17 +431726,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 2 + ThreadTileA: 20 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -432530,17 +431747,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -432580,7 +431797,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -432594,7 +431811,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -432607,19 +431824,19 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -432639,15 +431856,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 128 - MacroTileA: 80 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 64 + MacroTileA: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -432668,14 +431885,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -432761,8 +431978,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1657 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1654 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -432771,15 +431988,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 12 ThreadTile1: 2 - ThreadTileA: 20 + ThreadTileA: 12 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -432797,11 +432014,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -432839,9 +432056,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -432855,12 +432072,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_PLR1_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -432868,19 +432085,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -432892,7 +432109,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -432900,15 +432117,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 320 - MacroTileA: 80 - MacroTileB: 320 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -432929,14 +432146,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 10 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -433022,8 +432239,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1658 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU6_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1655 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -433032,16 +432249,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -433058,11 +432275,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -433116,7 +432333,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_PLR1_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -433129,19 +432346,19 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -433161,14 +432378,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 80 + MacroTile0: 96 MacroTile1: 128 - MacroTileA: 80 + MacroTileA: 96 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -433190,13 +432407,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -433283,8 +432500,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1659 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1656 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -433293,16 +432510,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 2 - ThreadTileA: 20 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -433319,7 +432536,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -433366,7 +432583,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -433377,7 +432594,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -433386,23 +432603,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -433423,14 +432640,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 64 - MacroTileA: 96 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -433451,14 +432668,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -433544,8 +432761,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1660 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1657 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -433553,17 +432770,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -433574,7 +432791,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -433622,9 +432839,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -433638,12 +432855,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -433651,19 +432868,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -433683,15 +432900,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 3] + MIWaveTileA: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 112 + MacroTile1: 192 + MacroTileA: 112 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -433714,12 +432931,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 84 NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 7 + NumLoadsA: 14 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -433805,8 +433022,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1661 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1658 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -433815,16 +433032,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 3 + ThreadTileA: 28 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -433841,11 +433058,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -433872,7 +433089,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -433883,9 +433100,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -433899,32 +433116,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -433933,10 +433150,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -433944,15 +433161,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 4] + MIWaveTileA: 7 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 128 - MacroTileA: 96 - MacroTileB: 128 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -433973,13 +433190,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 14 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -434066,8 +433283,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1662 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1659 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -434076,15 +433293,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 28 ThreadTile1: 4 - ThreadTileA: 12 + ThreadTileA: 28 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -434102,15 +433319,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -434160,7 +433377,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_2_NTB0_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -434173,9 +433390,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 + LdsNumBytes: 35840 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -434184,7 +433401,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 + LdsOffsetMetadata: 35840 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -434206,14 +433423,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] + MIWaveTile: [2, 2] MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 128 + MacroTile1: 64 MacroTileA: 64 - MacroTileB: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -434234,14 +433451,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -434327,8 +433544,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1663 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1660 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -434344,9 +433561,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 4 + ThreadTile1: 2 ThreadTileA: 8 - ThreadTileB: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -434405,12 +433622,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -434421,32 +433638,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_PLR1_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 17920 + LdsNumBytes: 39424 + LdsNumElementsAlignedA: 8704 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 39424 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -434467,13 +433684,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 3] - MIWaveTileA: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 112 + MacroTile0: 64 MacroTile1: 192 - MacroTileA: 112 + MacroTileA: 64 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -434495,13 +433712,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 14 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -434588,8 +433805,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1664 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1661 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -434597,16 +433814,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 28 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -434618,7 +433835,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -434655,7 +433872,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -434666,12 +433883,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -434682,32 +433899,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_PLR1_SVW4_VWA4_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -434716,10 +433933,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -434728,14 +433945,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -434756,13 +433973,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -434849,8 +434066,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1665 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1662 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -434858,17 +434075,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -434879,7 +434096,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -434889,11 +434106,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -434932,7 +434149,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -434943,7 +434160,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_2_NTB0_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_PLR1_SVW4_VWA4_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -434952,23 +434169,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -434988,15 +434205,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 64 + MacroTile1: 128 MacroTileA: 64 - MacroTileB: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -435017,14 +434234,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 + NumElementsPerThread: 32 NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -435110,8 +434327,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1666 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1663 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -435119,16 +434336,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 16 ThreadTile1: 2 - ThreadTileA: 8 + ThreadTileA: 16 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -435140,13 +434357,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -435190,10 +434407,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -435204,7 +434421,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_PLR1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_PLR1_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -435213,23 +434430,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 39424 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 39424 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -435241,7 +434458,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -435249,15 +434466,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 192 - MacroTileA: 64 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -435278,14 +434495,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 6 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -435371,8 +434588,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1667 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1664 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU5_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -435380,17 +434597,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -435401,17 +434618,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -435454,7 +434671,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -435465,7 +434682,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_PLR1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -435474,23 +434691,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -435510,10 +434727,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 64 MacroTile1: 128 @@ -435533,14 +434750,14 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 @@ -435632,8 +434849,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1668 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1665 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -435641,17 +434858,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -435662,13 +434879,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -435712,10 +434929,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -435726,7 +434943,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_PLR1_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_PLR1_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -435735,23 +434952,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -435771,14 +434988,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 96 MacroTile1: 128 - MacroTileA: 64 + MacroTileA: 96 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -435800,13 +435017,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -435893,8 +435110,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1669 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1666 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -435902,17 +435119,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -435923,17 +435140,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -435960,7 +435177,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -435973,10 +435190,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -435987,32 +435204,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_SVW2_VWA2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -436021,10 +435238,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -436033,14 +435250,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -436061,14 +435278,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 9 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -436154,8 +435371,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1670 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU5_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1667 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -436163,17 +435380,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -436184,7 +435401,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -436194,11 +435411,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -436221,7 +435438,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -436234,10 +435451,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -436248,22 +435465,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -436272,7 +435489,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -436282,10 +435499,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -436294,14 +435511,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -436322,14 +435539,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -436415,8 +435632,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1671 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1668 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -436424,17 +435641,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -436445,7 +435662,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -436455,11 +435672,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -436482,7 +435699,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -436495,10 +435712,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -436509,32 +435726,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB4_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -436543,10 +435760,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -436555,14 +435772,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 128 - MacroTileA: 96 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -436577,20 +435794,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -436676,8 +435893,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1672 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1669 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -436685,17 +435902,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 4 - ThreadTileA: 12 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -436706,7 +435923,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -436716,11 +435933,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -436759,7 +435976,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -436770,7 +435987,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -436779,23 +435996,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 111616 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -436816,14 +436033,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 64 + MacroTileA: 160 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -436844,14 +436061,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -436937,8 +436154,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1673 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1670 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -436946,17 +436163,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 2 + ThreadTileA: 20 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -436967,7 +436184,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -437017,10 +436234,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -437031,7 +436248,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -437040,23 +436257,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -437076,15 +436293,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -437099,20 +436316,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -437198,8 +436415,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1674 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1671 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -437207,17 +436424,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -437228,17 +436445,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -437281,7 +436498,7 @@ GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -437292,7 +436509,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB4_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -437301,23 +436518,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -437338,13 +436555,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 + MIWaveTile: [5, 7] + MIWaveTileA: 5 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 160 MacroTile1: 224 - MacroTileA: 128 + MacroTileA: 160 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -437366,13 +436583,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 5 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -437459,8 +436676,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1675 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1672 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -437468,16 +436685,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 20 ThreadTile1: 7 - ThreadTileA: 16 + ThreadTileA: 20 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -437489,7 +436706,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -437526,7 +436743,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -437537,9 +436754,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -437553,32 +436770,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTB0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 111616 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -437587,10 +436804,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -437598,15 +436815,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 11] + MIWaveTileA: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 64 - MacroTileA: 160 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 176 + MacroTileA: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -437627,14 +436844,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 10 - NumLoadsB: 4 + NumElementsPerThread: 132 + NumGlobalWriteVectorsPerThread: 132 + NumLoadsA: 24 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -437720,8 +436937,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1676 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1673 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -437730,16 +436947,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 2 - ThreadTileA: 20 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 11 + ThreadTileA: 12 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -437756,17 +436973,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -437798,7 +437015,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer @@ -437814,12 +437031,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -437827,19 +437044,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -437859,14 +437076,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 160 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -437888,13 +437105,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -437981,8 +437198,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1677 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1674 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -437991,16 +437208,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -438017,7 +437234,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -438061,7 +437278,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -438075,7 +437292,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -438088,19 +437305,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -438112,7 +437329,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -438121,14 +437338,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 96 + MacroTile1: 160 + MacroTileA: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -438143,20 +437360,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -438242,8 +437459,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1678 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1675 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -438258,10 +437475,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -438282,7 +437499,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -438322,7 +437539,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -438336,7 +437553,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTB0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -438349,23 +437566,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -438381,15 +437598,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 11] - MIWaveTileA: 3 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 176 - MacroTileA: 192 - MacroTileB: 176 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -438410,14 +437627,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 132 - NumGlobalWriteVectorsPerThread: 132 - NumLoadsA: 24 - NumLoadsB: 22 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -438503,8 +437720,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1679 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1676 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -438513,16 +437730,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 11 - ThreadTileA: 12 - ThreadTileB: 11 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -438539,11 +437756,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -438570,7 +437787,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -438581,12 +437798,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -438597,32 +437814,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -438631,10 +437848,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -438643,14 +437860,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -438665,20 +437882,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -438764,8 +437981,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1680 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1677 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -438773,17 +437990,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -438794,7 +438011,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -438804,11 +438021,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -438844,10 +438061,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -438858,7 +438075,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT2_16_NTB0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -438867,23 +438084,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -438895,7 +438112,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -438903,15 +438120,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 16] + MIWaveTileA: 2 + MIWaveTileB: 16 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 160 - MacroTileA: 96 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -438932,14 +438149,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -439025,8 +438242,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1681 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1678 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT2_16_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -439034,17 +438251,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 16 + ThreadTileA: 8 + ThreadTileB: 16 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -439055,17 +438272,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -439104,11 +438321,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -439119,36 +438336,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_8_NTB4_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -439165,13 +438382,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 + MIWaveTile: [4, 8] + MIWaveTileA: 4 MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 128 MacroTile1: 256 - MacroTileA: 224 + MacroTileA: 128 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -439187,20 +438404,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 16 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -439286,8 +438503,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1682 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1679 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_8_NTB4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -439295,16 +438512,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 16 ThreadTile1: 8 - ThreadTileA: 28 + ThreadTileA: 16 ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true @@ -439316,7 +438533,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -439332,7 +438549,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -439353,7 +438570,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -439369,7 +438586,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -439380,34 +438597,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT3_1_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 13824 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 46592 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -439415,33 +438632,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -439454,13 +438671,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -439547,8 +438764,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1683 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1680 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT3_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -439556,17 +438773,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 1 + ThreadTileA: 48 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -439577,7 +438794,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -439588,10 +438805,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -439614,7 +438831,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -439625,9 +438842,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -439641,42 +438858,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT2_16_NTB0_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_6_NTB0_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 38528 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 76416 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 38528 + LdsOffsetMetadata_Blk: 76416 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -439686,15 +438903,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 16] - MIWaveTileA: 2 - MIWaveTileB: 16 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 6] + MIWaveTileA: 10 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 384 + MacroTileA: 160 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -439715,14 +438932,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 10 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -439808,8 +439025,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1684 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT2_16_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1681 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU6_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_6_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -439818,16 +439035,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 16 - ThreadTileA: 8 - ThreadTileB: 16 + ThreadTile0: 40 + ThreadTile1: 6 + ThreadTileA: 40 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -439844,15 +439061,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 6] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -439887,11 +439104,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -439902,36 +439119,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_8_NTB4_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -439948,14 +439165,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 8] - MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -439976,14 +439193,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 16 - NumLoadsB: 8 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -440069,8 +439286,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1685 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_8_NTB4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1682 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -440078,17 +439295,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -440099,7 +439316,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -440109,13 +439326,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -440136,7 +439353,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -440163,34 +439380,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT3_1_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 46592 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 46592 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -440198,20 +439415,20 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 96 MacroTile1: 128 @@ -440221,10 +439438,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -440239,12 +439456,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 48 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 4 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -440330,8 +439547,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1686 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT3_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1683 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -440340,16 +439557,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 1 - ThreadTileA: 48 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -440371,10 +439588,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -440397,7 +439614,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -440408,12 +439625,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -440424,44 +439641,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_6_NTB0_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38528 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 76416 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38528 - LdsOffsetMetadata_Blk: 76416 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -440469,15 +439686,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 6] - MIWaveTileA: 10 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 384 - MacroTileA: 160 - MacroTileB: 384 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -440492,20 +439709,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 10 - NumLoadsB: 6 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -440591,8 +439808,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1687 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU6_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_6_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1684 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -440600,17 +439817,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 6 - ThreadTileA: 40 - ThreadTileB: 6 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -440621,21 +439838,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -440669,12 +439886,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -440685,36 +439902,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -440731,14 +439948,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -440759,14 +439976,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 - NumLoadsB: 36 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -440852,8 +440069,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1688 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1685 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -440861,17 +440078,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -440882,7 +440099,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -440892,13 +440109,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -440919,7 +440136,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -440946,32 +440163,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -440980,8 +440197,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -440992,14 +440209,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [7, 2] + MIWaveTileA: 7 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 128 - MacroTileA: 96 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 64 + MacroTileA: 224 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -441020,14 +440237,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 7 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -441113,8 +440330,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1689 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1686 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -441129,10 +440346,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 4 - ThreadTileA: 12 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 2 + ThreadTileA: 28 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -441154,10 +440371,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -441180,7 +440397,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -441191,7 +440408,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -441207,32 +440424,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -441241,8 +440458,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -441252,14 +440469,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 2] + MIWaveTileA: 7 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 112 MacroTile1: 128 - MacroTileA: 96 + MacroTileA: 112 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -441275,20 +440492,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 14 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -441374,8 +440591,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1690 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1687 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -441384,16 +440601,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 4 - ThreadTileA: 12 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 2 + ThreadTileA: 28 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -441410,15 +440627,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -441452,12 +440669,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -441468,36 +440685,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -441514,13 +440731,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 + MIWaveTile: [7, 6] + MIWaveTileA: 7 MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 224 MacroTile1: 192 - MacroTileA: 192 + MacroTileA: 224 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -441536,20 +440753,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 28 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -441635,8 +440852,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1691 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1688 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -441644,16 +440861,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 28 ThreadTile1: 6 - ThreadTileA: 24 + ThreadTileA: 28 ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true @@ -441665,7 +440882,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -441681,7 +440898,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -441702,7 +440919,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -441729,32 +440946,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x144x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_9_NTB0_SVW1_VWA1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 41472 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -441763,8 +440980,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -441774,15 +440991,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 2] - MIWaveTileA: 7 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 9] + MIWaveTileA: 1 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 64 - MacroTileA: 224 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 144 + MacroTileA: 64 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -441803,14 +441020,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 7 - NumLoadsB: 2 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -441896,8 +441113,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1692 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1689 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x144x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_9_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -441906,16 +441123,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 2 - ThreadTileA: 28 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 9 + ThreadTileA: 4 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -441932,15 +441149,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -441976,7 +441193,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -441990,7 +441207,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT5_1_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -442003,32 +441220,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -442036,22 +441253,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 2] - MIWaveTileA: 7 - MIWaveTileB: 2 + MIWaveTile: [5, 1] + MIWaveTileA: 5 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 112 + MacroTile0: 160 MacroTile1: 128 - MacroTileA: 112 + MacroTileA: 160 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -442064,13 +441281,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 14 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularA: 20 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -442157,8 +441374,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1693 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1690 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT5_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -442167,16 +441384,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 2 - ThreadTileA: 28 - ThreadTileB: 2 + ThreadTile0: 80 + ThreadTile1: 1 + ThreadTileA: 80 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -442193,11 +441410,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -442237,7 +441454,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -442251,7 +441468,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_8_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -442265,18 +441482,18 @@ LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 56576 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 26112 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata_Blk: 87296 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -442297,14 +441514,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -442325,14 +441542,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 28 - NumLoadsB: 24 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 20 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -442418,8 +441635,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1694 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1691 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_8_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -442434,10 +441651,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -442458,7 +441675,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -442485,7 +441702,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -442496,9 +441713,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -442512,34 +441729,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x144x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_9_NTB0_SVW1_VWA1_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB4_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 59904 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 41472 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -442547,53 +441764,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 9] - MIWaveTileA: 1 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 144 - MacroTileA: 64 - MacroTileB: 144 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 20 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -442679,8 +441896,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1695 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x144x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_9_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1692 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -442689,16 +441906,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 9 - ThreadTileA: 4 - ThreadTileB: 9 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -442715,15 +441932,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -442757,12 +441974,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -442773,68 +441990,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT5_1_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 29696 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 29696 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 1] - MIWaveTileA: 5 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 64 MacroTile1: 128 - MacroTileA: 160 + MacroTileA: 64 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -442847,13 +442064,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -442940,8 +442157,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1696 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT5_1_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1693 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -442949,17 +442166,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 1 - ThreadTileA: 80 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -442970,7 +442187,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -442980,7 +442197,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -443019,8 +442236,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -443034,36 +442251,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_8_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 80896 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -443071,7 +442288,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -443080,14 +442297,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -443108,14 +442325,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 20 - NumLoadsB: 32 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 12 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -443201,8 +442418,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1697 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_8_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1694 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -443217,10 +442434,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -443241,13 +442458,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -443279,12 +442496,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -443295,88 +442512,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 38912 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 38912 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 20 - NumLoadsB: 8 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -443462,8 +442679,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1698 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1695 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -443471,17 +442688,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -443492,17 +442709,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -443545,7 +442762,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -443556,7 +442773,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -443565,23 +442782,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29696 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29696 - LdsOffsetMetadata_Blk: 41984 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -443602,13 +442819,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 128 MacroTile1: 128 - MacroTileA: 64 + MacroTileA: 128 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -443625,18 +442842,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 + NumElementsPerThread: 64 NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -443723,8 +442940,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1699 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1696 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -443732,16 +442949,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 8 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -443753,7 +442970,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -443801,12 +443018,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -443817,32 +443034,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 15360 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -443863,13 +443080,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 128 MacroTile1: 128 - MacroTileA: 96 + MacroTileA: 128 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -443891,13 +443108,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 12 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -443984,8 +443201,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1700 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1697 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -443993,16 +443210,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 12 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -444014,7 +443231,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -444067,7 +443284,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -444078,7 +443295,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -444087,23 +443304,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38912 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38912 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -444123,15 +443340,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -444147,19 +443364,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -444245,8 +443462,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1701 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1698 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -444254,17 +443471,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 8 - ThreadTileA: 8 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -444275,13 +443492,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -444339,7 +443556,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -444352,9 +443569,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 + LdsNumBytes: 43008 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 20480 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -444363,7 +443580,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 + LdsOffsetMetadata: 43008 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -444385,14 +443602,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] + MIWaveTile: [4, 5] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -444408,19 +443625,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -444506,8 +443723,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1702 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1699 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -444523,9 +443740,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -444584,7 +443801,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -444600,12 +443817,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -444613,9 +443830,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 + LdsNumBytes: 43008 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 20480 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -444624,7 +443841,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 + LdsOffsetMetadata: 43008 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -444646,14 +443863,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] + MIWaveTile: [4, 5] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -444669,19 +443886,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -444767,8 +443984,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1703 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1700 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -444784,9 +444001,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -444861,7 +444078,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -444874,19 +444091,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -444906,15 +444123,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -444935,14 +444152,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -445028,8 +444245,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1704 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1701 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -445038,16 +444255,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -445064,7 +444281,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -445106,12 +444323,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -445122,32 +444339,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 32256 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 32256 + LdsOffsetB_Blk: 97792 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 97792 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -445159,7 +444376,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -445167,15 +444384,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 2] + MIWaveTileA: 14 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -445191,19 +444408,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -445289,8 +444506,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1705 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1702 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -445298,17 +444515,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 56 + ThreadTile1: 2 + ThreadTileA: 56 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -445319,13 +444536,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -445367,12 +444584,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -445383,32 +444600,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC0_NTD0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -445420,7 +444637,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -445428,15 +444645,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -445452,19 +444669,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -445550,8 +444767,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1706 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1703 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -445559,17 +444776,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -445580,13 +444797,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -445628,9 +444845,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -445644,12 +444861,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_8_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -445657,19 +444874,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -445681,7 +444898,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -445689,15 +444906,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 8] MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -445718,14 +444935,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -445811,8 +445028,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1707 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1704 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -445821,16 +445038,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 5 + ThreadTile1: 8 ThreadTileA: 16 - ThreadTileB: 5 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -445847,17 +445064,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -445889,7 +445106,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -445905,12 +445122,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT10_2_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -445918,19 +445135,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52736 - LdsNumElementsAlignedA: 32256 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 23040 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32256 - LdsOffsetB_Blk: 97792 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52736 - LdsOffsetMetadata_Blk: 97792 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -445942,7 +445159,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -445951,13 +445168,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [14, 2] - MIWaveTileA: 14 + MIWaveTile: [10, 2] + MIWaveTileA: 10 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 160 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 160 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -445979,13 +445196,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 28 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularA: 5 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -446072,8 +445289,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1708 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1705 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT10_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -446088,9 +445305,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 + ThreadTile0: 40 ThreadTile1: 2 - ThreadTileA: 56 + ThreadTileA: 40 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -446150,12 +445367,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -446166,32 +445383,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC0_NTD0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -446203,7 +445420,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -446211,15 +445428,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 4] + MIWaveTileA: 5 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -446240,14 +445457,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -446333,8 +445550,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1709 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1706 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -446342,16 +445559,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 20 ThreadTile1: 4 - ThreadTileA: 24 + ThreadTileA: 20 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -446363,13 +445580,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -446416,7 +445633,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -446427,7 +445644,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_8_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -446436,27 +445653,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 60672 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60672 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -446472,14 +445689,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 8] - MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 320 MacroTile1: 128 - MacroTileA: 256 + MacroTileA: 320 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -446501,13 +445718,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 40 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 40 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -446594,8 +445811,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1710 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1707 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -446603,17 +445820,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -446624,13 +445841,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -446688,7 +445905,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT10_2_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -446701,19 +445918,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 23040 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -446725,7 +445942,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -446733,14 +445950,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 2] - MIWaveTileA: 10 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 192 MacroTile1: 128 - MacroTileA: 160 + MacroTileA: 192 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -446762,13 +445979,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -446855,8 +446072,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1711 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT10_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1708 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -446865,16 +446082,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 2 - ThreadTileA: 40 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -446891,7 +446108,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -446933,12 +446150,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -446949,32 +446166,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -446986,7 +446203,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -446995,14 +446212,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -447018,19 +446235,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 4 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -447116,8 +446333,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1712 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1709 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -447125,17 +446342,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -447146,7 +446363,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -447194,9 +446411,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -447210,12 +446427,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -447223,23 +446440,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60672 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 32256 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 32256 + LdsOffsetB_Blk: 97792 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60672 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 97792 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -447255,14 +446472,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 2] + MIWaveTileA: 14 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 224 MacroTile1: 128 - MacroTileA: 320 + MacroTileA: 224 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -447284,13 +446501,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 40 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 7 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularA: 7 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -447377,8 +446594,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1713 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1710 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -447387,16 +446604,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 56 + ThreadTile1: 2 + ThreadTileA: 56 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -447413,17 +446630,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -447455,12 +446672,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -447471,32 +446688,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -447517,13 +446734,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 + MIWaveTile: [7, 4] + MIWaveTileA: 7 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 224 MacroTile1: 128 - MacroTileA: 192 + MacroTileA: 224 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -447540,18 +446757,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 28 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -447638,8 +446855,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1714 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1711 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -447647,16 +446864,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 28 ThreadTile1: 4 - ThreadTileA: 24 + ThreadTileA: 28 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -447668,7 +446885,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -447716,12 +446933,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -447732,36 +446949,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -447778,14 +446995,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -447806,14 +447023,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -447899,8 +447116,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1715 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1712 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -447908,17 +447125,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -447929,7 +447146,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -447939,13 +447156,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -447977,12 +447194,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -447993,32 +447210,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52736 - LdsNumElementsAlignedA: 32256 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32256 - LdsOffsetB_Blk: 97792 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52736 - LdsOffsetMetadata_Blk: 97792 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -448030,7 +447247,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -448038,14 +447255,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 2] - MIWaveTileA: 14 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 128 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 128 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -448067,13 +447284,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 7 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 16 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularA: 16 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -448160,8 +447377,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1716 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT14_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1713 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -448169,17 +447386,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 2 - ThreadTileA: 56 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -448190,13 +447407,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -448243,7 +447460,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -448254,7 +447471,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -448263,23 +447480,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -448300,13 +447517,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 + MIWaveTile: [6, 4] + MIWaveTileA: 6 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 192 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 192 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -448323,18 +447540,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 24 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -448421,8 +447638,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1717 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1714 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -448430,16 +447647,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 24 ThreadTile1: 4 - ThreadTileA: 28 + ThreadTileA: 24 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -448451,7 +447668,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -448500,8 +447717,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -448515,36 +447732,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -448561,14 +447778,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] + MIWaveTile: [7, 4] MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 224 - MacroTile1: 256 + MacroTile1: 128 MacroTileA: 224 - MacroTileB: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -448589,14 +447806,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 NumLoadsA: 28 - NumLoadsB: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -448682,8 +447899,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1718 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1715 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -448699,9 +447916,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 28 - ThreadTile1: 8 + ThreadTile1: 4 ThreadTileA: 28 - ThreadTileB: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -448722,13 +447939,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -448760,12 +447977,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -448776,32 +447993,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 17408 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -448813,7 +448030,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -448822,13 +448039,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 + MIWaveTile: [8, 4] + MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -448850,13 +448067,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 + NumElementsPerThread: 128 NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 16 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -448943,8 +448160,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1719 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1716 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -448952,16 +448169,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -448973,14 +448190,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -449026,7 +448243,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -449037,7 +448254,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -449046,23 +448263,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -449083,13 +448300,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 + MIWaveTile: [8, 4] + MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -449111,13 +448328,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -449204,8 +448421,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1720 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1717 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -449213,16 +448430,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 24 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -449234,14 +448451,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -449250,7 +448467,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -449283,11 +448500,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -449298,32 +448515,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -449343,15 +448560,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 112 + MacroTileA: 256 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -449373,13 +448590,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 - NumLoadsB: 4 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -449465,8 +448682,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1721 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1718 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -449474,17 +448691,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -449495,14 +448712,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -449511,7 +448728,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -449543,12 +448760,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -449559,32 +448776,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -449605,14 +448822,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -449633,14 +448850,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 24 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -449726,8 +448943,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1722 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 1719 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -449735,17 +448952,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -449756,14 +448973,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -449805,11 +449022,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -449820,32 +449037,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -449866,14 +449083,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -449895,13 +449112,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 32 - NumLoadsB: 4 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 16 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -449987,8 +449204,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1723 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 1720 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -449996,17 +449213,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -450017,14 +449234,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -450054,7 +449271,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -450066,11 +449283,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -450081,42 +449298,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_NTC3_NTD3_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52736 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 35968 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 73856 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52736 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35968 + LdsOffsetMetadata_Blk: 73856 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -450126,15 +449343,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 112 - MacroTileA: 256 - MacroTileB: 112 + MacroTile0: 128 + MacroTile1: 384 + MacroTileA: 128 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -450155,14 +449372,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 14 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -450248,8 +449465,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1724 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 1721 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -450257,17 +449474,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -450278,23 +449495,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -450327,7 +449544,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -450342,36 +449559,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 60160 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60160 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -450388,14 +449605,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] + MIWaveTile: [6, 8] MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 192 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -450416,14 +449633,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 24 - NumLoadsB: 6 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -450509,8 +449726,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1725 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1722 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -450526,9 +449743,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 6 + ThreadTile1: 8 ThreadTileA: 24 - ThreadTileB: 6 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -450546,7 +449763,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -450555,7 +449772,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -450587,8 +449804,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -450603,32 +449820,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -450648,15 +449865,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] + MIWaveGroup: [4, 1] MIWaveTile: [4, 8] MIWaveTileA: 4 MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -450679,12 +449896,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 128 NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 16 - NumLoadsB: 32 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -450770,8 +449987,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1726 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 1723 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -450780,10 +449997,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 @@ -450806,8 +450023,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -450816,7 +450033,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -450848,7 +450065,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -450864,12 +450081,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -450877,19 +450094,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -450909,15 +450126,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [2, 2] MIWaveTile: [8, 4] MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -450940,12 +450157,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 128 NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -451031,8 +450248,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1727 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 1724 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -451041,10 +450258,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 @@ -451067,7 +450284,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -451077,7 +450294,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -451110,11 +450327,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -451125,32 +450342,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -451170,15 +450387,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -451199,14 +450416,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 16 - NumLoadsB: 8 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 24 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -451292,8 +450509,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1728 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 1725 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -451301,17 +450518,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -451322,14 +450539,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -451338,7 +450555,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -451375,7 +450592,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -451386,7 +450603,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -451395,23 +450612,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -451432,14 +450649,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -451460,14 +450677,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -451553,8 +450770,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1729 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 1726 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -451562,17 +450779,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -451583,7 +450800,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -451631,12 +450848,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -451647,32 +450864,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -451693,14 +450910,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -451721,14 +450938,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 28 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -451814,8 +451031,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1730 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 1727 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -451823,17 +451040,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -451844,14 +451061,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -451860,7 +451077,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -451897,7 +451114,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -451908,7 +451125,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_8_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -451917,27 +451134,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -451954,14 +451171,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -451977,19 +451194,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 20 - NumLoadsB: 32 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 16 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -452075,8 +451292,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1731 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 1728 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -452084,17 +451301,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -452105,7 +451322,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -452142,7 +451359,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -452153,7 +451370,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -452169,42 +451386,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_NTC3_NTD3_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35968 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 73856 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35968 - LdsOffsetMetadata_Blk: 73856 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -452214,15 +451431,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [2, 2] MIWaveTile: [8, 6] MIWaveTileA: 8 MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 384 - MacroTileA: 128 - MacroTileB: 384 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -452336,8 +451553,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1732 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 1729 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -452346,10 +451563,10 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 @@ -452372,15 +451589,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -452403,7 +451620,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -452415,7 +451632,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -452430,42 +451647,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60160 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 33664 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60160 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 33664 + LdsOffsetMetadata_Blk: 80768 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -452475,14 +451692,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 224 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 224 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -452504,14 +451721,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 24 - NumLoadsB: 32 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -452597,8 +451814,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1733 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 1730 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -452607,16 +451824,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -452633,17 +451850,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -452858,8 +452075,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1734 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 1731 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -452895,7 +452112,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -452941,7 +452158,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -452952,7 +452169,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -452961,23 +452178,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 34816 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -452997,10 +452214,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 128 @@ -453027,7 +452244,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -453119,8 +452336,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1735 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1732 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -453128,17 +452345,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -453149,13 +452366,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -453198,11 +452415,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -453213,36 +452430,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 57600 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57600 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -453259,14 +452476,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTile: [9, 4] + MIWaveTileA: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 288 + MacroTile1: 128 + MacroTileA: 288 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -453282,19 +452499,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 24 - NumLoadsB: 24 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 36 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -453380,8 +452597,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1736 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 1733 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -453389,17 +452606,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 36 + ThreadTile1: 4 + ThreadTileA: 36 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -453410,7 +452627,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -453458,12 +452675,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -453474,36 +452691,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 57600 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57600 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -453520,14 +452737,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [9, 4] + MIWaveTileA: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 288 + MacroTile1: 128 + MacroTileA: 288 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -453543,19 +452760,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 36 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -453641,8 +452858,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1737 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 1734 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -453650,17 +452867,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 36 + ThreadTile1: 4 + ThreadTileA: 36 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -453671,14 +452888,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -453687,7 +452904,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -453708,7 +452925,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -453719,12 +452936,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -453735,42 +452952,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC0_NTD0_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 33664 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 33664 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -453780,15 +452997,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -453804,19 +453021,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -453902,8 +453119,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1738 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 1735 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -453911,17 +453128,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -453932,21 +453149,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -453985,7 +453202,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -453996,7 +453213,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -454005,27 +453222,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -454042,14 +453259,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -454065,19 +453282,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 16 - NumLoadsB: 36 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -454163,8 +453380,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1739 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 1736 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -454172,17 +453389,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -454193,14 +453410,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -454241,7 +453458,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -454257,12 +453474,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -454270,23 +453487,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -454303,14 +453520,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -454326,19 +453543,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -454424,15 +453641,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1740 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1737 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 @@ -454441,9 +453658,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -454461,7 +453678,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -454470,11 +453687,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -454491,7 +453708,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -454503,11 +453720,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -454518,42 +453735,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33664 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33664 - LdsOffsetMetadata_Blk: 80768 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -454563,15 +453780,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -454587,19 +453804,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 4 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -454685,26 +453902,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1741 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM16 + SolutionIndex: 1738 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -454715,27 +453932,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -454752,7 +453969,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -454768,7 +453985,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -454779,34 +453996,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -454814,33 +454031,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 8] - MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 512 MacroTile1: 128 - MacroTileA: 256 + MacroTileA: 512 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -454848,19 +454065,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 + NumElementsPerThread: 256 NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -454946,26 +454163,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1742 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1739 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -454976,7 +454193,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -454987,16 +454204,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -455013,7 +454230,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -455024,7 +454241,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -455040,34 +454257,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -455075,33 +454292,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 8] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -455109,18 +454326,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -455207,26 +454424,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1743 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1740 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -455244,20 +454461,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -455274,7 +454491,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -455286,11 +454503,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -455301,42 +454518,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_15_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57600 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 33280 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57600 - LdsOffsetMetadata_Blk: 104704 + LdsOffsetMetadata: 33280 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -455346,15 +454563,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [9, 4] - MIWaveTileA: 9 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 128 - MacroTileA: 288 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -455370,19 +454587,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 36 - NumLoadsB: 4 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 16 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -455468,26 +454685,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1744 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 1741 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_15_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 4 - ThreadTileA: 36 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -455498,27 +454715,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -455535,7 +454752,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -455562,45 +454779,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SVW1_VWA1_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57600 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57600 - LdsOffsetMetadata_Blk: 104704 - LdsPadA: 4 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -455608,22 +454825,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [9, 4] - MIWaveTileA: 9 - MIWaveTileB: 4 + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 128 - MacroTileA: 288 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -455631,19 +454848,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 36 - NumLoadsB: 4 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -455729,26 +454946,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1745 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 1742 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 4 - ThreadTileA: 36 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -455765,21 +454982,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -455796,7 +455013,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -455812,7 +455029,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -455823,42 +455040,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 35072 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 82176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35072 + LdsOffsetMetadata_Blk: 82176 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -455869,13 +455086,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 + MIWaveTile: [16, 4] + MIWaveTileA: 16 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 256 MacroTile1: 256 - MacroTileA: 160 + MacroTileA: 256 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -455892,19 +455109,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 8 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -455990,25 +455207,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1746 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 1743 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 64 ThreadTile1: 4 - ThreadTileA: 40 + ThreadTileA: 64 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -456020,7 +455237,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -456031,16 +455248,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -456057,7 +455274,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -456068,12 +455285,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -456084,68 +455301,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_8_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 8] - MIWaveTileA: 5 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 256 MacroTile1: 256 - MacroTileA: 160 + MacroTileA: 256 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -456153,19 +455370,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 20 - NumLoadsB: 32 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -456251,26 +455468,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1747 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 1744 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 8 - ThreadTileA: 20 - ThreadTileB: 8 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -456281,7 +455498,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -456292,16 +455509,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -456318,7 +455535,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -456330,11 +455547,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -456345,42 +455562,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC0_NTD0_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 35712 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 35712 + LdsOffsetMetadata_Blk: 78208 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -456390,15 +455607,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -456414,19 +455631,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -456512,26 +455729,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1748 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1745 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -456542,27 +455759,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -456595,7 +455812,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -456606,7 +455823,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC0_NTD0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -456619,32 +455836,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33664 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 39168 + LdsNumElementsAlignedA: 11520 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 11520 + LdsOffsetB_Blk: 77056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33664 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 + LdsOffsetMetadata: 39168 + LdsOffsetMetadata_Blk: 77056 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -456652,22 +455869,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 384 + MacroTileA: 160 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -456675,19 +455892,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 4 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 10 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -456773,26 +455990,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1749 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 1746 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -456803,14 +456020,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -456823,7 +456040,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -456840,7 +456057,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -456851,8 +456068,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -456867,45 +456084,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SVW1_VWA1_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -456913,22 +456130,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -456936,19 +456153,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -457034,26 +456251,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1750 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 1747 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -457070,21 +456287,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -457101,7 +456318,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -457112,12 +456329,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -457128,44 +456345,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_2_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -457173,15 +456390,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -457197,19 +456414,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -457295,26 +456512,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1751 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 1748 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -457325,27 +456542,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -457362,7 +456579,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -457374,11 +456591,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -457389,44 +456606,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -457434,15 +456651,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -457458,19 +456675,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -457556,26 +456773,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1752 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 1749 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -457586,27 +456803,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -457623,7 +456840,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -457636,10 +456853,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -457650,45 +456867,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -457696,42 +456913,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -457817,26 +457034,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1753 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM8 + SolutionIndex: 1750 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -457847,27 +457064,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -457884,7 +457101,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -457897,10 +457114,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -457911,34 +457128,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 70656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 70656 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -457946,10 +457163,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -457957,22 +457174,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 224 + MacroTileA: 32 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -457980,19 +457197,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 1 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -458078,26 +457295,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1754 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 1751 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -458108,27 +457325,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -458145,7 +457362,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -458157,11 +457374,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -458172,68 +457389,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_15_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33280 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33280 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 240 - MacroTileA: 256 - MacroTileB: 240 + MacroTile0: 32 + MacroTile1: 384 + MacroTileA: 32 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -458241,19 +457458,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 16 - NumLoadsB: 15 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -458339,26 +457556,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1755 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_15_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 1752 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_GSU5_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 15 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 15 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -458369,27 +457586,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -458406,7 +457623,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -458417,7 +457634,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -458433,68 +457650,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x144x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_9_NTB0_PLR1_SVW1_VWA1_WG32_4_2 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 41472 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 9] + MIWaveTileA: 1 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 32 + MacroTile1: 144 + MacroTileA: 32 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -458502,19 +457719,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 18 + NumGlobalWriteVectorsPerThread: 18 + NumLoadsA: 2 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -458600,26 +457817,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1756 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 1753 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x144x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_9_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 9 + ThreadTileA: 4 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -458636,21 +457853,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -458667,7 +457884,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -458680,10 +457897,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -458694,32 +457911,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35072 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61824 + LdsNumElementsAlignedA: 6528 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 82176 + LdsOffsetB: 6528 + LdsOffsetB_Blk: 72064 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35072 - LdsOffsetMetadata_Blk: 82176 + LdsOffsetMetadata: 61824 + LdsOffsetMetadata_Blk: 72064 LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 @@ -458728,10 +457945,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -458740,14 +457957,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [16, 4] - MIWaveTileA: 16 - MIWaveTileB: 4 + MIWaveTile: [3, 6] + MIWaveTileA: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 48 + MacroTile1: 384 + MacroTileA: 48 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -458763,19 +457980,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 16 - NumLoadsB: 4 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -458861,26 +458078,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1757 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 1754 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU5_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 6 + ThreadTileA: 12 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -458891,27 +458108,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -458928,7 +458145,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -458939,12 +458156,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -458955,45 +458172,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -459001,42 +458218,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 48 + MacroTile1: 192 + MacroTileA: 48 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -459122,26 +458339,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1758 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 1755 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -459152,27 +458369,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -459189,7 +458406,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -459205,7 +458422,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -459216,44 +458433,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_PLR1_SVW1_VWA1_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -459261,15 +458478,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -459285,19 +458502,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -459383,26 +458600,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1759 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 + SolutionIndex: 1756 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -459413,27 +458630,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -459450,7 +458667,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -459461,9 +458678,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -459477,45 +458694,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 39168 - LdsNumElementsAlignedA: 11520 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 11520 - LdsOffsetB_Blk: 77056 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 39168 - LdsOffsetMetadata_Blk: 77056 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -459523,22 +458740,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 3] - MIWaveTileA: 5 + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 384 - MacroTileA: 160 - MacroTileB: 384 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -459546,19 +458763,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 10 - NumLoadsB: 6 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -459644,25 +458861,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1760 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 1757 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -459680,21 +458897,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -459711,7 +458928,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -459738,45 +458955,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 36864 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -459784,22 +459001,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 32 + MacroTile1: 96 + MacroTileA: 32 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -459807,19 +459024,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 3 - NumLoadsB: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -459905,26 +459122,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1761 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 1758 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -459941,21 +459158,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -459985,7 +459202,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -459999,7 +459216,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_2_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -460012,19 +459229,19 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -460044,15 +459261,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -460073,14 +459290,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -460166,8 +459383,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1762 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1759 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -460176,16 +459393,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 5 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -460202,11 +459419,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -460260,7 +459477,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 4 @@ -460273,19 +459490,19 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -460305,15 +459522,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -460328,20 +459545,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -460427,8 +459644,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1763 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1760 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -460437,16 +459654,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -460463,7 +459680,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -460505,12 +459722,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -460521,42 +459738,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_PLR1_SVW2_VWA2_WG16_8_2 LSCA: 128 LSCB: 128 - LSPA: 16 + LSPA: 4 LSPB: 16 - LVCA: 16 + LVCA: 64 LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 8704 LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -460566,9 +459783,9 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 + MIWaveGroup: [1, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 32 @@ -460589,19 +459806,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 8 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -460688,8 +459905,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1764 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1761 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -460697,16 +459914,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 + StoreVectorWidth: 2 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 5 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -460718,17 +459935,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -460766,9 +459983,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -460782,12 +459999,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -460795,19 +460012,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 5120 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 70656 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 70656 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 73216 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -460827,15 +460044,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 224 - MacroTileA: 32 - MacroTileB: 224 + MacroTile0: 48 + MacroTile1: 320 + MacroTileA: 48 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -460856,14 +460073,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 1 - NumLoadsB: 7 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -460949,8 +460166,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1765 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1762 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -460959,16 +460176,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 7 - ThreadTileA: 4 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -460985,11 +460202,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -461016,7 +460233,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -461027,9 +460244,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -461043,22 +460260,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_PLR1_SVW1_VWA1_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 + LdsNumBytes: 41472 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -461067,44 +460284,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 + LdsOffsetMetadata: 41472 LdsOffsetMetadata_Blk: 70144 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 4] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 384 - MacroTileA: 32 - MacroTileB: 384 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -461117,14 +460334,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -461210,8 +460427,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1766 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_GSU5_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1763 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -461220,16 +460437,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -461246,15 +460463,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -461290,7 +460507,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -461304,7 +460521,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x144x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_9_NTB0_PLR1_SVW1_VWA1_WG32_4_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -461317,29 +460534,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 41472 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -461349,15 +460566,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 9] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 9 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 144 - MacroTileA: 32 - MacroTileB: 144 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -461372,20 +460589,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 18 - NumGlobalWriteVectorsPerThread: 18 - NumLoadsA: 2 - NumLoadsB: 9 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -461471,8 +460688,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1767 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x144x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_9_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_2_WGM1 + SolutionIndex: 1764 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -461481,16 +460698,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 9 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 9 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -461507,11 +460724,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -461538,7 +460755,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -461549,12 +460766,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -461565,42 +460782,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61824 - LdsNumElementsAlignedA: 6528 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 8704 LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 6528 - LdsOffsetB_Blk: 72064 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61824 - LdsOffsetMetadata_Blk: 72064 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -461611,14 +460828,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 6] - MIWaveTileA: 3 - MIWaveTileB: 6 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 384 - MacroTileA: 48 - MacroTileB: 384 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -461639,13 +460856,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 6 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -461732,8 +460949,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1768 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU5_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1765 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -461741,17 +460958,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 6 - ThreadTileA: 12 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -461762,7 +460979,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -461772,11 +460989,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -461815,7 +461032,7 @@ GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -461826,7 +461043,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_PLR1_SVW2_VWA2_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 4 @@ -461835,27 +461052,27 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -461872,13 +461089,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 32 MacroTile1: 192 - MacroTileA: 48 + MacroTileA: 32 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -461900,13 +461117,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -461993,8 +461210,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1769 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1766 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -462002,16 +461219,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 12 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -462023,7 +461240,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -462071,9 +461288,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -462087,12 +461304,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_PLR1_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 - LSPA: 4 + LSPA: 16 LSPB: 16 - LVCA: 64 + LVCA: 16 LVCB: 16 LVPA: 2 LVPB: 2 @@ -462100,29 +461317,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 13824 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -462132,14 +461349,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 4] - MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 48 MacroTile1: 128 - MacroTileA: 16 + MacroTileA: 48 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -462161,13 +461378,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -462254,8 +461471,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1770 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1767 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -462265,15 +461482,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 4 - ThreadTileA: 4 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -462290,11 +461507,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -462332,7 +461549,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer @@ -462348,12 +461565,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 - LSPA: 16 + LSPA: 4 LSPB: 16 - LVCA: 16 + LVCA: 64 LVCB: 16 LVPA: 2 LVPB: 2 @@ -462361,23 +461578,23 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -462394,13 +461611,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 + MIWaveTile: [3, 3] + MIWaveTileA: 3 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 48 MacroTile1: 192 - MacroTileA: 16 + MacroTileA: 48 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -462422,13 +461639,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 12 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -462515,8 +461732,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1771 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1768 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -462531,9 +461748,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 12 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 12 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -462598,7 +461815,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -462609,7 +461826,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -462618,23 +461835,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -462655,13 +461872,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 64 MacroTile1: 96 - MacroTileA: 32 + MacroTileA: 64 MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 @@ -462683,13 +461900,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 + NumElementsPerThread: 24 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 + NumLoadsA: 4 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -462776,8 +461993,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1772 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1769 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -462785,16 +462002,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -462806,7 +462023,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -462843,7 +462060,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -462856,7 +462073,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -462870,22 +462087,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_4_NTB0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 + LdsNumBytes: 46080 LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -462894,10 +462111,10 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 + LdsOffsetMetadata: 46080 LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -462905,10 +462122,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -462916,22 +462133,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] + MIWaveTile: [1, 4] MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -462944,14 +462161,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 2 - NumLoadsB: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -463037,8 +462254,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1773 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1770 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -463047,16 +462264,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -463073,15 +462290,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -463115,12 +462332,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -463131,32 +462348,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 - LSPA: 4 + LSPA: 16 LSPB: 16 - LVCA: 64 + LVCA: 16 LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -463177,13 +462394,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 64 MacroTile1: 160 - MacroTileA: 32 + MacroTileA: 64 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -463205,13 +462422,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 + NumElementsPerThread: 40 NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 + NumLoadsA: 4 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -463298,8 +462515,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1774 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1771 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -463307,16 +462524,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 5 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -463328,7 +462545,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -463376,12 +462593,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -463392,42 +462609,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_PLR1_SVW2_VWA2_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 - LSPA: 4 + LSPA: 16 LSPB: 16 - LVCA: 64 + LVCA: 16 LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -463437,15 +462654,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -463466,14 +462683,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 8 - NumLoadsB: 10 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -463559,8 +462776,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1775 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 1772 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -463568,17 +462785,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 + StoreVectorWidth: 1 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -463589,13 +462806,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -463653,7 +462870,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -463666,19 +462883,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 7680 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -463690,7 +462907,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -463699,13 +462916,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 5] - MIWaveTileA: 3 + MIWaveTile: [5, 5] + MIWaveTileA: 5 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 80 MacroTile1: 320 - MacroTileA: 48 + MacroTileA: 80 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -463727,13 +462944,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 10 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -463820,8 +463037,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1776 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1773 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -463836,9 +463053,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 20 ThreadTile1: 5 - ThreadTileA: 12 + ThreadTileA: 20 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -463887,7 +463104,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -463898,9 +463115,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -463914,44 +463131,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_PLR1_SVW1_VWA1_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 76416 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 76416 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -463959,15 +463176,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 4] - MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 80 + MacroTile1: 384 + MacroTileA: 80 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -463982,20 +463199,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 10 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -464081,8 +463298,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1777 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_4_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1774 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -464092,15 +463309,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 4 - ThreadTileA: 4 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -464117,17 +463334,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -464148,7 +463365,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -464175,32 +463392,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -464209,8 +463426,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -464220,15 +463437,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 160 + MacroTileA: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -464243,20 +463460,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -464342,8 +463559,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1778 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1775 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -464352,16 +463569,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -464378,15 +463595,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -464409,7 +463626,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -464422,10 +463639,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -464436,32 +463653,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_PLR1_SVW2_VWA2_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -464470,8 +463687,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -464481,15 +463698,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -464510,14 +463727,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -464603,8 +463820,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1779 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1776 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -464612,17 +463829,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -464633,21 +463850,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -464681,12 +463898,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -464697,32 +463914,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_PLR1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 - LSPA: 4 + LSPA: 16 LSPB: 16 - LVCA: 64 + LVCA: 16 LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -464742,15 +463959,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -464771,14 +463988,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -464864,8 +464081,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1780 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1777 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -464873,16 +464090,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 12 ThreadTile1: 3 - ThreadTileA: 8 + ThreadTileA: 12 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -464894,17 +464111,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -464944,10 +464161,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -464958,7 +464175,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -464967,23 +464184,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -465003,15 +464220,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -465032,14 +464249,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -465125,8 +464342,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1781 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1778 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -465134,17 +464351,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -465155,17 +464372,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -465192,7 +464409,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -465205,7 +464422,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -465219,44 +464436,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -465265,14 +464482,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 192 - MacroTileA: 48 - MacroTileB: 192 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -465293,14 +464510,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 - NumLoadsB: 12 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -465386,8 +464603,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1782 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1779 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -465402,10 +464619,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -465426,11 +464643,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -465453,7 +464670,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -465464,12 +464681,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -465480,44 +464697,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 61312 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61312 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -465525,15 +464742,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 112 + MacroTile1: 320 + MacroTileA: 112 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -465548,20 +464765,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 14 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -465647,8 +464864,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1783 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1780 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -465656,17 +464873,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -465677,21 +464894,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -465714,7 +464931,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -465727,10 +464944,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -465741,34 +464958,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_4_NTB0_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SVW2_VWA2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -465776,10 +464993,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -465787,22 +465004,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 4] - MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 256 + MacroTile1: 160 MacroTileA: 64 - MacroTileB: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -465815,14 +465032,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -465908,8 +465125,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1784 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1781 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -465917,17 +465134,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -465938,21 +465155,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -465975,7 +465192,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -466002,32 +465219,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 44544 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -466036,8 +465253,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -466047,15 +465264,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -466070,20 +465287,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -466169,8 +465386,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1785 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1782 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -466179,16 +465396,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -466205,15 +465422,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -466236,7 +465453,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -466247,9 +465464,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -466263,44 +465480,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_5_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 58752 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 58752 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -466308,15 +465525,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 112 + MacroTile1: 320 + MacroTileA: 112 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -466337,14 +465554,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 14 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -466430,8 +465647,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1786 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1783 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -466440,16 +465657,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -466466,17 +465683,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -466497,7 +465714,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -466508,12 +465725,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -466524,32 +465741,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_SVW2_VWA2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -466558,10 +465775,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -466569,15 +465786,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 320 - MacroTileA: 80 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -466592,20 +465809,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 10 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -466691,8 +465908,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1787 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1784 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -466700,17 +465917,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -466721,21 +465938,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -466770,8 +465987,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -466785,36 +466002,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 76416 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 76416 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 83456 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -466822,7 +466039,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -466831,14 +466048,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveTile: [7, 3] + MIWaveTileA: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 384 - MacroTileA: 80 - MacroTileB: 384 + MacroTile0: 112 + MacroTile1: 192 + MacroTileA: 112 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -466853,20 +466070,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 10 - NumLoadsB: 48 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 14 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -466952,8 +466169,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1788 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1785 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -466968,10 +466185,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 28 + ThreadTile1: 3 + ThreadTileA: 28 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -466992,13 +466209,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -467030,7 +466247,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer @@ -467046,12 +466263,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -467059,19 +466276,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -467091,15 +466308,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 160 - MacroTileA: 96 - MacroTileB: 160 + MacroTile0: 80 + MacroTile1: 192 + MacroTileA: 80 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -467122,12 +466339,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 60 NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 5 + NumLoadsA: 10 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -467213,8 +466430,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1789 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1786 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -467223,16 +466440,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -467249,7 +466466,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -467291,9 +466508,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -467307,12 +466524,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -467320,19 +466537,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -467352,15 +466569,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 3] + MIWaveTileA: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 112 + MacroTile1: 192 + MacroTileA: 112 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -467375,7 +466592,7 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 @@ -467383,12 +466600,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 84 NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 7 + NumLoadsA: 14 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -467474,8 +466691,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1790 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1787 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -467484,16 +466701,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 3 + ThreadTileA: 28 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -467510,11 +466727,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -467557,7 +466774,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -467568,7 +466785,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -467577,23 +466794,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -467613,15 +466830,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -467642,14 +466859,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -467735,8 +466952,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1791 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1788 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -467744,17 +466961,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -467765,13 +466982,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -467802,7 +467019,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -467815,10 +467032,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -467829,22 +467046,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 43008 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -467853,7 +467070,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 + LdsOffsetMetadata: 43008 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -467863,8 +467080,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -467875,13 +467092,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 + MIWaveTile: [4, 5] + MIWaveTileA: 4 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 128 MacroTile1: 160 - MacroTileA: 64 + MacroTileA: 128 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -467903,14 +467120,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 + NumElementsPerThread: 80 NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -467996,8 +467213,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1792 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1789 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -468005,16 +467222,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 16 ThreadTile1: 5 - ThreadTileA: 8 + ThreadTileA: 16 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -468026,7 +467243,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -468036,11 +467253,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -468074,12 +467291,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -468090,88 +467307,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB4_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -468257,8 +467474,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1793 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1790 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -468266,17 +467483,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -468287,17 +467504,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -468335,9 +467552,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -468351,12 +467568,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -468364,23 +467581,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61312 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61312 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -468388,7 +467605,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -468396,15 +467613,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 320 - MacroTileA: 112 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -468419,20 +467636,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 14 - NumLoadsB: 10 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -468518,8 +467735,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1794 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1791 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -468528,16 +467745,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -468554,11 +467771,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -468585,7 +467802,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -468596,12 +467813,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -468612,34 +467829,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -468647,33 +467864,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -468686,14 +467903,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 20 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -468779,8 +467996,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1795 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1792 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -468788,17 +468005,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -468809,7 +468026,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -468819,11 +468036,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -468859,10 +468076,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -468873,7 +468090,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -468882,36 +468099,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44544 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -468919,42 +468136,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -469040,8 +468257,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1796 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1793 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -469049,17 +468266,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -469070,17 +468287,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -469118,12 +468335,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -469134,45 +468351,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_5_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58752 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58752 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -469180,22 +468397,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 320 - MacroTileA: 112 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -469208,14 +468425,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 14 - NumLoadsB: 40 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -469301,8 +468518,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1797 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1794 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -469310,17 +468527,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -469331,23 +468548,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -469368,7 +468585,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -469379,12 +468596,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -469395,32 +468612,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -469429,8 +468646,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -469440,15 +468657,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 3] + MIWaveTileA: 7 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 112 + MacroTile1: 192 + MacroTileA: 112 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -469463,19 +468680,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 14 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 14 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -469562,8 +468779,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1798 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1795 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -469571,16 +468788,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 28 ThreadTile1: 3 - ThreadTileA: 8 + ThreadTileA: 28 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -469592,21 +468809,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -469640,12 +468857,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -469656,32 +468873,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -469701,15 +468918,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 3] - MIWaveTileA: 7 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 192 - MacroTileA: 112 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -469730,14 +468947,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 14 - NumLoadsB: 6 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -469823,8 +469040,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1799 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1796 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -469832,17 +469049,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 3 - ThreadTileA: 28 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -469853,17 +469070,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -469902,8 +469119,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -469917,36 +469134,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -469954,7 +469171,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -469962,15 +469179,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 192 - MacroTileA: 80 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -469991,14 +469208,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 10 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -470084,8 +469301,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1800 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1797 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -470094,16 +469311,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -470120,17 +469337,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -470163,11 +469380,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -470178,36 +469395,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64640 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -470215,7 +469432,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -470224,14 +469441,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 3] - MIWaveTileA: 7 - MIWaveTileB: 3 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 192 - MacroTileA: 112 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -470246,20 +469463,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 14 - NumLoadsB: 6 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -470345,8 +469562,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1801 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1798 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -470354,17 +469571,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 3 - ThreadTileA: 28 - ThreadTileB: 3 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -470375,7 +469592,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -470385,13 +469602,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -470412,7 +469629,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -470439,34 +469656,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -470474,53 +469691,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -470606,8 +469823,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1802 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1799 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -470616,16 +469833,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -470642,15 +469859,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -470684,12 +469901,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -470700,32 +469917,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 44544 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -470745,15 +469962,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -470774,14 +469991,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -470867,8 +470084,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1803 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1800 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -470876,17 +470093,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -470897,17 +470114,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -470947,10 +470164,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -470961,7 +470178,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB4_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_5_NTB0_SVW1_VWA1_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -470970,23 +470187,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -470998,7 +470215,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -471006,15 +470223,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 5] + MIWaveTileA: 1 MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 320 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -471029,20 +470246,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 + NumElementsPerThread: 80 NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 4 - NumLoadsB: 10 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -471128,8 +470345,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1804 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1801 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -471137,16 +470354,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 16 ThreadTile1: 5 - ThreadTileA: 32 + ThreadTileA: 16 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -471158,17 +470375,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -471206,9 +470423,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -471222,32 +470439,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -471259,7 +470476,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -471268,14 +470485,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 96 - MacroTileA: 160 - MacroTileB: 96 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -471296,14 +470513,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -471389,8 +470606,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1805 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1802 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -471405,10 +470622,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -471429,13 +470646,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -471456,7 +470673,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -471467,12 +470684,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -471483,34 +470700,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -471518,33 +470735,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -471557,14 +470774,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 20 - NumLoadsB: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -471650,8 +470867,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1806 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1803 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -471659,17 +470876,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -471680,21 +470897,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -471717,7 +470934,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -471730,10 +470947,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -471744,34 +470961,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -471779,53 +470996,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -471911,8 +471128,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1807 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1804 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -471920,17 +471137,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -471941,7 +471158,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -471951,11 +471168,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -471991,10 +471208,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -472005,7 +471222,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_NTB0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -472014,79 +471231,79 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -472172,8 +471389,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1808 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1805 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -472181,17 +471398,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -472202,7 +471419,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -472212,7 +471429,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -472252,10 +471469,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -472266,7 +471483,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -472275,23 +471492,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 17920 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -472303,7 +471520,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -472312,13 +471529,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 3] - MIWaveTileA: 7 + MIWaveTile: [10, 3] + MIWaveTileA: 10 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 112 + MacroTile0: 160 MacroTile1: 192 - MacroTileA: 112 + MacroTileA: 160 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -472340,13 +471557,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 14 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularA: 20 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -472433,8 +471650,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1809 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1806 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -472442,16 +471659,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 40 ThreadTile1: 3 - ThreadTileA: 28 + ThreadTileA: 40 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -472463,7 +471680,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -472473,7 +471690,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -472516,7 +471733,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -472527,7 +471744,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -472536,23 +471753,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -472573,14 +471790,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -472601,14 +471818,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -472694,8 +471911,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1810 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1807 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -472703,17 +471920,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -472724,7 +471941,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -472772,12 +471989,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -472788,36 +472005,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 44544 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -472825,7 +472042,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -472833,15 +472050,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -472862,14 +472079,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 3 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -472955,8 +472172,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1811 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1808 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -472964,17 +472181,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -472985,23 +472202,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -473033,12 +472250,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -473049,36 +472266,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64640 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64640 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -473086,7 +472303,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -473094,15 +472311,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -473123,14 +472340,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -473216,8 +472433,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1812 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1809 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -473225,17 +472442,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -473246,23 +472463,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -473294,12 +472511,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -473310,68 +472527,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -473384,14 +472601,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 28 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -473477,8 +472694,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1813 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1810 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -473486,17 +472703,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -473507,7 +472724,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -473517,13 +472734,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -473555,12 +472772,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -473571,32 +472788,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44544 - LdsNumElementsAlignedA: 13824 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -473608,7 +472825,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -473616,14 +472833,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 128 MacroTile1: 192 - MacroTileA: 96 + MacroTileA: 128 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -473640,18 +472857,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -473738,8 +472955,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1814 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1811 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -473747,17 +472964,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -473768,13 +472985,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -473816,12 +473033,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -473832,22 +473049,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_5_NTB0_SVW1_VWA1_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 + LdsNumBytes: 44032 LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -473856,21 +473073,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 + LdsOffsetMetadata: 44032 LdsOffsetMetadata_Blk: 83968 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -473878,9 +473095,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTile: [2, 10] + MIWaveTileA: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 MacroTile0: 128 MacroTile1: 160 @@ -473890,10 +473107,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -473907,12 +473124,12 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 16 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 16 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -473999,8 +473216,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1815 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 1812 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -474008,17 +473225,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 10 + ThreadTileA: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -474029,13 +473246,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -474077,12 +473294,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -474093,68 +473310,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 256 MacroTile1: 160 - MacroTileA: 224 + MacroTileA: 256 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -474162,19 +473379,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 20 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -474260,8 +473477,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1816 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1813 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -474269,16 +473486,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 28 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -474290,13 +473507,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -474306,7 +473523,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -474327,7 +473544,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -474343,7 +473560,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -474354,32 +473571,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -474388,10 +473605,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -474399,15 +473616,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -474423,19 +473640,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -474521,8 +473738,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1817 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_6_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1814 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -474530,17 +473747,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 6 - ThreadTileA: 8 - ThreadTileB: 6 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -474551,21 +473768,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -474588,7 +473805,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -474599,12 +473816,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -474615,32 +473832,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -474649,10 +473866,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -474661,14 +473878,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -474684,19 +473901,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -474782,8 +473999,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1818 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1815 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -474791,17 +474008,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -474812,7 +474029,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -474823,10 +474040,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -474860,12 +474077,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -474876,36 +474093,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64640 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -474913,7 +474130,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -474921,15 +474138,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 96 + MacroTile1: 320 MacroTileA: 160 - MacroTileB: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -474944,20 +474161,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -475043,8 +474260,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1819 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1816 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -475052,17 +474269,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -475073,23 +474290,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -475121,9 +474338,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -475137,12 +474354,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -475150,19 +474367,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -475182,15 +474399,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -475205,7 +474422,7 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 @@ -475213,12 +474430,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 120 NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 6 + NumLoadsA: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -475304,8 +474521,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1820 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1817 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -475314,16 +474531,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -475340,11 +474557,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -475387,7 +474604,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -475398,7 +474615,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -475407,59 +474624,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -475467,19 +474684,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -475565,8 +474782,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1821 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1818 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -475574,17 +474791,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -475595,7 +474812,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -475643,12 +474860,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -475659,32 +474876,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44544 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -475696,7 +474913,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -475704,15 +474921,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -475728,19 +474945,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 3 - NumLoadsB: 6 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -475826,8 +475043,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1822 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1819 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -475835,17 +475052,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -475856,13 +475073,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -475904,12 +475121,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -475920,32 +475137,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -475957,7 +475174,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -475966,14 +475183,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -475989,19 +475206,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -476087,8 +475304,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1823 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1820 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -476096,17 +475313,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -476117,7 +475334,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -476133,7 +475350,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -476165,12 +475382,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -476181,36 +475398,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -476218,7 +475435,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -476227,14 +475444,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -476255,14 +475472,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 28 - NumLoadsB: 24 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -476348,8 +475565,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1824 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1821 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -476357,17 +475574,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -476378,7 +475595,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -476388,13 +475605,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -476426,7 +475643,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -476442,12 +475659,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -476455,9 +475672,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 + LdsNumBytes: 43008 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -476466,7 +475683,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 + LdsOffsetMetadata: 43008 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -476479,7 +475696,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -476488,14 +475705,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] + MIWaveTile: [4, 5] MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -476516,14 +475733,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -476609,8 +475826,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1825 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1822 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -476626,9 +475843,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 6 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 6 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -476688,8 +475905,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -476703,36 +475920,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -476740,7 +475957,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -476748,14 +475965,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 10] - MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 320 MacroTile1: 160 - MacroTileA: 128 + MacroTileA: 320 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -476772,19 +475989,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 16 - NumLoadsB: 5 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -476870,8 +476087,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1826 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1823 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -476880,16 +476097,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 10 - ThreadTileA: 8 - ThreadTileB: 10 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -476906,17 +476123,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -476950,7 +476167,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -476964,7 +476181,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -476977,19 +476194,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -477009,15 +476226,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -477038,14 +476255,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -477131,8 +476348,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1827 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 1824 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -477141,16 +476358,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -477167,11 +476384,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -477209,7 +476426,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -477225,12 +476442,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -477238,23 +476455,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61312 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61312 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -477270,15 +476487,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 5] + MIWaveTileA: 7 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 160 - MacroTileA: 160 - MacroTileB: 160 + MacroTile0: 112 + MacroTile1: 320 + MacroTileA: 112 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -477294,19 +476511,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 5 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 14 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -477392,8 +476609,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1828 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1825 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -477402,15 +476619,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 28 ThreadTile1: 5 - ThreadTileA: 20 + ThreadTileA: 28 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -477428,7 +476645,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -477486,7 +476703,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -477499,19 +476716,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 25600 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -477532,13 +476749,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 + MIWaveTile: [7, 5] + MIWaveTileA: 7 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 224 MacroTile1: 160 - MacroTileA: 160 + MacroTileA: 224 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -477555,18 +476772,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularA: 28 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -477653,8 +476870,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1829 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1826 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -477669,9 +476886,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 28 ThreadTile1: 5 - ThreadTileA: 20 + ThreadTileA: 28 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -477731,12 +476948,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -477747,36 +476964,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64640 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64640 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -477792,15 +477009,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -477821,14 +477038,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -477914,8 +477131,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1830 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1827 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -477923,17 +477140,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -477944,23 +477161,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -477992,12 +477209,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -478008,32 +477225,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -478054,14 +477271,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -478076,20 +477293,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 16 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -478175,8 +477392,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1831 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1828 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -478184,17 +477401,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -478205,7 +477422,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -478253,7 +477470,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -478269,12 +477486,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -478282,55 +477499,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 6] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 192 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -478343,14 +477560,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 16 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -478436,8 +477653,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1832 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1829 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -478446,16 +477663,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -478514,12 +477731,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -478530,32 +477747,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata_Blk: 111616 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -478576,14 +477793,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 320 + MacroTile1: 96 + MacroTileA: 320 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -478604,14 +477821,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 10 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -478697,8 +477914,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1833 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1830 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -478706,17 +477923,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -478727,7 +477944,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -478775,12 +477992,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -478791,32 +478008,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata_Blk: 111616 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -478837,14 +478054,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 320 + MacroTile1: 96 + MacroTileA: 320 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -478860,19 +478077,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 20 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 10 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -478958,8 +478175,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1834 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1831 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -478967,17 +478184,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -478988,7 +478205,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -479004,7 +478221,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -479041,7 +478258,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -479052,7 +478269,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -479061,13 +478278,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 + LdsNumBytes: 63488 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -479076,21 +478293,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 + LdsOffsetMetadata: 63488 LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -479098,22 +478315,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 160 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -479121,19 +478338,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 4 - NumLoadsB: 5 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -479219,8 +478436,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1835 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1832 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -479228,16 +478445,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -479249,13 +478466,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -479313,7 +478530,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT12_3_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -479326,23 +478543,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 49920 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 49920 + LdsOffsetB_Blk: 115456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 115456 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -479350,7 +478567,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -479359,14 +478576,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 384 + MacroTile1: 96 + MacroTileA: 384 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -479382,19 +478599,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 48 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 48 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -479480,8 +478697,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1836 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1833 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT12_3_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -479496,10 +478713,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -479526,7 +478743,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -479558,9 +478775,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -479574,45 +478791,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -479620,22 +478837,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -479643,19 +478860,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 20 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -479741,8 +478958,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1837 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1834 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -479751,15 +478968,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 40 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -479777,17 +478994,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -479808,7 +479025,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -479819,12 +479036,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -479835,45 +479052,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 22272 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 + LdsOffsetMetadata: 22272 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -479881,22 +479098,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 192 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -479909,14 +479126,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -480002,8 +479219,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1838 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1835 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -480011,17 +479228,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -480032,21 +479249,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -480096,7 +479313,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -480109,23 +479326,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61312 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61312 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 80896 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -480133,7 +479350,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -480141,15 +479358,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 320 - MacroTileA: 112 - MacroTileB: 320 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -480170,14 +479387,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 14 - NumLoadsB: 10 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 12 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -480263,8 +479480,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1839 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1836 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -480273,16 +479490,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -480299,7 +479516,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -480341,12 +479558,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -480357,32 +479574,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -480403,14 +479620,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -480431,14 +479648,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -480524,8 +479741,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1840 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1837 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -480533,17 +479750,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -480554,7 +479771,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -480607,7 +479824,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -480618,7 +479835,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -480627,13 +479844,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 + LdsNumBytes: 57856 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -480642,21 +479859,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 + LdsOffsetMetadata: 57856 LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -480664,22 +479881,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 96 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -480692,14 +479909,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 8 - NumLoadsB: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -480785,8 +480002,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1841 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1838 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -480794,17 +480011,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -480815,14 +480032,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -480868,7 +480085,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -480879,7 +480096,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -480888,59 +480105,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -480948,19 +480165,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 16 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -481046,8 +480263,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1842 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1839 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -481055,17 +480272,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -481076,14 +480293,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -481092,7 +480309,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -481124,12 +480341,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -481140,68 +480357,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -481214,14 +480431,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 16 - NumLoadsB: 6 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -481307,8 +480524,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1843 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1840 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -481316,17 +480533,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -481337,14 +480554,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -481401,7 +480618,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -481414,55 +480631,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 111616 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 96 - MacroTileA: 320 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -481475,14 +480692,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 10 - NumLoadsB: 3 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -481568,8 +480785,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1844 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1841 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -481578,16 +480795,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -481605,7 +480822,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -481646,12 +480863,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -481662,36 +480879,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 111616 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -481708,14 +480925,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveTile: [9, 5] + MIWaveTileA: 9 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 96 - MacroTileA: 320 - MacroTileB: 96 + MacroTile0: 288 + MacroTile1: 160 + MacroTileA: 288 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -481731,19 +480948,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 10 - NumLoadsB: 3 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 36 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -481829,8 +481046,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1845 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1842 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -481838,17 +481055,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 36 + ThreadTile1: 5 + ThreadTileA: 36 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -481859,14 +481076,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -481875,7 +481092,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -481907,12 +481124,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -481923,45 +481140,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 47872 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 82176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 82176 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -481969,22 +481186,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 320 + MacroTile1: 352 MacroTileA: 128 - MacroTileB: 320 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -481997,14 +481214,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 16 + NumLoadsB: 44 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 44 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -482090,8 +481307,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1846 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1843 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -482099,17 +481316,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -482120,14 +481337,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -482136,7 +481353,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -482169,11 +481386,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -482184,34 +481401,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT12_3_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 49920 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 49920 - LdsOffsetB_Blk: 115456 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 115456 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -482230,14 +481447,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [12, 3] - MIWaveTileA: 12 - MIWaveTileB: 3 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 96 - MacroTileA: 384 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -482253,19 +481470,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 48 - NumLoadsB: 3 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 48 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -482351,8 +481568,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1847 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT12_3_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1844 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -482360,17 +481577,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -482381,14 +481598,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -482418,7 +481635,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -482429,12 +481646,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -482445,68 +481662,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_NTC0_NTD0_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 45184 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 73856 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 + LdsOffsetMetadata: 45184 + LdsOffsetMetadata_Blk: 73856 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 320 + MacroTile1: 512 MacroTileA: 128 - MacroTileB: 320 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -482519,14 +481736,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -482612,8 +481829,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1848 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1845 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -482621,7 +481838,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -482629,9 +481846,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 8 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -482642,21 +481859,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -482691,11 +481908,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -482706,34 +481923,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 22272 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 41216 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22272 - LdsOffsetMetadata_Blk: 41216 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 80768 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -482752,14 +481969,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTile: [7, 9] + MIWaveTileA: 7 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 288 + MacroTileA: 224 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -482775,19 +481992,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 14 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -482873,8 +482090,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1849 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT4_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1846 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -482882,17 +482099,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 28 + ThreadTile1: 9 + ThreadTileA: 28 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -482903,14 +482120,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -482940,7 +482157,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -482952,7 +482169,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -482967,44 +482184,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 80896 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -483013,14 +482230,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveTile: [7, 9] + MIWaveTileA: 7 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 288 + MacroTileA: 224 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -483041,14 +482258,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 12 - NumLoadsB: 7 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 14 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -483134,8 +482351,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1850 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1847 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -483150,10 +482367,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 9 + ThreadTileA: 28 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -483171,14 +482388,14 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -483217,7 +482434,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -483228,7 +482445,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -483237,13 +482454,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 + LdsNumBytes: 63488 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -483252,21 +482469,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 + LdsOffsetMetadata: 63488 LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -483274,22 +482491,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 192 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -483297,19 +482514,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -483395,8 +482612,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1851 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1848 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -483404,17 +482621,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -483425,14 +482642,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -483462,7 +482679,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -483473,12 +482690,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -483489,68 +482706,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 35712 + LdsNumElementsAlignedA: 12672 LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 + LdsOffsetMetadata: 35712 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -483563,13 +482780,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 12 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -483656,8 +482873,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1852 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 1849 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -483665,16 +482882,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 48 ThreadTile1: 5 - ThreadTileA: 32 + ThreadTileA: 48 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -483686,21 +482903,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -483723,7 +482940,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -483735,11 +482952,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -483750,45 +482967,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 31104 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 31104 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -483796,22 +483013,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 208 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -483824,14 +483041,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 16 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -483917,8 +483134,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1853 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 1850 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -483926,17 +483143,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -483947,23 +483164,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -483996,11 +483213,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -484011,68 +483228,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 8 LVCA: 8 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -484085,14 +483302,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -484178,8 +483395,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1854 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 1851 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -484187,17 +483404,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -484208,14 +483425,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -484245,7 +483462,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -484256,12 +483473,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -484272,45 +483489,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -484318,22 +483535,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -484346,14 +483563,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -484439,8 +483656,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1855 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 1852 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -484448,17 +483665,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -484469,21 +483686,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -484517,8 +483734,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -484533,45 +483750,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 104704 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -484579,22 +483796,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [9, 5] - MIWaveTileA: 9 - MIWaveTileB: 5 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 160 - MacroTileA: 288 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -484607,14 +483824,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 36 - NumLoadsB: 20 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -484700,8 +483917,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1856 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 1853 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -484710,16 +483927,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 5 - ThreadTileA: 36 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -484736,8 +483953,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -484746,7 +483963,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -484767,7 +483984,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -484794,32 +484011,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 47872 + LdsNumBytes: 31104 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 82176 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 82176 + LdsOffsetMetadata: 31104 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -484828,8 +484045,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -484839,15 +484056,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 11] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 352 - MacroTileA: 128 - MacroTileB: 352 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -484863,19 +484080,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 NumLoadsA: 16 - NumLoadsB: 44 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 44 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -484961,26 +484178,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1857 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x352x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 1854 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 11 + ThreadTile1: 13 ThreadTileA: 16 - ThreadTileB: 11 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -484997,21 +484214,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -485028,7 +484245,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -485040,11 +484257,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -485055,42 +484272,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -485100,15 +484317,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -485124,19 +484341,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -485222,26 +484439,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1858 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 1855 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -485252,27 +484469,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -485301,7 +484518,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -485316,34 +484533,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_NTC0_NTD0_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45184 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 31872 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 73856 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45184 - LdsOffsetMetadata_Blk: 73856 + LdsOffsetMetadata: 31872 + LdsOffsetMetadata_Blk: 49408 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -485361,15 +484578,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 8] + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -485385,19 +484602,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 16 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -485483,26 +484700,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1859 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 1856 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 8 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -485519,7 +484736,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -485533,7 +484750,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -485561,8 +484778,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -485577,45 +484794,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SVW1_VWA1_WG64_4_1 LSCA: 32 LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -485623,22 +484840,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 9] - MIWaveTileA: 7 - MIWaveTileB: 9 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 288 - MacroTileA: 224 - MacroTileB: 288 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -485646,19 +484863,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 14 - NumLoadsB: 18 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -485744,26 +484961,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1860 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 1857 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 9 - ThreadTileA: 28 - ThreadTileB: 9 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -485780,7 +484997,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -485794,7 +485011,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -485811,7 +485028,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -485822,8 +485039,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -485838,68 +485055,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT1_1_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 9] - MIWaveTileA: 7 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 288 - MacroTileA: 224 - MacroTileB: 288 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -485912,14 +485129,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 14 - NumLoadsB: 18 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -486005,8 +485222,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1861 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 1858 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT1_1_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -486015,16 +485232,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 9 - ThreadTileA: 28 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -486042,14 +485259,14 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -486072,7 +485289,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -486088,7 +485305,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -486099,34 +485316,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_2_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -486134,53 +485351,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -486266,8 +485483,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1862 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 1859 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_2_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -486275,17 +485492,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -486296,21 +485513,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -486333,7 +485550,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -486344,12 +485561,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -486360,45 +485577,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT1_1_NTB4_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33920 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 76416 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33920 - LdsOffsetMetadata_Blk: 76416 - LdsPadA: 4 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -486406,42 +485623,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 5 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -486527,8 +485744,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1863 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM16 + SolutionIndex: 1860 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT1_1_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -486536,17 +485753,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -486557,21 +485774,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -486606,11 +485823,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -486621,36 +485838,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64640 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64640 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -486658,7 +485875,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -486667,13 +485884,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 + MIWaveTile: [3, 5] + MIWaveTileA: 3 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 48 MacroTile1: 320 - MacroTileA: 160 + MacroTileA: 48 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -486690,19 +485907,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -486788,8 +486005,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1864 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 1861 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -486797,16 +486014,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 12 ThreadTile1: 5 - ThreadTileA: 40 + ThreadTileA: 12 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -486818,23 +486035,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -486855,7 +486072,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -486866,12 +486083,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -486882,44 +486099,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -486928,14 +486145,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -486950,20 +486167,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -487049,8 +486266,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1865 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 1862 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -487058,17 +486275,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -487079,21 +486296,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -487116,7 +486333,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -487132,7 +486349,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -487143,68 +486360,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_2_NTB0_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -487212,19 +486429,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 3 - NumLoadsB: 5 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -487310,8 +486527,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1866 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 1863 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -487319,17 +486536,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -487340,21 +486557,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -487377,7 +486594,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -487389,11 +486606,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -487404,44 +486621,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 LSPB: 16 - LVCA: 16 + LVCA: 64 LVCB: 16 - LVPA: 8 - LVPB: 8 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31104 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31104 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -487449,15 +486666,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -487473,19 +486690,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 16 - NumLoadsB: 13 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -487571,8 +486788,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1867 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 1864 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -487580,17 +486797,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -487601,21 +486818,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -487638,7 +486855,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -487649,12 +486866,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -487665,44 +486882,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SVW1_VWA1_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -487710,15 +486927,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 16 + MacroTile1: 160 + MacroTileA: 16 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -487734,19 +486951,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -487832,8 +487049,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1868 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 1865 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -487841,17 +487058,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -487862,21 +487079,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -487899,7 +487116,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -487910,12 +487127,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -487926,44 +487143,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -487971,15 +487188,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -487994,20 +487211,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -488093,8 +487310,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1869 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 1866 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -488102,17 +487319,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -488123,21 +487340,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -488160,7 +487377,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -488176,7 +487393,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -488187,44 +487404,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SVW1_VWA1_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -488232,15 +487449,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 160 + MacroTileA: 16 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -488255,20 +487472,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -488354,8 +487571,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1870 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM16 + SolutionIndex: 1867 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -488363,17 +487580,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -488384,21 +487601,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -488421,7 +487638,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -488432,7 +487649,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -488448,45 +487665,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_NTC0_NTD0_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_6_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -488494,22 +487711,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 32 MacroTile1: 192 - MacroTileA: 320 + MacroTileA: 32 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -488522,14 +487739,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -488615,8 +487832,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1871 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 1868 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_6_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -488625,16 +487842,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 6 + ThreadTileA: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -488651,15 +487868,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -488682,7 +487899,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -488693,12 +487910,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -488709,44 +487926,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_NTC0_NTD0_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27520 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27520 - LdsOffsetMetadata_Blk: 49408 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -488755,13 +487972,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 + MIWaveTile: [1, 5] + MIWaveTileA: 1 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 32 MacroTile1: 160 - MacroTileA: 256 + MacroTileA: 32 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -488783,13 +488000,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 + NumElementsPerThread: 20 NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 + NumLoadsA: 2 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -488876,8 +488093,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1872 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 1869 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -488885,16 +488102,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 4 ThreadTile1: 5 - ThreadTileA: 32 + ThreadTileA: 4 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -488906,21 +488123,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -488943,7 +488160,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -488954,7 +488171,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -488970,88 +488187,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] + MIWaveGroup: [1, 4] + MIWaveTile: [3, 3] MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 48 + MacroTile1: 192 + MacroTileA: 48 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -489137,8 +488354,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1873 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 1870 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -489153,10 +488370,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -489173,15 +488390,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -489204,7 +488421,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -489215,12 +488432,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -489231,44 +488448,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_6_NTB0_PLR1_SVW1_VWA1_WG16_8_2 + LSCA: 128 + LSCB: 128 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 8 - LVPB: 8 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31104 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31104 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -489276,15 +488493,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -489300,19 +488517,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 16 - NumLoadsB: 13 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -489398,26 +488615,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1874 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 1871 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_6_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 4 + ThreadTile1: 6 + ThreadTileA: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -489428,27 +488645,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -489465,7 +488682,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -489476,12 +488693,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -489492,44 +488709,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -489538,13 +488755,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 320 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -489560,20 +488777,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -489659,25 +488876,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1875 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 + SolutionIndex: 1872 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -489689,27 +488906,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -489726,7 +488943,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -489737,12 +488954,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -489753,44 +488970,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 8 - LVPB: 8 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31872 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31872 - LdsOffsetMetadata_Blk: 49408 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -489798,15 +489015,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 32 + MacroTile1: 192 + MacroTileA: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -489822,19 +489039,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 16 - NumLoadsB: 14 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -489920,26 +489137,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1876 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 1873 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -489950,27 +489167,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -489987,7 +489204,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -490003,7 +489220,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -490014,88 +489231,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 32 MacroTile1: 192 - MacroTileA: 320 + MacroTileA: 32 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -490181,25 +489398,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1877 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 1874 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -490211,27 +489428,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -490259,7 +489476,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -490275,12 +489492,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT1_1_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 - LSPA: 16 + LSPA: 4 LSPB: 16 - LVCA: 16 + LVCA: 64 LVCB: 16 LVPA: 2 LVPB: 2 @@ -490288,32 +489505,32 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 8 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 + LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -490321,22 +489538,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 128 - MacroTileA: 32 - MacroTileB: 128 + MacroTile0: 48 + MacroTile1: 192 + MacroTileA: 48 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -490349,14 +489566,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -490442,8 +489659,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1878 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT1_1_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1875 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -490452,16 +489669,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -490478,7 +489695,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -490536,7 +489753,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_2_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB4_SVW1_VWA1_WG64_4_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -490549,19 +489766,19 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -490581,15 +489798,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [1, 7] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 112 + MacroTileA: 64 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -490610,14 +489827,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -490703,8 +489920,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1879 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_2_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1876 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -490713,16 +489930,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 7 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -490739,7 +489956,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -490797,7 +490014,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT1_1_NTB4_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB4_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -490810,32 +490027,32 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 + LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -490843,22 +490060,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 80 MacroTile1: 128 - MacroTileA: 32 + MacroTileA: 80 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -490871,13 +490088,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 5 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -490964,8 +490181,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1880 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT1_1_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1877 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -490974,16 +490191,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 2 + ThreadTileA: 20 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -491000,7 +490217,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -491031,7 +490248,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -491042,9 +490259,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -491058,32 +490275,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 7680 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -491092,8 +490309,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -491104,14 +490321,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 320 - MacroTileA: 48 - MacroTileB: 320 + MacroTile0: 80 + MacroTile1: 128 + MacroTileA: 80 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -491132,14 +490349,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 10 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -491225,8 +490442,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1881 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1878 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -491241,10 +490458,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 2 + ThreadTileA: 20 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -491265,11 +490482,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -491308,7 +490525,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -491319,7 +490536,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB4_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_NTB0_SVW2_VWA2_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -491328,23 +490545,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 13824 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -491365,13 +490582,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 + MIWaveTile: [6, 2] + MIWaveTileA: 6 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 96 MacroTile1: 128 - MacroTileA: 48 + MacroTileA: 96 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -491387,19 +490604,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 + NumElementsPerThread: 48 NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 + NumLoadsA: 6 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -491486,8 +490703,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1882 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1879 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -491495,16 +490712,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 24 ThreadTile1: 2 - ThreadTileA: 12 + ThreadTileA: 24 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -491516,7 +490733,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -491553,7 +490770,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -491564,12 +490781,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -491580,32 +490797,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_2_NTB0_PLR1_SVW2_VWA2_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -491614,8 +490831,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -491626,13 +490843,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 + MIWaveTile: [7, 2] + MIWaveTileA: 7 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 112 MacroTile1: 128 - MacroTileA: 32 + MacroTileA: 112 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -491648,20 +490865,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 14 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -491747,8 +490964,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1883 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1880 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -491756,16 +490973,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 28 ThreadTile1: 2 - ThreadTileA: 8 + ThreadTileA: 28 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -491777,7 +490994,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -491788,10 +491005,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -491814,7 +491031,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -491827,7 +491044,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -491841,32 +491058,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -491875,10 +491092,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -491887,14 +491104,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -491915,13 +491132,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 12 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularA: 14 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -492008,8 +491225,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1884 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1881 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -492024,10 +491241,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -492048,11 +491265,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -492102,7 +491319,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 4 @@ -492115,29 +491332,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -492147,15 +491364,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -492176,14 +491393,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -492269,8 +491486,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1885 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1882 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -492279,16 +491496,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -492305,7 +491522,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -492336,7 +491553,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -492347,9 +491564,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -492363,32 +491580,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -492397,10 +491614,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -492408,15 +491625,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -492437,14 +491654,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -492530,8 +491747,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1886 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1883 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -492540,16 +491757,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -492566,15 +491783,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -492613,7 +491830,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -492624,7 +491841,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 4 @@ -492633,33 +491850,33 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -492669,14 +491886,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 64 MacroTile1: 160 - MacroTileA: 16 + MacroTileA: 64 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -492692,19 +491909,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 4 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 16 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -492791,8 +492008,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1887 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1884 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -492800,16 +492017,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 5 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -492821,13 +492038,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -492874,7 +492091,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -492885,7 +492102,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_6_NTB0_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -492894,23 +492111,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -492931,14 +492148,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 160 + MacroTileA: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -492953,20 +492170,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -493052,8 +492269,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1888 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_6_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1885 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -493061,17 +492278,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -493082,7 +492299,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -493119,7 +492336,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -493130,7 +492347,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -493146,32 +492363,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -493180,8 +492397,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -493191,15 +492408,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 80 + MacroTile1: 256 + MacroTileA: 80 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -493220,14 +492437,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -493313,8 +492530,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1889 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_5_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1886 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -493323,16 +492540,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -493349,15 +492566,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -493380,7 +492597,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -493393,7 +492610,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -493407,44 +492624,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -493453,14 +492670,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 192 - MacroTileA: 48 - MacroTileB: 192 + MacroTile0: 80 + MacroTile1: 320 + MacroTileA: 80 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -493481,14 +492698,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 - NumLoadsB: 12 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -493574,8 +492791,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1890 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1887 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -493590,10 +492807,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -493614,11 +492831,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -493641,7 +492858,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -493652,7 +492869,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -493668,37 +492885,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_6_NTB0_PLR1_SVW1_VWA1_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -493713,15 +492930,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 160 + MacroTileA: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -493742,14 +492959,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -493835,8 +493052,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1891 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_6_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 1888 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -493845,16 +493062,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 6 - ThreadTileA: 4 - ThreadTileB: 6 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -493871,15 +493088,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -493902,7 +493119,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -493913,12 +493130,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -493929,32 +493146,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -493963,10 +493180,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -493975,14 +493192,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -494003,14 +493220,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -494096,8 +493313,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1892 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1889 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -494105,17 +493322,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -494126,7 +493343,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -494136,11 +493353,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -494163,7 +493380,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -494174,12 +493391,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -494190,22 +493407,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_PLR1_SVW2_VWA2_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -494214,7 +493431,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 @@ -494224,8 +493441,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -494236,14 +493453,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -494264,14 +493481,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -494357,8 +493574,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1893 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1890 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -494366,17 +493583,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -494387,7 +493604,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -494398,10 +493615,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -494424,7 +493641,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -494435,12 +493652,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -494451,44 +493668,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_PLR1_SVW2_VWA2_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 61312 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61312 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -494497,14 +493714,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 192 - MacroTileA: 32 - MacroTileB: 192 + MacroTile0: 112 + MacroTile1: 320 + MacroTileA: 112 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -494525,14 +493742,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 14 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -494618,8 +493835,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1894 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTB4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1891 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -494627,17 +493844,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -494648,7 +493865,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -494658,11 +493875,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -494685,7 +493902,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -494697,7 +493914,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -494712,42 +493929,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV1_MIWT5_3_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 LSPB: 16 - LVCA: 64 + LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 18560 + LdsNumElementsAlignedA: 5504 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 5504 + LdsOffsetB_Blk: 38272 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 - LdsOffsetMetadata_Blk: 78208 + LdsOffsetMetadata: 18560 + LdsOffsetMetadata_Blk: 38272 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -494758,13 +493975,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveTile: [5, 3] + MIWaveTileA: 5 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 80 MacroTile1: 192 - MacroTileA: 48 + MacroTileA: 80 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -494786,13 +494003,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularA: 5 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -494879,8 +494096,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1895 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1892 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV1_MIWT5_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -494895,9 +494112,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 20 ThreadTile1: 3 - ThreadTileA: 12 + ThreadTileA: 20 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -494920,10 +494137,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -494946,7 +494163,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -494973,32 +494190,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB4_SVW1_VWA1_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -495007,10 +494224,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -495018,15 +494235,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 8] + MIWaveTileA: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 112 - MacroTileA: 64 - MacroTileB: 112 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -495041,20 +494258,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -495140,8 +494357,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1896 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x112x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1893 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -495150,16 +494367,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 7 - ThreadTileA: 4 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -495176,15 +494393,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -495207,7 +494424,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -495218,7 +494435,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -495234,32 +494451,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB4_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -495268,8 +494485,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -495279,15 +494496,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 6] + MIWaveTileA: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 128 - MacroTileA: 80 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -495308,14 +494525,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 12 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -495401,8 +494618,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1897 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1894 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -495411,16 +494628,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 2 - ThreadTileA: 20 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 6 + ThreadTileA: 12 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -495437,15 +494654,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -495468,7 +494685,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -495479,7 +494696,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -495495,32 +494712,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -495529,8 +494746,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -495541,14 +494758,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTile: [7, 3] + MIWaveTileA: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 128 - MacroTileA: 80 - MacroTileB: 128 + MacroTile0: 112 + MacroTile1: 192 + MacroTileA: 112 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -495563,20 +494780,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 14 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -495662,8 +494879,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1898 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT5_2_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1895 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -495678,10 +494895,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 2 - ThreadTileA: 20 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 3 + ThreadTileA: 28 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -495703,10 +494920,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -495729,7 +494946,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -495741,7 +494958,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -495756,32 +494973,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_NTB0_SVW2_VWA2_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 36352 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 + LdsOffsetMetadata: 36352 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -495790,8 +495007,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -495801,15 +495018,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 128 - MacroTileA: 96 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 112 + MacroTileA: 128 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -495825,19 +495042,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -495923,8 +495140,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1899 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1896 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -495933,16 +495150,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 2 - ThreadTileA: 24 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -495959,15 +495176,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -496001,12 +495218,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -496017,32 +495234,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -496054,7 +495271,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -496063,14 +495280,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 2] - MIWaveTileA: 7 - MIWaveTileB: 2 + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 128 - MacroTileA: 112 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -496085,20 +495302,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 14 - NumLoadsB: 4 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -496184,8 +495401,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1900 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_2_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1897 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -496193,17 +495410,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 2 - ThreadTileA: 28 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -496214,7 +495431,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -496264,7 +495481,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -496278,7 +495495,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -496291,19 +495508,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -496315,7 +495532,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -496323,15 +495540,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -496347,19 +495564,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 8 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 12 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -496445,8 +495662,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1901 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1898 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -496455,16 +495672,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -496481,11 +495698,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -496512,7 +495729,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -496524,7 +495741,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -496539,32 +495756,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -496573,8 +495790,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -496584,15 +495801,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] + MIWaveGroup: [4, 1] + MIWaveTile: [3, 7] MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 128 - MacroTileA: 96 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 112 + MacroTileA: 192 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -496607,20 +495824,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 NumLoadsA: 24 - NumLoadsB: 8 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -496706,8 +495923,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1902 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1899 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -496716,16 +495933,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 4 + ThreadTile1: 7 ThreadTileA: 12 - ThreadTileB: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -496742,17 +495959,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -496784,9 +496001,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -496800,12 +496017,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -496813,19 +496030,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -496837,7 +496054,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -496845,15 +496062,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -496868,20 +496085,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 8 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -496967,8 +496184,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1903 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1900 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -496977,16 +496194,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -497003,11 +496220,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -497034,7 +496251,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -497046,11 +496263,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -497061,32 +496278,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -497095,8 +496312,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -497106,15 +496323,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 112 + MacroTileA: 192 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -497135,14 +496352,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 10 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -497228,8 +496445,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1904 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1901 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -497237,17 +496454,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -497258,23 +496475,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -497295,7 +496512,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -497307,11 +496524,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -497322,44 +496539,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTB4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 60288 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 32640 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60288 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -497367,15 +496584,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 15] + MIWaveTileA: 3 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 160 - MacroTileA: 64 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 240 + MacroTileA: 192 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -497396,14 +496613,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 6 + NumLoadsB: 30 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 30 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -497489,8 +496706,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1905 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x160x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1902 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -497498,17 +496715,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 15 + ThreadTileA: 12 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -497519,23 +496736,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -497567,7 +496784,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -497583,12 +496800,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT1_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -497596,55 +496813,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 256 - MacroTileA: 80 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -497652,19 +496869,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -497750,8 +496967,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1906 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1903 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT1_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -497760,16 +496977,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -497786,7 +497003,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -497828,12 +497045,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -497844,32 +497061,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -497889,15 +497106,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 320 - MacroTileA: 80 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -497912,20 +497129,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 10 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -498011,8 +497228,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1907 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1904 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -498020,17 +497237,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -498041,17 +497258,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -498089,12 +497306,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -498105,32 +497322,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -498142,7 +497359,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -498151,14 +497368,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 160 - MacroTileA: 96 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -498179,14 +497396,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -498272,8 +497489,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1908 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1905 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -498281,17 +497498,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -498302,7 +497519,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -498350,12 +497567,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -498366,32 +497583,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -498403,7 +497620,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -498411,15 +497628,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -498435,19 +497652,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 10 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -498533,8 +497750,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1909 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1906 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -498542,16 +497759,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 16 ThreadTile1: 5 - ThreadTileA: 24 + ThreadTileA: 16 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -498563,17 +497780,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -498611,12 +497828,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -498627,32 +497844,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 38912 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 38912 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -498672,15 +497889,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -498695,20 +497912,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 10 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -498794,8 +498011,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1910 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1907 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -498803,17 +498020,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -498824,13 +498041,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -498874,7 +498091,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -498888,7 +498105,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -498901,23 +498118,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61312 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61312 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -498933,15 +498150,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 320 - MacroTileA: 112 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -498956,20 +498173,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 14 - NumLoadsB: 10 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 20 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -499055,8 +498272,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1911 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1908 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -499065,16 +498282,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -499091,11 +498308,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -499122,7 +498339,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -499135,7 +498352,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -499149,32 +498366,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV1_MIWT5_3_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 18560 - LdsNumElementsAlignedA: 5504 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 5504 - LdsOffsetB_Blk: 38272 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 18560 - LdsOffsetMetadata_Blk: 38272 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -499183,10 +498400,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -499194,15 +498411,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [5, 9] MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 192 - MacroTileA: 80 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -499218,19 +498435,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 12 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -499316,8 +498533,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1912 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV1_MIWT5_3_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1909 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -499326,16 +498543,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 - ThreadTile1: 3 + ThreadTile1: 9 ThreadTileA: 20 - ThreadTileB: 3 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -499352,17 +498569,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -499394,9 +498611,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -499410,36 +498627,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 80896 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -499456,14 +498673,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -499478,20 +498695,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -499577,8 +498794,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1913 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1910 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -499593,10 +498810,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -499617,13 +498834,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -499660,7 +498877,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -499671,7 +498888,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -499680,23 +498897,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 15360 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -499708,7 +498925,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -499717,13 +498934,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 6] - MIWaveTileA: 3 + MIWaveTile: [6, 6] + MIWaveTileA: 6 MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 96 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -499739,19 +498956,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 + NumElementsPerThread: 144 NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 12 + NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -499838,8 +499055,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1914 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_6_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1911 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -499847,16 +499064,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 24 ThreadTile1: 6 - ThreadTileA: 12 + ThreadTileA: 24 ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true @@ -499868,7 +499085,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -499917,7 +499134,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -499932,32 +499149,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -499969,7 +499186,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -499977,15 +499194,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 3] - MIWaveTileA: 7 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 192 - MacroTileA: 112 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 144 + MacroTileA: 192 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -500000,20 +499217,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 14 - NumLoadsB: 6 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -500099,8 +499316,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1915 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 1912 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -500109,16 +499326,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 3 - ThreadTileA: 28 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -500135,7 +499352,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -500145,7 +499362,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -500177,12 +499394,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -500193,32 +499410,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36352 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36352 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -500230,7 +499447,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -500239,14 +499456,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 112 - MacroTileA: 128 - MacroTileB: 112 + MacroTile0: 192 + MacroTile1: 144 + MacroTileA: 192 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -500261,20 +499478,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 14 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -500360,8 +499577,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1916 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x112x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1913 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -500369,17 +499586,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -500390,7 +499607,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -500406,7 +499623,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -500438,7 +499655,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -500454,12 +499671,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -500467,19 +499684,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 32256 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 32256 + LdsOffsetB_Blk: 97792 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 97792 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -500500,13 +499717,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 + MIWaveTile: [14, 3] + MIWaveTileA: 14 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 224 MacroTile1: 192 - MacroTileA: 160 + MacroTileA: 224 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -500528,13 +499745,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 28 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularA: 28 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -500621,8 +499838,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1917 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1914 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -500637,9 +499854,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 56 ThreadTile1: 3 - ThreadTileA: 40 + ThreadTileA: 56 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -500699,12 +499916,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -500715,32 +499932,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -500752,7 +499969,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -500761,14 +499978,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -500789,14 +500006,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 12 - NumLoadsB: 7 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -500882,8 +500099,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1918 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1915 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -500891,17 +500108,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -500912,7 +500129,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -500976,7 +500193,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -500989,23 +500206,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -501013,7 +500230,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -501021,15 +500238,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 112 - MacroTileA: 192 - MacroTileB: 112 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -501050,14 +500267,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 14 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 28 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -501143,8 +500360,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1919 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1916 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -501153,16 +500370,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -501179,7 +500396,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -501226,7 +500443,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -501237,7 +500454,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -501246,23 +500463,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -501282,15 +500499,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 10] + MIWaveTileA: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 224 - MacroTileA: 96 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -501306,19 +500523,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 3 - NumLoadsB: 7 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -501404,8 +500621,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1920 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1917 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -501413,17 +500630,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 10 + ThreadTileA: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -501434,13 +500651,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -501483,11 +500700,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -501498,32 +500715,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC0_NTD0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -501543,15 +500760,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 112 - MacroTileA: 192 - MacroTileB: 112 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -501566,20 +500783,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 14 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -501665,8 +500882,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1921 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1918 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -501674,17 +500891,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -501695,13 +500912,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -501711,7 +500928,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -501743,12 +500960,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -501759,36 +500976,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTB4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60288 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 32640 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60288 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -501804,15 +501021,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 15] - MIWaveTileA: 3 - MIWaveTileB: 15 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 240 - MacroTileA: 192 - MacroTileB: 240 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -501827,20 +501044,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 6 - NumLoadsB: 30 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 30 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -501926,8 +501143,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1922 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1919 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -501935,17 +501152,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 15 - ThreadTileA: 12 - ThreadTileB: 15 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -501956,23 +501173,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -502009,7 +501226,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -502020,7 +501237,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT1_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -502029,79 +501246,79 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -502187,8 +501404,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1923 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT1_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 1920 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -502196,17 +501413,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -502217,13 +501434,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -502270,7 +501487,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -502281,7 +501498,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -502290,23 +501507,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -502327,14 +501544,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -502349,20 +501566,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -502448,8 +501665,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1924 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1921 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -502457,17 +501674,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -502478,7 +501695,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -502526,12 +501743,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -502542,36 +501759,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -502588,14 +501805,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -502616,14 +501833,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 28 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -502709,8 +501926,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1925 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1922 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -502718,17 +501935,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -502739,7 +501956,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -502755,7 +501972,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -502787,12 +502004,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -502803,88 +502020,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC3_NTD3_SVW1_VWA1_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 6] + MIWaveTileA: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 128 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 20 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 16 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -502970,8 +502187,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1926 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1923 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -502979,7 +502196,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -502987,9 +502204,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 5 + ThreadTile1: 6 ThreadTileA: 16 - ThreadTileB: 5 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -503000,13 +502217,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -503053,7 +502270,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -503064,7 +502281,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTB4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -503073,23 +502290,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38912 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 47616 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38912 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -503101,7 +502318,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -503109,15 +502326,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 8] - MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 3] + MIWaveTileA: 8 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -503138,14 +502355,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -503231,8 +502448,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1927 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1924 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -503240,17 +502457,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 8 - ThreadTileA: 8 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -503261,13 +502478,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -503314,7 +502531,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -503325,7 +502542,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC0_NTD0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -503334,23 +502551,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 25600 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -503370,10 +502587,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 160 MacroTile1: 192 @@ -503393,14 +502610,14 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 20 NumLoadsB: 6 NumLoadsCoalescedA: 1 @@ -503492,8 +502709,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1928 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1925 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -503501,17 +502718,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -503522,13 +502739,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -503571,8 +502788,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -503586,36 +502803,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -503632,14 +502849,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] + MIWaveTile: [5, 6] MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 288 + MacroTile1: 192 MacroTileA: 160 - MacroTileB: 288 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -503654,20 +502871,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 NumLoadsA: 20 - NumLoadsB: 36 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -503753,8 +502970,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1929 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1926 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -503770,9 +502987,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 - ThreadTile1: 9 + ThreadTile1: 6 ThreadTileA: 20 - ThreadTileB: 9 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -503793,13 +503010,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -503831,12 +503048,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -503847,36 +503064,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC0_NTD0_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -503892,15 +503109,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -503915,20 +503132,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 - NumLoadsB: 36 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -504014,8 +503231,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1930 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1927 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -504023,17 +503240,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -504044,23 +503261,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -504097,7 +503314,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -504108,7 +503325,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -504117,23 +503334,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 26112 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 91648 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -504153,10 +503370,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 MacroTile1: 192 @@ -504183,7 +503400,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 @@ -504275,8 +503492,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1931 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1928 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -504284,17 +503501,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -504305,13 +503522,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -504354,11 +503571,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -504369,32 +503586,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -504414,15 +503631,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 144 + MacroTile1: 192 MacroTileA: 192 - MacroTileB: 144 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -504437,20 +503654,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 NumLoadsA: 24 - NumLoadsB: 18 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -504536,8 +503753,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1932 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1929 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -504545,17 +503762,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -504566,13 +503783,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -504582,7 +503799,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -504614,12 +503831,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -504630,32 +503847,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 32256 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 32256 + LdsOffsetB_Blk: 97792 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 97792 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -504675,15 +503892,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 144 - MacroTileA: 192 - MacroTileB: 144 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -504698,20 +503915,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 18 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -504797,8 +504014,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1933 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1930 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -504806,17 +504023,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -504827,13 +504044,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -504843,7 +504060,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -504875,12 +504092,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -504891,32 +504108,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 32256 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32256 - LdsOffsetB_Blk: 97792 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 97792 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -504936,15 +504153,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -504965,14 +504182,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 28 - NumLoadsB: 6 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -505058,8 +504275,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1934 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1931 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -505067,17 +504284,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -505088,13 +504305,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -505136,7 +504353,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -505152,12 +504369,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -505165,9 +504382,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -505176,7 +504393,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -505198,14 +504415,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] + MIWaveTile: [4, 7] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 288 + MacroTile1: 224 MacroTileA: 128 - MacroTileB: 288 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -505226,14 +504443,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 16 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -505319,8 +504536,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1935 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1932 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -505336,9 +504553,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 9 + ThreadTile1: 7 ThreadTileA: 16 - ThreadTileB: 9 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -505402,7 +504619,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -505413,7 +504630,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -505422,27 +504639,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -505458,15 +504675,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 112 + MacroTileA: 256 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -505487,14 +504704,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 28 - NumLoadsB: 24 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -505580,8 +504797,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1936 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1933 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -505589,17 +504806,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -505610,13 +504827,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -505658,12 +504875,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -505674,32 +504891,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -505711,7 +504928,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -505719,15 +504936,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 10] - MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -505743,19 +504960,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -505841,8 +505058,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1937 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1934 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -505850,17 +505067,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 10 - ThreadTileA: 8 - ThreadTileB: 10 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -505871,13 +505088,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -505919,12 +505136,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -505935,32 +505152,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -505972,7 +505189,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -505981,14 +505198,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -506004,19 +505221,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 5 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -506102,8 +505319,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1938 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1935 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -506111,17 +505328,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -506132,7 +505349,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -506196,7 +505413,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -506209,19 +505426,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -506241,15 +505458,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -506270,14 +505487,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 6 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -506363,8 +505580,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1939 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1936 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -506373,16 +505590,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -506399,7 +505616,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -506441,8 +505658,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -506457,32 +505674,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -506502,15 +505719,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -506525,20 +505742,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 6 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -506624,8 +505841,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1940 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1937 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -506634,16 +505851,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -506660,7 +505877,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -506670,7 +505887,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -506718,7 +505935,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -506731,9 +505948,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 + LdsNumBytes: 63488 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -506742,7 +505959,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 + LdsOffsetMetadata: 63488 LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 @@ -506764,14 +505981,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] + MIWaveTile: [6, 7] MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 192 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -506792,14 +506009,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 NumLoadsA: 6 - NumLoadsB: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -506885,8 +506102,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1941 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1938 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -506902,9 +506119,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 6 + ThreadTile1: 7 ThreadTileA: 24 - ThreadTileB: 6 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -506952,7 +506169,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -506964,11 +506181,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -506979,42 +506196,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 33664 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata: 33664 + LdsOffsetMetadata_Blk: 80768 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -507024,15 +506241,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 224 - MacroTile1: 192 + MacroTile1: 256 MacroTileA: 224 - MacroTileB: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -507048,19 +506265,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 28 - NumLoadsB: 24 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -507146,8 +506363,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1942 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1939 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -507155,17 +506372,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -507176,23 +506393,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -507225,7 +506442,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -507240,88 +506457,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC3_NTD3_SVW1_VWA1_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 6] - MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 16 - NumLoadsB: 6 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 28 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -507407,8 +506624,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1943 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT1_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG128_2_1_WGM1 + SolutionIndex: 1940 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -507423,10 +506640,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -507443,7 +506660,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -507453,7 +506670,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -507485,12 +506702,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -507501,36 +506718,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTB4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47616 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -507546,15 +506763,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 3] - MIWaveTileA: 8 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -507570,19 +506787,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 28 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -507668,8 +506885,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1944 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 1941 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -507677,17 +506894,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -507698,13 +506915,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -507714,7 +506931,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -507746,12 +506963,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -507762,32 +506979,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC0_NTD0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -507807,15 +507024,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -507830,20 +507047,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 6 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -507929,8 +507146,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1945 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1942 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -507938,17 +507155,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -507959,13 +507176,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -508012,7 +507229,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -508023,7 +507240,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -508032,23 +507249,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -508068,15 +507285,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -508091,20 +507308,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 20 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -508190,8 +507407,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1946 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1943 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -508199,17 +507416,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -508220,13 +507437,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -508236,7 +507453,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -508268,7 +507485,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -508284,12 +507501,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC0_NTD0_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 @@ -508297,19 +507514,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 91648 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -508329,15 +507546,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 144 + MacroTileA: 256 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -508352,20 +507569,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 144 NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 24 + NumLoadsA: 32 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -508451,8 +507668,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1947 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1944 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -508461,16 +507678,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -508487,7 +507704,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -508497,7 +507714,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -508518,7 +507735,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -508534,7 +507751,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -508545,34 +507762,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 39168 + LdsNumElementsAlignedA: 11520 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 11520 + LdsOffsetB_Blk: 77056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 39168 + LdsOffsetMetadata_Blk: 77056 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -508580,10 +507797,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -508591,22 +507808,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 + MIWaveTile: [5, 3] + MIWaveTileA: 5 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 384 + MacroTileA: 160 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -508619,13 +507836,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 24 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 10 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularA: 10 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -508712,8 +507929,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1948 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT12_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1945 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -508721,16 +507938,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 80 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 80 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -508742,21 +507959,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -508791,11 +508008,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -508806,36 +508023,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB0_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -508851,15 +508068,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -508874,20 +508091,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -508973,8 +508190,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1949 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1946 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -508982,17 +508199,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -509003,13 +508220,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -509019,7 +508236,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -509051,12 +508268,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -509067,36 +508284,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 32256 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32256 - LdsOffsetB_Blk: 97792 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 97792 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -509112,15 +508329,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -509135,20 +508352,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 6 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -509234,8 +508451,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1950 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT14_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1947 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -509243,17 +508460,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -509264,13 +508481,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -509280,7 +508497,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -509301,7 +508518,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -509312,12 +508529,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -509328,42 +508545,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 35968 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35968 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -509373,15 +508590,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 384 + MacroTile1: 144 + MacroTileA: 384 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -509402,14 +508619,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -509495,8 +508712,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1951 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1948 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -509504,17 +508721,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -509525,21 +508742,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -509574,11 +508791,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -509589,36 +508806,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -509635,14 +508852,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -509663,14 +508880,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 16 - NumLoadsB: 7 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -509756,8 +508973,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1952 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1949 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -509765,17 +508982,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -509786,7 +509003,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -509802,7 +509019,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -509839,7 +509056,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -509850,7 +509067,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -509859,27 +509076,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52736 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52736 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -509895,15 +509112,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 112 - MacroTileA: 256 - MacroTileB: 112 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -509919,19 +509136,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 14 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -510017,8 +509234,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1953 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1950 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -510026,17 +509243,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -510047,13 +509264,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -510096,7 +509313,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -510111,36 +509328,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -510157,14 +509374,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -510185,14 +509402,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -510278,8 +509495,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1954 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1951 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -510294,10 +509511,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -510324,7 +509541,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -510356,8 +509573,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -510372,36 +509589,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -510418,14 +509635,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -510440,20 +509657,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -510539,8 +509756,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1955 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1952 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -510555,10 +509772,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -510585,7 +509802,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -510618,11 +509835,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -510633,36 +509850,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -510679,14 +509896,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -510701,20 +509918,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 7 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -510800,8 +510017,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1956 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1953 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -510809,17 +510026,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -510830,7 +510047,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -510846,7 +510063,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -510878,12 +510095,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -510894,32 +510111,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -510939,15 +510156,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -510962,20 +510179,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -511061,8 +510278,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1957 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1954 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -511070,17 +510287,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -511091,13 +510308,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -511107,7 +510324,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -511139,12 +510356,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -511155,32 +510372,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -511200,15 +510417,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -511229,14 +510446,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -511322,8 +510539,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1958 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1955 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -511331,17 +510548,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -511352,13 +510569,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -511368,7 +510585,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -511389,7 +510606,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -511401,7 +510618,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -511416,42 +510633,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33664 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33664 - LdsOffsetMetadata_Blk: 80768 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 107776 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -511461,15 +510678,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -511490,14 +510707,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 4 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -511583,8 +510800,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1959 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 1956 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -511593,16 +510810,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -511619,17 +510836,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -511662,11 +510879,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -511677,34 +510894,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 107776 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -511723,14 +510940,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -511746,19 +510963,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 28 - NumLoadsB: 28 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -511844,8 +511061,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1960 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1957 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -511853,17 +511070,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -511874,7 +511091,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -511927,7 +511144,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -511938,7 +511155,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -511947,23 +511164,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 107776 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -511984,14 +511201,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -512012,14 +511229,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 28 - NumLoadsB: 28 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -512105,8 +511322,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1961 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1958 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -512114,17 +511331,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -512135,7 +511352,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -512172,7 +511389,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -512183,8 +511400,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -512199,42 +511416,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 36224 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 36224 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -512245,14 +511462,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 384 + MacroTile1: 160 + MacroTileA: 384 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -512268,19 +511485,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -512366,8 +511583,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1962 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1959 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -512382,10 +511599,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -512407,10 +511624,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -512433,7 +511650,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -512444,12 +511661,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -512460,42 +511677,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW4_MIWT6_10_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -512505,15 +511722,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 10] + MIWaveTileA: 6 MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -512529,18 +511746,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 32 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 3 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -512627,8 +511844,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1963 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1960 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW4_MIWT6_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -512636,16 +511853,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 24 ThreadTile1: 10 - ThreadTileA: 16 + ThreadTileA: 24 ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true @@ -512657,23 +511874,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -512694,7 +511911,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -512705,12 +511922,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -512721,42 +511938,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT6_10_NTB4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 38528 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 38528 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -512767,14 +511984,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [6, 10] + MIWaveTileA: 6 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 384 + MacroTile1: 160 + MacroTileA: 384 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -512795,14 +512012,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 32 - NumLoadsB: 18 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 6 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -512888,8 +512105,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1964 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1961 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT6_10_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -512897,17 +512114,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 10 + ThreadTileA: 24 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -512918,7 +512135,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -512929,12 +512146,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -512967,11 +512184,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -512982,68 +512199,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_10_NTB0_NTC0_NTD0_SVW4_VWA4_WG64_4_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 39168 - LdsNumElementsAlignedA: 11520 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 27776 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 11520 - LdsOffsetB_Blk: 77056 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 39168 - LdsOffsetMetadata_Blk: 77056 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 27776 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 384 - MacroTileA: 160 - MacroTileB: 384 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -513051,19 +512268,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 10 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 16 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -513149,8 +512366,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1965 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1962 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -513158,17 +512375,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -513179,13 +512396,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -513232,7 +512449,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -513243,7 +512460,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB0_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB0_NTC0_NTD0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -513252,27 +512469,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -513289,14 +512506,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -513312,19 +512529,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 32 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -513410,8 +512627,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1966 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1963 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -513419,17 +512636,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -513440,7 +512657,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -513493,7 +512710,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -513504,7 +512721,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -513513,27 +512730,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -513550,14 +512767,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -513573,19 +512790,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 32 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -513671,8 +512888,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1967 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 1964 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -513680,17 +512897,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -513701,7 +512918,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -513738,7 +512955,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -513749,12 +512966,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -513765,42 +512982,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35968 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35968 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -513811,14 +513028,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 144 - MacroTileA: 384 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -513839,14 +513056,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 9 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -513932,8 +513149,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1968 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1965 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -513941,17 +513158,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -513962,7 +513179,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -513973,10 +513190,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -514011,11 +513228,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -514026,45 +513243,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -514072,22 +513289,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -514100,14 +513317,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -514193,8 +513410,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1969 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1966 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -514202,17 +513419,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -514223,13 +513440,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -514271,12 +513488,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -514287,45 +513504,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -514333,22 +513550,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -514356,19 +513573,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -514454,8 +513671,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1970 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1967 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -514463,17 +513680,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -514484,13 +513701,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -514500,7 +513717,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -514521,7 +513738,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -514533,11 +513750,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -514548,42 +513765,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -514593,15 +513810,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -514622,14 +513839,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -514715,8 +513932,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1971 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1968 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -514724,17 +513941,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -514745,23 +513962,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -514782,7 +513999,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -514793,12 +514010,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -514809,42 +514026,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW4_MIWT10_6_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -514855,14 +514072,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [10, 6] + MIWaveTileA: 10 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -514878,19 +514095,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -514976,8 +514193,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1972 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1969 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW4_MIWT10_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -514985,17 +514202,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 40 + ThreadTile1: 6 + ThreadTileA: 40 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -515006,7 +514223,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -515017,12 +514234,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -515054,8 +514271,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -515070,36 +514287,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -515116,14 +514333,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -515144,14 +514361,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -515237,8 +514454,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1973 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1970 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -515253,10 +514470,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -515283,7 +514500,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -515331,7 +514548,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -515344,19 +514561,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -515376,15 +514593,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -515399,20 +514616,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -515498,8 +514715,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1974 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1971 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -515508,16 +514725,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 10 + ThreadTile1: 9 ThreadTileA: 16 - ThreadTileB: 10 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -515534,7 +514751,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -515577,11 +514794,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -515592,36 +514809,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -515637,15 +514854,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -515660,20 +514877,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 28 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -515759,8 +514976,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1975 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1972 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -515768,17 +514985,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -515789,13 +515006,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -515837,8 +515054,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -515853,88 +515070,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_6_NTB4_NTC3_NTD3_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 20 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -516020,8 +515237,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1976 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1973 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -516036,10 +515253,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -516056,7 +515273,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -516066,7 +515283,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -516087,7 +515304,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -516099,11 +515316,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -516114,42 +515331,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 32128 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 107776 + LdsOffsetMetadata: 32128 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -516159,15 +515376,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 14] + MIWaveTileA: 4 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -516182,20 +515399,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 16 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -516281,26 +515498,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1977 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1974 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 14 + ThreadTileA: 16 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -516311,27 +515528,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -516348,7 +515565,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -516364,7 +515581,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -516375,32 +515592,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x336x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT3_21_SVW1_VWA1_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 35968 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 22912 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 78592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 107776 + LdsOffsetMetadata: 35968 + LdsOffsetMetadata_Blk: 78592 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -516409,8 +515626,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -516420,15 +515637,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 21] + MIWaveTileA: 3 + MIWaveTileB: 21 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 336 + MacroTileA: 192 + MacroTileB: 336 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -516443,20 +515660,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 20 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 12 + NumLoadsB: 21 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 21 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -516542,26 +515759,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1978 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1975 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x336x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT3_21_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 21 + ThreadTileA: 12 + ThreadTileB: 21 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -516572,27 +515789,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -516609,7 +515826,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -516620,8 +515837,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -516636,45 +515853,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36224 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36224 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -516682,22 +515899,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 160 - MacroTileA: 384 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -516705,19 +515922,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -516803,26 +516020,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1979 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1976 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -516839,21 +516056,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -516886,7 +516103,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -516897,7 +516114,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW4_MIWT6_10_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 64 @@ -516906,59 +516123,59 @@ LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 10] - MIWaveTileA: 6 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 512 + MacroTileA: 128 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -516966,19 +516183,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 3 - NumLoadsB: 5 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -517064,26 +516281,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1980 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW4_MIWT6_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1977 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 10 - ThreadTileA: 24 - ThreadTileB: 10 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -517094,14 +516311,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -517114,7 +516331,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -517142,12 +516359,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -517158,34 +516375,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT6_10_NTB4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_SVW8_VWA8_WG16_16_1 LSCA: 32 LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38528 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 35968 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 73856 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38528 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 35968 + LdsOffsetMetadata_Blk: 73856 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -517203,15 +516420,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 10] - MIWaveTileA: 6 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 160 - MacroTileA: 384 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 384 + MacroTileA: 128 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -517226,20 +516443,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 6 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -517325,26 +516542,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1981 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT6_10_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 1978 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 10 - ThreadTileA: 24 - ThreadTileB: 10 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -517355,14 +516572,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -517375,7 +516592,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -517392,7 +516609,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -517403,12 +516620,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -517419,68 +516636,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_10_NTB0_NTC0_NTD0_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27776 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27776 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -517488,19 +516705,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 16 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -517586,26 +516803,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1982 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1979 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -517616,27 +516833,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -517653,7 +516870,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -517665,7 +516882,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -517680,34 +516897,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB0_NTC0_NTD0_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -517715,33 +516932,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -517749,19 +516966,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 32 - NumLoadsB: 20 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -517847,26 +517064,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1983 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1980 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -517884,20 +517101,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -517925,12 +517142,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -517941,88 +517158,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 32 - NumLoadsB: 20 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -518108,26 +517325,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1984 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_10_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1981 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -518138,14 +517355,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -518154,11 +517371,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -518186,12 +517403,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -518202,36 +517419,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -518247,15 +517464,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 12] - MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -518271,19 +517488,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -518369,26 +517586,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1985 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1982 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 12 - ThreadTileA: 16 - ThreadTileB: 12 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -518399,14 +517616,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -518415,11 +517632,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -518436,7 +517653,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -518452,7 +517669,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -518463,68 +517680,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 33664 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 33664 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -518532,19 +517749,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -518630,26 +517847,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1986 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1983 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -518660,27 +517877,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -518708,12 +517925,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -518724,45 +517941,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -518770,42 +517987,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -518891,26 +518108,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1987 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 1984 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -518921,14 +518138,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -518937,11 +518154,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -518958,7 +518175,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -518970,11 +518187,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -518985,42 +518202,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 86656 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -519030,15 +518247,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -519054,19 +518271,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -519152,26 +518369,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1988 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 1985 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -519182,27 +518399,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -519219,7 +518436,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -519230,12 +518447,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -519246,42 +518463,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW4_MIWT10_6_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -519292,13 +518509,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 6] - MIWaveTileA: 10 + MIWaveTile: [9, 6] + MIWaveTileA: 9 MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 288 MacroTile1: 192 - MacroTileA: 320 + MacroTileA: 288 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -519315,19 +518532,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 216 + NumLoadsA: 36 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -519413,25 +518630,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1989 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW4_MIWT10_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 1986 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 36 ThreadTile1: 6 - ThreadTileA: 40 + ThreadTileA: 36 ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true @@ -519443,27 +518660,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -519480,7 +518697,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -519491,12 +518708,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -519507,42 +518724,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 40576 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 73856 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 40576 + LdsOffsetMetadata_Blk: 73856 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -519552,15 +518769,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 7] + MIWaveTileA: 8 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 448 + MacroTileA: 128 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -519575,19 +518792,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 8 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -519674,25 +518891,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1990 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1987 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 32 ThreadTile1: 7 - ThreadTileA: 20 + ThreadTileA: 32 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -519704,27 +518921,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -519741,7 +518958,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -519752,12 +518969,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -519768,42 +518985,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 35072 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 82176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35072 + LdsOffsetMetadata_Blk: 82176 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -519813,15 +519030,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [16, 4] + MIWaveTileA: 16 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -519837,19 +519054,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -519935,26 +519152,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1991 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 1988 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -519965,27 +519182,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -520014,11 +519231,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -520029,45 +519246,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -520075,22 +519292,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -520098,19 +519315,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 28 - NumLoadsB: 28 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -520196,26 +519413,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1992 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 1989 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -520226,14 +519443,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -520246,7 +519463,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -520263,7 +519480,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -520274,12 +519491,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -520290,32 +519507,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_6_NTB4_NTC3_NTD3_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -520324,8 +519541,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -520335,15 +519552,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -520358,20 +519575,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -520457,26 +519674,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1993 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 1990 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -520487,27 +519704,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -520540,7 +519757,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -520551,7 +519768,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_SVW8_VWA8_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -520560,23 +519777,23 @@ LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32128 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 27520 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32128 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 27520 + LdsOffsetMetadata_Blk: 49408 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -520596,15 +519813,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 14] - MIWaveTileA: 4 - MIWaveTileB: 14 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -520625,14 +519842,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 16 - NumLoadsB: 14 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -520718,8 +519935,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1994 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 1991 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -520727,17 +519944,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 14 - ThreadTileA: 16 - ThreadTileB: 14 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -520748,13 +519965,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -520785,7 +520002,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -520796,8 +520013,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -520812,44 +520029,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x336x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT3_21_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35968 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 22912 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 78592 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 70656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35968 - LdsOffsetMetadata_Blk: 78592 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 70656 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -520857,15 +520074,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 21] - MIWaveTileA: 3 - MIWaveTileB: 21 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 336 - MacroTileA: 192 - MacroTileB: 336 + MacroTile0: 32 + MacroTile1: 224 + MacroTileA: 32 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -520881,19 +520098,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 12 - NumLoadsB: 21 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 1 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 21 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -520979,26 +520196,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1995 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x336x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT3_21_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 1992 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 21 - ThreadTileA: 12 - ThreadTileB: 21 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -521015,21 +520232,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -521046,7 +520263,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -521062,7 +520279,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -521073,34 +520290,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -521108,33 +520325,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -521142,19 +520359,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -521240,25 +520457,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1996 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 1993 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -521270,27 +520487,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -521307,7 +520524,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -521323,7 +520540,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -521334,45 +520551,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -521380,42 +520597,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -521501,26 +520718,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1997 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 1994 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -521531,27 +520748,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -521568,7 +520785,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -521584,7 +520801,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -521595,44 +520812,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35968 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 73856 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 70656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35968 - LdsOffsetMetadata_Blk: 73856 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 70656 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -521640,15 +520857,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 384 - MacroTileA: 128 - MacroTileB: 384 + MacroTile0: 32 + MacroTile1: 224 + MacroTileA: 32 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -521664,19 +520881,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -521762,26 +520979,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1998 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 1995 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -521792,27 +521009,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -521840,7 +521057,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -521856,12 +521073,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -521869,32 +521086,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 70656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 70656 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -521902,42 +521119,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 224 + MacroTileA: 32 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -522023,26 +521240,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 1999 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 1996 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -522059,8 +521276,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -522073,7 +521290,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -522090,7 +521307,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -522106,7 +521323,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -522117,34 +521334,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 70656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 70656 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -522152,10 +521369,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -522163,22 +521380,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [1, 7] + MIWaveTileA: 1 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 224 + MacroTileA: 32 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -522186,19 +521403,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 16 - NumLoadsB: 4 + NumElementsPerThread: 28 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -522284,26 +521501,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2000 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 1997 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 7 + ThreadTileA: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -522314,27 +521531,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -522362,12 +521579,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -522378,45 +521595,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -522424,22 +521641,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 48 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 48 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -522447,13 +521664,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 6 NumLoadsB: 8 NumLoadsCoalescedA: 1 @@ -522545,26 +521762,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2001 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 1998 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -522575,14 +521792,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -522595,7 +521812,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -522628,7 +521845,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -522639,7 +521856,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -522648,27 +521865,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -522676,7 +521893,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -522684,15 +521901,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 48 + MacroTile1: 256 + MacroTileA: 48 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -522707,20 +521924,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 20 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -522806,26 +522023,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2002 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 1999 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -522836,14 +522053,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -522856,7 +522073,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -522873,7 +522090,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -522889,7 +522106,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -522900,45 +522117,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33664 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33664 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -522946,22 +522163,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 32 MacroTile1: 256 - MacroTileA: 224 + MacroTileA: 32 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -522969,19 +522186,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -523067,26 +522284,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2003 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM16 + SolutionIndex: 2000 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -523097,27 +522314,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -523134,7 +522351,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -523145,8 +522362,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -523161,44 +522378,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -523206,15 +522423,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -523230,19 +522447,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -523328,26 +522545,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2004 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 2001 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -523364,21 +522581,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -523407,11 +522624,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -523422,36 +522639,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -523459,7 +522676,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -523467,15 +522684,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 48 + MacroTile1: 256 + MacroTileA: 48 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -523491,19 +522708,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -523589,26 +522806,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2005 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2002 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -523619,14 +522836,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -523639,7 +522856,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -523656,7 +522873,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -523668,11 +522885,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -523683,44 +522900,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -523728,15 +522945,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 48 + MacroTile1: 192 + MacroTileA: 48 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -523752,19 +522969,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -523850,26 +523067,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2006 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2003 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -523880,27 +523097,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -523929,7 +523146,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -523944,36 +523161,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 104704 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -523981,7 +523198,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -523989,15 +523206,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [9, 6] - MIWaveTileA: 9 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 192 - MacroTileA: 288 - MacroTileB: 192 + MacroTile0: 48 + MacroTile1: 256 + MacroTileA: 48 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -524012,20 +523229,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 216 - NumLoadsA: 36 - NumLoadsB: 24 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -524111,26 +523328,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2007 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 2004 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 6 - ThreadTileA: 36 - ThreadTileB: 6 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -524147,8 +523364,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -524157,11 +523374,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -524178,7 +523395,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -524189,12 +523406,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -524205,34 +523422,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_6_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -524240,33 +523457,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -524274,19 +523491,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -524372,26 +523589,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2008 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_6_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2005 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -524402,27 +523619,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -524439,7 +523656,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -524450,12 +523667,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -524466,44 +523683,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40576 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 73856 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40576 - LdsOffsetMetadata_Blk: 73856 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -524512,14 +523729,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -524534,20 +523751,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -524633,26 +523850,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2009 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2006 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -524663,27 +523880,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -524700,7 +523917,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -524716,7 +523933,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -524727,44 +523944,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NTC0_NTD0_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35072 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 82176 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35072 - LdsOffsetMetadata_Blk: 82176 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -524773,14 +523990,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [16, 4] - MIWaveTileA: 16 - MIWaveTileB: 4 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 320 + MacroTileA: 32 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -524796,19 +524013,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 16 - NumLoadsB: 4 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -524894,26 +524111,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2010 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2007 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -524924,27 +524141,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -524961,7 +524178,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -524977,7 +524194,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -524988,88 +524205,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 3] + MIWaveTileA: 3 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 48 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 48 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -525155,25 +524372,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2011 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2008 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 12 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 12 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -525185,27 +524402,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -525222,7 +524439,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -525238,7 +524455,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -525249,45 +524466,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -525295,42 +524512,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 48 + MacroTile1: 192 + MacroTileA: 48 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 16 - NumLoadsB: 4 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -525416,26 +524633,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2012 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 2009 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -525446,27 +524663,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -525483,7 +524700,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -525495,11 +524712,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -525510,44 +524727,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27520 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27520 - LdsOffsetMetadata_Blk: 49408 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -525555,15 +524772,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 5] + MIWaveTileA: 3 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 48 + MacroTile1: 320 + MacroTileA: 48 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -525579,18 +524796,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -525677,25 +524894,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2013 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 2010 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 12 ThreadTile1: 5 - ThreadTileA: 32 + ThreadTileA: 12 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -525707,27 +524924,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -525755,7 +524972,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -525771,12 +524988,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_12_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_8_2 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -525784,29 +525001,29 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 5120 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 2560 + LdsNumElementsAlignedB: 61440 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 70656 + LdsOffsetB: 2560 + LdsOffsetB_Blk: 68096 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 70656 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 68096 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -525816,15 +525033,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 7] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 12] MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 224 - MacroTileA: 32 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 384 + MacroTileA: 16 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -525840,19 +525057,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 1 - NumLoadsB: 7 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -525938,8 +525155,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2014 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2011 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_12_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -525948,16 +525165,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 7 + ThreadTile1: 12 ThreadTileA: 4 - ThreadTileB: 7 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -525974,7 +525191,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -526005,7 +525222,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -526016,12 +525233,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -526032,42 +525249,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT2_6_NTB0_NTC0_NTD0_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 59520 + LdsNumElementsAlignedA: 4224 LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 4224 + LdsOffsetB_Blk: 69760 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59520 + LdsOffsetMetadata_Blk: 69760 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -526078,14 +525295,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 384 + MacroTileA: 32 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -526106,13 +525323,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -526199,8 +525416,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2015 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2012 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT2_6_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -526208,17 +525425,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -526229,7 +525446,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -526240,10 +525457,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -526266,7 +525483,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -526293,17 +525510,17 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 59904 @@ -526319,8 +525536,8 @@ LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -526328,10 +525545,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -526343,32 +525560,32 @@ MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 384 + MacroTileA: 32 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 1 NumLoadsB: 12 NumLoadsCoalescedA: 1 @@ -526460,8 +525677,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2016 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2013 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -526470,15 +525687,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -526496,15 +525713,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -526554,7 +525771,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -526567,23 +525784,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 5120 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 61824 + LdsNumElementsAlignedA: 6528 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 70656 + LdsOffsetB: 6528 + LdsOffsetB_Blk: 72064 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 70656 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61824 + LdsOffsetMetadata_Blk: 72064 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -526599,15 +525816,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 7] - MIWaveTileA: 1 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 6] + MIWaveTileA: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 224 - MacroTileA: 32 - MacroTileB: 224 + MacroTile0: 48 + MacroTile1: 384 + MacroTileA: 48 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -526628,14 +525845,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -526721,8 +525938,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2017 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2014 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -526731,16 +525948,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 7 - ThreadTileA: 4 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 6 + ThreadTileA: 12 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -526757,7 +525974,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -526799,12 +526016,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -526815,32 +526032,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 5120 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 70656 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 70656 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -526861,13 +526078,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 7] - MIWaveTileA: 1 + MIWaveTile: [2, 7] + MIWaveTileA: 2 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 64 MacroTile1: 224 - MacroTileA: 32 + MacroTileA: 64 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -526883,19 +526100,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 + NumElementsPerThread: 56 NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 + NumLoadsA: 2 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -526982,8 +526199,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2018 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2015 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -526991,16 +526208,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 7 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -527012,7 +526229,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -527065,7 +526282,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -527076,7 +526293,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -527085,23 +526302,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 5120 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 70656 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 70656 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -527122,13 +526339,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [1, 7] - MIWaveTileA: 1 + MIWaveTile: [2, 7] + MIWaveTileA: 2 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 64 MacroTile1: 224 - MacroTileA: 32 + MacroTileA: 64 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -527145,18 +526362,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 28 + NumElementsPerThread: 56 NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 + NumLoadsA: 8 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -527243,8 +526460,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2019 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_7_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2016 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -527252,16 +526469,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 7 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -527273,7 +526490,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -527326,7 +526543,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -527337,7 +526554,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -527346,23 +526563,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 7680 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -527382,15 +526599,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 256 - MacroTileA: 48 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 224 + MacroTileA: 64 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -527405,20 +526622,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -527504,8 +526721,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2020 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2017 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -527513,17 +526730,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 4 - ThreadTileA: 12 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -527534,13 +526751,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -527582,8 +526799,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -527598,32 +526815,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 7680 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -527643,15 +526860,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [3, 7] MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 256 - MacroTileA: 48 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 224 + MacroTileA: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -527672,14 +526889,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 32 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 3 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -527765,8 +526982,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2021 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2018 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -527775,16 +526992,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 4 + ThreadTile1: 7 ThreadTileA: 12 - ThreadTileB: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -527801,7 +527018,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -527811,7 +527028,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -527843,12 +527060,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -527859,45 +527076,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -527905,22 +527122,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 96 MacroTile1: 256 - MacroTileA: 32 + MacroTileA: 96 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -527933,13 +527150,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -528026,8 +527243,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2022 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_2_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2019 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -528035,17 +527252,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -528056,13 +527273,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -528093,7 +527310,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -528104,7 +527321,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -528120,44 +527337,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 61312 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61312 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -528166,14 +527383,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 112 + MacroTile1: 320 + MacroTileA: 112 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -528194,14 +527411,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 14 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -528287,8 +527504,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2023 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2020 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -528303,10 +527520,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -528328,10 +527545,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -528366,7 +527583,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -528381,32 +527598,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 7680 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -528418,7 +527635,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -528427,13 +527644,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveTile: [7, 4] + MIWaveTileA: 7 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 112 MacroTile1: 256 - MacroTileA: 48 + MacroTileA: 112 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -528450,19 +527667,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 32 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -528548,8 +527765,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2024 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2021 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -528564,9 +527781,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 28 ThreadTile1: 4 - ThreadTileA: 12 + ThreadTileA: 28 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -528594,7 +527811,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -528615,7 +527832,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -528642,44 +527859,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -528688,14 +527905,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 192 - MacroTileA: 48 - MacroTileB: 192 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -528710,20 +527927,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 - NumLoadsB: 12 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -528809,8 +528026,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2025 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2022 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -528825,10 +528042,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -528850,10 +528067,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -528892,7 +528109,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -528903,7 +528120,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -528912,23 +528129,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 7680 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -528948,14 +528165,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 64 MacroTile1: 256 - MacroTileA: 48 + MacroTileA: 64 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -528971,19 +528188,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -529070,8 +528287,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2026 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x256x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2023 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -529079,17 +528296,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 4 - ThreadTileA: 12 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -529100,13 +528317,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -529137,7 +528354,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -529164,32 +528381,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -529198,8 +528415,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -529210,14 +528427,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 80 + MacroTile1: 256 + MacroTileA: 80 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -529238,14 +528455,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -529331,8 +528548,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2027 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2024 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -529347,10 +528564,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -529372,10 +528589,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -529398,7 +528615,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -529409,8 +528626,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -529425,32 +528642,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -529459,8 +528676,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -529471,14 +528688,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 80 + MacroTile1: 256 + MacroTileA: 80 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -529499,14 +528716,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -529592,8 +528809,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2028 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2025 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -529608,10 +528825,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -529633,12 +528850,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -529670,12 +528887,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -529686,32 +528903,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NTC0_NTD0_PLR1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -529723,7 +528940,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -529731,15 +528948,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 8] + MIWaveTileA: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 320 - MacroTileA: 32 - MacroTileB: 320 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -529760,14 +528977,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -529853,8 +529070,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2029 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2026 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -529862,17 +529079,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -529883,13 +529100,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -529920,7 +529137,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -529936,7 +529153,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -529947,44 +529164,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -529993,14 +529210,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 192 - MacroTileA: 48 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -530015,20 +529232,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 12 - NumLoadsB: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -530114,8 +529331,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2030 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2027 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -530123,17 +529340,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -530144,7 +529361,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -530155,10 +529372,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -530181,7 +529398,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -530192,12 +529409,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -530208,44 +529425,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NTC0_NTD0_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -530254,14 +529471,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 192 - MacroTileA: 48 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -530282,14 +529499,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 - NumLoadsB: 12 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -530375,8 +529592,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2031 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2028 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -530384,17 +529601,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -530405,7 +529622,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -530416,10 +529633,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -530469,7 +529686,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -530483,18 +529700,18 @@ LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 58880 - LdsNumElementsAlignedA: 7680 - LdsNumElementsAlignedB: 51200 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -530506,7 +529723,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -530515,14 +529732,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 320 - MacroTileA: 48 - MacroTileB: 320 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -530543,14 +529760,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 10 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -530636,8 +529853,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2032 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2029 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -530652,10 +529869,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -530719,7 +529936,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -530730,7 +529947,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_12_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -530739,33 +529956,33 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 2560 - LdsNumElementsAlignedB: 61440 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 2560 - LdsOffsetB_Blk: 68096 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 68096 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -530775,15 +529992,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 12] - MIWaveTileA: 1 - MIWaveTileB: 12 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 384 - MacroTileA: 16 - MacroTileB: 384 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -530799,19 +530016,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -530897,8 +530114,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2033 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_12_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_2_WGM1 + SolutionIndex: 2030 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -530906,17 +530123,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 12 - ThreadTileA: 4 - ThreadTileB: 12 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -530927,13 +530144,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -530980,7 +530197,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -530991,7 +530208,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT2_6_NTB0_NTC0_NTD0_PLR1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -531000,27 +530217,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59520 - LdsNumElementsAlignedA: 4224 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4224 - LdsOffsetB_Blk: 69760 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59520 - LdsOffsetMetadata_Blk: 69760 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -531028,7 +530245,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -531037,14 +530254,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 384 - MacroTileA: 32 - MacroTileB: 384 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -531059,20 +530276,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -531158,8 +530375,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2034 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT2_6_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2031 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -531167,17 +530384,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 6 - ThreadTileA: 8 - ThreadTileB: 6 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -531188,7 +530405,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -531241,7 +530458,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -531252,7 +530469,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -531261,36 +530478,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -531298,22 +530515,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 384 - MacroTileA: 32 - MacroTileB: 384 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -531326,14 +530543,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -531419,8 +530636,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2035 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2032 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -531428,17 +530645,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -531449,13 +530666,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -531497,12 +530714,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -531513,36 +530730,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61824 - LdsNumElementsAlignedA: 6528 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 6528 - LdsOffsetB_Blk: 72064 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61824 - LdsOffsetMetadata_Blk: 72064 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -531558,15 +530775,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 6] - MIWaveTileA: 3 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 10] + MIWaveTileA: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 384 - MacroTileA: 48 - MacroTileB: 384 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -531582,19 +530799,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 6 - NumLoadsB: 12 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -531680,8 +530897,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2036 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2033 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -531689,17 +530906,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 6 - ThreadTileA: 12 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 10 + ThreadTileA: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -531710,13 +530927,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -531758,12 +530975,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -531774,36 +530991,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_10_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 78592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 78592 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -531811,7 +531028,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -531820,14 +531037,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTile: [3, 10] + MIWaveTileA: 3 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 224 - MacroTileA: 64 - MacroTileB: 224 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -531843,19 +531060,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 7 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 12 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -531941,8 +531158,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2037 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2034 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_10_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -531950,17 +531167,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 10 + ThreadTileA: 12 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -531971,7 +531188,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -531987,7 +531204,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -532024,7 +531241,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -532035,7 +531252,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -532044,23 +531261,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -532072,7 +531289,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -532080,15 +531297,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 224 - MacroTileA: 64 - MacroTileB: 224 + MacroTile0: 80 + MacroTile1: 320 + MacroTileA: 80 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -532104,19 +531321,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -532202,8 +531419,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2038 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2035 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -532211,17 +531428,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -532232,13 +531449,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -532285,7 +531502,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -532296,7 +531513,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -532305,23 +531522,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -532333,7 +531550,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -532341,15 +531558,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 224 - MacroTileA: 64 - MacroTileB: 224 + MacroTile0: 80 + MacroTile1: 320 + MacroTileA: 80 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -532365,19 +531582,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -532463,8 +531680,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2039 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2036 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -532472,17 +531689,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -532493,13 +531710,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -532546,7 +531763,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -532557,7 +531774,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -532566,23 +531783,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -532594,7 +531811,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -532602,15 +531819,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 224 + MacroTile1: 320 MacroTileA: 96 - MacroTileB: 224 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -532625,20 +531842,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 3 - NumLoadsB: 7 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -532724,8 +531941,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2040 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2037 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -532733,17 +531950,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -532754,13 +531971,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -532802,7 +532019,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -532818,12 +532035,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -532831,9 +532048,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 + LdsNumBytes: 65024 LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 40960 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -532842,7 +532059,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 + LdsOffsetMetadata: 65024 LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 @@ -532864,14 +532081,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] + MIWaveTile: [6, 5] MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 96 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -532892,14 +532109,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -532985,8 +532202,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2041 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2038 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -533002,9 +532219,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 24 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -533063,12 +532280,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -533079,36 +532296,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61312 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61312 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -533125,13 +532342,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 5] - MIWaveTileA: 7 + MIWaveTile: [6, 5] + MIWaveTileA: 6 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 112 + MacroTile0: 96 MacroTile1: 320 - MacroTileA: 112 + MacroTileA: 96 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -533147,19 +532364,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 14 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -533246,8 +532463,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2042 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2039 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -533255,16 +532472,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 24 ThreadTile1: 5 - ThreadTileA: 28 + ThreadTileA: 24 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -533276,7 +532493,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -533325,7 +532542,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -533340,36 +532557,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 58752 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 58752 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -533386,14 +532603,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] + MIWaveTile: [7, 5] MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 112 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 112 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -533409,19 +532626,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 NumLoadsA: 14 - NumLoadsB: 8 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -533507,8 +532724,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2043 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2040 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -533524,9 +532741,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 28 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 28 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -533553,7 +532770,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -533601,7 +532818,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -533614,23 +532831,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 61312 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61312 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -533647,14 +532864,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] + MIWaveTile: [7, 5] MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 112 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 112 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -533675,14 +532892,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 NumLoadsA: 14 - NumLoadsB: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -533768,8 +532985,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2044 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2041 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -533785,9 +533002,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 28 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 28 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -533846,7 +533063,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -533862,12 +533079,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -533875,55 +533092,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 8] + MIWaveGroup: [1, 4] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 8 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 256 + MacroTile1: 384 MacroTileA: 64 - MacroTileB: 256 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -533936,14 +533153,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -534029,8 +533246,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2045 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2042 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -534039,16 +533256,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 8 - ThreadTileA: 8 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -534108,11 +533325,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -534123,36 +533340,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT4_6_NTB4_NTC0_NTD0_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 60544 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 73856 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60544 + LdsOffsetMetadata_Blk: 73856 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -534160,7 +533377,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -534169,14 +533386,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 256 - MacroTileA: 80 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 384 + MacroTileA: 64 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -534191,20 +533408,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -534290,8 +533507,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2046 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2043 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT4_6_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -534299,17 +533516,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -534320,7 +533537,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -534336,7 +533553,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -534384,7 +533601,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB0_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -534397,23 +533614,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 76416 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 76416 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -534421,7 +533638,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -534430,14 +533647,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 4] + MIWaveTile: [5, 6] MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 80 - MacroTile1: 256 + MacroTile1: 384 MacroTileA: 80 - MacroTileB: 256 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -534452,20 +533669,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 NumLoadsA: 10 - NumLoadsB: 32 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -534551,8 +533768,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2047 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2044 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -534568,9 +533785,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 - ThreadTile1: 4 + ThreadTile1: 6 ThreadTileA: 20 - ThreadTileB: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -534629,8 +533846,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -534645,36 +533862,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 76416 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 80896 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 76416 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -534690,15 +533907,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 80 + MacroTile1: 384 + MacroTileA: 80 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -534713,20 +533930,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 10 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -534812,8 +534029,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2048 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2045 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -534822,16 +534039,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -534848,7 +534065,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -534858,7 +534075,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -534891,7 +534108,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -534906,36 +534123,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -534952,14 +534169,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] + MIWaveTile: [6, 6] MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 256 + MacroTile1: 384 MacroTileA: 96 - MacroTileB: 256 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -534980,14 +534197,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 NumLoadsA: 12 - NumLoadsB: 8 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -535073,8 +534290,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2049 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2046 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -535090,9 +534307,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 4 + ThreadTile1: 6 ThreadTileA: 24 - ThreadTileB: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -535119,7 +534336,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -535151,12 +534368,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -535167,45 +534384,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NTC0_NTD0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI32x32x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 78592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 78592 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -535213,22 +534430,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 256 + MacroTile1: 384 MacroTileA: 96 - MacroTileB: 256 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -535236,19 +534453,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 12 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -535334,8 +534551,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2050 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2047 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI32x32x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -535343,17 +534560,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -535364,13 +534581,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -535380,7 +534597,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -535401,7 +534618,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -535428,42 +534645,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -535474,14 +534691,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] + MIWaveTile: [7, 6] MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 112 - MacroTile1: 256 + MacroTile1: 384 MacroTileA: 112 - MacroTileB: 256 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -535502,14 +534719,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 8 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 7 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -535595,8 +534812,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2051 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2048 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -535612,9 +534829,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 28 - ThreadTile1: 4 + ThreadTile1: 6 ThreadTileA: 28 - ThreadTileB: 4 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -535636,10 +534853,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -535678,7 +534895,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -535689,7 +534906,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT2_14_NTB0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -535698,23 +534915,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -535726,7 +534943,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -535734,15 +534951,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 14] + MIWaveTileA: 2 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -535763,14 +534980,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 16 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -535856,8 +535073,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2052 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2049 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT2_14_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -535865,17 +535082,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 14 + ThreadTileA: 8 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -535886,13 +535103,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -535934,12 +535151,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -535950,32 +535167,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -535995,15 +535212,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -536025,13 +535242,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 8 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -536117,8 +535334,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2053 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2050 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -536126,17 +535343,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -536147,13 +535364,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -536195,12 +535412,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -536211,32 +535428,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -536248,7 +535465,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -536257,14 +535474,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -536285,14 +535502,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -536378,8 +535595,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2054 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2051 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -536387,17 +535604,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -536408,7 +535625,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -536472,7 +535689,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -536485,55 +535702,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 74752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 10] - MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -536541,19 +535758,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -536639,8 +535856,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2055 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_10_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2052 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -536649,16 +535866,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 10 - ThreadTileA: 8 - ThreadTileB: 10 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -536717,8 +535934,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -536733,68 +535950,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_10_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 78592 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 78592 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 10] - MIWaveTileA: 3 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -536807,14 +536024,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 12 - NumLoadsB: 40 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -536900,8 +536117,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2056 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_10_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2053 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -536910,16 +536127,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 10 - ThreadTileA: 12 - ThreadTileB: 10 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -536946,7 +536163,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -536978,12 +536195,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -536994,32 +536211,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTB4_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -537039,15 +536256,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 320 - MacroTileA: 80 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -537062,20 +536279,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 10 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -537161,8 +536378,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2057 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2054 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -537170,17 +536387,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -537191,13 +536408,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -537239,7 +536456,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -537255,12 +536472,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -537268,32 +536485,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -537301,22 +536518,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] + MIWaveTile: [5, 2] MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 320 - MacroTileA: 80 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -537329,14 +536546,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 10 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -537422,8 +536639,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2058 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2055 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -537432,16 +536649,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -537458,7 +536675,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -537500,8 +536717,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -537516,36 +536733,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 60160 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60160 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -537561,15 +536778,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -537584,20 +536801,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 24 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -537683,8 +536900,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2059 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2056 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -537693,16 +536910,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 5 + ThreadTile1: 8 ThreadTileA: 24 - ThreadTileB: 5 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -537719,7 +536936,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -537729,7 +536946,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -537761,7 +536978,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -537777,12 +536994,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -537790,32 +537007,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -537823,42 +537040,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] + MIWaveTile: [6, 2] MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -537944,8 +537161,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2060 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2057 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -537954,16 +537171,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -537980,7 +537197,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -538011,7 +537228,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -538022,7 +537239,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -538038,42 +537255,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_NTC0_NTD0_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 33664 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 33664 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -538084,14 +537301,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -538106,20 +537323,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -538205,8 +537422,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2061 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2058 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -538221,10 +537438,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -538246,10 +537463,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -538283,12 +537500,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -538299,68 +537516,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58752 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58752 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 5] - MIWaveTileA: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 112 + MacroTile0: 128 MacroTile1: 320 - MacroTileA: 112 + MacroTileA: 128 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -538368,19 +537585,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 14 - NumLoadsB: 40 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -538466,8 +537683,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2062 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2059 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -538475,16 +537692,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 28 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -538496,13 +537713,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -538512,7 +537729,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -538544,12 +537761,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -538560,68 +537777,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61312 - LdsNumElementsAlignedA: 15232 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61312 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 5] - MIWaveTileA: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 112 + MacroTile0: 128 MacroTile1: 320 - MacroTileA: 112 + MacroTileA: 128 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -538634,13 +537851,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 14 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -538727,8 +537944,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2063 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2060 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -538736,16 +537953,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 28 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -538757,13 +537974,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -538805,8 +538022,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -538821,45 +538038,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64640 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -538867,22 +538084,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -538895,14 +538112,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -538988,8 +538205,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2064 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2061 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -538998,16 +538215,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -539024,7 +538241,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -539034,7 +538251,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -539071,7 +538288,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -539082,7 +538299,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT4_6_NTB4_NTC0_NTD0_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_10_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -539091,23 +538308,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60544 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 73856 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60544 - LdsOffsetMetadata_Blk: 73856 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 87296 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -539127,15 +538344,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 10] + MIWaveTileA: 5 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -539150,20 +538367,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 8 - NumLoadsB: 48 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 200 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -539249,8 +538466,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2065 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT4_6_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2062 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_10_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -539258,17 +538475,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 20 + ThreadTile1: 10 + ThreadTileA: 20 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -539279,13 +538496,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -539332,7 +538549,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -539343,7 +538560,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB0_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -539352,23 +538569,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 76416 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 76416 + LdsOffsetMetadata: 64640 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -539389,14 +538606,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 384 - MacroTileA: 80 - MacroTileB: 384 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -539411,20 +538628,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 10 - NumLoadsB: 48 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -539510,8 +538727,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2066 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2063 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -539519,17 +538736,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -539540,7 +538757,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -539577,7 +538794,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -539588,12 +538805,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -539604,42 +538821,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 36096 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 76416 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 78592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 76416 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 36096 + LdsOffsetMetadata_Blk: 78592 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -539650,14 +538867,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 384 - MacroTileA: 80 - MacroTileB: 384 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -539672,20 +538889,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 10 - NumLoadsB: 48 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -539771,8 +538988,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2067 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2064 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -539780,17 +538997,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -539801,7 +539018,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -539812,12 +539029,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -539838,7 +539055,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -539850,11 +539067,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -539865,22 +539082,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 + LdsNumBytes: 35712 LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -539889,18 +539106,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 + LdsOffsetMetadata: 35712 LdsOffsetMetadata_Blk: 78208 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -539911,14 +539128,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 384 - MacroTileA: 96 - MacroTileB: 384 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -539939,14 +539156,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 12 - NumLoadsB: 48 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -540032,8 +539249,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2068 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_6_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2065 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -540041,17 +539258,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -540062,7 +539279,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -540073,12 +539290,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -540099,7 +539316,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -540111,11 +539328,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -540126,88 +539343,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI32x32x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT4_12_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 36096 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 78592 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 73984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 78592 + LdsOffsetMetadata: 36096 + LdsOffsetMetadata_Blk: 73984 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 128 MacroTile1: 384 - MacroTileA: 96 + MacroTileA: 128 MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 12 - NumLoadsB: 48 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -540293,8 +539510,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2069 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI32x32x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2066 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT4_12_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -540302,17 +539519,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -540323,7 +539540,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -540334,12 +539551,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -540387,7 +539604,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT5_12_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -540400,19 +539617,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 7680 + LdsNumBytes: 38528 + LdsNumElementsAlignedA: 10880 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 76416 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 38528 + LdsOffsetMetadata_Blk: 76416 LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 @@ -540432,14 +539649,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 12] + MIWaveTileA: 5 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 112 + MacroTile0: 160 MacroTile1: 384 - MacroTileA: 112 + MacroTileA: 160 MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 @@ -540461,13 +539678,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 7 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 10 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularA: 10 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -540554,8 +539771,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2070 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_6_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2067 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT5_12_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -540564,16 +539781,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 20 + ThreadTile1: 12 + ThreadTileA: 20 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -540590,7 +539807,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -540632,12 +539849,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -540648,32 +539865,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT2_14_NTB0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -540693,14 +539910,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 14] - MIWaveTileA: 2 - MIWaveTileB: 14 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 160 MacroTile1: 224 - MacroTileA: 128 + MacroTileA: 160 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -540722,13 +539939,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 16 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularA: 5 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -540815,8 +540032,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2071 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT2_14_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2068 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -540824,17 +540041,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 14 - ThreadTileA: 8 - ThreadTileB: 14 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -540845,13 +540062,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -540898,7 +540115,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -540909,7 +540126,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -540918,23 +540135,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -540955,13 +540172,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 + MIWaveTile: [6, 7] + MIWaveTileA: 6 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 192 MacroTile1: 224 - MacroTileA: 128 + MacroTileA: 192 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -540977,19 +540194,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -541076,8 +540293,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2072 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_7_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2069 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -541085,16 +540302,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 24 ThreadTile1: 7 - ThreadTileA: 16 + ThreadTileA: 24 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -541106,7 +540323,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -541154,7 +540371,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -541170,12 +540387,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -541183,19 +540400,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -541215,15 +540432,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -541238,20 +540455,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 8 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -541337,8 +540554,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2073 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2070 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -541347,16 +540564,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -541373,7 +540590,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -541416,11 +540633,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -541431,88 +540648,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTB4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 8 LVCA: 8 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -541598,26 +540815,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2074 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2071 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -541628,13 +540845,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -541648,7 +540865,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -541676,12 +540893,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -541692,68 +540909,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTB0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -541761,19 +540978,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -541859,26 +541076,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2075 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2072 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -541889,7 +541106,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -541905,11 +541122,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -541937,12 +541154,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -541953,36 +541170,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTB4_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTB4_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -541999,14 +541216,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 8] - MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -542022,19 +541239,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -542120,26 +541337,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2076 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2073 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTB4_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -542150,7 +541367,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -542166,11 +541383,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -542198,8 +541415,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -542214,68 +541431,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -542283,19 +541500,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -542381,26 +541598,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2077 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2074 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -542417,7 +541634,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -542427,11 +541644,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -542448,7 +541665,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -542464,7 +541681,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -542475,22 +541692,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_4_NTB4_SVW4_VWA4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60160 + LdsNumBytes: 34048 LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -542499,7 +541716,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60160 + LdsOffsetMetadata: 34048 LdsOffsetMetadata_Blk: 90880 LdsPadA: 4 LdsPadB: 4 @@ -542509,8 +541726,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -542521,14 +541738,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 384 + MacroTile1: 128 + MacroTileA: 384 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -542544,19 +541761,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 24 - NumLoadsB: 32 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -542642,26 +541859,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2078 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2075 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_4_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -542672,7 +541889,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -542683,16 +541900,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -542720,8 +541937,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -542736,55 +541953,55 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 60160 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60160 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 192 MacroTile1: 256 @@ -542794,30 +542011,30 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 + NumLoadsA: 24 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -542903,26 +542120,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2079 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2076 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -542949,11 +542166,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -542970,7 +542187,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -542982,7 +542199,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -542997,42 +542214,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_NTC0_NTD0_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB4_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33664 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 60160 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33664 - LdsOffsetMetadata_Blk: 80768 + LdsOffsetMetadata: 60160 + LdsOffsetMetadata_Blk: 90880 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -543042,14 +542259,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 224 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -543065,20 +542282,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 24 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -543164,26 +542381,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2080 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2077 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -543200,21 +542417,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -543231,7 +542448,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -543242,8 +542459,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -543258,68 +542475,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT14_4_NTB0_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 32640 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 48000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 32640 + LdsOffsetMetadata_Blk: 48000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -543327,19 +542544,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -543425,15 +542642,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2081 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2078 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT14_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -543441,10 +542658,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -543461,21 +542678,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -543503,12 +542720,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -543519,45 +542736,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -543565,42 +542782,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 28 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -543686,26 +542903,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2082 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2079 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -543716,13 +542933,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -543732,11 +542949,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -543769,7 +542986,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -543780,7 +542997,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -543789,23 +543006,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64640 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64640 - LdsOffsetMetadata_Blk: 86656 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 96000 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -543825,15 +543042,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -543848,20 +543065,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 28 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -543947,26 +543164,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2083 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2080 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -543977,13 +543194,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -543997,7 +543214,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -544014,7 +543231,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -544025,12 +543242,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -544041,45 +543258,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_10_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTB4_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -544087,42 +543304,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 10] - MIWaveTileA: 5 - MIWaveTileB: 10 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 200 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -544208,26 +543425,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2084 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_10_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2081 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 10 - ThreadTileA: 20 - ThreadTileB: 10 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -544238,27 +543455,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -544275,7 +543492,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -544286,12 +543503,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -544302,45 +543519,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTB0_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64640 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64640 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -544348,42 +543565,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -544469,26 +543686,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2085 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2082 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -544499,27 +543716,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -544552,7 +543769,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -544563,7 +543780,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW4_MIWT16_4_NTB4_SVW8_VWA8_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 64 @@ -544572,23 +543789,23 @@ LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36096 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 78592 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36096 - LdsOffsetMetadata_Blk: 78592 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -544609,14 +543826,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveTile: [16, 4] + MIWaveTileA: 16 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -544631,20 +543848,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 5 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -544730,26 +543947,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2086 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2083 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW4_MIWT16_4_NTB4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -544760,7 +543977,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -544780,7 +543997,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -544797,7 +544014,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -544809,11 +544026,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -544824,42 +544041,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 107776 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -544869,15 +544086,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -544893,19 +544110,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -544991,25 +544208,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2087 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2084 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 40 ThreadTile1: 5 - ThreadTileA: 48 + ThreadTileA: 40 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -545021,27 +544238,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -545070,11 +544287,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -545085,34 +544302,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT4_12_NTB0_NTC0_NTD0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_8_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36096 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 30464 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 73984 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36096 - LdsOffsetMetadata_Blk: 73984 + LdsOffsetMetadata: 30464 + LdsOffsetMetadata_Blk: 45824 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -545131,14 +544348,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 12] - MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 384 - MacroTileA: 128 - MacroTileB: 384 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -545154,19 +544371,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 12 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -545252,26 +544469,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2088 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT4_12_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2085 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_8_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 12 - ThreadTileA: 16 - ThreadTileB: 12 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -545282,7 +544499,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -545302,7 +544519,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -545319,7 +544536,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -545330,12 +544547,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -545346,42 +544563,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT5_12_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA8_LPB4_LRVW4_MIWT14_4_NTB0_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38528 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 76416 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38528 - LdsOffsetMetadata_Blk: 76416 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -545391,15 +544608,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 12] - MIWaveTileA: 5 - MIWaveTileB: 12 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 384 - MacroTileA: 160 - MacroTileB: 384 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -545415,19 +544632,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 10 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -545513,26 +544730,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2089 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x384x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT5_12_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2086 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA8_LPB4_LRVW4_MIWT14_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 12 - ThreadTileA: 20 - ThreadTileB: 12 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -545543,27 +544760,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -545591,8 +544808,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -545607,36 +544824,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -545653,14 +544870,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -545676,19 +544893,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -545774,15 +544991,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2090 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2087 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -545790,10 +545007,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -545820,11 +545037,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -545852,12 +545069,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -545868,36 +545085,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -545914,14 +545131,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -545936,20 +545153,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -546035,26 +545252,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2091 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2088 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -546065,7 +545282,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -546081,11 +545298,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -546118,7 +545335,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -546129,7 +545346,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -546138,36 +545355,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -546175,42 +545392,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -546296,26 +545513,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2092 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2089 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -546326,13 +545543,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -546346,7 +545563,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -546375,7 +545592,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -546390,22 +545607,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTB4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -546414,44 +545631,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -546464,14 +545681,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 26 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -546557,8 +545774,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2093 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2090 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -546567,16 +545784,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -546624,7 +545841,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -546640,7 +545857,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -546651,32 +545868,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTB0_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT20_3_NTB4_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 34176 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 34176 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -546685,8 +545902,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -546696,15 +545913,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -546719,20 +545936,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -546818,8 +546035,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2094 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2091 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT20_3_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -546827,17 +546044,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -546848,27 +546065,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -546901,7 +546118,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -546912,7 +546129,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTB4_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -546921,23 +546138,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 107776 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -546958,14 +546175,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -546986,14 +546203,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -547079,8 +546296,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2095 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTB4_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2092 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -547088,17 +546305,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -547109,7 +546326,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -547146,7 +546363,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -547162,7 +546379,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -547173,32 +546390,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB4_SVW4_VWA4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 36224 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 + LdsOffsetMetadata: 36224 + LdsOffsetMetadata_Blk: 90880 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -547207,8 +546424,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -547218,15 +546435,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 384 + MacroTile1: 160 + MacroTileA: 384 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -547247,14 +546464,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -547340,8 +546557,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2096 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2093 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -547349,17 +546566,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -547370,27 +546587,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -547419,7 +546636,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -547434,34 +546651,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_4_NTB4_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTB0_SVW4_VWA4_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 + LVCB: 4 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 35712 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 35712 + LdsOffsetMetadata_Blk: 78208 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -547479,15 +546696,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [12, 4] + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -547502,20 +546719,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -547601,8 +546818,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2097 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_4_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2094 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -547611,16 +546828,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 48 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 48 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -547637,7 +546854,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -547684,7 +546901,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -547695,7 +546912,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_NTB0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -547704,27 +546921,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60160 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60160 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -547740,15 +546957,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -547770,13 +546987,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 24 - NumLoadsB: 32 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -547862,8 +547079,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2098 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2095 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -547871,17 +547088,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -547892,13 +547109,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -547929,7 +547146,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -547941,11 +547158,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -547956,42 +547173,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTB0_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60160 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60160 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -548001,15 +547218,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -548024,20 +547241,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 24 - NumLoadsB: 32 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -548123,8 +547340,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2099 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2096 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -548132,17 +547349,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -548153,27 +547370,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -548202,7 +547419,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -548217,34 +547434,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT14_4_NTB0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_8_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 + LVCB: 4 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32640 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 31488 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 48000 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32640 - LdsOffsetMetadata_Blk: 48000 + LdsOffsetMetadata: 31488 + LdsOffsetMetadata_Blk: 45824 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -548262,14 +547479,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 224 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -548291,14 +547508,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 12 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -548384,8 +547601,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2100 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT14_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2097 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_8_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -548394,16 +547611,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -548420,7 +547637,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -548467,7 +547684,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -548478,7 +547695,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -548487,59 +547704,59 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -548552,14 +547769,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 28 - NumLoadsB: 28 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 24 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -548645,8 +547862,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2101 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2098 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -548654,17 +547871,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -548675,14 +547892,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -548712,7 +547929,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -548723,12 +547940,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -548739,33 +547956,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA8_LPB4_LRVW4_MIWT4_13_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 31616 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 + LdsOffsetMetadata: 31616 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 8 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -548773,8 +547990,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -548784,15 +548001,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -548807,20 +548024,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 28 - NumLoadsB: 28 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 4 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -548906,8 +548123,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2102 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2099 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA8_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -548915,17 +548132,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -548936,27 +548153,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -548984,12 +548201,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -549000,88 +548217,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTB4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SVW8_VWA8_WG16_16_1 LSCA: 32 LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 45184 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 73856 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 + LdsOffsetMetadata: 45184 + LdsOffsetMetadata_Blk: 73856 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 512 + MacroTileA: 128 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 16 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -549167,8 +548384,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2103 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2100 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -549176,17 +548393,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -549197,14 +548414,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -549245,8 +548462,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -549261,55 +548478,55 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTB0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SVW8_VWA8_WG32_8_1 LSCA: 32 LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 34048 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 82176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 34048 + LdsOffsetMetadata_Blk: 82176 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [8, 8] MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 256 @@ -549319,10 +548536,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -549337,12 +548554,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 256 NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsA: 16 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -549428,8 +548645,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2104 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2101 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -549438,16 +548655,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -549465,7 +548682,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -549507,11 +548724,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -549522,34 +548739,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW4_MIWT16_4_NTB4_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT6_8_SVW2_VWA2_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 64 - LSPB: 64 + LSPB: 16 LVCA: 4 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 46592 LdsPadA: 8 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -549567,14 +548784,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [16, 4] - MIWaveTileA: 16 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -549590,20 +548807,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -549689,8 +548906,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2105 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW4_MIWT16_4_NTB4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2102 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT6_8_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -549698,17 +548915,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -549719,14 +548936,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -549756,7 +548973,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -549783,32 +549000,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 32640 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 107776 + LdsOffsetMetadata: 32640 + LdsOffsetMetadata_Blk: 45824 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -549817,8 +549034,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -549829,14 +549046,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -549857,14 +549074,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 20 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 12 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -549950,8 +549167,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2106 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2103 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -549966,10 +549183,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -549987,20 +549204,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -550044,7 +549261,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_8_NTB0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_SVW2_VWA2_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -550057,9 +549274,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30464 + LdsNumBytes: 28288 LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 @@ -550068,7 +549285,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30464 + LdsOffsetMetadata: 28288 LdsOffsetMetadata_Blk: 45824 LdsPadA: 4 LdsPadB: 4 @@ -550090,14 +549307,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] + MIWaveTile: [6, 7] MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 192 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -550118,14 +549335,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 NumLoadsA: 12 - NumLoadsB: 16 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -550211,8 +549428,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2107 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_8_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2104 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -550228,9 +549445,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 8 + ThreadTile1: 7 ThreadTileA: 24 - ThreadTileB: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -550248,7 +549465,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -550278,7 +549495,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -550289,12 +549506,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -550305,42 +549522,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA8_LPB4_LRVW4_MIWT14_4_NTB0_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_5_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 31360 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 31360 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -550351,14 +549568,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -550379,14 +549596,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 32 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -550472,8 +549689,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2108 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA8_LPB4_LRVW4_MIWT14_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2105 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -550481,17 +549698,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -550502,27 +549719,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -550539,7 +549756,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -550550,8 +549767,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -550566,44 +549783,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -550611,15 +549828,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -550635,19 +549852,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -550733,26 +549950,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2109 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2106 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -550769,21 +549986,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -550800,7 +550017,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -550811,8 +550028,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -550827,44 +550044,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -550872,15 +550089,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -550895,20 +550112,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -550994,26 +550211,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2110 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2107 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -551030,21 +550247,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -551061,7 +550278,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -551077,7 +550294,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -551088,88 +550305,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB0_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -551255,26 +550472,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2111 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2108 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -551285,27 +550502,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -551338,7 +550555,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -551349,7 +550566,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NTC0_NTD0_PLR1_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -551358,79 +550575,79 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 320 + MacroTileA: 32 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 1 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -551516,26 +550733,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2112 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2109 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -551546,13 +550763,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -551566,7 +550783,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -551583,7 +550800,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -551599,7 +550816,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -551610,32 +550827,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT20_3_NTB4_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x448x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34176 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 65152 + LdsNumElementsAlignedA: 4224 + LdsNumElementsAlignedB: 60928 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 4224 + LdsOffsetB_Blk: 69760 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34176 - LdsOffsetMetadata_Blk: 86656 + LdsOffsetMetadata: 65152 + LdsOffsetMetadata_Blk: 69760 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -551644,10 +550861,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -551656,14 +550873,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 - MIWaveTileB: 3 + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 448 + MacroTileA: 32 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -551678,20 +550895,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 12 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 56 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 56 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -551777,26 +550994,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2113 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT20_3_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2110 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x448x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -551807,7 +551024,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -551818,16 +551035,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -551844,7 +551061,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -551855,12 +551072,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -551871,44 +551088,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -551916,15 +551133,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -551940,19 +551157,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 20 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -552038,26 +551255,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2114 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2111 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -552068,27 +551285,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -552105,7 +551322,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -552116,12 +551333,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -552132,44 +551349,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB4_SVW4_VWA4_WG32_8_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 16 + LSPB: 4 LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + LVCB: 64 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36224 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36224 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -552177,15 +551394,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 160 - MacroTileA: 384 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -552201,19 +551418,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 - NumLoadsB: 10 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -552299,26 +551516,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2115 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2112 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -552329,27 +551546,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -552366,7 +551583,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -552382,7 +551599,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -552393,44 +551610,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTB0_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -552439,14 +551656,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 48 + MacroTile1: 192 + MacroTileA: 48 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -552462,19 +551679,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -552560,26 +551777,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2116 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2113 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -552590,7 +551807,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -552601,16 +551818,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -552639,11 +551856,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -552654,68 +551871,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_NTB0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 12] - MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 384 + MacroTileA: 32 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -552723,19 +551940,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 + NumElementsPerThread: 48 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 24 + NumLoadsA: 4 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -552821,26 +552038,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2117 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2114 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 12 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -552851,13 +552068,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -552867,11 +552084,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -552888,7 +552105,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -552904,7 +552121,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -552915,32 +552132,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTB0_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61824 + LdsNumElementsAlignedA: 6528 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 6528 + LdsOffsetB_Blk: 72064 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 86656 + LdsOffsetMetadata: 61824 + LdsOffsetMetadata_Blk: 72064 LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 @@ -552949,10 +552166,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -552961,14 +552178,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 - MIWaveTileB: 3 + MIWaveTile: [3, 6] + MIWaveTileA: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 48 + MacroTile1: 384 + MacroTileA: 48 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -552984,19 +552201,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -553082,26 +552299,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2118 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2115 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 6 + ThreadTileA: 12 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -553112,7 +552329,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -553123,16 +552340,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -553149,7 +552366,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -553161,7 +552378,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -553176,42 +552393,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_8_NTB0_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31488 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 56576 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 45824 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 73984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31488 - LdsOffsetMetadata_Blk: 45824 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 73984 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -553222,14 +552439,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveTile: [2, 13] + MIWaveTileA: 2 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 416 + MacroTileA: 64 + MacroTileB: 416 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -553245,19 +552462,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 12 - NumLoadsB: 4 + NumElementsPerThread: 104 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 52 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 52 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -553343,15 +552560,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2119 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_8_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2116 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -553359,10 +552576,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 8 + ThreadTile1: 13 + ThreadTileA: 8 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -553384,16 +552601,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -553437,7 +552654,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -553450,75 +552667,75 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 56576 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 73984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 73984 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 13] + MIWaveTileA: 2 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 416 + MacroTileA: 64 + MacroTileB: 416 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 24 - NumLoadsB: 32 + NumElementsPerThread: 104 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 52 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 52 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -553604,26 +552821,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2120 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2117 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 13 + ThreadTileA: 8 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -553641,7 +552858,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -553654,7 +552871,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -553682,12 +552899,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -553698,34 +552915,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA8_LPB4_LRVW4_MIWT4_13_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT5_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 32 LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31616 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 37760 + LdsNumElementsAlignedA: 5504 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 5504 + LdsOffsetB_Blk: 71040 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31616 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 37760 + LdsOffsetMetadata_Blk: 71040 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -553743,15 +552960,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 80 + MacroTile1: 448 + MacroTileA: 80 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -553767,19 +552984,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 4 - NumLoadsB: 13 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -553865,26 +553082,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2121 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA8_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 2118 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT5_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -553895,14 +553112,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -553915,7 +553132,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -553932,7 +553149,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -553948,7 +553165,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -553959,44 +553176,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45184 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 73856 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45184 - LdsOffsetMetadata_Blk: 73856 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -554005,14 +553222,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 80 + MacroTile1: 256 + MacroTileA: 80 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -554027,19 +553244,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 10 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -554126,26 +553343,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2122 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2119 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -554156,27 +553373,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -554209,7 +553426,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -554220,7 +553437,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x416x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_13_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -554229,23 +553446,23 @@ LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34048 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 6528 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 82176 + LdsOffsetB: 6528 + LdsOffsetB_Blk: 72064 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34048 - LdsOffsetMetadata_Blk: 82176 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 72064 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -554266,14 +553483,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveTile: [3, 13] + MIWaveTileA: 3 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 416 + MacroTileA: 96 + MacroTileB: 416 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -554289,19 +553506,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 16 - NumLoadsB: 16 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 6 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -554387,26 +553604,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2123 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 2120 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x416x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_13_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 12 + ThreadTile1: 13 + ThreadTileA: 12 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -554417,14 +553634,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -554437,7 +553654,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -554454,7 +553671,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -554465,12 +553682,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -554481,42 +553698,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT6_8_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 46592 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 46592 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 80896 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -554527,13 +553744,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 + MIWaveTile: [3, 8] + MIWaveTileA: 3 MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 96 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 96 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -554549,20 +553766,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 + NumElementsPerThread: 96 NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 16 + NumLoadsA: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -554648,25 +553865,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2124 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT6_8_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2121 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 12 ThreadTile1: 8 - ThreadTileA: 24 + ThreadTileA: 12 ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true @@ -554678,27 +553895,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -554715,7 +553932,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -554726,12 +553943,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -554742,42 +553959,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32640 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 45824 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32640 - LdsOffsetMetadata_Blk: 45824 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 80896 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -554788,14 +554005,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [3, 8] + MIWaveTileA: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -554810,20 +554027,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 12 - NumLoadsB: 18 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -554909,26 +554126,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2125 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2122 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -554939,27 +554156,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -554976,7 +554193,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -554988,11 +554205,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -555003,44 +554220,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28288 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 45824 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28288 - LdsOffsetMetadata_Blk: 45824 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -555048,15 +554265,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 80 + MacroTile1: 256 + MacroTileA: 80 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -555071,20 +554288,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 12 - NumLoadsB: 14 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -555170,26 +554387,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2126 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 2123 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -555200,27 +554417,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -555249,11 +554466,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -555264,34 +554481,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_5_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x512x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_8_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31360 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 41344 + LdsNumElementsAlignedA: 6528 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 6528 + LdsOffsetB_Blk: 72064 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31360 - LdsOffsetMetadata_Blk: 41088 + LdsOffsetMetadata: 41344 + LdsOffsetMetadata_Blk: 72064 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -555310,14 +554527,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 96 + MacroTile1: 512 + MacroTileA: 96 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -555333,19 +554550,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -555431,26 +554648,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2127 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2124 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x512x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -555461,14 +554678,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -555477,11 +554694,11 @@ _DepthUB: 32 _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -555498,7 +554715,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -555509,7 +554726,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -555525,32 +554742,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -555559,10 +554776,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -555570,15 +554787,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 8] + MIWaveTileA: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -555593,20 +554810,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 4 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -555692,8 +554909,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2128 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2125 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -555702,16 +554919,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 8 + ThreadTileA: 12 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -555728,15 +554945,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -555759,7 +554976,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -555770,7 +554987,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -555786,32 +555003,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -555820,10 +555037,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -555832,14 +555049,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 80 + MacroTile1: 320 + MacroTileA: 80 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -555854,20 +555071,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -555953,8 +555170,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2129 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2126 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -555969,10 +555186,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -555994,10 +555211,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -556020,7 +555237,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -556031,8 +555248,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -556047,32 +555264,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -556081,10 +555298,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -556093,14 +555310,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 80 + MacroTile1: 320 + MacroTileA: 80 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -556116,19 +555333,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -556214,8 +555431,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2130 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2127 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -556230,10 +555447,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -556255,12 +555472,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -556308,7 +555525,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NTC0_NTD0_PLR1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC0_NTD0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -556321,19 +555538,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 13824 LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -556345,7 +555562,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -556354,13 +555571,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 5] - MIWaveTileA: 2 + MIWaveTile: [6, 5] + MIWaveTileA: 6 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 96 MacroTile1: 320 - MacroTileA: 32 + MacroTileA: 96 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -556382,13 +555599,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 1 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -556475,8 +555692,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2131 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x320x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2128 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -556491,9 +555708,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 24 ThreadTile1: 5 - ThreadTileA: 8 + ThreadTileA: 24 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -556554,7 +555771,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -556569,36 +555786,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x448x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_PLR1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65152 - LdsNumElementsAlignedA: 4224 - LdsNumElementsAlignedB: 60928 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4224 - LdsOffsetB_Blk: 69760 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65152 - LdsOffsetMetadata_Blk: 69760 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -556606,7 +555823,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -556615,14 +555832,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 7] - MIWaveTileA: 2 - MIWaveTileB: 7 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 448 - MacroTileA: 32 - MacroTileB: 448 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -556637,20 +555854,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 56 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 56 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -556736,8 +555953,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2132 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x448x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV1_MIWT2_7_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2129 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -556752,10 +555969,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 7 - ThreadTileA: 8 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -556782,7 +555999,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -556803,7 +556020,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -556814,7 +556031,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -556830,44 +556047,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 61312 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61312 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -556876,14 +556093,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 112 + MacroTile1: 320 + MacroTileA: 112 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -556904,14 +556121,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 14 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -556997,8 +556214,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2133 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2130 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -557013,10 +556230,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -557038,10 +556255,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -557064,7 +556281,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -557075,12 +556292,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -557091,44 +556308,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 64 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_12_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 60672 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 73984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60672 + LdsOffsetMetadata_Blk: 73984 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -557136,15 +556353,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 12] + MIWaveTileA: 2 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 384 + MacroTileA: 64 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -557165,14 +556382,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -557258,8 +556475,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2134 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2131 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_12_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -557267,17 +556484,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 12 + ThreadTileA: 8 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -557288,23 +556505,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -557337,11 +556554,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -557352,36 +556569,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_12_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 7680 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 60672 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 73984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 73216 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60672 + LdsOffsetMetadata_Blk: 73984 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -557389,7 +556606,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -557397,15 +556614,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 12] + MIWaveTileA: 2 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 192 - MacroTileA: 48 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 384 + MacroTileA: 64 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -557420,20 +556637,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -557519,8 +556736,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2135 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2132 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_12_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -557528,17 +556745,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 12 + ThreadTileA: 8 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -557549,13 +556766,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -557565,7 +556782,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -557598,7 +556815,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -557613,45 +556830,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 76416 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 76416 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -557659,42 +556876,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 80 MacroTile1: 384 - MacroTileA: 32 + MacroTileA: 80 MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 10 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -557780,8 +556997,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2136 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x384x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT1_3_NTB0_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2133 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -557790,16 +557007,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -557816,7 +557033,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -557826,7 +557043,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -557859,11 +557076,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -557874,34 +557091,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_NTC0_NTD0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_6_NTB4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61824 - LdsNumElementsAlignedA: 6528 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 6528 - LdsOffsetB_Blk: 72064 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61824 - LdsOffsetMetadata_Blk: 72064 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -557911,7 +557128,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -557920,13 +557137,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 6] - MIWaveTileA: 3 + MIWaveTile: [6, 6] + MIWaveTileA: 6 MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 96 MacroTile1: 384 - MacroTileA: 48 + MacroTileA: 96 MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 @@ -557942,20 +557159,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 + NumElementsPerThread: 144 NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 6 - NumLoadsB: 12 + NumLoadsA: 12 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -558041,8 +557258,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2137 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x384x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV1_MIWT3_6_NTB0_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2134 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -558050,16 +557267,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 24 ThreadTile1: 6 - ThreadTileA: 12 + ThreadTileA: 24 ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true @@ -558071,7 +557288,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -558087,7 +557304,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -558108,7 +557325,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -558124,7 +557341,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -558135,32 +557352,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_4_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 56576 + LdsNumBytes: 25088 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 73984 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 40448 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 73984 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 40448 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -558169,8 +557386,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -558180,15 +557397,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 13] - MIWaveTileA: 2 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 416 - MacroTileA: 64 - MacroTileB: 416 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -558203,20 +557420,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 104 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 52 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 52 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -558302,8 +557519,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2138 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2135 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -558311,17 +557528,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 13 - ThreadTileA: 8 - ThreadTileB: 13 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -558332,23 +557549,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -558369,7 +557586,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -558380,12 +557597,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -558396,22 +557613,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW4_MIWT8_7_NTB0_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 + LdsNumBytes: 40704 LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 56576 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -558420,18 +557637,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 + LdsOffsetMetadata: 40704 LdsOffsetMetadata_Blk: 73984 - LdsPadA: 4 - LdsPadB: 4 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -558441,15 +557658,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 13] - MIWaveTileA: 2 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 416 - MacroTileA: 64 - MacroTileB: 416 + MacroTile0: 128 + MacroTile1: 448 + MacroTileA: 128 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -558464,20 +557681,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 104 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 52 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 2 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 52 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -558563,26 +557780,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2139 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2136 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW4_MIWT8_7_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 13 - ThreadTileA: 8 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -558593,27 +557810,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -558630,7 +557847,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -558641,12 +557858,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -558657,42 +557874,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT5_7_NTB0_NTC3_NTD3_SVW1_VWA1_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTB0_SVW8_VWA8_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37760 - LdsNumElementsAlignedA: 5504 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 5504 - LdsOffsetB_Blk: 71040 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37760 - LdsOffsetMetadata_Blk: 71040 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -558703,14 +557920,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 448 - MacroTileA: 80 - MacroTileB: 448 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -558726,19 +557943,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -558824,26 +558041,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2140 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT5_7_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2137 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -558854,7 +558071,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -558865,16 +558082,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -558902,12 +558119,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -558918,32 +558135,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTB4_SVW8_VWA8_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 16896 LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -558955,7 +558172,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -558964,13 +558181,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 4] - MIWaveTileA: 5 + MIWaveTile: [8, 4] + MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 80 + MacroTile0: 128 MacroTile1: 256 - MacroTileA: 80 + MacroTileA: 128 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -558987,18 +558204,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -559085,25 +558302,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2141 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2138 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTB4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 20 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -559115,7 +558332,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -559135,7 +558352,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -559168,7 +558385,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -559179,7 +558396,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x416x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_13_NTB0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT10_4_NTB0_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -559192,19 +558409,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 6528 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 28288 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 6528 - LdsOffsetB_Blk: 72064 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 43648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 72064 + LdsOffsetMetadata: 28288 + LdsOffsetMetadata_Blk: 43648 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -559224,15 +558441,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 416 - MacroTileA: 96 - MacroTileB: 416 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -559248,19 +558465,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 6 - NumLoadsB: 26 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -559346,26 +558563,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2142 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x416x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT3_13_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2139 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT10_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -559376,13 +558593,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -559396,7 +558613,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -559424,7 +558641,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -559440,12 +558657,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -559453,19 +558670,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -559486,14 +558703,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -559508,20 +558725,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 12 - NumLoadsB: 8 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -559607,15 +558824,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2143 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2140 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -559623,10 +558840,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -559657,7 +558874,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -559701,7 +558918,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -559714,19 +558931,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -559747,14 +558964,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -559770,19 +558987,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -559868,15 +559085,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2144 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2141 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -559884,10 +559101,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -559918,7 +559135,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -559946,7 +559163,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -559962,12 +559179,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTB4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -559975,55 +559192,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 4] - MIWaveTileA: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 80 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 80 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -560031,18 +559248,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -560129,15 +559346,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2145 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2142 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -560145,9 +559362,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 48 ThreadTile1: 4 - ThreadTileA: 20 + ThreadTileA: 48 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -560165,7 +559382,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -560179,7 +559396,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -560196,7 +559413,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -560207,7 +559424,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -560223,42 +559440,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x512x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_8_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41344 - LdsNumElementsAlignedA: 6528 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 6528 - LdsOffsetB_Blk: 72064 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41344 - LdsOffsetMetadata_Blk: 72064 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -560268,15 +559485,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 8] + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 512 - MacroTileA: 96 - MacroTileB: 512 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -560291,20 +559508,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 NumLoadsA: 6 - NumLoadsB: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -560390,26 +559607,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2146 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x512x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_8_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2143 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 8 + ThreadTile1: 7 ThreadTileA: 24 - ThreadTileB: 8 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -560426,21 +559643,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -560468,12 +559685,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -560484,32 +559701,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -560530,14 +559747,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 8] - MIWaveTileA: 3 - MIWaveTileB: 8 + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -560553,19 +559770,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 12 - NumLoadsB: 8 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -560651,26 +559868,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2147 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_8_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2144 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 8 - ThreadTileA: 12 - ThreadTileB: 8 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -560681,7 +559898,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -560701,7 +559918,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -560729,12 +559946,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -560745,32 +559962,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTB0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -560790,15 +560007,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 320 - MacroTileA: 80 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -560813,20 +560030,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 10 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -560912,26 +560129,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2148 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2145 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -560942,13 +560159,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -560962,7 +560179,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -560990,12 +560207,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -561006,32 +560223,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTB4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -561052,14 +560269,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 320 - MacroTileA: 80 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -561075,19 +560292,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 40 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -561173,26 +560390,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2149 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2146 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -561203,7 +560420,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -561219,11 +560436,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -561256,7 +560473,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -561267,7 +560484,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC0_NTD0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -561276,36 +560493,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -561313,42 +560530,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -561434,26 +560651,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2150 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2147 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -561464,13 +560681,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -561484,7 +560701,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -561512,7 +560729,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -561528,12 +560745,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -561541,32 +560758,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -561574,22 +560791,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] + MIWaveTile: [6, 2] MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -561597,19 +560814,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -561695,26 +560912,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2151 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2148 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -561731,7 +560948,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -561745,7 +560962,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -561762,7 +560979,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -561778,7 +560995,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -561789,22 +561006,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61312 + LdsNumBytes: 33664 LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -561813,7 +561030,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61312 + LdsOffsetMetadata: 33664 LdsOffsetMetadata_Blk: 80768 LdsPadA: 4 LdsPadB: 8 @@ -561823,8 +561040,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -561835,14 +561052,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 320 - MacroTileA: 112 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -561857,20 +561074,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 NumLoadsA: 14 - NumLoadsB: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -561956,26 +561173,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2152 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2149 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -561986,7 +561203,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -561997,16 +561214,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -562023,7 +561240,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -562034,8 +561251,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -562050,45 +561267,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_12_NTB4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_NTB0_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60672 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 73984 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60672 - LdsOffsetMetadata_Blk: 73984 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -562096,42 +561313,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 12] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 48 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 2 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -562217,26 +561434,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2153 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_12_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2150 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 12 - ThreadTileA: 8 - ThreadTileB: 12 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -562253,21 +561470,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -562295,8 +561512,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -562311,45 +561528,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_12_NTB4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB4_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60672 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 73984 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60672 - LdsOffsetMetadata_Blk: 73984 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -562357,22 +561574,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 12] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 384 - MacroTileA: 64 - MacroTileB: 384 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -562380,19 +561597,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 48 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -562478,26 +561695,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2154 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_12_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2151 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 12 - ThreadTileA: 8 - ThreadTileB: 12 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -562514,7 +561731,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -562524,11 +561741,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -562561,7 +561778,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -562572,7 +561789,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -562581,23 +561798,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 76416 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 76416 + LdsOffsetMetadata: 64640 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -562618,14 +561835,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 384 - MacroTileA: 80 - MacroTileB: 384 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -562640,20 +561857,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 10 - NumLoadsB: 48 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -562739,26 +561956,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2155 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2152 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -562769,7 +561986,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -562789,7 +562006,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -562833,7 +562050,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_6_NTB4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -562846,19 +562063,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 - LdsOffsetMetadata_Blk: 78208 + LdsOffsetMetadata: 64640 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -562879,14 +562096,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 384 - MacroTileA: 96 - MacroTileB: 384 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -562902,19 +562119,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 12 - NumLoadsB: 48 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -563000,15 +562217,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2156 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x384x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_6_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2153 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -563016,10 +562233,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -563050,7 +562267,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -563079,11 +562296,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -563094,34 +562311,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_4_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_NTB0_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 + LVCB: 4 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25088 - LdsNumElementsAlignedA: 7680 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 29312 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 40448 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 43648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25088 - LdsOffsetMetadata_Blk: 40448 + LdsOffsetMetadata: 29312 + LdsOffsetMetadata_Blk: 43648 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -563140,13 +562357,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 + MIWaveTile: [10, 4] + MIWaveTileA: 10 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 112 + MacroTile0: 160 MacroTile1: 256 - MacroTileA: 112 + MacroTileA: 160 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -563162,20 +562379,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -563261,25 +562478,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2157 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_4_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2154 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 40 ThreadTile1: 4 - ThreadTileA: 28 + ThreadTileA: 40 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -563291,7 +562508,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -563311,7 +562528,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -563328,7 +562545,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -563344,7 +562561,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -563355,45 +562572,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW4_MIWT8_7_NTB0_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40704 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 73984 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40704 - LdsOffsetMetadata_Blk: 73984 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -563401,22 +562618,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -563429,14 +562646,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 2 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -563522,8 +562739,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2158 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW4_MIWT8_7_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2155 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -563531,17 +562748,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -563552,27 +562769,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -563600,12 +562817,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -563616,36 +562833,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTB0_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 56576 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 56576 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -563661,15 +562878,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -563684,20 +562901,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 28 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -563783,8 +563000,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2159 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2156 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -563792,17 +563009,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -563813,13 +563030,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -563829,7 +563046,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -563861,12 +563078,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -563877,36 +563094,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTB4_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -563922,15 +563139,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -563945,20 +563162,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -564044,8 +563261,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2160 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTB4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2157 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -564053,17 +563270,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -564074,13 +563291,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -564090,7 +563307,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -564111,7 +563328,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -564138,32 +563355,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT10_4_NTB0_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB4_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28288 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 43648 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28288 - LdsOffsetMetadata_Blk: 43648 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -564172,8 +563389,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -564183,15 +563400,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -564206,20 +563423,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 16 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -564305,8 +563522,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2161 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT10_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2158 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -564315,16 +563532,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -564341,21 +563558,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -564372,7 +563589,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -564383,12 +563600,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -564399,42 +563616,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB0_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 34432 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34432 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -564444,15 +563661,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -564473,14 +563690,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -564566,8 +563783,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2162 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2159 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -564575,17 +563792,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -564596,27 +563813,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -564633,7 +563850,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -564649,7 +563866,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -564660,34 +563877,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT14_1_NTB4_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 32256 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 32256 + LdsOffsetB_Blk: 97792 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 97792 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -564695,33 +563912,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 1] + MIWaveTileA: 14 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 448 + MacroTile1: 128 + MacroTileA: 448 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -564734,14 +563951,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -564827,8 +564044,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2163 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2160 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT14_1_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -564836,17 +564053,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 224 + ThreadTile1: 1 + ThreadTileA: 224 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -564857,7 +564074,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -564868,16 +564085,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -564894,7 +564111,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -564910,7 +564127,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -564921,32 +564138,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTB4_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 46592 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -564955,8 +564172,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -564966,10 +564183,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 192 MacroTile1: 256 @@ -564989,20 +564206,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 3 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -565088,8 +564305,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2164 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2161 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -565097,17 +564314,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -565118,27 +564335,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -565155,7 +564372,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -565166,8 +564383,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -565182,42 +564399,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 29312 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 43648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 29312 + LdsOffsetMetadata_Blk: 43648 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -565227,15 +564444,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -565250,20 +564467,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -565349,8 +564566,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2165 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2162 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -565359,16 +564576,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -565385,21 +564602,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -565416,7 +564633,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -565427,12 +564644,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -565443,42 +564660,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT7_6_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 29056 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 48000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 29056 + LdsOffsetMetadata_Blk: 48000 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -565489,14 +564706,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -565511,20 +564728,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 14 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -565610,8 +564827,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2166 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2163 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT7_6_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -565619,17 +564836,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -565640,27 +564857,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -565693,7 +564910,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -565704,7 +564921,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTB0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -565713,59 +564930,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 8] - MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 160 MacroTile1: 256 - MacroTileA: 128 + MacroTileA: 160 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -565778,13 +564995,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 5 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -565871,8 +565088,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2167 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_8_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2164 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -565880,17 +565097,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -565901,14 +565118,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -565949,12 +565166,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -565965,36 +565182,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTB4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -566010,15 +565227,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 7] + MIWaveTileA: 7 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 224 + MacroTileA: 224 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -566033,20 +565250,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 28 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -566132,8 +565349,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2168 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_4_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2165 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -566141,17 +565358,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 7 + ThreadTileA: 28 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -566162,14 +565379,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -566178,7 +565395,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -566210,12 +565427,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -566226,45 +565443,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64640 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -566272,42 +565489,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 160 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -566393,8 +565610,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2169 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2166 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -566402,17 +565619,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -566423,14 +565640,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -566439,7 +565656,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -566460,7 +565677,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -566476,7 +565693,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -566487,34 +565704,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -566522,10 +565739,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -566533,42 +565750,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -566654,26 +565871,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2170 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2167 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -566684,27 +565901,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -566721,7 +565938,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -566732,12 +565949,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -566748,44 +565965,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 4 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 64 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33664 - LdsNumElementsAlignedA: 15232 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 4608 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33664 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -566794,14 +566011,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -566816,20 +566033,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -566915,26 +566132,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2171 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2168 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -566945,7 +566162,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -566956,16 +566173,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -566982,7 +566199,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -566998,7 +566215,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -567009,88 +566226,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_NTB0_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -567176,26 +566393,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2172 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2169 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -567206,27 +566423,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -567243,7 +566460,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -567254,12 +566471,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -567270,68 +566487,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB4_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 64896 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 + LdsOffsetMetadata: 64896 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 48 + MacroTile1: 192 + MacroTileA: 48 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -567339,19 +566556,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -567437,26 +566654,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2173 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2170 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -567467,27 +566684,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -567516,11 +566733,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -567531,36 +566748,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64640 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 73216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64640 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 73216 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -567568,7 +566785,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -567577,13 +566794,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 + MIWaveTile: [3, 5] + MIWaveTileA: 3 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 48 MacroTile1: 320 - MacroTileA: 160 + MacroTileA: 48 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -567600,19 +566817,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -567698,25 +566915,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2174 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2171 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 12 ThreadTile1: 5 - ThreadTileA: 40 + ThreadTileA: 12 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -567728,7 +566945,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -567744,11 +566961,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -567777,11 +566994,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -567792,36 +567009,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64640 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 12800 + LdsNumElementsAlignedA: 2560 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 2560 + LdsOffsetB_Blk: 18944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64640 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 12800 + LdsOffsetMetadata_Blk: 18944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -567829,7 +567046,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -567838,14 +567055,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -567860,20 +567077,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -567959,26 +567176,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2175 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2172 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -567989,7 +567206,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -568005,11 +567222,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -568026,7 +567243,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -568037,12 +567254,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -568053,44 +567270,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_NTB0_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 4 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 64 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29312 - LdsNumElementsAlignedA: 10880 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 4608 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 43648 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29312 - LdsOffsetMetadata_Blk: 43648 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -568099,14 +567316,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -568121,20 +567338,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -568220,26 +567437,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2176 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2173 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -568250,7 +567467,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -568261,16 +567478,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -568287,7 +567504,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -568303,7 +567520,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -568314,45 +567531,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -568360,41 +567577,41 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -568481,26 +567698,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2177 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2174 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -568511,27 +567728,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -568560,11 +567777,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -568575,36 +567792,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56576 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56576 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -568612,7 +567829,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -568620,15 +567837,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 256 + MacroTileA: 32 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -568643,20 +567860,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 28 - NumLoadsB: 24 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -568742,26 +567959,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2178 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2175 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -568772,13 +567989,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -568788,11 +568005,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -568836,7 +568053,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -568849,19 +568066,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 56576 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 73984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 73984 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -568882,14 +568099,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [2, 13] + MIWaveTileA: 2 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 64 + MacroTile1: 416 + MacroTileA: 64 + MacroTileB: 416 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -568904,20 +568121,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 104 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 52 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 52 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -569003,8 +568220,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2179 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2176 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -569019,10 +568236,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 13 + ThreadTileA: 8 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -569082,7 +568299,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -569097,36 +568314,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -569134,7 +568351,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -569143,13 +568360,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 + MIWaveTile: [2, 9] + MIWaveTileA: 2 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 64 MacroTile1: 288 - MacroTileA: 192 + MacroTileA: 64 MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 @@ -569171,14 +568388,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 8 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -569264,8 +568481,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2180 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2177 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -569280,9 +568497,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 8 ThreadTile1: 9 - ThreadTileA: 24 + ThreadTileA: 8 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -569310,7 +568527,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -569331,7 +568548,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -569343,11 +568560,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -569358,42 +568575,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB0_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34432 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34432 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -569404,13 +568621,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 + MIWaveTile: [5, 5] + MIWaveTileA: 5 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 80 MacroTile1: 320 - MacroTileA: 192 + MacroTileA: 80 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -569432,14 +568649,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 20 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -569525,8 +568742,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2181 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2178 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -569534,16 +568751,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 20 ThreadTile1: 5 - ThreadTileA: 48 + ThreadTileA: 20 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -569555,7 +568772,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -569566,16 +568783,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -569592,7 +568809,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -569603,12 +568820,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -569619,34 +568836,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT14_1_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 32256 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32256 - LdsOffsetB_Blk: 97792 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 97792 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 80896 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -569654,53 +568871,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 1] - MIWaveTileA: 14 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 128 - MacroTileA: 448 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 2 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 12 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -569786,8 +569003,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2182 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT14_1_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2179 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -569795,17 +569012,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 224 - ThreadTile1: 1 - ThreadTileA: 224 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -569816,7 +569033,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -569827,16 +569044,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -569853,7 +569070,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -569869,7 +569086,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -569880,34 +569097,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 46592 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 46592 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 80896 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -569915,53 +569132,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 NumLoadsA: 3 - NumLoadsB: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -570047,8 +569264,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2183 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT6_2_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2180 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -570056,17 +569273,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -570077,7 +569294,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -570088,16 +569305,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -570114,7 +569331,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -570125,7 +569342,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -570141,42 +569358,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29312 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 43648 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29312 - LdsOffsetMetadata_Blk: 43648 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -570187,14 +569404,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -570215,14 +569432,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 4 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -570308,8 +569525,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2184 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM16 + SolutionIndex: 2181 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -570324,10 +569541,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -570345,20 +569562,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -570387,7 +569604,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -570402,34 +569619,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT7_6_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV1_MIWT7_3_NTB0_SVW1_VWA1_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29056 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 20736 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 48000 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 40448 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29056 - LdsOffsetMetadata_Blk: 48000 + LdsOffsetMetadata: 20736 + LdsOffsetMetadata_Blk: 40448 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -570439,7 +569656,7 @@ LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -570447,14 +569664,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] + MIWaveGroup: [1, 4] + MIWaveTile: [7, 3] MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 112 MacroTile1: 192 - MacroTileA: 224 + MacroTileA: 112 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -570476,14 +569693,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 14 - NumLoadsB: 3 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -570569,8 +569786,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2185 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT7_6_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 2182 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV1_MIWT7_3_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -570579,16 +569796,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 28 - ThreadTile1: 6 + ThreadTile1: 3 ThreadTileA: 28 - ThreadTileB: 6 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -570605,8 +569822,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -570647,7 +569864,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -570663,12 +569880,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -570676,32 +569893,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61312 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 + LdsOffsetMetadata: 61312 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -570709,42 +569926,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 112 + MacroTile1: 320 + MacroTileA: 112 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 14 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -570830,8 +570047,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2186 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 2183 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -570840,16 +570057,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -570866,8 +570083,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -570909,7 +570126,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -570924,36 +570141,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 83456 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -570961,7 +570178,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -570969,15 +570186,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] + MIWaveGroup: [1, 4] + MIWaveTile: [7, 3] MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 112 + MacroTile1: 192 + MacroTileA: 112 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -570992,20 +570209,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 28 - NumLoadsB: 28 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 14 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -571091,8 +570308,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2187 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 2184 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -571101,16 +570318,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 28 - ThreadTile1: 7 + ThreadTile1: 3 ThreadTileA: 28 - ThreadTileB: 7 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -571127,8 +570344,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -571137,7 +570354,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -571169,12 +570386,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -571185,36 +570402,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64640 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64640 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -571222,7 +570439,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -571231,14 +570448,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 320 - MacroTileA: 160 - MacroTileB: 320 + MacroTile0: 64 + MacroTile1: 256 + MacroTileA: 64 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -571259,14 +570476,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -571352,8 +570569,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2188 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT10_5_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM16 + SolutionIndex: 2185 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -571361,17 +570578,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -571382,14 +570599,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -571398,7 +570615,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -571419,7 +570636,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -571430,12 +570647,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -571446,32 +570663,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -571480,8 +570697,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -571492,14 +570709,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 320 + MacroTileA: 64 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -571514,20 +570731,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -571613,26 +570830,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2189 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_3_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2186 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -571643,7 +570860,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -571654,16 +570871,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -571680,7 +570897,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -571691,7 +570908,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -571707,32 +570924,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 64 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -571741,10 +570958,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -571753,14 +570970,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 80 + MacroTile1: 320 + MacroTileA: 80 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -571776,19 +570993,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 16 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -571874,15 +571091,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2190 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2187 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -571890,10 +571107,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -571915,16 +571132,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -571941,7 +571158,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -571952,7 +571169,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -571968,32 +571185,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -572002,10 +571219,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -572014,14 +571231,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 80 + MacroTile1: 320 + MacroTileA: 80 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -572037,19 +571254,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -572135,15 +571352,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2191 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2188 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -572151,10 +571368,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -572176,16 +571393,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -572202,7 +571419,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -572218,7 +571435,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -572229,44 +571446,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64896 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64896 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -572275,14 +571492,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 192 - MacroTileA: 48 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 320 + MacroTileA: 96 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -572298,19 +571515,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 12 - NumLoadsB: 12 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -572396,26 +571613,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2192 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA4_LPB8_LRVW4_MIAV1_MIWT3_3_NTB4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2189 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -572426,7 +571643,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -572437,16 +571654,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -572474,12 +571691,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -572490,32 +571707,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 7680 + LdsNumBytes: 65024 + LdsNumElementsAlignedA: 13824 LdsNumElementsAlignedB: 51200 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 73216 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 73216 + LdsOffsetMetadata: 65024 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -572527,7 +571744,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -572536,13 +571753,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 5] - MIWaveTileA: 3 + MIWaveTile: [6, 5] + MIWaveTileA: 6 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 96 MacroTile1: 320 - MacroTileA: 48 + MacroTileA: 96 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -572558,19 +571775,19 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 + NumElementsPerThread: 120 NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 + NumLoadsA: 3 NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 @@ -572657,25 +571874,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2193 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2190 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 24 ThreadTile1: 5 - ThreadTileA: 12 + ThreadTileA: 24 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -572687,7 +571904,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -572707,7 +571924,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -572751,7 +571968,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC0_NTD0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -572764,19 +571981,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 12800 - LdsNumElementsAlignedA: 2560 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 2560 - LdsOffsetB_Blk: 18944 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 12800 - LdsOffsetMetadata_Blk: 18944 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -572788,7 +572005,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -572797,14 +572014,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -572820,19 +572037,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 2 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -572918,15 +572135,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2194 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2191 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -572934,10 +572151,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -572968,7 +572185,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -572985,7 +572202,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -572996,8 +572213,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -573012,32 +572229,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 64 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -573046,10 +572263,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -573058,14 +572275,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -573081,19 +572298,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -573179,15 +572396,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2195 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2192 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -573195,10 +572412,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -573220,16 +572437,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -573246,7 +572463,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -573257,12 +572474,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -573273,32 +572490,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_SVW1_VWA1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 + LdsNumBytes: 29184 LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 32768 LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 29184 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -573307,8 +572524,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -573319,14 +572536,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -573341,20 +572558,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalB: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -573440,26 +572657,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2196 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTB4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2193 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -573470,7 +572687,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -573481,16 +572698,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -573523,7 +572740,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -573534,7 +572751,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -573543,23 +572760,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 29184 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 29184 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -573580,14 +572797,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 256 - MacroTileA: 32 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -573602,20 +572819,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalB: 4 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -573701,26 +572918,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2197 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT2_4_NTB0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2194 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -573731,7 +572948,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -573751,7 +572968,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -573779,8 +572996,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -573795,36 +573012,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_11_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 56576 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 56320 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 73984 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 73984 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 74752 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -573841,14 +573058,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 13] + MIWaveTile: [2, 11] MIWaveTileA: 2 - MIWaveTileB: 13 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 416 + MacroTile1: 352 MacroTileA: 64 - MacroTileB: 416 + MacroTileB: 352 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -573869,14 +573086,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 104 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 52 + NumElementsPerThread: 88 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 2 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 52 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -573962,8 +573179,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2198 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x416x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT2_13_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2195 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_11_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -573979,9 +573196,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 13 + ThreadTile1: 11 ThreadTileA: 8 - ThreadTileB: 13 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -574008,7 +573225,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -574045,7 +573262,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -574056,7 +573273,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -574065,23 +573282,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -574101,15 +573318,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 288 - MacroTileA: 64 - MacroTileB: 288 + MacroTile0: 80 + MacroTile1: 256 + MacroTileA: 80 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -574124,20 +573341,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 8 - NumLoadsB: 9 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -574223,8 +573440,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2199 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x288x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2196 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -574232,17 +573449,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -574253,13 +573470,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -574302,7 +573519,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -574317,22 +573534,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 + LdsNumBytes: 43520 LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -574341,7 +573558,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 + LdsOffsetMetadata: 43520 LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 @@ -574354,7 +573571,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -574363,14 +573580,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] + MIWaveTile: [5, 3] MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 80 - MacroTile1: 320 + MacroTile1: 192 MacroTileA: 80 - MacroTileB: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -574385,20 +573602,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 10 - NumLoadsB: 10 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -574484,8 +573701,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2200 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2197 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -574501,9 +573718,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 - ThreadTile1: 5 + ThreadTile1: 3 ThreadTileA: 20 - ThreadTileB: 5 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -574578,7 +573795,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -574591,19 +573808,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 78336 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 78336 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -574615,7 +573832,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -574623,15 +573840,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 80 + MacroTile1: 256 + MacroTileA: 80 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -574646,20 +573863,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 12 - NumLoadsB: 9 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -574745,8 +573962,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2201 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2198 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -574755,16 +573972,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -574781,7 +573998,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -574828,7 +574045,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -574839,7 +574056,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -574848,23 +574065,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -574884,15 +574101,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 96 - MacroTile1: 288 + MacroTile1: 256 MacroTileA: 96 - MacroTileB: 288 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -574913,14 +574130,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 3 - NumLoadsB: 9 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -575006,8 +574223,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2202 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2199 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -575015,17 +574232,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -575036,13 +574253,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -575089,7 +574306,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -575100,7 +574317,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -575109,23 +574326,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -575145,15 +574362,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -575174,14 +574391,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -575267,8 +574484,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2203 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2200 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -575276,17 +574493,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -575297,13 +574514,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -575334,7 +574551,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -575345,12 +574562,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -575361,44 +574578,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV1_MIWT7_3_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB4_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 20736 - LdsNumElementsAlignedA: 7680 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 40448 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 20736 - LdsOffsetMetadata_Blk: 40448 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -575406,15 +574623,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 3] - MIWaveTileA: 7 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 192 - MacroTileA: 112 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -575429,20 +574646,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 12 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -575528,8 +574745,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2204 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV1_MIWT7_3_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2201 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -575537,17 +574754,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 3 - ThreadTileA: 28 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -575558,27 +574775,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -575607,7 +574824,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -575622,34 +574839,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61312 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61312 - LdsOffsetMetadata_Blk: 80768 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -575667,15 +574884,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 320 - MacroTileA: 112 - MacroTileB: 320 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -575696,14 +574913,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 14 - NumLoadsB: 10 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -575789,8 +575006,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2205 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT7_5_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2202 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -575799,16 +575016,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -575825,7 +575042,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -575835,7 +575052,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -575856,7 +575073,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -575868,11 +575085,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -575883,44 +575100,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_NTB0_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 28288 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 28288 + LdsOffsetMetadata_Blk: 45824 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -575928,15 +575145,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 3] - MIWaveTileA: 7 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 192 - MacroTileA: 112 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -575951,20 +575168,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 + NumElementsPerThread: 168 NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 14 - NumLoadsB: 6 + NumLoadsA: 12 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -576050,8 +575267,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2206 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2203 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -576059,17 +575276,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 3 - ThreadTileA: 28 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -576080,27 +575297,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -576129,11 +575346,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -576144,36 +575361,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA8_LPB4_LRVW4_MIWT6_9_NTB4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 8 LVCA: 8 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -576181,7 +575398,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -576189,15 +575406,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -576212,20 +575429,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -576311,8 +575528,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2207 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2204 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA8_LPB4_LRVW4_MIWT6_9_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -576320,17 +575537,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -576341,13 +575558,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -576357,7 +575574,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -576378,7 +575595,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -576390,11 +575607,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -576405,44 +575622,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTB0_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 28288 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 48000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 28288 + LdsOffsetMetadata_Blk: 48000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -576450,15 +575667,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 6] + MIWaveTileA: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 320 - MacroTileA: 64 - MacroTileB: 320 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -576473,20 +575690,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 10 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 168 + NumLoadsA: 14 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -576572,8 +575789,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2208 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2205 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -576581,17 +575798,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 6 + ThreadTileA: 28 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -576602,27 +575819,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -576639,7 +575856,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -576655,7 +575872,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -576666,42 +575883,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_NTB0_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 30080 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 30080 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -576712,13 +575929,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] - MIWaveTileA: 5 + MIWaveTile: [8, 5] + MIWaveTileA: 8 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 80 + MacroTile0: 128 MacroTile1: 320 - MacroTileA: 80 + MacroTileA: 128 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -576734,20 +575951,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 40 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -576833,8 +576050,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2209 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2206 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -576842,16 +576059,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 20 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -576863,7 +576080,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -576874,16 +576091,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -576911,12 +576128,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -576927,45 +576144,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTB0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 78336 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -576973,42 +576190,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 320 - MacroTileA: 80 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 10 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -577094,8 +576311,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2210 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2207 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -577103,17 +576320,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -577124,13 +576341,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -577161,7 +576378,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -577173,11 +576390,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -577188,42 +576405,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT20_3_NTB0_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 34176 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34176 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -577234,14 +576451,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -577256,20 +576473,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 + NumElementsPerThread: 240 NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 10 + NumLoadsA: 20 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -577355,8 +576572,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2211 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2208 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT20_3_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -577364,17 +576581,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -577385,7 +576602,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -577396,16 +576613,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -577422,7 +576639,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -577433,12 +576650,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -577449,42 +576666,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65024 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 51200 + LdsNumBytes: 26752 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65024 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26752 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -577495,14 +576712,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 320 - MacroTileA: 96 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -577517,20 +576734,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 10 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -577616,8 +576833,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2212 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x320x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2209 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -577625,17 +576842,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -577646,27 +576863,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -577683,7 +576900,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -577699,7 +576916,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -577710,42 +576927,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 26496 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 45440 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26496 + LdsOffsetMetadata_Blk: 45440 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -577756,14 +576973,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -577784,14 +577001,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 8 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -577877,8 +577094,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2213 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2210 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -577886,17 +577103,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -577907,27 +577124,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -577944,7 +577161,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -577955,7 +577172,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -577971,32 +577188,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x16x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTA4_NTC3_NTD3_PLR1_SVW1_VWA1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 55296 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 55296 + LdsOffsetB_Blk: 120832 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 120832 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -578005,10 +577222,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -578016,15 +577233,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 16 + MacroTileA: 192 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -578038,21 +577255,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalA: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 12 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -578138,26 +577355,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2214 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2211 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x16x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTA4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -578174,21 +577391,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -578205,7 +577422,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -578216,12 +577433,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -578232,32 +577449,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTA4_NTC0_NTD0_SVW1_VWA1 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + LVCB: 32 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29184 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29184 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -578266,8 +577483,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -578277,15 +577494,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 128 + MacroTile1: 16 MacroTileA: 64 - MacroTileB: 128 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -578299,21 +577516,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -578399,26 +577616,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2215 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2212 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -578429,27 +577646,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -578466,7 +577683,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -578477,12 +577694,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -578493,32 +577710,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTA4_NTC0_NTD0_PLR1_SVW1_VWA1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29184 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 55296 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 55296 + LdsOffsetB_Blk: 120832 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29184 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 120832 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -578527,8 +577744,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -578538,15 +577755,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 2] + MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 32 + MacroTileA: 192 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -578560,21 +577777,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalA: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 12 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -578660,25 +577877,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2216 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2213 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTA4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 12 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 12 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -578690,27 +577907,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -578727,7 +577944,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -578743,7 +577960,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -578754,32 +577971,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_11_NTB4_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x32x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTA4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 56320 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -578788,10 +578005,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -578800,14 +578017,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 11] - MIWaveTileA: 2 - MIWaveTileB: 11 + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 352 - MacroTileA: 64 - MacroTileB: 352 + MacroTile0: 96 + MacroTile1: 32 + MacroTileA: 96 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -578821,21 +578038,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalA: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 88 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 2 - NumLoadsB: 11 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 6 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -578921,26 +578138,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2217 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x352x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_11_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2214 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x32x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 11 - ThreadTileA: 8 - ThreadTileB: 11 + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -578951,7 +578168,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -578962,16 +578179,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -578988,7 +578205,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -578999,9 +578216,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -579015,32 +578232,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 55296 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 55296 + LdsOffsetB_Blk: 120832 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 120832 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -579049,8 +578266,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -579060,15 +578277,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 256 - MacroTileA: 80 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 32 + MacroTileA: 192 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -579082,21 +578299,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 12 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -579182,26 +578399,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2218 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2215 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -579218,21 +578435,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -579249,7 +578466,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -579260,12 +578477,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -579276,32 +578493,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -579310,8 +578527,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -579321,15 +578538,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 3] - MIWaveTileA: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 192 - MacroTileA: 80 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -579343,21 +578560,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalA: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 10 - NumLoadsB: 24 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -579443,25 +578660,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2219 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2216 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 20 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -579473,27 +578690,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -579510,7 +578727,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -579521,12 +578738,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -579537,32 +578754,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 12800 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12800 - LdsOffsetB_Blk: 78336 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 78336 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -579571,8 +578788,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -579582,15 +578799,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 80 - MacroTile1: 256 - MacroTileA: 80 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -579604,21 +578821,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalA: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -579704,26 +578921,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2220 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT80x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2217 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -579734,27 +578951,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -579782,7 +578999,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -579798,12 +579015,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -579811,19 +579028,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -579835,7 +579052,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -579843,15 +579060,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [6, 2] MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 64 + MacroTileA: 192 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -579865,21 +579082,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalA: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 24 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -579965,26 +579182,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2221 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2218 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 4 + ThreadTile1: 2 ThreadTileA: 24 - ThreadTileB: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -580001,7 +579218,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -580015,7 +579232,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -580032,7 +579249,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -580048,7 +579265,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -580059,32 +579276,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -580093,10 +579310,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -580105,14 +579322,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 96 + MacroTile1: 64 + MacroTileA: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -580126,21 +579343,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -580226,26 +579443,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2222 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2219 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -580256,7 +579473,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -580267,16 +579484,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -580309,7 +579526,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -580320,7 +579537,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB4_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT9_2_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -580329,23 +579546,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 111616 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -580357,7 +579574,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -580366,14 +579583,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [9, 2] + MIWaveTileA: 9 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 288 + MacroTile1: 64 + MacroTileA: 288 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -580387,21 +579604,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalA: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 9 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 9 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -580487,26 +579704,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2223 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTB4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2220 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT9_2_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 36 + ThreadTile1: 2 + ThreadTileA: 36 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -580517,7 +579734,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -580537,7 +579754,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -580565,7 +579782,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -580581,12 +579798,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 @@ -580594,23 +579811,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 96256 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -580618,7 +579835,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -580626,15 +579843,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 192 + MacroTile1: 80 + MacroTileA: 192 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -580648,21 +579865,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalA: 4 + NonTemporalB: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 - NumLoadsB: 36 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -580748,26 +579965,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2224 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTB4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2221 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -580784,7 +580001,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -580794,11 +580011,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -580815,7 +580032,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -580827,8 +580044,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -580842,44 +580059,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_NTB0_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 LSPB: 16 - LVCA: 16 + LVCA: 64 LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28288 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 45824 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28288 - LdsOffsetMetadata_Blk: 45824 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -580887,15 +580104,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -580909,21 +580126,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 12 - NumLoadsB: 14 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -581009,26 +580226,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2225 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_NTB0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2222 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -581045,21 +580262,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -581092,7 +580309,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -581103,7 +580320,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA8_LPB4_LRVW4_MIWT6_9_NTB4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -581112,27 +580329,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 51200 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 51200 + LdsOffsetB_Blk: 116736 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 116736 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -581148,15 +580365,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 320 + MacroTile1: 80 + MacroTileA: 320 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -581170,21 +580387,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 - NonTemporalB: 4 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalA: 4 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 36 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -581270,26 +580487,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2226 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA8_LPB4_LRVW4_MIWT6_9_NTB4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2223 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -581300,13 +580517,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -581316,11 +580533,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -581337,7 +580554,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -581353,7 +580570,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -581364,44 +580581,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTB0_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA4_NTC0_NTD0_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28288 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 48000 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28288 - LdsOffsetMetadata_Blk: 48000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -581409,15 +580626,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 6] - MIWaveTileA: 7 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -581431,21 +580648,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 168 - NumLoadsA: 14 - NumLoadsB: 12 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -581531,26 +580748,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2227 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_6_NTB0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2224 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 6 - ThreadTileA: 28 - ThreadTileB: 6 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -581561,27 +580778,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -581598,7 +580815,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -581614,7 +580831,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -581625,44 +580842,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_NTB0_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30080 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 47616 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30080 - LdsOffsetMetadata_Blk: 41088 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -581670,15 +580887,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 5] - MIWaveTileA: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 5] + MIWaveTileA: 4 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -581692,21 +580909,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 + NumElementsPerThread: 80 NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 20 + NumLoadsA: 32 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -581792,25 +581009,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2228 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_5_NTB0_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2225 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 16 ThreadTile1: 5 - ThreadTileA: 32 + ThreadTileA: 16 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -581822,27 +581039,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -581871,11 +581088,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -581886,88 +581103,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTB0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 8 LVCA: 8 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 51200 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 51200 + LdsOffsetB_Blk: 116736 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 116736 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 80 + MacroTileA: 320 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -582053,26 +581270,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2229 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2226 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -582083,17 +581300,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -582103,7 +581320,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -582120,7 +581337,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -582132,11 +581349,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -582147,44 +581364,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT20_3_NTB0_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34176 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34176 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -582192,15 +581409,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -582214,21 +581431,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 12 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 24 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -582314,25 +581531,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2230 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT20_3_NTB0_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2227 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 24 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 24 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -582344,27 +581561,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -582381,7 +581598,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -582392,12 +581609,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -582408,44 +581625,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26752 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26752 - LdsOffsetMetadata_Blk: 41088 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -582453,15 +581670,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -582475,21 +581692,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -582575,26 +581792,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2231 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2228 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -582605,27 +581822,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -582642,7 +581859,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -582653,12 +581870,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -582669,42 +581886,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_3_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26496 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 45440 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26496 - LdsOffsetMetadata_Blk: 45440 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 111616 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -582714,15 +581931,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 3] + MIWaveTileA: 9 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 288 + MacroTile1: 96 + MacroTileA: 288 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -582736,20 +581953,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 9 NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularA: 9 NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 @@ -582836,25 +582053,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2232 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM16 + SolutionIndex: 2229 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_3_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 36 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 36 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -582866,27 +582083,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -582903,7 +582120,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -582919,7 +582136,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -582930,32 +582147,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x16x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTA4_NTC3_NTD3_PLR1_SVW1_VWA1_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 55296 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 55296 - LdsOffsetB_Blk: 120832 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 120832 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -582964,10 +582181,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -582976,14 +582193,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 16 - MacroTileA: 192 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -583004,14 +582221,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 12 - NumLoadsB: 1 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -583097,8 +582314,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2233 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x16x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTA4_NTC3_NTD3_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2230 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -583106,17 +582323,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -583127,7 +582344,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -583138,10 +582355,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -583164,7 +582381,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -583176,7 +582393,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -583191,32 +582408,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTA4_NTC0_NTD0_SVW1_VWA1 - LSCA: 256 - LSCB: 256 - LSPA: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -583225,8 +582442,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -583237,14 +582454,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [3, 7] + MIWaveTileA: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 16 - MacroTileA: 64 - MacroTileB: 16 + MacroTile0: 192 + MacroTile1: 112 + MacroTileA: 192 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -583265,14 +582482,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -583358,8 +582575,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2234 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WGM1 + SolutionIndex: 2231 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -583374,10 +582591,10 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 7 + ThreadTileA: 12 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -583399,10 +582616,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -583425,7 +582642,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -583436,8 +582653,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -583452,32 +582669,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTA4_NTC0_NTD0_PLR1_SVW1_VWA1_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 55296 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 55296 - LdsOffsetB_Blk: 120832 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 120832 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -583486,8 +582703,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -583498,14 +582715,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 2] + MIWaveTile: [3, 7] MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 32 + MacroTile1: 112 MacroTileA: 192 - MacroTileB: 32 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -583526,14 +582743,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 12 - NumLoadsB: 2 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -583619,8 +582836,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2235 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTA4_NTC0_NTD0_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2232 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -583636,9 +582853,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 2 + ThreadTile1: 7 ThreadTileA: 12 - ThreadTileB: 2 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -583660,12 +582877,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -583702,7 +582919,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -583713,7 +582930,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x32x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTA4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTA0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -583722,23 +582939,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -583759,14 +582976,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 32 - MacroTileA: 96 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -583780,21 +582997,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 6 - NumLoadsB: 2 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -583880,8 +583097,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2236 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x32x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2233 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -583889,17 +583106,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -583910,7 +583127,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -583947,7 +583164,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -583958,9 +583175,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -583974,44 +583191,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_7_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 55296 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 58752 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 55296 - LdsOffsetB_Blk: 120832 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 120832 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 58752 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -584020,14 +583237,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 32 - MacroTileA: 192 - MacroTileB: 32 + MacroTile0: 320 + MacroTile1: 112 + MacroTileA: 320 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -584043,19 +583260,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 12 - NumLoadsB: 2 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 40 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -584141,8 +583358,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2237 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2234 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_7_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -584157,10 +583374,10 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -584181,13 +583398,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -584208,7 +583425,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -584219,12 +583436,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -584235,44 +583452,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_7_NTA0_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 24576 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 24576 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -584281,14 +583498,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 112 + MacroTileA: 256 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -584302,21 +583519,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 16 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -584402,26 +583619,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2238 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2235 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_7_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -584432,7 +583649,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -584442,17 +583659,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -584469,7 +583686,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -584482,7 +583699,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -584496,32 +583713,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT18_2_NTA4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 107008 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -584530,10 +583747,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -584541,15 +583758,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [18, 2] + MIWaveTileA: 18 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 288 + MacroTile1: 128 + MacroTileA: 288 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -584570,14 +583787,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 9 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 9 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -584663,8 +583880,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2239 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2236 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT18_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -584673,16 +583890,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 72 + ThreadTile1: 2 + ThreadTileA: 72 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -584699,15 +583916,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -584746,7 +583963,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -584757,7 +583974,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_4_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -584766,27 +583983,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 57600 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57600 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -584794,7 +584011,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -584803,14 +584020,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [9, 4] + MIWaveTileA: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 64 - MacroTileA: 192 - MacroTileB: 64 + MacroTile0: 288 + MacroTile1: 128 + MacroTileA: 288 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -584826,19 +584043,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 24 - NumLoadsB: 2 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 36 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -584924,8 +584141,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2240 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2237 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_4_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -584933,17 +584150,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 2 - ThreadTileA: 24 - ThreadTileB: 2 + ThreadTile0: 36 + ThreadTile1: 4 + ThreadTileA: 36 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -584954,7 +584171,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -584970,7 +584187,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -584991,7 +584208,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -585007,7 +584224,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -585018,22 +584235,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -585042,7 +584259,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 @@ -585052,10 +584269,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -585064,14 +584281,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 64 - MacroTileA: 96 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -585087,19 +584304,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 6 - NumLoadsB: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -585185,8 +584402,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2241 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2238 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -585194,17 +584411,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -585215,7 +584432,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -585226,10 +584443,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -585263,12 +584480,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -585279,32 +584496,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT9_2_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 111616 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -585316,7 +584533,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -585325,14 +584542,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [9, 2] - MIWaveTileA: 9 - MIWaveTileB: 2 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 64 - MacroTileA: 288 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -585348,19 +584565,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 9 - NumLoadsB: 2 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 9 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -585446,8 +584663,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2242 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT9_2_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2239 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -585455,17 +584672,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 2 - ThreadTileA: 36 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -585476,7 +584693,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -585524,8 +584741,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -585540,36 +584757,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_5_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 62208 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62208 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -585577,7 +584794,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -585585,15 +584802,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 5] - MIWaveTileA: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 5] + MIWaveTileA: 9 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 80 - MacroTileA: 192 - MacroTileB: 80 + MacroTile0: 288 + MacroTile1: 160 + MacroTileA: 288 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -585609,19 +584826,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 10 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 36 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -585707,8 +584924,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2243 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2240 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_5_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -585717,15 +584934,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 36 ThreadTile1: 5 - ThreadTileA: 12 + ThreadTileA: 36 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -585743,7 +584960,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -585753,7 +584970,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -585774,7 +584991,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -585786,11 +585003,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -585801,44 +585018,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_10_NTA0_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 LSPB: 16 - LVCA: 64 + LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 27776 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 27776 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -585847,14 +585064,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -585868,21 +585085,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 16 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -585968,26 +585185,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2244 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2241 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_10_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -585998,7 +585215,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -586008,17 +585225,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -586035,7 +585252,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -586046,12 +585263,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -586062,42 +585279,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT18_3_NTA0_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 51200 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 32640 + LdsNumElementsAlignedA: 19584 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 51200 - LdsOffsetB_Blk: 116736 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 19584 + LdsOffsetB_Blk: 52352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 116736 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 32640 + LdsOffsetMetadata_Blk: 52352 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -586107,15 +585324,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [18, 3] + MIWaveTileA: 18 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 80 - MacroTileA: 320 - MacroTileB: 80 + MacroTile0: 288 + MacroTile1: 192 + MacroTileA: 288 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -586129,21 +585346,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 10 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 18 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 18 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -586229,26 +585446,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2245 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2242 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT18_3_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 72 + ThreadTile1: 3 + ThreadTileA: 72 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -586259,27 +585476,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -586312,7 +585529,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -586323,7 +585540,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA4_NTC0_NTD0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_6_NTA4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -586332,27 +585549,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 51200 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 51200 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -586360,7 +585577,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -586368,15 +585585,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 6] + MIWaveTileA: 9 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 288 + MacroTile1: 192 + MacroTileA: 288 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -586392,19 +585609,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 10 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 216 + NumLoadsA: 36 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -586490,26 +585707,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2246 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2243 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_6_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 36 + ThreadTile1: 6 + ThreadTileA: 36 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -586520,13 +585737,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -586536,11 +585753,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -586568,8 +585785,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -586584,88 +585801,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTA0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47616 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 80 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 80 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 32 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -586751,26 +585968,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2247 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2244 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -586797,11 +586014,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -586829,12 +586046,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -586845,68 +586062,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTA4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 51200 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 51200 - LdsOffsetB_Blk: 116736 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 116736 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 80 - MacroTileA: 320 - MacroTileB: 80 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -586914,19 +586131,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 10 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -587012,26 +586229,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2248 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x80x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2245 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -587042,7 +586259,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -587052,17 +586269,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -587090,7 +586307,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -587106,12 +586323,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTA4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -587119,9 +586336,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 + LdsNumBytes: 63488 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -587130,7 +586347,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 + LdsOffsetMetadata: 63488 LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 @@ -587143,7 +586360,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -587152,14 +586369,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] + MIWaveTile: [6, 7] MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 96 + MacroTile1: 224 MacroTileA: 192 - MacroTileB: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -587175,19 +586392,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 24 - NumLoadsB: 3 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -587273,8 +586490,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2249 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2246 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -587290,9 +586507,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 3 + ThreadTile1: 7 ThreadTileA: 24 - ThreadTileB: 3 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -587340,7 +586557,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -587351,8 +586568,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -587367,44 +586584,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_7_NTA0_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 32 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 19584 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 19584 + LdsOffsetB_Blk: 85120 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 85120 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -587413,14 +586630,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [9, 7] + MIWaveTileA: 9 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 288 + MacroTile1: 224 + MacroTileA: 288 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -587434,21 +586651,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 18 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 18 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -587534,15 +586751,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2250 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2247 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_7_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -587550,10 +586767,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 36 + ThreadTile1: 7 + ThreadTileA: 36 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -587575,16 +586792,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -587617,7 +586834,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -587628,7 +586845,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_3_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTA0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -587637,23 +586854,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 111616 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -587674,14 +586891,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [9, 3] - MIWaveTileA: 9 - MIWaveTileB: 3 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 96 - MacroTileA: 288 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -587695,21 +586912,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 9 - NumLoadsB: 3 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 9 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -587795,26 +587012,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2251 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_3_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2248 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 3 - ThreadTileA: 36 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -587825,7 +587042,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -587845,7 +587062,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -587873,12 +587090,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -587889,36 +587106,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTA4_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -587934,15 +587151,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 96 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -587958,19 +587175,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -588056,26 +587273,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2252 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2249 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTA4_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -588086,13 +587303,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -588102,11 +587319,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -588135,11 +587352,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -588150,68 +587367,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 112 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -588219,19 +587436,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 6 - NumLoadsB: 14 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -588317,8 +587534,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2253 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2250 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -588326,17 +587543,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -588347,13 +587564,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -588384,7 +587601,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -588396,7 +587613,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -588411,34 +587628,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA0_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 17920 + LdsNumBytes: 29952 + LdsNumElementsAlignedA: 11520 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 11520 + LdsOffsetB_Blk: 44288 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 29952 + LdsOffsetMetadata_Blk: 44288 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -588446,53 +587663,53 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 7] - MIWaveTileA: 3 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 112 - MacroTileA: 192 - MacroTileB: 112 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 14 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -588578,26 +587795,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2254 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_7_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2251 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 7 - ThreadTileA: 12 - ThreadTileB: 7 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -588614,21 +587831,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -588645,7 +587862,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -588656,12 +587873,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -588672,32 +587889,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTA0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTA4_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -588706,10 +587923,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -588717,15 +587934,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [9, 4] + MIWaveTileA: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 144 + MacroTile1: 256 + MacroTileA: 144 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -588739,21 +587956,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 18 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 18 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -588839,26 +588056,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2255 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2252 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 36 + ThreadTile1: 4 + ThreadTileA: 36 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -588869,27 +588086,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -588918,11 +588135,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -588933,36 +588150,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_7_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58752 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58752 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -588978,15 +588195,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 112 - MacroTileA: 320 - MacroTileB: 112 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -589000,21 +588217,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 40 - NumLoadsB: 14 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -589100,26 +588317,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2256 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x112x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_7_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2253 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -589130,13 +588347,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -589146,11 +588363,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -589167,7 +588384,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -589179,11 +588396,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -589194,42 +588411,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_7_NTA0_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_5_NTA0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 24576 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 62208 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 24576 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 62208 + LdsOffsetMetadata_Blk: 104704 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -589239,15 +588456,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 5] + MIWaveTileA: 9 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 112 - MacroTileA: 256 - MacroTileB: 112 + MacroTile0: 288 + MacroTile1: 160 + MacroTileA: 288 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -589268,14 +588485,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 16 - NumLoadsB: 7 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 36 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -589361,8 +588578,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2257 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_7_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2254 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_5_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -589370,17 +588587,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 36 + ThreadTile1: 5 + ThreadTileA: 36 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -589391,27 +588608,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -589439,12 +588656,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -589455,36 +588672,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT18_2_NTA4_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_5_NTA4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 41472 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 19584 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41472 - LdsOffsetB_Blk: 107008 + LdsOffsetB: 19584 + LdsOffsetB_Blk: 85120 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 107008 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 85120 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -589501,14 +588718,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [18, 2] - MIWaveTileA: 18 - MIWaveTileB: 2 + MIWaveTile: [9, 5] + MIWaveTileA: 9 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 128 - MacroTileA: 288 - MacroTileB: 128 + MacroTile0: 144 + MacroTile1: 320 + MacroTileA: 144 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -589524,19 +588741,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 9 - NumLoadsB: 4 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 18 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 9 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 18 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -589622,26 +588839,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2258 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT18_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2255 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_5_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 72 - ThreadTile1: 2 - ThreadTileA: 72 - ThreadTileB: 2 + ThreadTile0: 36 + ThreadTile1: 5 + ThreadTileA: 36 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -589652,7 +588869,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -589668,11 +588885,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -589689,7 +588906,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -589700,12 +588917,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -589716,45 +588933,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_4_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_NTA0_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57600 - LdsNumElementsAlignedA: 39168 + LdsNumBytes: 27648 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57600 - LdsOffsetMetadata_Blk: 104704 - LdsPadA: 4 + LdsOffsetMetadata: 27648 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -589762,41 +588979,41 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [9, 4] - MIWaveTileA: 9 + MIWaveTile: [2, 4] + MIWaveTileA: 2 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 128 - MacroTileA: 288 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 36 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 2 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -589883,25 +589100,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2259 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_4_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2256 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 36 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -589913,27 +589130,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -589961,7 +589178,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -589977,12 +589194,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_NTA4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -589990,19 +589207,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -590022,15 +589239,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -590046,19 +589263,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 5 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -590144,26 +589361,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2260 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2257 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -590180,7 +589397,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -590194,7 +589411,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -590211,7 +589428,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -590222,7 +589439,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -590238,34 +589455,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTA0_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -590273,10 +589490,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -590284,41 +589501,41 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 2 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -590405,25 +589622,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2261 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2258 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 24 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -590441,21 +589658,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -590484,11 +589701,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -590499,34 +589716,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_5_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTA4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62208 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62208 - LdsOffsetMetadata_Blk: 104704 + LdsOffsetMetadata: 64640 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -590544,15 +589761,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [9, 5] - MIWaveTileA: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 160 - MacroTileA: 288 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -590568,19 +589785,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 36 - NumLoadsB: 5 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -590666,25 +589883,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2262 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_5_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2259 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 + ThreadTile0: 40 ThreadTile1: 5 - ThreadTileA: 36 + ThreadTileA: 40 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -590696,13 +589913,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -590716,7 +589933,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -590745,7 +589962,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -590760,34 +589977,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_10_NTA0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_3_SVW4_VWA4_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 + LVCB: 4 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27776 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 26496 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 45440 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27776 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 26496 + LdsOffsetMetadata_Blk: 45440 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -590805,15 +590022,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -590834,14 +590051,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 16 - NumLoadsB: 10 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -590927,8 +590144,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2263 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_10_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2260 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -590937,16 +590154,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -590963,8 +590180,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -590994,7 +590211,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -591006,7 +590223,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -591021,42 +590238,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT18_3_NTA0_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32640 - LdsNumElementsAlignedA: 19584 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 19584 - LdsOffsetB_Blk: 52352 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32640 - LdsOffsetMetadata_Blk: 52352 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -591066,14 +590283,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [18, 3] - MIWaveTileA: 18 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 288 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 288 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -591095,14 +590312,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 18 - NumLoadsB: 12 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 24 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 18 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -591188,8 +590405,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2264 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT18_3_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2261 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -591198,16 +590415,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 72 - ThreadTile1: 3 - ThreadTileA: 72 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -591224,21 +590441,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -591255,7 +590472,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -591271,7 +590488,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -591282,32 +590499,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_6_NTA4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_7_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 28288 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 104704 + LdsOffsetMetadata: 28288 + LdsOffsetMetadata_Blk: 45824 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -591316,8 +590533,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -591328,14 +590545,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [9, 6] - MIWaveTileA: 9 - MIWaveTileB: 6 + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 192 - MacroTileA: 288 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -591349,21 +590566,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 216 - NumLoadsA: 36 - NumLoadsB: 24 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 12 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -591449,8 +590666,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2265 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_6_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2262 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -591458,17 +590675,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 6 - ThreadTileA: 36 - ThreadTileB: 6 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -591479,27 +590696,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -591527,12 +590744,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -591543,45 +590760,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTA0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -591589,22 +590806,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -591617,14 +590834,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -591710,8 +590927,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2266 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2263 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -591719,17 +590936,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -591740,14 +590957,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -591777,7 +590994,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -591793,7 +591010,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -591804,88 +591021,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTA4_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_3_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 22144 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 22144 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 3] + MIWaveTileA: 8 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 128 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 128 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -591971,8 +591188,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2267 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2264 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_3_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -591980,16 +591197,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 32 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 32 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -592001,27 +591218,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -592065,7 +591282,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTA4_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -592078,9 +591295,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 58368 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -592089,7 +591306,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 + LdsOffsetMetadata: 58368 LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 @@ -592111,14 +591328,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] + MIWaveTile: [6, 6] MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 192 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -592132,21 +591349,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 NumLoadsA: 6 - NumLoadsB: 7 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -592232,15 +591449,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2268 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2265 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -592249,9 +591466,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 7 + ThreadTile1: 6 ThreadTileA: 24 - ThreadTileB: 7 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -592269,7 +591486,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -592282,7 +591499,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -592310,12 +591527,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -592326,68 +591543,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_7_NTA0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_1_SVW8_VWA8_WG32_8_1 LSCA: 32 LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 19584 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 19584 - LdsOffsetB_Blk: 85120 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 85120 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [9, 7] - MIWaveTileA: 9 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 1] + MIWaveTileA: 8 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 224 - MacroTileA: 288 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -592400,14 +591617,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 18 - NumLoadsB: 14 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 18 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -592493,8 +591710,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2269 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_7_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2266 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -592502,17 +591719,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 7 - ThreadTileA: 36 - ThreadTileB: 7 + ThreadTile0: 128 + ThreadTile1: 1 + ThreadTileA: 128 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -592523,14 +591740,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -592571,12 +591788,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -592587,32 +591804,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTA0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -592633,13 +591850,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 + MIWaveTile: [6, 7] + MIWaveTileA: 6 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 192 MacroTile1: 224 - MacroTileA: 128 + MacroTileA: 192 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -592661,13 +591878,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -592754,8 +591971,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2270 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2267 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -592763,16 +591980,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 24 ThreadTile1: 7 - ThreadTileA: 16 + ThreadTileA: 24 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -592784,14 +592001,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -592832,12 +592049,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -592848,88 +592065,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTA4_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -593015,8 +592232,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2271 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTA4_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2268 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -593024,17 +592241,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -593045,14 +592262,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -593061,7 +592278,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -593093,7 +592310,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -593109,12 +592326,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -593176,20 +592393,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 + NumLoadsA: 24 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -593276,15 +592493,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2272 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2269 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 2 SubGroup1: 128 @@ -593313,7 +592530,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -593326,7 +592543,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -593343,7 +592560,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -593354,7 +592571,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -593370,32 +592587,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA0_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29952 - LdsNumElementsAlignedA: 11520 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 11520 - LdsOffsetB_Blk: 44288 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29952 - LdsOffsetMetadata_Blk: 44288 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -593404,8 +592621,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -593415,14 +592632,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 160 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -593444,14 +592661,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 10 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -593537,8 +592754,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2273 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2270 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -593547,16 +592764,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -593573,21 +592790,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -593615,7 +592832,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -593631,12 +592848,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTA4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -593644,61 +592861,61 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [9, 4] - MIWaveTileA: 9 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 144 - MacroTile1: 256 - MacroTileA: 144 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 @@ -593707,12 +592924,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 144 NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 18 - NumLoadsB: 8 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 18 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -593798,8 +593015,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2274 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2271 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -593814,10 +593031,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 4 - ThreadTileA: 36 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -593834,8 +593051,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -593865,7 +593082,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -593881,7 +593098,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -593892,42 +593109,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_5_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 31360 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 31360 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -593937,15 +593154,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 5] + MIWaveTileA: 8 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -593966,13 +593183,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -594059,8 +593276,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2275 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2272 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -594068,16 +593285,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 24 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -594089,27 +593306,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -594126,7 +593343,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -594137,12 +593354,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -594153,45 +593370,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_5_NTA0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62208 - LdsNumElementsAlignedA: 39168 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 9216 LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62208 - LdsOffsetMetadata_Blk: 104704 - LdsPadA: 4 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -594199,22 +593416,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [9, 5] - MIWaveTileA: 9 + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 160 - MacroTileA: 288 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -594227,13 +593444,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 36 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 2 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -594320,8 +593537,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2276 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_5_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2273 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -594329,16 +593546,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 36 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -594350,27 +593567,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -594399,7 +593616,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -594414,88 +593631,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_5_NTA4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 19584 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 19584 - LdsOffsetB_Blk: 85120 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 85120 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 111616 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [9, 5] - MIWaveTileA: 9 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 144 - MacroTile1: 320 - MacroTileA: 144 - MacroTileB: 320 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 18 - NumLoadsB: 40 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 40 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 18 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -594581,8 +593798,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2277 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT9_5_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2274 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -594597,10 +593814,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 5 - ThreadTileA: 36 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -594617,8 +593834,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -594648,7 +593865,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -594659,12 +593876,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -594675,32 +593892,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_NTA0_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27648 - LdsNumElementsAlignedA: 9216 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27648 - LdsOffsetMetadata_Blk: 41984 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -594709,8 +593926,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -594721,14 +593938,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -594750,12 +593967,12 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 2 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -594842,8 +594059,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2278 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2275 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -594851,17 +594068,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -594872,27 +594089,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -594909,7 +594126,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -594925,7 +594142,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -594936,42 +594153,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_NTA4_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_4_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 31104 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 45440 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 31104 + LdsOffsetMetadata_Blk: 45440 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -594982,13 +594199,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 + MIWaveTile: [12, 4] + MIWaveTileA: 12 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 160 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -595003,21 +594220,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 12 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -595103,8 +594320,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2279 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2276 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -595112,16 +594329,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 48 ThreadTile1: 4 - ThreadTileA: 40 + ThreadTileA: 48 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -595133,27 +594350,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -595181,7 +594398,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -595197,12 +594414,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTA0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_6_SVW2_VWA2_WG32_8_1 LSCA: 32 LSCB: 32 - LSPA: 64 + LSPA: 16 LSPB: 64 - LVCA: 4 + LVCA: 16 LVCB: 4 LVPA: 8 LVPB: 8 @@ -595210,32 +594427,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 26880 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 8 + LdsOffsetMetadata: 26880 + LdsOffsetMetadata_Blk: 45824 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -595243,22 +594460,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -595271,14 +594488,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 2 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 12 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -595364,8 +594581,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2280 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2277 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_6_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -595374,16 +594591,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -595400,8 +594617,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -595431,7 +594648,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -595447,7 +594664,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -595458,32 +594675,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTA4_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64640 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 43520 + LdsNumBytes: 34432 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64640 - LdsOffsetMetadata_Blk: 86656 + LdsOffsetMetadata: 34432 + LdsOffsetMetadata_Blk: 78208 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -595492,8 +594709,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -595504,13 +594721,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 5] - MIWaveTileA: 10 + MIWaveTile: [12, 5] + MIWaveTileA: 12 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 192 MacroTile1: 320 - MacroTileA: 160 + MacroTileA: 192 MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 @@ -595525,21 +594742,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 40 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -595625,8 +594842,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2281 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2278 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -595634,16 +594851,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 48 ThreadTile1: 5 - ThreadTileA: 40 + ThreadTileA: 48 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -595655,27 +594872,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -595703,12 +594920,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -595719,34 +594936,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT8_5_SVW8_VWA8_WG32_8_1 LSCA: 32 LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26496 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 27776 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 45440 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26496 - LdsOffsetMetadata_Blk: 45440 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 27776 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -595764,15 +594981,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -595793,14 +595010,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 - NumLoadsB: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -595886,8 +595103,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2282 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 2279 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -595895,17 +595112,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -595916,13 +595133,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -595937,7 +595154,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 2 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -595964,12 +595181,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -595980,32 +595197,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_MIWT1_1_NLCA1_NLCB1_WG16_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 - LVCA: 32 + LSPB: 8 + LVCA: 8 LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 13312 + LdsNumElementsAlignedA: 2560 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 2560 + LdsOffsetB_Blk: 10752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 2560 + LdsOffsetMetadata_Blk: 10752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -596017,7 +595234,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -596025,15 +595242,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -596049,20 +595266,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 - NumThreads: 256 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 64 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -596147,26 +595364,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2283 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2280 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA128_LBSPPB128_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -596177,17 +595394,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 16] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -596197,8 +595414,8 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -596214,7 +595431,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -596225,12 +595442,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -596241,44 +595458,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_7_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28288 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 45824 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28288 - LdsOffsetMetadata_Blk: 45824 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -596286,15 +595503,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -596310,20 +595527,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 12 - NumLoadsB: 14 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 14 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -596408,26 +595625,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2284 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2281 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -596438,27 +595655,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 16] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -596487,11 +595704,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 20 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -596502,36 +595719,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -596547,15 +595764,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -596571,19 +595788,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 7 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -596669,26 +595886,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2285 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2282 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU20_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -596699,27 +595916,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 20] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -596736,7 +595953,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -596747,12 +595964,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -596763,42 +595980,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_3_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_PLR1_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 22144 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22144 - LdsOffsetMetadata_Blk: 41088 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 96256 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -596808,15 +596025,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 3] - MIWaveTileA: 8 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 144 + MacroTileA: 192 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -596832,19 +596049,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -596930,26 +596147,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2286 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_3_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGMn16 + SolutionIndex: 2283 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -596960,27 +596177,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 8] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -597008,12 +596225,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 13 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -597024,36 +596241,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -597069,15 +596286,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -597093,19 +596310,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -597191,26 +596408,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2287 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_6_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2284 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU13_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -597221,27 +596438,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 13] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -597258,7 +596475,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -597269,12 +596486,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -597285,34 +596502,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_1_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_PLR1_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -597320,33 +596537,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 1] - MIWaveTileA: 8 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 144 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -597354,19 +596571,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 32 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -597452,26 +596669,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2288 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2285 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU10_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 1 - ThreadTileA: 128 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -597482,27 +596699,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 10] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -597531,11 +596748,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -597546,36 +596763,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -597591,15 +596808,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -597615,19 +596832,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 7 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -597713,26 +596930,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2289 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2286 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU10_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -597743,27 +596960,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 10] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -597791,12 +597008,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -597807,68 +597024,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -597876,19 +597093,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -597974,26 +597191,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2290 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2287 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -598004,27 +597221,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -598053,11 +597270,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -598068,68 +597285,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 96256 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 256 + MacroTile1: 144 MacroTileA: 192 - MacroTileB: 256 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -598137,19 +597354,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 NumLoadsA: 24 - NumLoadsB: 8 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -598235,26 +597452,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2291 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2288 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -598265,27 +597482,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -598313,9 +597530,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -598329,68 +597546,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -598398,19 +597615,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -598496,26 +597713,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2292 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 + SolutionIndex: 2289 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU6_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -598533,20 +597750,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 6] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -598574,9 +597791,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -598590,88 +597807,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -598757,26 +597974,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2293 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 + SolutionIndex: 2290 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU6_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -598794,20 +598011,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 6] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -598824,7 +598041,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -598836,11 +598053,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -598851,42 +598068,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_5_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31360 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31360 - LdsOffsetMetadata_Blk: 41088 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -598896,15 +598113,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -598918,21 +598135,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -599018,26 +598235,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2294 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGMn16 + SolutionIndex: 2291 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -599048,27 +598265,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -599085,7 +598302,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -599112,68 +598329,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA0_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 320 + MacroTile1: 48 MacroTileA: 128 - MacroTileB: 320 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -599181,19 +598398,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 2 - NumLoadsB: 5 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -599279,26 +598496,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2295 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 + SolutionIndex: 2292 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -599316,20 +598533,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -599358,8 +598575,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -599373,88 +598590,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 111616 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 320 - MacroTile1: 128 + MacroTile1: 144 MacroTileA: 320 - MacroTileB: 128 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 NumLoadsA: 40 - NumLoadsB: 4 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -599540,26 +598757,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2296 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 + SolutionIndex: 2293 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -599577,10 +598794,10 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -599590,7 +598807,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -599618,12 +598835,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -599634,45 +598851,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -599680,22 +598897,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -599703,19 +598920,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -599801,26 +599018,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2297 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 2294 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -599831,14 +599048,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -599847,11 +599064,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -599868,7 +599085,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -599879,12 +599096,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -599895,44 +599112,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_4_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA0_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31104 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 45440 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31104 - LdsOffsetMetadata_Blk: 45440 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -599940,15 +599157,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -599964,19 +599181,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 12 - NumLoadsB: 4 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -600062,26 +599279,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2298 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 2295 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -600092,27 +599309,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -600129,7 +599346,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -600141,11 +599358,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -600156,42 +599373,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_6_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26880 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 45824 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26880 - LdsOffsetMetadata_Blk: 45824 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -600201,15 +599418,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -600225,19 +599442,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 12 - NumLoadsB: 3 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -600323,26 +599540,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2299 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT6_6_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2296 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -600353,27 +599570,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -600390,7 +599607,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -600403,10 +599620,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -600417,32 +599634,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34432 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34432 - LdsOffsetMetadata_Blk: 78208 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -600451,8 +599668,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -600462,15 +599679,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -600484,21 +599701,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 20 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -600584,26 +599801,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2300 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 2297 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -600614,27 +599831,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -600651,7 +599868,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -600662,12 +599879,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -600678,44 +599895,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT8_5_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTA0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27776 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27776 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -600723,15 +599940,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 9] + MIWaveTileA: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 144 + MacroTileA: 128 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -600747,19 +599964,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 16 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -600845,26 +600062,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2301 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2298 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 9 + ThreadTileA: 8 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -600875,28 +600092,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -600923,9 +600140,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -600939,36 +600156,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_MIWT1_1_NLCA1_NLCB1_WG16_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 LSPB: 8 - LVCA: 8 - LVCB: 8 - LVPA: 1 - LVPB: 1 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 13312 - LdsNumElementsAlignedA: 2560 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 8192 - LdsOffsetB: 2560 - LdsOffsetB_Blk: 10752 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 2560 - LdsOffsetMetadata_Blk: 10752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -600976,7 +600193,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -600984,15 +600201,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -601006,22 +600223,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 2 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 - NumThreads: 64 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -601106,8 +600323,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2302 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA128_LBSPPB128_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_1_WGM1 + SolutionIndex: 2299 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -601116,16 +600333,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 4 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -601142,22 +600359,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -601173,7 +600390,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -601185,11 +600402,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -601200,32 +600417,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_1 - LSCA: 256 - LSCB: 256 - LSPA: 4 - LSPB: 4 - LVCA: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 8704 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -601234,8 +600451,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -601245,15 +600462,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 9] + MIWaveTileA: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 144 + MacroTileA: 128 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -601267,22 +600484,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularB: 18 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -601367,8 +600584,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2303 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 + SolutionIndex: 2300 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -601376,17 +600593,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 9 + ThreadTileA: 8 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -601397,21 +600614,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -601447,10 +600664,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 20 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -601461,7 +600678,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -601470,27 +600687,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -601507,13 +600724,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 + MIWaveTile: [4, 9] + MIWaveTileA: 4 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 256 MacroTile1: 144 - MacroTileA: 320 + MacroTileA: 256 MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 @@ -601528,20 +600745,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 32 NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 @@ -601628,8 +600845,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2304 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU20_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2301 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -601637,16 +600854,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 16 ThreadTile1: 9 - ThreadTileA: 20 + ThreadTileA: 16 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -601658,7 +600875,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -601668,7 +600885,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 20] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -601708,7 +600925,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -601722,7 +600939,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_PLR1_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -601789,10 +601006,10 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 @@ -601889,8 +601106,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2305 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2302 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -601929,7 +601146,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -601969,7 +601186,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 13 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -601983,7 +601200,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -601996,23 +601213,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 96256 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -602029,13 +601246,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 + MIWaveTile: [3, 9] + MIWaveTileA: 3 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 192 MacroTile1: 144 - MacroTileA: 320 + MacroTileA: 192 MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 @@ -602050,20 +601267,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 @@ -602150,8 +601367,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2306 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU13_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2303 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -602166,9 +601383,9 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 12 ThreadTile1: 9 - ThreadTileA: 20 + ThreadTileA: 12 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -602190,7 +601407,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 13] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -602228,12 +601445,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -602244,32 +601461,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 30720 LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -602290,13 +601507,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 + MIWaveTile: [3, 9] + MIWaveTileA: 3 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 144 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 @@ -602311,20 +601528,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 32 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 @@ -602411,8 +601628,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2307 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU10_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2304 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -602420,16 +601637,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 12 ThreadTile1: 9 - ThreadTileA: 16 + ThreadTileA: 12 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -602441,7 +601658,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -602451,13 +601668,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -602491,7 +601708,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -602505,7 +601722,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -602518,23 +601735,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 96256 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -602551,13 +601768,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 + MIWaveTile: [3, 9] + MIWaveTileA: 3 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 192 MacroTile1: 144 - MacroTileA: 320 + MacroTileA: 192 MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 @@ -602572,20 +601789,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 @@ -602672,8 +601889,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2308 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU10_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2305 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -602688,9 +601905,9 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 12 ThreadTile1: 9 - ThreadTileA: 20 + ThreadTileA: 12 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -602712,7 +601929,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -602750,12 +601967,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -602766,36 +601983,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -602812,13 +602029,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 + MIWaveTile: [4, 9] + MIWaveTileA: 4 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 256 MacroTile1: 144 - MacroTileA: 320 + MacroTileA: 256 MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 @@ -602833,20 +602050,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 8 NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 @@ -602933,8 +602150,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2309 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2306 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -602942,16 +602159,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 16 ThreadTile1: 9 - ThreadTileA: 20 + ThreadTileA: 16 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -602963,7 +602180,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -602973,13 +602190,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -603013,10 +602230,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -603027,7 +602244,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -603036,23 +602253,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 30720 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -603073,13 +602290,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 9] - MIWaveTileA: 3 + MIWaveTile: [4, 9] + MIWaveTileA: 4 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 144 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 @@ -603094,20 +602311,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 32 NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 @@ -603194,8 +602411,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2310 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2307 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -603203,16 +602420,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 16 ThreadTile1: 9 - ThreadTileA: 12 + ThreadTileA: 16 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -603224,7 +602441,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -603234,7 +602451,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -603274,7 +602491,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 6 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -603288,7 +602505,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -603355,7 +602572,7 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 @@ -603455,8 +602672,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2311 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU6_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2308 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -603495,7 +602712,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -603522,7 +602739,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -603533,12 +602750,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 6 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -603549,33 +602766,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV1_MIWT2_9_NTA0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 19072 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 + LdsOffsetMetadata: 19072 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 8 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -603583,10 +602800,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -603595,13 +602812,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 + MIWaveTile: [2, 9] + MIWaveTileA: 2 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 128 MacroTile1: 144 - MacroTileA: 320 + MacroTileA: 128 MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 @@ -603616,21 +602833,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 2 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -603716,8 +602933,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2312 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU6_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2309 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIAV1_MIWT2_9_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -603725,16 +602942,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 8 ThreadTile1: 9 - ThreadTileA: 20 + ThreadTileA: 8 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -603746,7 +602963,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -603756,13 +602973,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -603783,7 +603000,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -603796,10 +603013,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -603810,32 +603027,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_9_NTA0_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 26752 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 + LdsOffsetMetadata: 26752 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -603844,8 +603061,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -603856,13 +603073,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 + MIWaveTile: [4, 9] + MIWaveTileA: 4 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 256 MacroTile1: 144 - MacroTileA: 320 + MacroTileA: 256 MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 @@ -603877,21 +603094,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 16 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -603977,25 +603194,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2313 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2310 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_9_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 16 ThreadTile1: 9 - ThreadTileA: 20 + ThreadTileA: 16 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -604007,7 +603224,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -604017,17 +603234,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -604044,7 +603261,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -604055,12 +603272,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -604071,22 +603288,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA0_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 + LdsNumBytes: 57856 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -604095,7 +603312,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 + LdsOffsetMetadata: 57856 LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 @@ -604105,10 +603322,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -604117,14 +603334,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 144 + MacroTileA: 256 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -604138,21 +603355,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 32 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -604238,26 +603455,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2314 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2311 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -604268,7 +603485,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -604279,16 +603496,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -604305,7 +603522,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -604318,7 +603535,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -604332,32 +603549,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_9_NTA0_SVW1_VWA1_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 40320 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 + LdsOffsetMetadata: 40320 + LdsOffsetMetadata_Blk: 96000 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -604366,8 +603583,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -604378,13 +603595,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 + MIWaveTile: [7, 9] + MIWaveTileA: 7 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 448 MacroTile1: 144 - MacroTileA: 320 + MacroTileA: 448 MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 @@ -604399,21 +603616,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 28 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -604499,15 +603716,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2315 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2312 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_9_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 @@ -604515,9 +603732,9 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 28 ThreadTile1: 9 - ThreadTileA: 20 + ThreadTileA: 28 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -604539,17 +603756,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -604578,11 +603795,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -604593,32 +603810,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 8 LVCA: 8 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -604630,7 +603847,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -604638,15 +603855,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 144 + MacroTileA: 256 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -604660,21 +603877,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 + NumElementsPerThread: 144 NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 + NumLoadsA: 8 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -604760,26 +603977,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2316 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2313 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -604790,13 +604007,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -604810,7 +604027,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -604827,7 +604044,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -604838,8 +604055,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -604854,44 +604071,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -604899,15 +604116,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -604921,21 +604138,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -605021,26 +604238,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2317 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2314 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -605057,21 +604274,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -605088,7 +604305,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -605099,9 +604316,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -605115,44 +604332,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA0_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_MIWT1_1_NLCA1_NLCB1_WG16_4_2 + LSCA: 512 + LSCB: 512 + LSPA: 2 + LSPB: 2 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -605160,15 +604377,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -605189,15 +604406,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 - NumThreads: 256 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -605282,8 +604499,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2318 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2315 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_LBSPPA1024_LBSPPB1024_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -605292,16 +604509,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 + SubGroup0: 4 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -605318,22 +604535,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 4] + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -605349,7 +604566,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -605360,9 +604577,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 12 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -605376,44 +604593,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_2 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -605421,15 +604638,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -605443,21 +604660,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -605543,8 +604760,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2319 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2316 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU12_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -605553,16 +604770,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -605579,22 +604796,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 12] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -605610,7 +604827,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -605621,12 +604838,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 13 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -605637,42 +604854,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTA0_NTC3_NTD3_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_2 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -605682,15 +604899,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 144 - MacroTileA: 128 - MacroTileB: 144 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -605706,19 +604923,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 16 - NumLoadsB: 18 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -605804,8 +605021,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2320 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2317 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU13_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -605813,17 +605030,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -605834,21 +605051,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 13] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -605884,10 +605101,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -605898,7 +605115,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -605907,27 +605124,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -605944,14 +605161,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -605965,21 +605182,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -606065,8 +605282,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2321 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2318 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU16_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -606074,17 +605291,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -606095,7 +605312,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -606105,7 +605322,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 16] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -606143,12 +605360,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -606159,32 +605376,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -606196,7 +605413,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -606205,14 +605422,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 144 - MacroTileA: 128 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -606226,21 +605443,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 18 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -606326,8 +605543,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2322 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2319 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU10_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -606335,17 +605552,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -606356,7 +605573,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -606366,13 +605583,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 10] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -606393,7 +605610,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -606404,8 +605621,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -606420,32 +605637,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_PLR1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -606454,10 +605671,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -606465,15 +605682,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -606487,21 +605704,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 32 - NumLoadsB: 18 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -606587,8 +605804,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2323 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2320 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -606597,16 +605814,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 9 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 9 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -606623,17 +605840,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -606665,12 +605882,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -606681,32 +605898,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -606727,14 +605944,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 144 - MacroTileA: 192 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -606748,21 +605965,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 18 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -606848,8 +606065,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2324 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2321 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -606857,17 +606074,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -606878,7 +606095,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -606888,13 +606105,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -606928,7 +606145,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -606942,7 +606159,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -606955,9 +606172,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 + LdsNumBytes: 58880 LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -606966,7 +606183,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 + LdsOffsetMetadata: 58880 LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 @@ -606988,14 +606205,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 9] + MIWaveTile: [3, 11] MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 144 + MacroTile1: 176 MacroTileA: 192 - MacroTileB: 144 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -607009,21 +606226,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 + NumElementsPerThread: 132 + NumGlobalWriteVectorsPerThread: 132 NumLoadsA: 24 - NumLoadsB: 18 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -607109,8 +606326,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2325 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2322 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -607126,9 +606343,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 9 + ThreadTile1: 11 ThreadTileA: 12 - ThreadTileB: 9 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -607149,7 +606366,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -607187,12 +606404,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -607203,32 +606420,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -607249,14 +606466,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 144 - MacroTileA: 192 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -607270,21 +606487,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 18 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -607370,8 +606587,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2326 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2323 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -607379,17 +606596,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -607400,7 +606617,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -607410,13 +606627,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -607450,10 +606667,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -607464,7 +606681,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -607473,23 +606690,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -607510,14 +606727,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 144 - MacroTileA: 192 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -607533,19 +606750,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 18 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -607631,8 +606848,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2327 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2324 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -607640,17 +606857,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -607661,7 +606878,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -607671,7 +606888,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -607709,9 +606926,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -607725,12 +606942,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 @@ -607738,9 +606955,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 + LdsNumBytes: 62976 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -607749,7 +606966,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 + LdsOffsetMetadata: 62976 LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 @@ -607771,14 +606988,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] + MIWaveTile: [4, 11] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 144 + MacroTile1: 176 MacroTileA: 256 - MacroTileB: 144 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -607794,19 +607011,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 8 - NumLoadsB: 18 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -607892,8 +607109,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2328 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2325 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -607909,9 +607126,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 9 + ThreadTile1: 11 ThreadTileA: 16 - ThreadTileB: 9 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -607932,13 +607149,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -607970,12 +607187,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -607986,32 +607203,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTA0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -608023,7 +607240,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -608031,15 +607248,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -608053,21 +607270,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 32 - NumLoadsB: 18 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -608153,8 +607370,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2329 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2326 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -608162,17 +607379,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -608183,13 +607400,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -608199,7 +607416,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -608233,10 +607450,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -608247,7 +607464,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -608256,27 +607473,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -608293,14 +607510,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -608316,19 +607533,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -608414,8 +607631,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2330 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2327 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -608423,17 +607640,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -608444,7 +607661,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -608454,7 +607671,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -608481,7 +607698,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -608493,7 +607710,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -608508,42 +607725,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV1_MIWT2_9_NTA0_NTC0_NTD0_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 19072 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19072 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -608553,15 +607770,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 144 - MacroTileA: 128 - MacroTileB: 144 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -608577,19 +607794,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 72 NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 2 - NumLoadsB: 9 + NumLoadsA: 6 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -608675,8 +607892,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2331 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIAV1_MIWT2_9_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2328 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -608685,16 +607902,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -608711,15 +607928,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -608742,7 +607959,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -608754,11 +607971,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -608769,44 +607986,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_9_NTA0_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26752 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26752 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -608814,15 +608031,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -608838,19 +608055,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 + NumElementsPerThread: 72 NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 16 - NumLoadsB: 9 + NumLoadsA: 24 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -608936,26 +608153,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2332 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_9_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2329 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -608966,27 +608183,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -609016,10 +608233,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -609030,7 +608247,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA0_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -609039,23 +608256,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -609076,14 +608293,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [3, 11] + MIWaveTileA: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 192 + MacroTile1: 176 + MacroTileA: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -609097,21 +608314,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 32 - NumLoadsB: 18 + NumElementsPerThread: 132 + NumGlobalWriteVectorsPerThread: 132 + NumLoadsA: 24 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -609197,26 +608414,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2333 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2330 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 12 + ThreadTile1: 11 + ThreadTileA: 12 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -609227,7 +608444,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -609237,7 +608454,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -609247,7 +608464,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -609264,7 +608481,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -609275,12 +608492,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -609291,44 +608508,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_9_NTA0_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40320 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40320 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -609336,15 +608553,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 9] - MIWaveTileA: 7 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 144 - MacroTileA: 448 - MacroTileB: 144 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -609358,21 +608575,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 28 - NumLoadsB: 9 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -609458,26 +608675,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2334 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_9_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2331 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 9 - ThreadTileA: 28 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -609488,27 +608705,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -609536,12 +608753,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -609552,32 +608769,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -609598,14 +608815,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [3, 11] + MIWaveTileA: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 192 + MacroTile1: 176 + MacroTileA: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -609621,19 +608838,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 8 - NumLoadsB: 18 + NumElementsPerThread: 132 + NumGlobalWriteVectorsPerThread: 132 + NumLoadsA: 24 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -609719,26 +608936,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2335 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2332 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 12 + ThreadTile1: 11 + ThreadTileA: 12 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -609749,7 +608966,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -609759,17 +608976,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -609799,10 +609016,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -609813,7 +609030,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -609822,27 +609039,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -609859,14 +609076,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -609882,19 +609099,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -609980,26 +609197,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2336 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2333 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -610010,7 +609227,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -610020,7 +609237,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -610030,7 +609247,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -610047,7 +609264,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -610058,12 +609275,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -610074,44 +609291,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_MIWT1_1_NLCA1_NLCB1_WG16_4_2 - LSCA: 512 - LSCB: 512 - LSPA: 2 - LSPB: 2 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_11_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 46592 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 46592 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -610119,15 +609336,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 11] + MIWaveTileA: 2 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 176 + MacroTileA: 128 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -610141,22 +609358,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 - NumLoadsB: 8 + NumElementsPerThread: 88 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 16 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 22 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -610241,8 +609458,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2337 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_LBSPPA1024_LBSPPB1024_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_2_WGM1 + SolutionIndex: 2334 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -610250,17 +609467,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 4 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 11 + ThreadTileA: 8 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -610271,28 +609488,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -610308,7 +609525,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -610319,9 +609536,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 12 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -610335,44 +609552,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_2 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 58880 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 8704 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -610380,15 +609597,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 11] + MIWaveTileA: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 192 + MacroTile1: 176 + MacroTileA: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -610402,21 +609619,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 132 + NumGlobalWriteVectorsPerThread: 132 + NumLoadsA: 24 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -610502,8 +609719,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2338 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU12_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2335 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -610512,16 +609729,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 11 + ThreadTileA: 12 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -610538,22 +609755,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 12] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -610569,7 +609786,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -610580,9 +609797,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 13 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -610596,44 +609813,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_2 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 58880 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 8704 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -610641,15 +609858,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 11] + MIWaveTileA: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 192 + MacroTile1: 176 + MacroTileA: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -610663,21 +609880,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 132 + NumGlobalWriteVectorsPerThread: 132 + NumLoadsA: 24 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -610763,8 +609980,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2339 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU13_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2336 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -610773,16 +609990,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 11 + ThreadTileA: 12 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -610799,17 +610016,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 13] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -610841,12 +610058,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 16 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -610857,32 +610074,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 30720 LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -610903,13 +610120,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 + MIWaveTile: [3, 11] + MIWaveTileA: 3 MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 176 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 @@ -610924,20 +610141,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 + NumElementsPerThread: 132 + NumGlobalWriteVectorsPerThread: 132 + NumLoadsA: 6 NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 @@ -611024,8 +610241,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2340 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU16_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2337 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -611033,16 +610250,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 12 ThreadTile1: 11 - ThreadTileA: 16 + ThreadTileA: 12 ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true @@ -611054,7 +610271,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -611064,13 +610281,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -611102,9 +610319,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -611118,12 +610335,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 @@ -611185,20 +610402,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 176 NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 + NumLoadsA: 8 NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 @@ -611285,8 +610502,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2341 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU10_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2338 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -611325,13 +610542,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -611352,7 +610569,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -611363,9 +610580,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -611379,32 +610596,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_PLR1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -611413,10 +610630,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -611424,15 +610641,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -611446,21 +610663,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -611546,8 +610763,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2342 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU2_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2339 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -611556,16 +610773,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 11 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -611582,17 +610799,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -611613,7 +610830,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -611626,10 +610843,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -611640,42 +610857,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_11_NTA0_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 12032 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -611686,13 +610903,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 + MIWaveTile: [5, 11] + MIWaveTileA: 5 MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 320 MacroTile1: 176 - MacroTileA: 256 + MacroTileA: 320 MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 @@ -611714,14 +610931,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 220 + NumGlobalWriteVectorsPerThread: 220 + NumLoadsA: 20 + NumLoadsB: 11 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 11 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -611807,8 +611024,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2343 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2340 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_11_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -611816,16 +611033,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 20 ThreadTile1: 11 - ThreadTileA: 16 + ThreadTileA: 20 ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true @@ -611837,7 +611054,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -611847,13 +611064,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -611885,9 +611102,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -611901,32 +611118,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_3_NTA0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 111616 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -611946,15 +611163,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 11] - MIWaveTileA: 3 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 3] + MIWaveTileA: 9 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 176 - MacroTileA: 192 - MacroTileB: 176 + MacroTile0: 288 + MacroTile1: 96 + MacroTileA: 288 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -611975,14 +611192,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 132 - NumGlobalWriteVectorsPerThread: 132 - NumLoadsA: 24 - NumLoadsB: 22 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 9 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 9 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -612068,8 +611285,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2344 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2341 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_3_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -612078,16 +611295,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 11 - ThreadTileA: 12 - ThreadTileB: 11 + ThreadTile0: 36 + ThreadTile1: 3 + ThreadTileA: 36 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -612104,17 +611321,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -612146,9 +611363,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -612162,12 +611379,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 @@ -612229,20 +611446,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 176 NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 + NumLoadsA: 8 NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 @@ -612329,15 +611546,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2345 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2342 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 @@ -612369,17 +611586,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -612409,7 +611626,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -612423,7 +611640,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -612492,8 +611709,8 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 @@ -612590,15 +611807,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2346 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2343 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 @@ -612630,7 +611847,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -612640,7 +611857,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -612670,7 +611887,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -612684,7 +611901,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -612751,10 +611968,10 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 @@ -612851,15 +612068,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2347 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2344 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 @@ -612891,7 +612108,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -612901,8 +612118,8 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 + _staggerStrideShift: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -612918,7 +612135,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -612931,7 +612148,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -612945,42 +612162,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTA0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_2 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -612990,15 +612207,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 96 - MacroTileA: 160 - MacroTileB: 96 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -613019,14 +612236,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -613112,8 +612329,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2348 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2345 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU11_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -613122,16 +612339,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -613148,15 +612365,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 11] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -613179,7 +612396,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -613190,12 +612407,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 22 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -613206,32 +612423,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -613240,10 +612457,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -613251,15 +612468,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -613273,22 +612490,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -613373,8 +612590,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2349 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2346 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU22_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -613382,17 +612599,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -613403,23 +612620,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 22] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -613451,12 +612668,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -613467,32 +612684,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_PLR1_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -613513,14 +612730,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -613536,19 +612753,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -613634,8 +612851,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2350 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2347 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -613643,17 +612860,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -613664,7 +612881,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -613674,7 +612891,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -613712,12 +612929,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -613728,36 +612945,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -613765,7 +612982,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -613773,15 +612990,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -613797,19 +613014,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 24 - NumLoadsB: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -613895,8 +613112,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2351 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2348 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_GSU16_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -613904,17 +613121,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -613925,17 +613142,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 16] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -613962,7 +613179,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -613973,9 +613190,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -613989,32 +613206,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA0_NTC0_NTD0_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -614023,10 +613240,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -614034,15 +613251,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 11] + MIWaveGroup: [2, 2] + MIWaveTile: [3, 2] MIWaveTileA: 3 - MIWaveTileB: 11 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 176 - MacroTileA: 192 - MacroTileB: 176 + MacroTile0: 96 + MacroTile1: 64 + MacroTileA: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -614063,14 +613280,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 132 - NumGlobalWriteVectorsPerThread: 132 - NumLoadsA: 24 - NumLoadsB: 22 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -614156,8 +613373,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2352 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2349 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -614166,16 +613383,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 11 + ThreadTile1: 2 ThreadTileA: 12 - ThreadTileB: 11 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -614192,17 +613409,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -614234,12 +613451,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -614250,32 +613467,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -614287,7 +613504,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -614295,15 +613512,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 13] + MIWaveTileA: 3 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 96 + MacroTile1: 208 MacroTileA: 192 - MacroTileB: 96 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -614317,21 +613534,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 24 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -614417,8 +613634,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2353 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2350 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -614426,17 +613643,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 13 + ThreadTileA: 12 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -614447,23 +613664,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -614497,7 +613714,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalSplitU: 7 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -614511,7 +613728,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -614524,9 +613741,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 + LdsNumBytes: 64000 LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 28160 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -614535,7 +613752,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 + LdsOffsetMetadata: 64000 LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 @@ -614557,14 +613774,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 11] + MIWaveTile: [3, 13] MIWaveTileA: 3 - MIWaveTileB: 11 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 176 + MacroTile1: 208 MacroTileA: 192 - MacroTileB: 176 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -614578,21 +613795,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 132 - NumGlobalWriteVectorsPerThread: 132 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 NumLoadsA: 24 - NumLoadsB: 22 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -614678,8 +613895,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2354 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2351 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU7_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -614695,9 +613912,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 11 + ThreadTile1: 13 ThreadTileA: 12 - ThreadTileB: 11 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -614718,7 +613935,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 7] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -614756,9 +613973,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -614772,12 +613989,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 @@ -614785,23 +614002,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -614818,14 +614035,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 176 + MacroTile1: 208 MacroTileA: 256 - MacroTileB: 176 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -614839,21 +614056,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -614939,8 +614156,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2355 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2352 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU10_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -614956,9 +614173,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 11 + ThreadTile1: 13 ThreadTileA: 16 - ThreadTileB: 11 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -614979,13 +614196,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 10] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -615017,12 +614234,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -615033,36 +614250,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_11_NTA4_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46592 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46592 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -615079,14 +614296,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 11] - MIWaveTileA: 2 - MIWaveTileB: 11 + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 176 - MacroTileA: 128 - MacroTileB: 176 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -615100,21 +614317,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 88 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 16 - NumLoadsB: 22 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -615200,8 +614417,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2356 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2353 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU8_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -615209,17 +614426,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 11 - ThreadTileA: 8 - ThreadTileB: 11 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -615230,7 +614447,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -615240,13 +614457,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -615280,7 +614497,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -615294,7 +614511,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -615307,9 +614524,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 + LdsNumBytes: 64000 LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 28160 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -615318,7 +614535,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 + LdsOffsetMetadata: 64000 LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 @@ -615340,14 +614557,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 11] + MIWaveTile: [3, 13] MIWaveTileA: 3 - MIWaveTileB: 11 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 176 + MacroTile1: 208 MacroTileA: 192 - MacroTileB: 176 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -615361,21 +614578,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 132 - NumGlobalWriteVectorsPerThread: 132 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 NumLoadsA: 24 - NumLoadsB: 22 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -615461,8 +614678,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2357 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2354 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -615478,9 +614695,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 11 + ThreadTile1: 13 ThreadTileA: 12 - ThreadTileB: 11 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -615501,7 +614718,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -615541,7 +614758,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -615555,7 +614772,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -615568,9 +614785,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 + LdsNumBytes: 64000 LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 28160 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -615579,7 +614796,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 + LdsOffsetMetadata: 64000 LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 @@ -615601,14 +614818,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 11] + MIWaveTile: [3, 13] MIWaveTileA: 3 - MIWaveTileB: 11 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 176 + MacroTile1: 208 MacroTileA: 192 - MacroTileB: 176 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -615622,21 +614839,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 132 - NumGlobalWriteVectorsPerThread: 132 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 NumLoadsA: 24 - NumLoadsB: 22 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -615722,8 +614939,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2358 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2355 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -615739,9 +614956,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 12 - ThreadTile1: 11 + ThreadTile1: 13 ThreadTileA: 12 - ThreadTileB: 11 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -615762,7 +614979,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -615802,10 +615019,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -615816,7 +615033,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -615825,27 +615042,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -615862,14 +615079,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 11] - MIWaveTileA: 3 - MIWaveTileB: 11 + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 176 - MacroTileA: 192 - MacroTileB: 176 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -615890,14 +615107,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 132 - NumGlobalWriteVectorsPerThread: 132 - NumLoadsA: 6 - NumLoadsB: 22 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -615983,8 +615200,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2359 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_11_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2356 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU5_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -615992,17 +615209,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 11 - ThreadTileA: 12 - ThreadTileB: 11 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -616013,7 +615230,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -616023,7 +615240,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -616061,12 +615278,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -616077,32 +615294,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -616123,14 +615340,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTile: [3, 13] + MIWaveTileA: 3 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 192 + MacroTile1: 208 + MacroTileA: 192 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -616146,19 +615363,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 8 - NumLoadsB: 22 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 24 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -616244,8 +615461,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2360 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2357 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -616253,17 +615470,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 12 + ThreadTile1: 13 + ThreadTileA: 12 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -616274,7 +615491,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -616284,13 +615501,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -616322,9 +615539,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -616338,12 +615555,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 LVPA: 4 LVPB: 4 @@ -616351,23 +615568,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -616384,14 +615601,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 176 + MacroTile1: 208 MacroTileA: 256 - MacroTileB: 176 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -616407,19 +615624,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -616505,8 +615722,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2361 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2358 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU4_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -616522,9 +615739,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 11 + ThreadTile1: 13 ThreadTileA: 16 - ThreadTileB: 11 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -616545,13 +615762,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -616572,7 +615789,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -616584,7 +615801,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -616599,44 +615816,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_11_NTA0_NTC0_NTD0_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTA0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 12032 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -616644,15 +615861,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 11] + MIWaveGroup: [2, 2] + MIWaveTile: [5, 4] MIWaveTileA: 5 - MIWaveTileB: 11 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 176 - MacroTileA: 320 - MacroTileB: 176 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -616668,19 +615885,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 220 - NumGlobalWriteVectorsPerThread: 220 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 20 - NumLoadsB: 11 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 11 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -616766,8 +615983,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2362 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x176x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_11_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2359 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -616776,16 +615993,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 - ThreadTile1: 11 + ThreadTile1: 4 ThreadTileA: 20 - ThreadTileB: 11 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -616802,15 +616019,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -616845,11 +616062,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -616860,36 +616077,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_3_NTA0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 8 LVCA: 8 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 111616 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -616905,15 +616122,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [9, 3] - MIWaveTileA: 9 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 96 - MacroTileA: 288 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -616927,21 +616144,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 9 - NumLoadsB: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 9 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -617027,8 +616244,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2363 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_3_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2360 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU3_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -617036,17 +616253,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 3 - ThreadTileA: 36 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -617057,17 +616274,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -617106,11 +616323,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -617121,88 +616338,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_1_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 44544 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 1] + MIWaveTileA: 6 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 8 - NumLoadsB: 22 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -617288,26 +616505,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2364 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2361 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_1_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 96 + ThreadTile1: 1 + ThreadTileA: 96 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -617318,13 +616535,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -617338,7 +616555,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -617367,11 +616584,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -617382,32 +616599,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -617427,15 +616644,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -617449,21 +616666,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 24 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -617549,26 +616766,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2365 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2362 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -617579,13 +616796,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -617595,11 +616812,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -617629,10 +616846,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -617643,7 +616860,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -617652,23 +616869,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -617689,14 +616906,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTile: [3, 13] + MIWaveTileA: 3 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 192 + MacroTile1: 208 + MacroTileA: 192 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -617710,21 +616927,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 24 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -617810,26 +617027,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2366 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2363 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 12 + ThreadTile1: 13 + ThreadTileA: 12 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -617840,7 +617057,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -617850,7 +617067,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -617860,8 +617077,8 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -617877,7 +617094,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -617890,10 +617107,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 11 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -617904,44 +617121,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_2 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 8704 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -617949,15 +617166,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -617973,18 +617190,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 2 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -618071,8 +617288,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2367 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU11_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2364 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -618080,17 +617297,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -618101,21 +617318,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -618138,7 +617355,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -618149,9 +617366,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 22 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -618165,32 +617382,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_WG16_8_1 - LSCA: 256 - LSCB: 256 - LSPA: 4 - LSPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -618199,10 +617416,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -618210,15 +617427,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 13] + MIWaveTileA: 3 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 192 + MacroTile1: 208 + MacroTileA: 192 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -618232,22 +617449,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 24 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 26 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -618332,8 +617549,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2368 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU22_LBSPPA512_LBSPPB512_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 + SolutionIndex: 2365 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -618342,16 +617559,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 13 + ThreadTileA: 12 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -618368,17 +617585,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 22] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -618410,12 +617627,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -618426,32 +617643,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_PLR1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA4_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 17408 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -618463,7 +617680,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -618472,13 +617689,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 + MIWaveTile: [8, 4] + MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -618493,20 +617710,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 + NumElementsPerThread: 128 NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 16 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -618593,8 +617810,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2369 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2366 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -618602,16 +617819,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -618623,7 +617840,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -618633,7 +617850,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -618671,12 +617888,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 16 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -618687,36 +617904,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -618732,15 +617949,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -618756,19 +617973,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -618854,8 +618071,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2370 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB2_GSU16_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2367 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -618863,17 +618080,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -618884,17 +618101,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -618921,7 +618138,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -618933,11 +618150,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -618948,44 +618165,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -618993,15 +618210,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 64 - MacroTileA: 96 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -619015,21 +618232,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -619115,8 +618332,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2371 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2368 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -619124,17 +618341,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -619145,21 +618362,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -619195,7 +618412,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -619209,7 +618426,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -619276,10 +618493,10 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 @@ -619376,8 +618593,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2372 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2369 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -619416,7 +618633,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -619456,7 +618673,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 7 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -619470,7 +618687,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -619537,7 +618754,7 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 @@ -619637,8 +618854,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2373 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU7_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2370 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -619677,7 +618894,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 7] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -619717,10 +618934,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -619731,7 +618948,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -619740,27 +618957,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 96256 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -619777,13 +618994,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 + MIWaveTile: [3, 13] + MIWaveTileA: 3 MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 208 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 @@ -619798,20 +619015,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 6 NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 @@ -619898,8 +619115,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2374 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU10_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2371 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -619907,16 +619124,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 12 ThreadTile1: 13 - ThreadTileA: 16 + ThreadTileA: 12 ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true @@ -619928,7 +619145,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -619938,7 +619155,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -619978,7 +619195,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -619992,7 +619209,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -620059,10 +619276,10 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 @@ -620159,8 +619376,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2375 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU8_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2372 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -620199,7 +619416,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -620226,7 +619443,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -620238,11 +619455,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -620253,42 +619470,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_NTA0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 30976 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 54528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 30976 + LdsOffsetMetadata_Blk: 54528 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -620298,15 +619515,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -620327,14 +619544,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 24 - NumLoadsB: 26 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -620420,8 +619637,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2376 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2373 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -620429,17 +619646,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -620450,23 +619667,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -620499,8 +619716,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -620514,36 +619731,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTA0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 57600 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57600 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -620559,15 +619776,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 4] + MIWaveTileA: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 288 + MacroTile1: 128 + MacroTileA: 288 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -620588,14 +619805,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 24 - NumLoadsB: 26 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 36 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -620681,8 +619898,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2377 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2374 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -620691,16 +619908,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 36 + ThreadTile1: 4 + ThreadTileA: 36 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -620717,11 +619934,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -620759,12 +619976,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -620775,34 +619992,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 57600 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 57600 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -620820,15 +620037,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 4] + MIWaveTileA: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 288 + MacroTile1: 128 + MacroTileA: 288 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -620849,14 +620066,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 36 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -620942,8 +620159,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2378 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU5_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2375 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -620951,17 +620168,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 36 + ThreadTile1: 4 + ThreadTileA: 36 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -620972,23 +620189,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -621020,12 +620237,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -621036,32 +620253,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTA0_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -621081,15 +620298,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -621103,21 +620320,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 24 - NumLoadsB: 26 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -621203,8 +620420,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2379 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2376 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -621212,17 +620429,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -621233,23 +620450,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -621281,12 +620498,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -621297,36 +620514,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_13_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 96256 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -621343,13 +620560,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 + MIWaveTile: [3, 13] + MIWaveTileA: 3 MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 208 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 @@ -621371,13 +620588,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 24 NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 @@ -621464,8 +620681,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2380 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU4_LBSPPA512_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2377 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_13_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -621473,16 +620690,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 12 ThreadTile1: 13 - ThreadTileA: 16 + ThreadTileA: 12 ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true @@ -621494,7 +620711,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -621504,13 +620721,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -621542,12 +620759,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -621558,36 +620775,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTA0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 62080 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 28288 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62080 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -621595,7 +620812,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -621603,15 +620820,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -621627,19 +620844,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 4 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 8 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -621725,26 +620942,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2381 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2378 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -621755,13 +620972,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -621775,7 +620992,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -621805,7 +621022,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -621819,7 +621036,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -621888,8 +621105,8 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 @@ -621986,15 +621203,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2382 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU3_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2379 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 @@ -622026,7 +621243,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -622036,7 +621253,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -622064,12 +621281,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -622080,88 +621297,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_1_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44544 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 33280 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 96256 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 1] - MIWaveTileA: 6 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 13] + MIWaveTileA: 3 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 128 + MacroTile1: 208 MacroTileA: 192 - MacroTileB: 128 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 24 + NumLoadsB: 26 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 26 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -622247,26 +621464,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2383 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT6_1_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2380 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 1 - ThreadTileA: 96 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 13 + ThreadTileA: 12 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -622277,13 +621494,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -622293,11 +621510,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -622330,7 +621547,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -622341,7 +621558,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -622350,23 +621567,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -622387,13 +621604,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 + MIWaveTile: [8, 4] + MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -622410,18 +621627,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -622508,25 +621725,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2384 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2381 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 24 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -622538,7 +621755,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -622554,11 +621771,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -622575,7 +621792,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -622586,9 +621803,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -622602,44 +621819,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_4_4 + LSCA: 512 + LSCB: 512 + LSPA: 4 + LSPB: 4 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -622647,15 +621864,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -622669,21 +621886,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 24 - NumLoadsB: 26 + NumElementsPerThread: 1 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -622769,8 +621986,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2385 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2382 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -622779,16 +621996,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 + SubGroup0: 4 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -622805,17 +622022,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -622836,7 +622053,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -622849,10 +622066,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -622863,32 +622080,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTA0_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 13824 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 13824 + LdsOffsetMetadata_Blk: 20992 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -622897,10 +622114,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -622908,15 +622125,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -622932,20 +622149,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -623030,8 +622247,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2386 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2383 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -623039,17 +622256,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -623060,21 +622277,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 16] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -623097,7 +622314,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -623108,9 +622325,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 19 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -623124,32 +622341,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -623158,10 +622375,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -623169,15 +622386,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -623191,22 +622408,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 24 - NumLoadsB: 26 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 26 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -623291,8 +622508,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2387 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2384 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU19_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -623301,16 +622518,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -623327,17 +622544,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 19] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -623371,10 +622588,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -623385,7 +622602,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA4_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_PLR1_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -623394,45 +622611,45 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 @@ -623443,24 +622660,24 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -623552,8 +622769,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2388 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2385 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -623561,7 +622778,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -623582,17 +622799,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -623619,7 +622836,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -623630,9 +622847,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -623646,32 +622863,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -623680,10 +622897,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -623692,13 +622909,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 96 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 96 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -623715,19 +622932,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 - NumLoadsB: 4 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -623813,8 +623030,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2389 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2386 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -623829,9 +623046,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 12 ThreadTile1: 4 - ThreadTileA: 28 + ThreadTileA: 12 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -623853,11 +623070,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -623893,10 +623110,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -623907,7 +623124,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -623916,23 +623133,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 60288 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 32640 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 60288 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 4 LdsPadMetadata: 0 @@ -623953,14 +623170,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTile: [3, 15] + MIWaveTileA: 3 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 192 + MacroTile1: 240 + MacroTileA: 192 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -623974,21 +623191,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 6 + NumLoadsB: 30 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 30 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -624074,8 +623291,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2390 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2387 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -624083,17 +623300,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 12 + ThreadTile1: 15 + ThreadTileA: 12 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -624104,7 +623321,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -624114,13 +623331,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -624152,12 +623369,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -624168,88 +623385,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 24 - NumLoadsB: 26 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -624335,8 +623552,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2391 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2388 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -624344,17 +623561,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -624365,7 +623582,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -624375,13 +623592,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -624414,11 +623631,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -624429,88 +623646,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 24 - NumLoadsB: 26 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -624596,8 +623813,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2392 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2389 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU5_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -624605,17 +623822,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -624626,7 +623843,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -624636,7 +623853,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -624675,11 +623892,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -624690,88 +623907,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 6 - NumLoadsB: 26 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -624857,8 +624074,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2393 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2390 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -624866,17 +624083,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -624887,7 +624104,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -624897,7 +624114,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -624924,7 +624141,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -624935,12 +624152,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -624951,44 +624168,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTA4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -624997,14 +624214,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -625018,21 +624235,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -625118,8 +624335,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2394 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT4_13_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2391 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -625127,17 +624344,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -625148,7 +624365,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -625159,12 +624376,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -625185,7 +624402,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -625196,12 +624413,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -625212,42 +624429,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_NTA0_NTC0_NTD0_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30976 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 60288 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 32640 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 54528 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30976 - LdsOffsetMetadata_Blk: 54528 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 60288 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -625257,15 +624474,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 15] + MIWaveTileA: 3 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 240 + MacroTileA: 192 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -625286,14 +624503,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 2 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 6 + NumLoadsB: 30 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 30 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -625379,8 +624596,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2395 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_4_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2392 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -625388,17 +624605,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 15 + ThreadTileA: 12 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -625409,23 +624626,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -625446,7 +624663,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -625462,7 +624679,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -625473,44 +624690,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTA0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_SVW2_VWA2_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57600 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57600 - LdsOffsetMetadata_Blk: 104704 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -625518,14 +624735,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [9, 4] - MIWaveTileA: 9 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 288 + MacroTile0: 96 MacroTile1: 128 - MacroTileA: 288 + MacroTileA: 96 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -625547,14 +624764,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 36 - NumLoadsB: 4 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -625640,8 +624857,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2396 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2393 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -625649,17 +624866,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 4 - ThreadTileA: 36 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 2 + ThreadTileA: 24 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -625670,23 +624887,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -625718,9 +624935,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -625734,34 +624951,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTA4_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57600 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 60288 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 32640 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57600 - LdsOffsetMetadata_Blk: 104704 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 60288 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -625779,15 +624996,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [9, 4] - MIWaveTileA: 9 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 15] + MIWaveTileA: 3 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 128 - MacroTileA: 288 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 240 + MacroTileA: 192 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -625801,21 +625018,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 36 - NumLoadsB: 4 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 6 + NumLoadsB: 30 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 30 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -625901,8 +625118,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2397 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT9_4_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2394 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -625911,16 +625128,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 4 - ThreadTileA: 36 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 15 + ThreadTileA: 12 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -625937,11 +625154,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -625979,12 +625196,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -625995,36 +625212,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTA0_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTA0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 60672 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60672 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -626041,13 +625258,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 + MIWaveTile: [10, 4] + MIWaveTileA: 10 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 320 MacroTile1: 128 - MacroTileA: 256 + MacroTileA: 320 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -626064,18 +625281,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 40 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 40 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -626162,8 +625379,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2398 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2395 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTA0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -626171,16 +625388,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 40 ThreadTile1: 4 - ThreadTileA: 32 + ThreadTileA: 40 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -626192,7 +625409,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -626202,13 +625419,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -626241,11 +625458,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -626256,32 +625473,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_13_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT8_2_NTA4_SVW8_VWA8_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 37376 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 37376 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -626293,7 +625510,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -626301,15 +625518,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -626330,14 +625547,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 24 - NumLoadsB: 26 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -626423,8 +625640,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2399 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_13_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2396 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT8_2_NTA4_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -626432,17 +625649,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -626453,13 +625670,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -626469,7 +625686,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -626502,7 +625719,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -626517,36 +625734,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA4_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -626554,7 +625771,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -626562,15 +625779,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -626584,21 +625801,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 8 - NumLoadsB: 26 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -626684,26 +625901,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2400 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2397 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 13 + ThreadTile1: 4 ThreadTileA: 16 - ThreadTileB: 13 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -626720,7 +625937,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -626734,7 +625951,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -626763,7 +625980,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -626778,36 +625995,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTA0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62080 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 28288 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62080 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -626824,14 +626041,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] + MIWaveTile: [4, 6] MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 96 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -626845,21 +626062,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 8 - NumLoadsB: 26 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -626945,15 +626162,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2401 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIAV0_MIWT4_13_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2398 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 @@ -626962,9 +626179,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 13 + ThreadTile1: 6 ThreadTileA: 16 - ThreadTileB: 13 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -626995,7 +626212,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -627024,11 +626241,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -627039,32 +626256,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT10_2_NTA0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 33280 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -627076,7 +626293,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -627084,15 +626301,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 2] + MIWaveTileA: 10 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -627106,21 +626323,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 24 - NumLoadsB: 26 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 20 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 26 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -627206,26 +626423,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2402 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_13_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2399 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT10_2_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 40 + ThreadTile1: 2 + ThreadTileA: 40 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -627236,13 +626453,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -627252,11 +626469,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -627286,10 +626503,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -627300,7 +626517,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -627309,36 +626526,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 111616 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -627346,41 +626563,41 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 320 MacroTile1: 128 - MacroTileA: 256 + MacroTileA: 320 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 32 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 40 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 40 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -627467,26 +626684,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2403 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2400 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -627497,17 +626714,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -627517,7 +626734,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -627534,7 +626751,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -627545,12 +626762,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -627561,44 +626778,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_4_4 - LSCA: 512 - LSCB: 512 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_4_NTA0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 34560 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34560 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -627606,15 +626823,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 384 + MacroTile1: 128 + MacroTileA: 384 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -627630,19 +626847,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 1 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 24 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -627728,8 +626945,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2404 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_4_WGM1 + SolutionIndex: 2401 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -627737,17 +626954,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -627758,21 +626975,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -627795,7 +627012,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -627807,8 +627024,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -627822,44 +627039,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 LSPB: 8 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVCA: 8 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 13824 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 60288 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 32640 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 13824 - LdsOffsetMetadata_Blk: 20992 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60288 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -627867,15 +627084,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 15] + MIWaveTileA: 3 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 192 + MacroTile1: 240 + MacroTileA: 192 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -627889,22 +627106,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 6 + NumLoadsB: 30 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 30 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -627989,8 +627206,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2405 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 + SolutionIndex: 2402 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -627999,16 +627216,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 15 + ThreadTileA: 12 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -628025,17 +627242,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -628056,7 +627273,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -628067,12 +627284,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 19 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -628083,44 +627300,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 - LSCA: 256 - LSCB: 256 - LSPA: 4 - LSPB: 4 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_2_NTA0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 21888 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 45440 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 21888 + LdsOffsetMetadata_Blk: 45440 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -628128,15 +627345,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 2] + MIWaveTileA: 12 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -628152,20 +627369,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 12 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 2 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -628250,8 +627467,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2406 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU19_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 + SolutionIndex: 2403 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_2_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -628259,17 +627476,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 48 + ThreadTile1: 2 + ThreadTileA: 48 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -628280,21 +627497,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 19] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -628317,7 +627534,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -628328,12 +627545,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -628344,45 +627561,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_PLR1_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_15_NTA0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 33280 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 33280 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -628390,22 +627607,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 240 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -628413,19 +627630,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 16 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -628511,8 +627728,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2407 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2404 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_15_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -628520,17 +627737,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -628541,21 +627758,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -628578,7 +627795,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -628589,9 +627806,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -628605,32 +627822,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_NTA0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -628639,10 +627856,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -628651,13 +627868,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveTile: [7, 4] + MIWaveTileA: 7 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 224 MacroTile1: 128 - MacroTileA: 96 + MacroTileA: 224 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -628679,14 +627896,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -628772,8 +627989,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2408 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2405 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -628788,9 +628005,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 28 ThreadTile1: 4 - ThreadTileA: 12 + ThreadTileA: 28 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -628812,11 +628029,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -628851,11 +628068,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -628866,36 +628083,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT18_2_NTA0_NTC0_NTD0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60288 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 32640 + LdsNumBytes: 61952 + LdsNumElementsAlignedA: 41472 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 41472 + LdsOffsetB_Blk: 107008 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60288 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 61952 + LdsOffsetMetadata_Blk: 107008 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -628911,15 +628128,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 15] - MIWaveTileA: 3 - MIWaveTileB: 15 + MIWaveGroup: [1, 4] + MIWaveTile: [18, 2] + MIWaveTileA: 18 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 240 - MacroTileA: 192 - MacroTileB: 240 + MacroTile0: 288 + MacroTile1: 128 + MacroTileA: 288 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -628940,14 +628157,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 6 - NumLoadsB: 30 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 9 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 30 + NumLoadsPerpendicularA: 9 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -629033,8 +628250,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2409 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2406 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT18_2_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -629042,17 +628259,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 15 - ThreadTileA: 12 - ThreadTileB: 15 + ThreadTile0: 72 + ThreadTile1: 2 + ThreadTileA: 72 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -629063,23 +628280,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -629111,12 +628328,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -629127,22 +628344,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTA0_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 54272 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -629151,21 +628368,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 54272 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -629173,9 +628390,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 128 @@ -629185,10 +628402,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -629196,18 +628413,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -629294,8 +628511,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2410 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2407 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -629303,17 +628520,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -629324,23 +628541,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -629372,12 +628589,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -629388,88 +628605,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT3_15_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 60288 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 32640 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 60288 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 15] + MIWaveTileA: 3 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 240 + MacroTileA: 192 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 6 + NumLoadsB: 30 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 30 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -629555,8 +628772,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2411 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU5_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2408 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT3_15_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -629564,17 +628781,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 15 + ThreadTileA: 12 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -629585,7 +628802,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -629595,7 +628812,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -629635,10 +628852,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -629649,7 +628866,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -629658,13 +628875,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 54272 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -629673,21 +628890,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 54272 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -629695,9 +628912,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 128 @@ -629707,10 +628924,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -629718,13 +628935,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -629816,26 +629033,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2412 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2409 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -629846,17 +629063,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -629866,7 +629083,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -629883,7 +629100,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -629899,7 +629116,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -629910,44 +629127,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_4_NTA0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 57600 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57600 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -629955,15 +629172,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 4] + MIWaveTileA: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 288 + MacroTile1: 128 + MacroTileA: 288 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -629979,19 +629196,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 36 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -630077,26 +629294,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2413 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2410 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_4_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 36 + ThreadTile1: 4 + ThreadTileA: 36 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -630107,27 +629324,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -630144,7 +629361,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -630157,10 +629374,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -630171,32 +629388,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT2_15_NTA0_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60288 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 32640 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60288 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 41984 LdsPadA: 8 LdsPadB: 4 LdsPadMetadata: 0 @@ -630205,8 +629422,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -630217,13 +629434,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 15] - MIWaveTileA: 3 + MIWaveTile: [2, 15] + MIWaveTileA: 2 MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 128 MacroTile1: 240 - MacroTileA: 192 + MacroTileA: 128 MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 @@ -630240,19 +629457,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 6 - NumLoadsB: 30 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 2 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 30 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -630338,25 +629555,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2414 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU5_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2411 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT2_15_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 8 ThreadTile1: 15 - ThreadTileA: 12 + ThreadTileA: 8 ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true @@ -630368,7 +629585,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -630378,17 +629595,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -630405,7 +629622,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -630432,44 +629649,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_SVW2_VWA2_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTA0_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 60672 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60672 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -630477,14 +629694,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 320 MacroTile1: 128 - MacroTileA: 96 + MacroTileA: 320 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -630501,19 +629718,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 40 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -630599,26 +629816,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2415 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2412 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 2 - ThreadTileA: 24 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -630635,21 +629852,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -630677,9 +629894,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 4 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -630693,68 +629910,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60288 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 32640 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60288 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 111616 LdsPadA: 8 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 15] - MIWaveTileA: 3 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 240 - MacroTileA: 192 - MacroTileB: 240 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -630762,19 +629979,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 6 - NumLoadsB: 30 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 40 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 30 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -630860,26 +630077,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2416 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU4_LBSPPA128_LBSPPB128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2413 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 15 - ThreadTileA: 12 - ThreadTileB: 15 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -630900,7 +630117,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -630910,7 +630127,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -630927,7 +630144,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -630939,11 +630156,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -630954,42 +630171,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTA0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_15_NTA0_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60672 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 33280 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60672 - LdsOffsetMetadata_Blk: 107776 + LdsOffsetMetadata: 33280 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -630999,15 +630216,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -631023,19 +630240,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 40 - NumLoadsB: 4 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 16 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -631121,26 +630338,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2417 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTA0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2414 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_15_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -631151,27 +630368,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -631199,12 +630416,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -631215,36 +630432,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT8_2_NTA4_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTA0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 + LSPA: 32 + LSPB: 8 + LVCA: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37376 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 60288 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 32640 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37376 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60288 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -631252,7 +630469,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -631260,15 +630477,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 15] + MIWaveTileA: 3 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 240 + MacroTileA: 192 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -631282,21 +630499,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 16 - NumLoadsB: 4 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 6 + NumLoadsB: 30 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 30 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -631382,26 +630599,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2418 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT8_2_NTA4_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2415 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 15 + ThreadTileA: 12 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -631412,13 +630629,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -631428,12 +630645,12 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 + _staggerStrideShift: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -631449,7 +630666,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -631462,10 +630679,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -631476,32 +630693,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA4_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 37376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -631510,8 +630727,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -631521,15 +630738,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -631543,20 +630760,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 1 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -631643,8 +630860,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2419 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2416 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -631652,17 +630869,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -631673,21 +630890,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 16] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -631710,7 +630927,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -631723,10 +630940,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -631737,32 +630954,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTA0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -631771,10 +630988,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -631782,15 +630999,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -631806,19 +631023,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -631904,8 +631121,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2420 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2417 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU16_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -631913,17 +631130,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -631934,21 +631151,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 16] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -631982,12 +631199,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -631998,32 +631215,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT10_2_NTA0_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_PLR1_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -632035,7 +631252,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -632043,15 +631260,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 2] - MIWaveTileA: 10 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -632067,19 +631284,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 20 - NumLoadsB: 4 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -632165,8 +631382,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2421 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT10_2_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2418 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -632174,17 +631391,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 2 - ThreadTileA: 40 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -632195,17 +631412,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -632244,11 +631461,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -632259,45 +631476,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_9_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 64512 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 111616 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -632305,42 +631522,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 40 - NumLoadsB: 4 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -632426,8 +631643,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2422 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2419 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU11_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_9_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -632435,17 +631652,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -632456,17 +631673,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 11] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -632493,7 +631710,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -632506,7 +631723,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -632520,44 +631737,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_4_NTA0_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_PLR1_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34560 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34560 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -632566,14 +631783,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 128 - MacroTileA: 384 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -632589,19 +631806,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 - NumLoadsB: 2 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -632687,8 +631904,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2423 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2420 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -632703,10 +631920,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -632727,11 +631944,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -632765,12 +631982,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -632781,36 +631998,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60288 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 32640 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60288 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -632827,14 +632044,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 15] - MIWaveTileA: 3 - MIWaveTileB: 15 + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 240 - MacroTileA: 192 - MacroTileB: 240 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -632848,21 +632065,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 6 - NumLoadsB: 30 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 30 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -632948,8 +632165,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2424 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2421 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -632957,17 +632174,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 15 - ThreadTileA: 12 - ThreadTileB: 15 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -632978,7 +632195,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -632988,7 +632205,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -633015,7 +632232,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -633026,9 +632243,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -633042,42 +632259,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_2_NTA0_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 21888 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 45440 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 21888 - LdsOffsetMetadata_Blk: 45440 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -633087,15 +632304,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 2] - MIWaveTileA: 12 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -633111,19 +632328,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 12 - NumLoadsB: 2 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -633209,8 +632426,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2425 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_2_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2422 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -633219,16 +632436,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 2 - ThreadTileA: 48 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -633245,15 +632462,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -633276,7 +632493,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -633287,12 +632504,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -633303,42 +632520,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_15_NTA0_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33280 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33280 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -633348,15 +632565,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 240 - MacroTileA: 256 - MacroTileB: 240 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -633372,19 +632589,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 + NumElementsPerThread: 120 NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 16 - NumLoadsB: 15 + NumLoadsA: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -633470,8 +632687,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2426 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_15_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2423 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -633479,17 +632696,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -633500,21 +632717,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -633548,9 +632765,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -633564,12 +632781,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_NTA0_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -633577,19 +632794,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -633610,14 +632827,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -633638,14 +632855,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 - NumLoadsB: 4 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -633731,8 +632948,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2427 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2424 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -633747,10 +632964,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -633771,7 +632988,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -633811,10 +633028,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -633825,7 +633042,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT18_2_NTA0_NTC0_NTD0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -633834,23 +633051,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61952 - LdsNumElementsAlignedA: 41472 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 41472 - LdsOffsetB_Blk: 107008 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61952 - LdsOffsetMetadata_Blk: 107008 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -633870,15 +633087,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [18, 2] - MIWaveTileA: 18 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 128 - MacroTileA: 288 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -633900,13 +633117,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 9 - NumLoadsB: 4 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 9 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -633992,8 +633209,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2428 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT18_2_NTA0_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2425 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -634001,17 +633218,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 72 - ThreadTile1: 2 - ThreadTileA: 72 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -634022,17 +633239,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -634071,11 +633288,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -634086,36 +633303,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTA0_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -634132,14 +633349,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -634155,19 +633372,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -634253,8 +633470,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2429 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTA0_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2426 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -634262,17 +633479,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -634283,7 +633500,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -634293,7 +633510,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -634331,9 +633548,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -634347,12 +633564,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT3_15_NTA4_NTC0_NTD0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 8 - LVCA: 8 + LVCA: 32 LVCB: 32 LVPA: 4 LVPB: 4 @@ -634360,20 +633577,20 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60288 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 32640 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60288 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -634392,15 +633609,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 15] - MIWaveTileA: 3 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 240 - MacroTileA: 192 - MacroTileB: 240 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -634414,7 +633631,7 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 @@ -634423,12 +633640,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 180 NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 6 - NumLoadsB: 30 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 30 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -634514,8 +633731,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2430 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT3_15_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2427 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -634524,16 +633741,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 15 - ThreadTileA: 12 - ThreadTileB: 15 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -634550,11 +633767,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -634592,12 +633809,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -634608,32 +633825,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -634653,15 +633870,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -634677,19 +633894,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -634775,26 +633992,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2431 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2428 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -634805,27 +634022,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -634853,7 +634070,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -634869,12 +634086,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_4_NTA0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -634882,23 +634099,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57600 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57600 - LdsOffsetMetadata_Blk: 104704 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 80896 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -634906,7 +634123,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -634915,14 +634132,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [9, 4] - MIWaveTileA: 9 - MIWaveTileB: 4 + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 128 - MacroTileA: 288 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 160 + MacroTileA: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -634938,19 +634155,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 36 - NumLoadsB: 4 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -635036,15 +634253,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2432 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT9_4_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2429 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -635052,10 +634269,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 4 - ThreadTileA: 36 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -635073,7 +634290,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -635082,11 +634299,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -635103,7 +634320,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -635114,9 +634331,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -635130,42 +634347,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT2_15_NTA0_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -635175,15 +634392,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 15] - MIWaveTileA: 2 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 240 - MacroTileA: 128 - MacroTileB: 240 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -635199,19 +634416,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 2 - NumLoadsB: 15 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -635297,26 +634514,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2433 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x240x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT2_15_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2430 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 15 - ThreadTileA: 8 - ThreadTileB: 15 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -635333,21 +634550,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -635375,12 +634592,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -635391,36 +634608,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTA0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60672 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60672 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -635428,7 +634645,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -635436,15 +634653,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 64 + MacroTileA: 256 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -635460,19 +634677,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 40 - NumLoadsB: 4 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -635558,25 +634775,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2434 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2431 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 40 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -635588,14 +634805,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -635604,11 +634821,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -635636,7 +634853,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -635652,12 +634869,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -635665,32 +634882,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 111616 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -635698,22 +634915,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 2] + MIWaveTile: [5, 3] MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -635721,19 +634938,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 40 - NumLoadsB: 4 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -635819,26 +635036,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2435 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2432 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -635855,8 +635072,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -635865,11 +635082,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -635886,7 +635103,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -635899,10 +635116,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -635913,32 +635130,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_15_NTA0_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33280 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 16384 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33280 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -635947,8 +635164,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -635958,15 +635175,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 15] - MIWaveTileA: 4 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 240 - MacroTileA: 256 - MacroTileB: 240 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -635982,19 +635199,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 16 - NumLoadsB: 15 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 15 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -636080,26 +635297,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2436 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_15_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2433 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 15 - ThreadTileA: 16 - ThreadTileB: 15 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -636110,27 +635327,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -636159,11 +635376,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -636174,22 +635391,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTA0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 8 + LSPB: 32 LVCA: 8 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60288 + LdsNumBytes: 43008 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 32640 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -636198,12 +635415,12 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60288 + LdsOffsetMetadata: 43008 LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 4 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -636211,7 +635428,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -636219,15 +635436,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 15] - MIWaveTileA: 3 - MIWaveTileB: 15 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 240 + MacroTile1: 96 MacroTileA: 192 - MacroTileB: 240 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -636243,19 +635460,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 6 - NumLoadsB: 30 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 30 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -636341,26 +635558,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2437 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x240x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIAV0_MIWT3_15_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2434 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 15 - ThreadTileA: 12 - ThreadTileB: 15 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -636371,14 +635588,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -636387,12 +635604,12 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -636408,7 +635625,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -636421,10 +635638,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -636435,32 +635652,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -636469,8 +635686,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -636480,15 +635697,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -636504,19 +635721,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 4 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -636602,8 +635819,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2438 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2435 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -636611,17 +635828,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -636632,21 +635849,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -636669,7 +635886,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -636680,12 +635897,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -636696,32 +635913,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -636730,8 +635947,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -636741,15 +635958,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -636765,19 +635982,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -636863,8 +636080,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2439 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU16_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2436 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -636872,17 +636089,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -636893,21 +636110,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -636943,7 +636160,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -636957,7 +636174,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_PLR1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -637026,8 +636243,8 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 @@ -637124,8 +636341,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2440 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2437 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -637161,10 +636378,10 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -637203,11 +636420,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 11 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -637218,36 +636435,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_9_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -637264,14 +636481,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -637287,19 +636504,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -637385,8 +636602,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2441 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU11_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_9_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2438 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -637394,17 +636611,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -637415,23 +636632,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -637465,7 +636682,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -637479,7 +636696,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_PLR1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -637492,19 +636709,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 34816 LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -637516,7 +636733,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -637524,14 +636741,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 160 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -637548,18 +636765,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 32 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -637646,8 +636863,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2442 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2439 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -637656,16 +636873,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 5 + ThreadTile1: 10 ThreadTileA: 16 - ThreadTileB: 5 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -637682,17 +636899,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -637724,12 +636941,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -637740,22 +636957,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_3_NTC3_NTD3_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 + LdsNumBytes: 48640 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -637764,21 +636981,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 + LdsOffsetMetadata: 48640 LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -637786,22 +637003,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 96 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -637809,19 +637026,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -637907,8 +637124,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2443 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2440 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -637916,17 +637133,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -637937,23 +637154,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -637985,12 +637202,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -638001,32 +637218,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -638047,14 +637264,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -638070,19 +637287,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -638168,8 +637385,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2444 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2441 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -638177,17 +637394,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -638198,17 +637415,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -638246,12 +637463,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -638262,32 +637479,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_5_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 25600 LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -638308,13 +637525,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 + MIWaveTile: [5, 5] + MIWaveTileA: 5 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 160 MacroTile1: 160 - MacroTileA: 192 + MacroTileA: 160 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -638336,13 +637553,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 20 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -638429,8 +637646,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2445 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2442 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -638438,16 +637655,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 20 ThreadTile1: 5 - ThreadTileA: 24 + ThreadTileA: 20 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -638459,17 +637676,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -638508,8 +637725,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -638523,32 +637740,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_9_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 8 LVCA: 8 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -638568,15 +637785,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 160 - MacroTileA: 160 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 144 + MacroTileA: 192 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -638592,19 +637809,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 5 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 6 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -638690,8 +637907,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2446 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2443 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -638700,16 +637917,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -638726,11 +637943,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -638768,12 +637985,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -638784,32 +638001,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -638830,14 +638047,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -638853,19 +638070,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -638951,8 +638168,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2447 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2444 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -638960,17 +638177,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -638981,17 +638198,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -639031,10 +638248,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -639045,7 +638262,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -639054,23 +638271,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -639091,13 +638308,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 + MIWaveTile: [6, 9] + MIWaveTileA: 6 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 192 MacroTile1: 288 - MacroTileA: 160 + MacroTileA: 192 MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 @@ -639114,18 +638331,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 @@ -639212,8 +638429,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2448 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2445 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -639221,16 +638438,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 24 ThreadTile1: 9 - ThreadTileA: 20 + ThreadTileA: 24 ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true @@ -639242,17 +638459,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -639290,12 +638507,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -639306,36 +638523,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -639352,14 +638569,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -639375,19 +638592,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 - NumLoadsB: 36 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -639473,8 +638690,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2449 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2446 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -639482,17 +638699,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -639503,23 +638720,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -639553,10 +638770,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -639567,7 +638784,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -639576,23 +638793,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -639612,14 +638829,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 160 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -639636,18 +638853,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 32 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -639734,8 +638951,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2450 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2447 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -639743,17 +638960,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -639764,23 +638981,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -639817,7 +639034,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -639828,7 +639045,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -639837,36 +639054,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 80896 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -639874,22 +639091,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 160 - MacroTileA: 96 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -639897,19 +639114,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -639995,8 +639212,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2451 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2448 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -640004,17 +639221,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -640025,13 +639242,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -640073,12 +639290,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -640089,36 +639306,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -640135,14 +639352,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -640158,19 +639375,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -640256,8 +639473,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2452 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2449 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -640265,17 +639482,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -640286,23 +639503,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -640334,12 +639551,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -640350,32 +639567,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -640387,7 +639604,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -640395,15 +639612,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 64 - MacroTileA: 256 - MacroTileB: 64 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -640424,14 +639641,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -640517,8 +639734,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2453 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x64x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 + SolutionIndex: 2450 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -640526,17 +639743,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -640547,14 +639764,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -640595,7 +639812,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -640611,12 +639828,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -640624,19 +639841,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -640648,7 +639865,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -640657,14 +639874,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 96 - MacroTileA: 160 - MacroTileB: 96 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -640685,14 +639902,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -640778,8 +639995,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2454 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2451 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -640794,10 +640011,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -640857,11 +640074,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -640872,36 +640089,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -640918,14 +640135,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -640946,14 +640163,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -641039,8 +640256,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2455 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU3_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2452 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -641048,17 +640265,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -641069,7 +640286,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -641079,7 +640296,7 @@ WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -641106,7 +640323,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -641117,8 +640334,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -641133,44 +640350,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_NTC0_NTD0_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 35968 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35968 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -641178,15 +640395,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [6, 9] MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 384 + MacroTile1: 144 + MacroTileA: 384 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -641202,19 +640419,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -641300,8 +640517,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2456 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2453 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -641310,16 +640527,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 3 + ThreadTile1: 9 ThreadTileA: 24 - ThreadTileB: 3 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -641336,15 +640553,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -641378,12 +640595,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -641394,36 +640611,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -641431,7 +640648,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -641440,14 +640657,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -641463,19 +640680,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -641561,8 +640778,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2457 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn8 + SolutionIndex: 2454 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -641570,17 +640787,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -641591,14 +640808,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -641607,7 +640824,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -641640,11 +640857,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -641655,36 +640872,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -641692,7 +640909,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -641701,14 +640918,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -641729,14 +640946,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 5 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -641822,8 +641039,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2458 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 + SolutionIndex: 2455 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -641831,17 +641048,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -641852,7 +641069,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -641868,7 +641085,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -641902,10 +641119,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -641916,7 +641133,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -641925,23 +641142,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -641962,14 +641179,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -641990,14 +641207,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -642083,8 +641300,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2459 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 + SolutionIndex: 2456 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -642092,17 +641309,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -642113,7 +641330,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -642123,7 +641340,7 @@ WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -642150,7 +641367,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -642162,11 +641379,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -642177,42 +641394,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 36224 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 36224 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -642223,13 +641440,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 + MIWaveTile: [12, 5] + MIWaveTileA: 12 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 384 MacroTile1: 160 - MacroTileA: 224 + MacroTileA: 384 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -642251,14 +641468,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -642344,8 +641561,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2460 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2457 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -642353,16 +641570,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 48 ThreadTile1: 5 - ThreadTileA: 28 + ThreadTileA: 48 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -642374,21 +641591,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -642424,10 +641641,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -642438,7 +641655,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -642447,23 +641664,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -642483,14 +641700,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 160 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -642507,18 +641724,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 32 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -642605,8 +641822,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2461 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 2458 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -642614,17 +641831,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -642635,23 +641852,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -642672,7 +641889,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -642683,12 +641900,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -642699,68 +641916,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_3_NTC3_NTD3_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_9_SVW4_VWA4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 28032 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 28032 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -642768,19 +641985,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 8 - NumLoadsB: 3 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -642866,26 +642083,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2462 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 + SolutionIndex: 2459 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_9_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -642896,27 +642113,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -642944,12 +642161,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -642960,32 +642177,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 111616 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -643006,14 +642223,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 160 - MacroTileA: 160 - MacroTileB: 160 + MacroTile0: 320 + MacroTile1: 96 + MacroTileA: 320 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -643029,19 +642246,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 5 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 10 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -643127,26 +642344,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2463 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2460 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -643157,7 +642374,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -643177,7 +642394,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -643194,7 +642411,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -643206,7 +642423,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -643221,42 +642438,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_5_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -643267,14 +642484,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveTile: [7, 9] + MIWaveTileA: 7 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 160 - MacroTileA: 160 - MacroTileB: 160 + MacroTile0: 224 + MacroTile1: 288 + MacroTileA: 224 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -643290,19 +642507,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 5 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 14 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -643388,15 +642605,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2464 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2461 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -643404,10 +642621,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 9 + ThreadTileA: 28 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -643429,16 +642646,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -643466,12 +642683,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -643482,32 +642699,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_9_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 96256 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -643527,15 +642744,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 144 + MacroTile1: 160 MacroTileA: 192 - MacroTileB: 144 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -643551,19 +642768,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 6 - NumLoadsB: 18 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -643649,26 +642866,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2465 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x144x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 + SolutionIndex: 2462 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -643679,13 +642896,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -643699,7 +642916,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -643727,12 +642944,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -643743,32 +642960,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -643789,14 +643006,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 288 + MacroTileA: 128 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -643812,19 +643029,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -643910,26 +643127,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2466 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2463 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -643940,14 +643157,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -643960,7 +643177,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -643989,11 +643206,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -644004,36 +643221,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -644050,14 +643267,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -644073,19 +643290,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -644171,26 +643388,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2467 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2464 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -644201,27 +643418,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -644249,12 +643466,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -644265,36 +643482,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -644311,14 +643528,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -644334,19 +643551,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 5 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -644432,26 +643649,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2468 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2465 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -644462,7 +643679,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -644478,12 +643695,12 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 + _staggerStrideShift: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -644499,7 +643716,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -644510,12 +643727,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 13 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -644526,32 +643743,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 37376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -644560,10 +643777,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -644571,15 +643788,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -644595,19 +643812,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 - NumLoadsB: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -644693,8 +643910,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2469 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2466 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU13_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -644702,17 +643919,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -644723,21 +643940,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 13] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -644760,7 +643977,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -644773,10 +643990,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 13 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -644787,68 +644004,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -644856,19 +644073,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -644954,8 +644171,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2470 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 + SolutionIndex: 2467 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU13_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -644963,17 +644180,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -644984,21 +644201,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 13] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -645034,7 +644251,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -645048,7 +644265,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -645061,32 +644278,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -645094,22 +644311,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -645117,19 +644334,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -645215,8 +644432,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2471 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 + SolutionIndex: 2468 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -645225,16 +644442,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -645251,11 +644468,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -645295,10 +644512,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -645309,7 +644526,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -645318,36 +644535,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -645355,22 +644572,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -645378,19 +644595,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -645476,8 +644693,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2472 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2469 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -645485,17 +644702,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -645506,23 +644723,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -645556,10 +644773,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -645570,7 +644787,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -645579,23 +644796,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -645616,14 +644833,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -645644,14 +644861,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -645737,8 +644954,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2473 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2470 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU5_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -645746,17 +644963,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -645767,23 +644984,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -645817,10 +645034,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -645831,7 +645048,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -645840,13 +645057,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -645855,21 +645072,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -645877,22 +645094,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -645900,19 +645117,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 32 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -645998,8 +645215,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2474 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2471 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -646007,17 +645224,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -646028,17 +645245,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -646065,7 +645282,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -646077,11 +645294,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -646092,42 +645309,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_NTC0_NTD0_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35968 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35968 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -646137,15 +645354,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 144 - MacroTileA: 384 - MacroTileB: 144 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -646166,14 +645383,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 9 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -646259,8 +645476,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2475 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 + SolutionIndex: 2472 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -646268,17 +645485,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -646289,23 +645506,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -646338,11 +645555,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -646353,45 +645570,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -646399,22 +645616,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -646422,19 +645639,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -646520,8 +645737,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2476 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2473 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -646529,17 +645746,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -646550,17 +645767,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -646599,7 +645816,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -646614,36 +645831,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 44544 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -646651,7 +645868,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -646659,15 +645876,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] + MIWaveGroup: [1, 4] + MIWaveTile: [6, 3] MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 96 + MacroTile1: 192 + MacroTileA: 96 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -646688,14 +645905,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -646781,8 +645998,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2477 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2474 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -646791,16 +646008,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 9 + ThreadTile1: 3 ThreadTileA: 24 - ThreadTileB: 9 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -646817,8 +646034,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -646827,7 +646044,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -646859,12 +646076,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -646875,32 +646092,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_12_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -646920,15 +646137,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 12] + MIWaveTileA: 3 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -646949,14 +646166,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 24 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -647042,8 +646259,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2478 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2475 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_12_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -647051,17 +646268,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 12 + ThreadTileA: 12 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -647072,17 +646289,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -647109,7 +646326,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -647120,12 +646337,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -647136,44 +646353,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36224 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36224 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -647182,14 +646399,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 160 - MacroTileA: 384 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -647210,14 +646427,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 - NumLoadsB: 10 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -647303,8 +646520,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2479 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 + SolutionIndex: 2476 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -647312,17 +646529,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -647333,21 +646550,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -647381,12 +646598,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -647397,32 +646614,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTC3_NTD3_SVW8_VWA8_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 47616 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -647442,15 +646659,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 3] + MIWaveTileA: 8 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -647466,19 +646683,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 - NumLoadsB: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -647564,8 +646781,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2480 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2477 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -647573,17 +646790,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -647594,13 +646811,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -647631,7 +646848,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -647643,11 +646860,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -647658,44 +646875,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_9_SVW4_VWA4_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28032 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 41216 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28032 - LdsOffsetMetadata_Blk: 41216 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -647704,14 +646921,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 288 - MacroTileA: 128 - MacroTileB: 288 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -647727,19 +646944,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 8 - NumLoadsB: 18 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -647825,26 +647042,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2481 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_9_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGMn16 + SolutionIndex: 2478 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -647855,27 +647072,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -647903,12 +647120,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -647919,32 +647136,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT13_3_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 111616 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -647964,15 +647181,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 3] - MIWaveTileA: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [13, 3] + MIWaveTileA: 13 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 96 - MacroTileA: 320 - MacroTileB: 96 + MacroTile0: 208 + MacroTile1: 192 + MacroTileA: 208 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -647988,19 +647205,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 10 - NumLoadsB: 3 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 26 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 26 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -648086,25 +647303,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2482 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2479 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT13_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 52 ThreadTile1: 3 - ThreadTileA: 40 + ThreadTileA: 52 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -648116,17 +647333,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -648136,7 +647353,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -648153,7 +647370,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -648165,11 +647382,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -648180,42 +647397,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_SVW1_VWA1_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 80768 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -648226,14 +647443,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 9] - MIWaveTileA: 7 - MIWaveTileB: 9 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 288 - MacroTileA: 224 - MacroTileB: 288 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -648249,19 +647466,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 14 - NumLoadsB: 18 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 24 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -648347,26 +647564,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2483 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2480 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 9 - ThreadTileA: 28 - ThreadTileB: 9 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -648377,7 +647594,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -648388,16 +647605,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -648427,10 +647644,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -648441,7 +647658,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -648450,36 +647667,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -648487,22 +647704,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -648510,19 +647727,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -648608,26 +647825,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2484 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2481 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -648638,27 +647855,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -648686,7 +647903,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -648702,12 +647919,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -648715,9 +647932,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 48128 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -648726,7 +647943,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 + LdsOffsetMetadata: 48128 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -648748,14 +647965,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 9] + MIWaveTile: [4, 6] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 288 + MacroTile1: 192 MacroTileA: 128 - MacroTileB: 288 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -648771,19 +647988,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 4 - NumLoadsB: 9 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 16 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -648869,15 +648086,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2485 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGMn16 + SolutionIndex: 2482 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 @@ -648886,9 +648103,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 9 + ThreadTile1: 6 ThreadTileA: 16 - ThreadTileB: 9 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -648919,7 +648136,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -648947,12 +648164,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -648963,45 +648180,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -649009,22 +648226,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -649032,19 +648249,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -649130,26 +648347,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2486 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2483 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -649160,13 +648377,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -649180,7 +648397,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -649209,11 +648426,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -649224,36 +648441,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -649269,15 +648486,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 288 + MacroTile1: 192 MacroTileA: 160 - MacroTileB: 288 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -649293,19 +648510,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 20 - NumLoadsB: 36 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -649391,26 +648608,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2487 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2484 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -649421,13 +648638,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -649437,12 +648654,12 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -649458,7 +648675,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -649469,9 +648686,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 13 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -649485,32 +648702,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_6_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -649519,10 +648736,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -649530,15 +648747,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -649554,19 +648771,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 4 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 20 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -649652,8 +648869,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2488 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU13_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2485 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -649662,16 +648879,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -649688,15 +648905,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 13] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -649719,7 +648936,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -649731,8 +648948,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 13 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -649746,32 +648963,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 256 - LSCB: 256 - LSPA: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_11_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 LSPB: 8 - LVCA: 32 + LVCA: 8 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 30720 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 30720 + LdsOffsetB_Blk: 96256 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 96256 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -649780,10 +648997,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -649791,15 +649008,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 11] + MIWaveTileA: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 176 + MacroTileA: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -649815,19 +649032,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 132 + NumGlobalWriteVectorsPerThread: 132 + NumLoadsA: 6 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -649913,8 +649130,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2489 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU13_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2486 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -649923,16 +649140,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 11 + ThreadTileA: 12 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -649949,15 +649166,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 13] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -649991,12 +649208,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -650007,45 +649224,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -650053,22 +649270,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -650076,18 +649293,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -650174,8 +649391,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2490 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2487 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -650183,17 +649400,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -650204,17 +649421,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -650254,10 +649471,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -650268,7 +649485,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -650277,36 +649494,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -650314,22 +649531,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -650337,18 +649554,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -650435,8 +649652,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2491 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA2_GRVWB8_GSU8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2488 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -650444,17 +649661,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -650465,23 +649682,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -650515,10 +649732,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -650529,7 +649746,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT12_3_NTC3_NTD3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -650538,23 +649755,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 26112 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 91648 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -650574,14 +649791,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -650598,18 +649815,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 32 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -650696,8 +649913,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2492 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU5_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2489 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT12_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -650705,17 +649922,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -650726,23 +649943,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -650776,10 +649993,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -650790,7 +650007,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT13_3_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -650799,59 +650016,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [13, 3] + MIWaveTileA: 13 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 208 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 208 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -650859,18 +650076,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 26 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 26 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -650957,8 +650174,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2493 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2490 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT13_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -650966,16 +650183,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 52 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 52 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -650987,23 +650204,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -651024,7 +650241,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -651037,7 +650254,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 8 @@ -651051,42 +650268,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_3_NTC0_NTD0_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 22144 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 22144 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -651096,14 +650313,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] + MIWaveGroup: [1, 4] + MIWaveTile: [8, 3] MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 128 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 128 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -651125,14 +650342,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -651218,8 +650435,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2494 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2491 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -651228,16 +650445,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 3 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -651254,17 +650471,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -651285,7 +650502,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -651298,7 +650515,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -651312,68 +650529,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_NTC0_NTD0_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 26496 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 45440 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 26496 + LdsOffsetMetadata_Blk: 45440 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -651381,19 +650598,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -651479,8 +650696,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2495 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 + SolutionIndex: 2492 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -651495,9 +650712,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 48 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 48 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -651515,17 +650732,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -651546,7 +650763,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -651573,44 +650790,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44544 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 30976 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 54528 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 30976 + LdsOffsetMetadata_Blk: 54528 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -651618,15 +650835,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 192 - MacroTileA: 96 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -651642,19 +650859,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -651740,26 +650957,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2496 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2493 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -651776,21 +650993,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -651820,10 +651037,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -651834,7 +651051,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_12_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -651843,27 +651060,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 60672 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60672 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -651879,15 +651096,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 12] - MIWaveTileA: 3 - MIWaveTileB: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -651903,19 +651120,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 40 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -652001,26 +651218,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2497 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT3_12_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2494 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 12 - ThreadTileA: 12 - ThreadTileB: 12 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -652031,27 +651248,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -652079,12 +651296,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -652095,32 +651312,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT13_3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -652132,7 +651349,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -652140,15 +651357,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [13, 3] + MIWaveTileA: 13 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 208 + MacroTile1: 192 + MacroTileA: 208 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -652164,19 +651381,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 26 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 26 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -652262,25 +651479,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2498 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2495 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT13_3_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 52 ThreadTile1: 3 - ThreadTileA: 24 + ThreadTileA: 52 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -652292,14 +651509,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -652312,7 +651529,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -652329,7 +651546,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -652340,7 +651557,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -652356,42 +651573,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTC3_NTD3_SVW8_VWA8_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT16_3_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47616 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 30464 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 30464 + LdsOffsetMetadata_Blk: 49408 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -652402,13 +651619,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 3] - MIWaveTileA: 8 + MIWaveTile: [16, 3] + MIWaveTileA: 16 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -652425,19 +651642,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 16 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -652523,15 +651740,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2499 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 + SolutionIndex: 2496 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT16_3_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 @@ -652539,9 +651756,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 32 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -652564,16 +651781,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -652606,7 +651823,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -652617,7 +651834,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -652626,23 +651843,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -652654,7 +651871,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -652663,14 +651880,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -652686,19 +651903,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -652784,26 +652001,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2500 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT5_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2497 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -652814,14 +652031,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -652830,12 +652047,12 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 + _staggerStrideShift: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -652851,7 +652068,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -652862,9 +652079,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -652878,32 +652095,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT13_3_NTC3_NTD3_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 37376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -652912,10 +652129,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -652924,14 +652141,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [13, 3] - MIWaveTileA: 13 - MIWaveTileB: 3 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 208 - MacroTile1: 192 - MacroTileA: 208 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -652947,19 +652164,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 26 - NumLoadsB: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 26 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -653045,8 +652262,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2501 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT13_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGMn16 + SolutionIndex: 2498 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU11_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -653061,10 +652278,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 52 - ThreadTile1: 3 - ThreadTileA: 52 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -653082,14 +652299,14 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 11] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -653112,7 +652329,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -653123,12 +652340,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 11 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -653139,32 +652356,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -653173,10 +652390,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -653184,15 +652401,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -653208,19 +652425,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 - NumLoadsB: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -653306,8 +652523,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2502 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2499 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU11_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -653315,17 +652532,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -653336,21 +652553,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 11] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -653373,7 +652590,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -653384,9 +652601,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -653400,22 +652617,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_PLR1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 + LdsNumBytes: 52224 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -653424,10 +652641,10 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 + LdsOffsetMetadata: 52224 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -653435,10 +652652,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -653446,22 +652663,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -653469,19 +652686,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -653567,8 +652784,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2503 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 2500 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -653577,16 +652794,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -653603,17 +652820,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -653645,9 +652862,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -653661,12 +652878,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -653674,9 +652891,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -653685,7 +652902,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -653707,14 +652924,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] + MIWaveTile: [4, 7] MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 128 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -653730,19 +652947,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 16 - NumLoadsB: 6 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -653828,8 +653045,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2504 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 + SolutionIndex: 2501 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -653845,9 +653062,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 6 + ThreadTile1: 7 ThreadTileA: 16 - ThreadTileB: 6 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -653865,10 +653082,10 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -653906,12 +653123,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -653922,45 +653139,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_PLR1_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -653968,22 +653185,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -653991,19 +653208,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -654089,8 +653306,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2505 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 2502 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU8_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_PLR1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -654098,17 +653315,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -654119,23 +653336,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 8] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -654167,9 +653384,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -654183,12 +653400,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -654196,19 +653413,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -654228,15 +653445,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -654252,19 +653469,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 6 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -654350,8 +653567,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2506 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGMn16 + SolutionIndex: 2503 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -654360,16 +653577,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -654386,11 +653603,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -654430,10 +653647,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -654444,7 +653661,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_6_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -654453,27 +653670,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -654490,14 +653707,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 6] - MIWaveTileA: 5 - MIWaveTileB: 6 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -654513,19 +653730,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 20 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -654611,8 +653828,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2507 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2504 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU5_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -654620,17 +653837,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 6 - ThreadTileA: 20 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -654641,23 +653858,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -654689,12 +653906,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -654705,36 +653922,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_11_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 8 - LVCA: 8 - LVCB: 32 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 30720 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30720 - LdsOffsetB_Blk: 96256 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 96256 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -654750,15 +653967,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [3, 11] - MIWaveTileA: 3 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 176 - MacroTileA: 192 - MacroTileB: 176 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -654774,19 +653991,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 132 - NumGlobalWriteVectorsPerThread: 132 - NumLoadsA: 6 - NumLoadsB: 22 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -654872,8 +654089,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2508 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x176x64_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 + SolutionIndex: 2505 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -654881,17 +654098,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 11 - ThreadTileA: 12 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -654902,23 +654119,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -654950,7 +654167,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -654966,12 +654183,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -654979,9 +654196,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 + LdsNumBytes: 43008 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -654990,7 +654207,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 + LdsOffsetMetadata: 43008 LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 @@ -655003,7 +654220,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -655012,14 +654229,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] + MIWaveTile: [6, 3] MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 192 + MacroTile1: 96 MacroTileA: 192 - MacroTileB: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -655040,14 +654257,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -655133,8 +654350,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2509 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2506 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -655150,9 +654367,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 6 + ThreadTile1: 3 ThreadTileA: 24 - ThreadTileB: 6 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -655170,7 +654387,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -655216,7 +654433,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -655227,7 +654444,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -655236,23 +654453,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -655264,7 +654481,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -655273,14 +654490,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -655301,14 +654518,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -655394,8 +654611,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2510 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2507 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -655403,17 +654620,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -655424,14 +654641,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -655474,10 +654691,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -655488,7 +654705,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT12_3_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -655497,27 +654714,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -655533,15 +654750,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -655562,14 +654779,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -655655,8 +654872,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2511 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT12_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn8 + SolutionIndex: 2508 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -655664,17 +654881,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -655685,23 +654902,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -655733,7 +654950,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -655749,12 +654966,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT13_3_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -655762,19 +654979,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -655786,7 +655003,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -655794,15 +655011,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [13, 3] - MIWaveTileA: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 3] + MIWaveTileA: 7 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 208 - MacroTile1: 192 - MacroTileA: 208 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 96 + MacroTileA: 224 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -655823,14 +655040,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 26 - NumLoadsB: 6 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 26 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -655916,8 +655133,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2512 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT13_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGMn16 + SolutionIndex: 2509 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -655926,15 +655143,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 52 + ThreadTile0: 28 ThreadTile1: 3 - ThreadTileA: 52 + ThreadTileA: 28 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -655952,8 +655169,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -655983,7 +655200,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -655996,10 +655213,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -656010,42 +655227,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_3_NTC0_NTD0_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 22144 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 22144 - LdsOffsetMetadata_Blk: 41088 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -656055,15 +655272,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 3] - MIWaveTileA: 8 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -656079,19 +655296,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -656177,8 +655394,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2513 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 + SolutionIndex: 2510 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -656186,17 +655403,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -656207,21 +655424,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -656244,7 +655461,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -656257,10 +655474,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -656271,42 +655488,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_NTC0_NTD0_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26496 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 45440 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26496 - LdsOffsetMetadata_Blk: 45440 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -656316,15 +655533,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 192 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -656340,19 +655557,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 - NumLoadsB: 3 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -656438,8 +655655,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2514 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 2511 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -656447,17 +655664,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -656468,21 +655685,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -656505,7 +655722,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -656516,12 +655733,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -656532,42 +655749,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30976 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 54528 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30976 - LdsOffsetMetadata_Blk: 54528 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -656577,15 +655794,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -656601,19 +655818,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 2 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -656699,26 +655916,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2515 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2512 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -656729,27 +655946,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -656782,7 +655999,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -656793,7 +656010,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -656802,27 +656019,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60672 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60672 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -656839,14 +656056,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -656862,19 +656079,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 40 - NumLoadsB: 4 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -656960,26 +656177,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2516 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2513 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -656990,14 +656207,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -657006,11 +656223,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -657040,7 +656257,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -657054,7 +656271,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT13_3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -657067,23 +656284,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 65152 + LdsNumElementsAlignedA: 28288 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 28288 + LdsOffsetB_Blk: 93824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65152 + LdsOffsetMetadata_Blk: 93824 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -657100,14 +656317,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [13, 3] + MIWaveTile: [13, 4] MIWaveTileA: 13 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 208 - MacroTile1: 192 + MacroTile1: 256 MacroTileA: 208 - MacroTileB: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -657123,19 +656340,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 208 NumLoadsA: 26 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 26 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -657221,15 +656438,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2517 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT13_3_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGMn16 + SolutionIndex: 2514 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -657238,9 +656455,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 52 - ThreadTile1: 3 + ThreadTile1: 4 ThreadTileA: 52 - ThreadTileB: 3 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -657261,7 +656478,7 @@ WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -657271,7 +656488,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -657288,7 +656505,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -657304,7 +656521,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -657315,42 +656532,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT16_3_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30464 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 30464 - LdsOffsetMetadata_Blk: 49408 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -657360,15 +656577,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [16, 3] - MIWaveTileA: 16 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -657384,19 +656601,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 16 - NumLoadsB: 3 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -657482,26 +656699,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2518 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT16_3_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGMn16 + SolutionIndex: 2515 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -657512,27 +656729,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -657562,7 +656779,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 8 @@ -657576,7 +656793,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -657589,23 +656806,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -657622,14 +656839,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -657645,19 +656862,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -657743,15 +656960,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2519 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2516 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 @@ -657760,9 +656977,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -657780,10 +656997,10 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -657793,8 +657010,8 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -657810,7 +657027,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -657821,12 +657038,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 11 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -657837,44 +657054,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -657882,15 +657099,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -657906,19 +657123,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -658004,8 +657221,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2520 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU11_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2517 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -658013,17 +657230,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -658034,23 +657251,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -658071,7 +657288,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -658082,9 +657299,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 11 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -658098,32 +657315,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -658132,10 +657349,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -658143,15 +657360,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -658172,14 +657389,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -658265,8 +657482,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2521 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU11_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2518 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -658275,16 +657492,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -658301,15 +657518,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 11] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -658332,7 +657549,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -658343,12 +657560,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -658359,32 +657576,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_PLR1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -658393,10 +657610,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -658405,14 +657622,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -658428,19 +657645,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -658526,8 +657743,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2522 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2519 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -658535,17 +657752,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -658556,21 +657773,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -658593,7 +657810,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -658605,11 +657822,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -658620,42 +657837,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT3_13_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 28032 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 28032 + LdsOffsetMetadata_Blk: 46592 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -658665,15 +657882,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [3, 13] + MIWaveTileA: 3 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 208 + MacroTileA: 192 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -658689,19 +657906,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerThread: 156 + NumGlobalWriteVectorsPerThread: 156 + NumLoadsA: 3 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -658787,8 +658004,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2523 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2520 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT3_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -658796,17 +658013,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 13 + ThreadTileA: 12 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -658817,21 +658034,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -658865,12 +658082,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -658881,36 +658098,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_PLR1_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -658927,13 +658144,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 + MIWaveTile: [6, 7] + MIWaveTileA: 6 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 224 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -658950,18 +658167,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -659048,8 +658265,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2524 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU8_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_PLR1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2521 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -659057,16 +658274,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 24 ThreadTile1: 7 - ThreadTileA: 32 + ThreadTileA: 24 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -659078,23 +658295,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -659126,9 +658343,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -659142,12 +658359,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -659211,18 +658428,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 168 NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 + NumLoadsA: 24 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -659309,8 +658526,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2525 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2522 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -659346,10 +658563,10 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -659389,10 +658606,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -659403,7 +658620,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -659412,27 +658629,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -659449,13 +658666,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 + MIWaveTile: [6, 7] + MIWaveTileA: 6 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 224 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -659472,18 +658689,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 @@ -659570,8 +658787,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2526 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU5_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2523 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -659579,16 +658796,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 24 ThreadTile1: 7 - ThreadTileA: 32 + ThreadTileA: 24 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -659600,23 +658817,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -659637,7 +658854,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -659649,11 +658866,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -659664,42 +658881,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 31104 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 31104 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -659709,15 +658926,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 208 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -659733,19 +658950,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 16 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -659831,8 +659048,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2527 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU4_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2524 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -659840,17 +659057,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -659861,23 +659078,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -659909,7 +659126,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -659925,12 +659142,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -659938,23 +659155,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -659962,7 +659179,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -659971,14 +659188,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -659999,14 +659216,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -660092,8 +659309,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2528 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV1_MIWT6_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2525 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -660108,10 +659325,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -660129,7 +659346,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -660138,7 +659355,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -660159,7 +659376,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -660170,12 +659387,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -660186,44 +659403,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT2_13_NTC0_NTD0_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 23424 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 23424 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -660231,15 +659448,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 13] + MIWaveTileA: 2 + MIWaveTileB: 13 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 160 + MacroTile1: 208 MacroTileA: 128 - MacroTileB: 160 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -660255,19 +659472,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 5 + NumElementsPerThread: 104 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 2 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -660353,8 +659570,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2529 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2526 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT2_13_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -660362,17 +659579,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 13 + ThreadTileA: 8 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -660383,21 +659600,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -660420,7 +659637,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -660432,11 +659649,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -660447,42 +659664,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 28288 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 28288 + LdsOffsetMetadata_Blk: 45824 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -660493,13 +659710,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 + MIWaveTile: [6, 7] + MIWaveTileA: 6 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 224 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -660516,19 +659733,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 12 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -660614,8 +659831,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2530 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 + SolutionIndex: 2527 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -660623,16 +659840,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 24 ThreadTile1: 7 - ThreadTileA: 32 + ThreadTileA: 24 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -660644,23 +659861,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -660681,7 +659898,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -660692,12 +659909,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -660708,44 +659925,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 31104 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 31104 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -660753,15 +659970,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 3] - MIWaveTileA: 7 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 96 - MacroTileA: 224 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -660777,19 +659994,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 16 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -660875,26 +660092,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2531 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2528 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 3 - ThreadTileA: 28 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -660905,27 +660122,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -660955,7 +660172,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -660969,7 +660186,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -660982,23 +660199,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -661015,14 +660232,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -661038,19 +660255,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 7 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -661136,15 +660353,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2532 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2529 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -661152,10 +660369,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -661173,20 +660390,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -661215,11 +660432,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -661230,36 +660447,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_7_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -661276,13 +660493,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 + MIWaveTile: [7, 7] + MIWaveTileA: 7 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 224 MacroTile1: 224 - MacroTileA: 192 + MacroTileA: 224 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -661299,19 +660516,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 7 + NumElementsPerThread: 196 + NumGlobalWriteVectorsPerThread: 196 + NumLoadsA: 28 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -661397,25 +660614,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2533 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2530 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 28 ThreadTile1: 7 - ThreadTileA: 24 + ThreadTileA: 28 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -661427,27 +660644,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -661475,12 +660692,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -661491,36 +660708,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -661536,15 +660753,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 96 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 96 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -661560,19 +660777,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -661658,26 +660875,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2534 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 2531 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -661688,13 +660905,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -661704,11 +660921,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -661737,11 +660954,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -661752,36 +660969,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -661798,14 +661015,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 160 - MacroTileA: 160 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -661821,19 +661038,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -661919,26 +661136,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2535 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2532 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -661949,14 +661166,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -661965,12 +661182,12 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 + _staggerStrideShift: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -661986,7 +661203,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -661997,9 +661214,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -662013,44 +661230,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65152 - LdsNumElementsAlignedA: 28288 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 28288 - LdsOffsetB_Blk: 93824 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65152 - LdsOffsetMetadata_Blk: 93824 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -662059,14 +661276,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [13, 4] - MIWaveTileA: 13 - MIWaveTileB: 4 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 208 - MacroTile1: 256 - MacroTileA: 208 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -662082,19 +661299,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 208 - NumLoadsA: 26 - NumLoadsB: 8 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 26 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -662180,8 +661397,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2536 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGMn16 + SolutionIndex: 2533 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -662196,10 +661413,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 52 - ThreadTile1: 4 - ThreadTileA: 52 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -662217,14 +661434,14 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 10] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -662247,7 +661464,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -662258,12 +661475,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 10 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -662274,32 +661491,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -662308,10 +661525,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -662319,15 +661536,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -662343,19 +661560,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 - NumLoadsB: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -662441,8 +661658,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2537 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2534 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU10_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -662450,17 +661667,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -662471,21 +661688,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 10] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -662519,12 +661736,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -662535,68 +661752,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -662604,19 +661821,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -662702,8 +661919,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2538 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 + SolutionIndex: 2535 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -662711,17 +661928,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -662732,23 +661949,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -662780,12 +661997,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -662796,68 +662013,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -662865,19 +662082,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -662963,8 +662180,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2539 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2536 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -662972,17 +662189,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -662993,23 +662210,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 4] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -663043,7 +662260,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -663057,7 +662274,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -663070,23 +662287,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65152 + LdsNumElementsAlignedA: 28288 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 28288 + LdsOffsetB_Blk: 93824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65152 + LdsOffsetMetadata_Blk: 93824 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -663102,15 +662319,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [13, 4] + MIWaveTileA: 13 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 208 + MacroTile1: 256 + MacroTileA: 208 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -663131,14 +662348,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 208 + NumLoadsA: 26 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 26 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -663224,8 +662441,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2540 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2537 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -663234,16 +662451,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 52 + ThreadTile1: 4 + ThreadTileA: 52 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -663260,11 +662477,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -663304,10 +662521,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -663318,7 +662535,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -663327,23 +662544,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 60416 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 60416 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -663363,15 +662580,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -663392,14 +662609,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -663485,8 +662702,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2541 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2538 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -663494,17 +662711,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -663515,23 +662732,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -663552,7 +662769,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -663564,11 +662781,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -663579,45 +662796,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT3_13_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28032 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 46592 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28032 - LdsOffsetMetadata_Blk: 46592 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -663625,22 +662842,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [3, 13] - MIWaveTileA: 3 - MIWaveTileB: 13 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 208 - MacroTileA: 192 - MacroTileB: 208 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -663653,14 +662870,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 156 - NumGlobalWriteVectorsPerThread: 156 - NumLoadsA: 3 - NumLoadsB: 13 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -663746,8 +662963,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2542 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT3_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 + SolutionIndex: 2539 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -663755,17 +662972,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 13 - ThreadTileA: 12 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -663776,21 +662993,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -663829,7 +663046,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -663840,7 +663057,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -663849,23 +663066,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -663877,7 +663094,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -663886,14 +663103,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [7, 3] + MIWaveTileA: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 96 + MacroTileA: 224 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -663909,19 +663126,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 + NumElementsPerThread: 84 NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 6 - NumLoadsB: 7 + NumLoadsA: 7 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -664007,8 +663224,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2543 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2540 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -664016,17 +663233,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 3 + ThreadTileA: 28 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -664037,14 +663254,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -664085,12 +663302,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -664101,22 +663318,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 64512 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -664125,21 +663342,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 + LdsOffsetMetadata: 64512 LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -664147,22 +663364,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 224 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -664175,14 +663392,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -664268,8 +663485,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2544 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2541 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -664277,17 +663494,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -664298,17 +663515,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -664346,12 +663563,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -664362,22 +663579,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 + LdsNumBytes: 64512 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -664386,21 +663603,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 + LdsOffsetMetadata: 64512 LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -664408,22 +663625,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 224 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -664436,14 +663653,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -664529,8 +663746,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2545 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2542 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -664538,17 +663755,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -664559,17 +663776,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -664596,7 +663813,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -664607,12 +663824,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -664623,45 +663840,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31104 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31104 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -664669,22 +663886,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 96 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -664697,14 +663914,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 16 - NumLoadsB: 13 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -664790,8 +664007,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2546 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 2543 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -664799,17 +664016,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -664820,21 +664037,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -664873,7 +664090,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -664884,7 +664101,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -664893,27 +664110,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -664930,13 +664147,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 + MIWaveTile: [5, 5] + MIWaveTileA: 5 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 160 MacroTile1: 160 - MacroTileA: 320 + MacroTileA: 160 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -664953,18 +664170,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 + NumElementsPerThread: 100 NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 + NumLoadsA: 20 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularA: 20 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -665051,8 +664268,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2547 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2544 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -665060,16 +664277,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 20 ThreadTile1: 5 - ThreadTileA: 40 + ThreadTileA: 20 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -665081,14 +664298,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -665097,7 +664314,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -665118,7 +664335,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -665130,11 +664347,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -665145,42 +664362,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA128_LPA8_LPB4_LRVW4_MIWT2_13_NTC0_NTD0_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23424 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23424 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 8 - LdsPadB: 4 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -665190,15 +664407,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 13] - MIWaveTileA: 2 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 208 - MacroTileA: 128 - MacroTileB: 208 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -665219,14 +664436,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 104 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 2 - NumLoadsB: 13 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -665312,8 +664529,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2548 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x208x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA128_LPA8_LPB4_LRVW4_MIWT2_13_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 + SolutionIndex: 2545 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -665321,17 +664538,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 13 - ThreadTileA: 8 - ThreadTileB: 13 + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -665342,21 +664559,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -665379,7 +664596,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -665391,7 +664608,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -665406,42 +664623,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_NTC0_NTD0_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 28288 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 45824 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 28288 - LdsOffsetMetadata_Blk: 45824 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -665452,14 +664669,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] + MIWaveTile: [6, 5] MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 224 + MacroTile1: 160 MacroTileA: 192 - MacroTileB: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -665480,14 +664697,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 12 - NumLoadsB: 14 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -665573,8 +664790,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2549 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_7_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2546 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -665590,9 +664807,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 24 - ThreadTile1: 7 + ThreadTile1: 5 ThreadTileA: 24 - ThreadTileB: 7 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -665614,10 +664831,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -665640,7 +664857,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -665651,8 +664868,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -665667,68 +664884,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31104 + LdsNumBytes: 53760 LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 14208 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31104 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -665736,19 +664953,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 16 - NumLoadsB: 13 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -665834,26 +665051,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2550 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 2547 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -665870,21 +665087,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -665912,12 +665129,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -665928,68 +665145,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -665997,19 +665214,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -666095,26 +665312,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2551 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2548 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -666125,14 +665342,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -666141,11 +665358,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -666173,12 +665390,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -666189,68 +665406,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_7_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 7] - MIWaveTileA: 7 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 224 - MacroTileA: 224 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -666258,19 +665475,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 196 - NumGlobalWriteVectorsPerThread: 196 - NumLoadsA: 28 - NumLoadsB: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -666356,26 +665573,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2552 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2549 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 7 - ThreadTileA: 28 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -666386,14 +665603,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [128, 2, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -666402,11 +665619,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -666450,7 +665667,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -666463,23 +665680,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -666496,14 +665713,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] + MIWaveTile: [8, 5] MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -666519,19 +665736,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 32 - NumLoadsB: 7 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -666617,15 +665834,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2553 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2550 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 @@ -666634,9 +665851,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 7 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 7 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -666654,7 +665871,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -666667,7 +665884,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -666684,7 +665901,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -666700,7 +665917,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -666711,32 +665928,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x96x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT14_3_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 36992 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 6528 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 36992 + LdsOffsetMetadata_Blk: 96000 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -666745,8 +665962,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -666757,14 +665974,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 448 + MacroTile1: 96 + MacroTileA: 448 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -666780,19 +665997,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 28 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -666878,26 +666095,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2554 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2551 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x96x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT14_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -666908,28 +666125,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -666945,7 +666162,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -666958,10 +666175,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -666972,34 +666189,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -667007,10 +666224,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -667018,22 +666235,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -667041,19 +666258,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -667139,8 +666356,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2555 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU10_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2552 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -667148,17 +666365,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -667169,21 +666386,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -667206,7 +666423,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -667217,12 +666434,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 10 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -667233,45 +666450,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -667279,22 +666496,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -667302,18 +666519,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 24 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -667400,8 +666617,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2556 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU10_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2553 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -667409,17 +666626,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 96 + ThreadTile1: 2 + ThreadTileA: 96 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -667430,21 +666647,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 10] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -667478,9 +666695,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 4 @@ -667494,12 +666711,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_NTC3_NTD3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -667507,32 +666724,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 + LdsNumBytes: 61824 + LdsNumElementsAlignedA: 24960 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 24960 + LdsOffsetB_Blk: 90496 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 + LdsOffsetMetadata: 61824 + LdsOffsetMetadata_Blk: 90496 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -667540,22 +666757,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 128 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -667563,18 +666780,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 24 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -667661,8 +666878,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2557 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2554 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -667671,16 +666888,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -667697,11 +666914,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -667739,12 +666956,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -667755,45 +666972,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_NTC3_NTD3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 + LdsNumBytes: 61824 + LdsNumElementsAlignedA: 24960 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 24960 + LdsOffsetB_Blk: 90496 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 + LdsOffsetMetadata: 61824 + LdsOffsetMetadata_Blk: 90496 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -667801,9 +667018,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 192 MacroTile1: 256 @@ -667813,10 +667030,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -667824,18 +667041,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 24 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -667922,8 +667139,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2558 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT6_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2555 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -667931,17 +667148,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -667952,17 +667169,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -667989,7 +667206,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -668002,10 +667219,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -668016,32 +667233,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65152 - LdsNumElementsAlignedA: 28288 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 35072 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28288 - LdsOffsetB_Blk: 93824 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 82176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65152 - LdsOffsetMetadata_Blk: 93824 + LdsOffsetMetadata: 35072 + LdsOffsetMetadata_Blk: 82176 LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 @@ -668050,8 +667267,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -668062,13 +667279,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [13, 4] - MIWaveTileA: 13 + MIWaveTile: [16, 4] + MIWaveTileA: 16 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 208 + MacroTile0: 256 MacroTile1: 256 - MacroTileA: 208 + MacroTileA: 256 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -668085,19 +667302,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 208 - NumLoadsA: 26 - NumLoadsB: 8 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 26 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -668183,8 +667400,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2559 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2556 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -668192,16 +667409,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 52 + ThreadTile0: 64 ThreadTile1: 4 - ThreadTileA: 52 + ThreadTileA: 64 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -668213,21 +667430,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -668263,10 +667480,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -668277,7 +667494,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC0_NTD0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -668286,27 +667503,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -668322,14 +667539,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 320 MacroTile1: 160 - MacroTileA: 256 + MacroTileA: 320 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -668346,18 +667563,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 32 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 40 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -668444,8 +667661,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2560 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_10_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2557 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -668453,17 +667670,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -668474,17 +667691,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -668522,12 +667739,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -668538,68 +667755,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT13_4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 65152 + LdsNumElementsAlignedA: 28288 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 28288 + LdsOffsetB_Blk: 93824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 + LdsOffsetMetadata: 65152 + LdsOffsetMetadata_Blk: 93824 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [13, 4] + MIWaveTileA: 13 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 208 + MacroTile1: 256 + MacroTileA: 208 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -668612,14 +667829,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 208 + NumLoadsA: 26 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 26 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -668705,8 +667922,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2561 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2558 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT13_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -668714,17 +667931,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 52 + ThreadTile1: 4 + ThreadTileA: 52 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -668735,14 +667952,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -668772,7 +667989,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -668788,7 +668005,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -668799,34 +668016,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTC0_NTD0_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -668834,33 +668051,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 3] - MIWaveTileA: 7 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 96 - MacroTileA: 224 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -668873,14 +668090,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -668966,8 +668183,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2562 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV1_MIWT7_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2559 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -668975,17 +668192,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 3 - ThreadTileA: 28 - ThreadTileB: 3 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -668996,21 +668213,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -669044,12 +668261,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -669060,68 +668277,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 128 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 128 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -669134,13 +668351,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 16 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 16 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -669227,8 +668444,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2563 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2560 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -669236,16 +668453,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -669257,17 +668474,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -669294,7 +668511,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -669305,12 +668522,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -669321,68 +668538,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_NTC0_NTD0_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 26752 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 + LdsOffsetMetadata: 26752 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 128 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 128 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -669390,19 +668607,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -669488,8 +668705,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2564 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn8 + SolutionIndex: 2561 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -669497,16 +668714,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -669518,21 +668735,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -669555,7 +668772,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -669571,7 +668788,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -669582,32 +668799,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -669616,8 +668833,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -669627,15 +668844,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 96 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -669651,19 +668868,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -669749,26 +668966,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2565 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn16 + SolutionIndex: 2562 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -669779,27 +668996,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -669843,7 +669060,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -669856,23 +669073,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 65152 + LdsNumElementsAlignedA: 28288 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 28288 + LdsOffsetB_Blk: 93824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65152 + LdsOffsetMetadata_Blk: 93824 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -669888,15 +669105,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [13, 4] + MIWaveTileA: 13 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 160 - MacroTileA: 160 - MacroTileB: 160 + MacroTile0: 208 + MacroTile1: 256 + MacroTileA: 208 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -669912,19 +669129,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 20 - NumLoadsB: 5 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 208 + NumLoadsA: 26 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 26 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -670010,26 +669227,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2566 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2563 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 5 - ThreadTileA: 20 - ThreadTileB: 5 + ThreadTile0: 52 + ThreadTile1: 4 + ThreadTileA: 52 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -670046,8 +669263,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -670060,7 +669277,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -670077,7 +669294,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -670088,12 +669305,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -670104,42 +669321,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_5_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 27520 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 27520 + LdsOffsetMetadata_Blk: 49408 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -670150,13 +669367,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 5] - MIWaveTileA: 5 + MIWaveTile: [8, 5] + MIWaveTileA: 8 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 256 MacroTile1: 160 - MacroTileA: 160 + MacroTileA: 256 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -670173,19 +669390,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 100 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 5 - NumLoadsB: 5 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -670271,25 +669488,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2567 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2564 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 20 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -670301,27 +669518,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -670354,7 +669571,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -670365,7 +669582,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT12_4_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -670374,27 +669591,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 61824 + LdsNumElementsAlignedA: 24960 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 24960 + LdsOffsetB_Blk: 90496 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61824 + LdsOffsetMetadata_Blk: 90496 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -670410,15 +669627,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 160 + MacroTile1: 256 MacroTileA: 192 - MacroTileB: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -670434,19 +669651,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 24 - NumLoadsB: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -670532,26 +669749,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2568 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2565 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT12_4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -670562,13 +669779,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -670582,7 +669799,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -670599,7 +669816,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -670610,12 +669827,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -670626,22 +669843,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 + LdsNumBytes: 35328 LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -670650,7 +669867,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 + LdsOffsetMetadata: 35328 LdsOffsetMetadata_Blk: 82432 LdsPadA: 8 LdsPadB: 8 @@ -670660,8 +669877,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -670672,13 +669889,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveTile: [8, 2] + MIWaveTileA: 8 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 256 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -670695,19 +669912,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 + NumElementsPerThread: 256 NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsA: 16 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -670793,25 +670010,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2569 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn16 + SolutionIndex: 2566 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 2 SubGroup1: 128 SubGroupA: 2 SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 128 ThreadTile1: 2 - ThreadTileA: 64 + ThreadTileA: 128 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -670823,7 +670040,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -670834,16 +670051,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -670871,12 +670088,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -670887,68 +670104,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -670956,19 +670173,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -671054,26 +670271,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2570 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGMn8 + SolutionIndex: 2567 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -671084,14 +670301,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -671104,7 +670321,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -671132,12 +670349,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -671148,68 +670365,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61824 + LdsNumElementsAlignedA: 24960 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 24960 + LdsOffsetB_Blk: 90496 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 + LdsOffsetMetadata: 61824 + LdsOffsetMetadata_Blk: 90496 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -671217,19 +670434,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -671315,26 +670532,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2571 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGMn8 + SolutionIndex: 2568 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -671345,14 +670562,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -671365,7 +670582,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -671398,7 +670615,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -671409,7 +670626,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -671418,45 +670635,45 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 @@ -671467,10 +670684,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -671478,13 +670695,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 32 NumLoadsB: 5 NumLoadsCoalescedA: 1 @@ -671576,16 +670793,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2572 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn8 + SolutionIndex: 2569 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -671606,14 +670823,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -671626,7 +670843,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -671643,7 +670860,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -671654,12 +670871,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -671670,44 +670887,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x96x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT14_3_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_4_4 + LSCA: 512 + LSCB: 512 + LSPA: 4 + LSPB: 4 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36992 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 6528 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36992 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -671715,15 +670932,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 96 - MacroTileA: 448 - MacroTileB: 96 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -671739,19 +670956,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 28 - NumLoadsB: 6 + NumElementsPerThread: 1 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -671837,8 +671054,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2573 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x96x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT14_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2570 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -671846,17 +671063,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -671867,21 +671084,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -671904,7 +671121,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -671917,10 +671134,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -671931,68 +671148,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -672000,20 +671217,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 - NumThreads: 256 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -672098,8 +671315,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2574 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2571 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -672107,17 +671324,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -672128,21 +671345,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 8] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -672176,12 +671393,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -672192,68 +671409,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 80896 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 160 + MacroTileA: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -672266,14 +671483,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -672359,8 +671576,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2575 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT6_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2572 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -672368,17 +671585,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 96 - ThreadTile1: 2 - ThreadTileA: 96 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -672389,14 +671606,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -672439,10 +671656,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -672453,7 +671670,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -672462,23 +671679,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61824 - LdsNumElementsAlignedA: 24960 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24960 - LdsOffsetB_Blk: 90496 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61824 - LdsOffsetMetadata_Blk: 90496 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 107776 LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 @@ -672498,15 +671715,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -672527,14 +671744,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -672620,8 +671837,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2576 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn8 + SolutionIndex: 2573 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -672629,17 +671846,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -672650,23 +671867,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -672700,10 +671917,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -672714,7 +671931,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -672723,27 +671940,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61824 - LdsNumElementsAlignedA: 24960 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24960 - LdsOffsetB_Blk: 90496 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61824 - LdsOffsetMetadata_Blk: 90496 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -672759,15 +671976,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -672788,14 +672005,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -672881,8 +672098,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2577 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 2574 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -672890,17 +672107,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -672911,17 +672128,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -672948,7 +672165,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -672959,12 +672176,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -672975,42 +672192,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35072 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 82176 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35072 - LdsOffsetMetadata_Blk: 82176 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -673020,15 +672237,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [16, 4] - MIWaveTileA: 16 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -673049,13 +672266,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -673142,8 +672359,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2578 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT16_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 + SolutionIndex: 2575 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -673151,16 +672368,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 24 ThreadTile1: 4 - ThreadTileA: 64 + ThreadTileA: 24 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -673172,21 +672389,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -673220,7 +672437,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -673236,12 +672453,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -673249,23 +672466,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -673282,14 +672499,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -673305,19 +672522,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -673403,8 +672620,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2579 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2576 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -673419,10 +672636,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -673440,7 +672657,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -673449,7 +672666,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -673486,7 +672703,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -673497,7 +672714,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT13_4_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -673506,27 +672723,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65152 - LdsNumElementsAlignedA: 28288 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28288 - LdsOffsetB_Blk: 93824 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65152 - LdsOffsetMetadata_Blk: 93824 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -673542,15 +672759,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [13, 4] - MIWaveTileA: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 208 - MacroTile1: 256 - MacroTileA: 208 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -673571,14 +672788,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 208 - NumLoadsA: 26 - NumLoadsB: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 24 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 26 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -673664,8 +672881,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2580 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT13_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGMn16 + SolutionIndex: 2577 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -673673,16 +672890,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 52 + ThreadTile0: 24 ThreadTile1: 4 - ThreadTileA: 52 + ThreadTileA: 24 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -673694,14 +672911,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -673731,7 +672948,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -673747,7 +672964,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -673758,32 +672975,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTC0_NTD0_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -673792,8 +673009,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -673803,15 +673020,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 256 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -673827,18 +673044,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 + NumElementsPerThread: 128 NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -673925,8 +673142,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2581 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2578 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -673934,16 +673151,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 + ThreadTile0: 64 ThreadTile1: 2 - ThreadTileA: 128 + ThreadTileA: 64 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -673955,21 +673172,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -674008,7 +673225,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -674019,7 +673236,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SVW8_VWA8_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -674028,23 +673245,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -674064,15 +673281,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -674093,14 +673310,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 16 - NumLoadsB: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -674186,8 +673403,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2582 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 + SolutionIndex: 2579 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -674195,16 +673412,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 28 ThreadTile1: 4 - ThreadTileA: 32 + ThreadTileA: 28 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -674216,14 +673433,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -674253,7 +673470,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -674264,12 +673481,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -674280,68 +673497,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_NTC0_NTD0_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26752 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26752 - LdsOffsetMetadata_Blk: 41088 - LdsPadA: 4 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -674349,19 +673566,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -674447,8 +673664,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2583 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_NTC0_NTD0_SU0_SUM0_SUS0_SVW8_VWA8_WG16_16_1_WGMn16 + SolutionIndex: 2580 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -674456,7 +673673,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -674464,9 +673681,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -674477,21 +673694,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -674514,7 +673731,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -674525,12 +673742,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -674541,68 +673758,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -674610,19 +673827,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -674708,26 +673925,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2584 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2581 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -674738,27 +673955,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -674787,7 +674004,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -674802,34 +674019,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_10_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65152 - LdsNumElementsAlignedA: 28288 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 43520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 28288 - LdsOffsetB_Blk: 93824 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65152 - LdsOffsetMetadata_Blk: 93824 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 87296 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -674847,15 +674064,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [13, 4] - MIWaveTileA: 13 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 10] + MIWaveTileA: 5 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 208 - MacroTile1: 256 - MacroTileA: 208 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -674871,19 +674088,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 208 - NumLoadsA: 26 - NumLoadsB: 8 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 200 + NumLoadsA: 20 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 26 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -674969,26 +674186,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2585 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT208x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT13_4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGMn16 + SolutionIndex: 2582 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_10_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 52 - ThreadTile1: 4 - ThreadTileA: 52 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 10 + ThreadTileA: 20 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -675005,8 +674222,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -675015,11 +674232,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -675047,12 +674264,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -675063,45 +674280,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_5_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 32 LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27520 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27520 - LdsOffsetMetadata_Blk: 49408 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -675109,22 +674326,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 + MIWaveTile: [3, 5] + MIWaveTileA: 3 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -675132,19 +674349,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 10 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -675230,25 +674447,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2586 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2583 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 48 ThreadTile1: 5 - ThreadTileA: 32 + ThreadTileA: 48 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -675260,13 +674477,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -675280,7 +674497,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -675297,7 +674514,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -675324,32 +674541,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT12_4_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61824 - LdsNumElementsAlignedA: 24960 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 35712 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24960 - LdsOffsetB_Blk: 90496 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61824 - LdsOffsetMetadata_Blk: 90496 + LdsOffsetMetadata: 35712 + LdsOffsetMetadata_Blk: 78208 LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 @@ -675358,8 +674575,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -675370,14 +674587,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] + MIWaveTile: [12, 5] MIWaveTileA: 12 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 256 + MacroTile1: 320 MacroTileA: 192 - MacroTileB: 256 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -675393,19 +674610,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -675491,15 +674708,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2587 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT12_4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 2584 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 @@ -675508,9 +674725,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 48 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 48 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -675532,16 +674749,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -675574,7 +674791,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -675585,7 +674802,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -675594,36 +674811,36 @@ LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35328 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 35712 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35328 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 + LdsOffsetMetadata: 35712 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -675631,22 +674848,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -675654,19 +674871,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 16 - NumLoadsB: 4 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -675752,26 +674969,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2588 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2585 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -675782,14 +674999,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -675802,7 +675019,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -675819,7 +675036,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -675830,12 +675047,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -675846,34 +675063,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -675881,10 +675098,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -675892,22 +675109,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -675920,13 +675137,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 2 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -676013,8 +675230,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2589 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2586 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -676022,16 +675239,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 28 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -676043,27 +675260,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -676096,7 +675313,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -676107,7 +675324,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -676116,27 +675333,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61824 - LdsNumElementsAlignedA: 24960 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 24960 - LdsOffsetB_Blk: 90496 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61824 - LdsOffsetMetadata_Blk: 90496 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -676152,15 +675369,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 4] - MIWaveTileA: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -676181,14 +675398,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -676274,8 +675491,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2590 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT12_4_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 2587 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -676283,16 +675500,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 28 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 28 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -676304,13 +675521,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -676341,7 +675558,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -676352,12 +675569,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -676368,32 +675585,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SVW8_VWA8_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -676402,8 +675619,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -676413,15 +675630,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -676442,14 +675659,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -676535,8 +675752,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2591 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 + SolutionIndex: 2588 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -676544,17 +675761,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -676565,27 +675782,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -676602,7 +675819,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -676613,12 +675830,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -676629,44 +675846,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_4_4 - LSCA: 512 - LSCB: 512 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -676674,15 +675891,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -676698,18 +675915,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 1 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -676796,26 +676013,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2592 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_4_WGM1 + SolutionIndex: 2589 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -676826,27 +676043,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -676863,7 +676080,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -676874,12 +676091,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -676890,68 +676107,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 - LSCA: 256 - LSCB: 256 - LSPA: 4 - LSPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -676959,20 +676176,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -677057,26 +676274,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2593 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 + SolutionIndex: 2590 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -677087,27 +676304,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -677124,7 +676341,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -677135,12 +676352,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -677151,44 +676368,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_5_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 35712 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 80896 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35712 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -677196,15 +676413,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 160 - MacroTileA: 96 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -677220,18 +676437,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 + NumElementsPerThread: 240 NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 + NumLoadsA: 12 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularA: 12 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -677318,25 +676535,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2594 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT3_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2591 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 48 ThreadTile1: 5 - ThreadTileA: 12 + ThreadTileA: 48 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -677348,27 +676565,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -677385,7 +676602,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -677397,8 +676614,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 @@ -677412,68 +676629,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI32x32x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 29952 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 11520 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 + LdsOffsetMetadata: 29952 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 320 + MacroTile0: 256 MacroTile1: 160 - MacroTileA: 320 + MacroTileA: 256 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -677481,19 +676698,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 5 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 16 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -677579,15 +676796,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2595 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU3_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2592 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI32x32x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -677595,9 +676812,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 40 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -677615,21 +676832,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -677646,7 +676863,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -677657,9 +676874,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -677673,44 +676890,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_4_2 + LSCA: 512 + LSCB: 512 + LSPA: 2 + LSPB: 2 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -677718,15 +676935,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -677742,20 +676959,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 - NumThreads: 256 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -677840,8 +677057,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2596 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2593 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -677850,16 +677067,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -677876,15 +677093,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -677907,7 +677124,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -677920,10 +677137,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 7 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -677934,32 +677151,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -677968,10 +677185,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -677979,15 +677196,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -678003,19 +677220,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -678101,8 +677318,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2597 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2594 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU7_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -678110,17 +677327,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -678131,21 +677348,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 7] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -678168,7 +677385,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -678181,10 +677398,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 7 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -678195,32 +677412,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -678229,10 +677446,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -678240,15 +677457,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -678264,20 +677481,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -678362,8 +677579,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2598 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2595 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU7_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -678371,17 +677588,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -678392,21 +677609,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 7] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -678429,7 +677646,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -678440,12 +677657,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -678456,32 +677673,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -678490,10 +677707,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -678501,15 +677718,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -678525,20 +677742,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 24 - NumLoadsB: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -678623,8 +677840,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2599 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2596 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU6_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -678632,17 +677849,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -678653,21 +677870,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 6] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -678703,10 +677920,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -678717,7 +677934,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -678726,23 +677943,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -678762,15 +677979,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -678791,14 +678008,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -678884,8 +678101,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2600 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2597 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -678893,16 +678110,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 80 ThreadTile1: 2 - ThreadTileA: 64 + ThreadTileA: 80 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -678914,17 +678131,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -678964,7 +678181,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -678978,7 +678195,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -678991,55 +678208,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -679052,14 +678269,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 20 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -679145,8 +678362,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2601 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2598 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -679155,16 +678372,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -679185,7 +678402,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -679223,12 +678440,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -679239,68 +678456,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -679313,14 +678530,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -679406,8 +678623,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2602 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGMn16 + SolutionIndex: 2599 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -679415,17 +678632,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -679436,23 +678653,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -679486,10 +678703,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -679500,7 +678717,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT240x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT15_3_NTC3_NTD3_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -679509,23 +678726,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 60288 + LdsNumElementsAlignedA: 32640 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 32640 + LdsOffsetB_Blk: 98176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 107776 + LdsOffsetMetadata: 60288 + LdsOffsetMetadata_Blk: 98176 LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 @@ -679545,15 +678762,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [15, 3] + MIWaveTileA: 15 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 240 + MacroTile1: 192 + MacroTileA: 240 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -679574,14 +678791,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 5 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 30 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 30 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -679667,8 +678884,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2603 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2600 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT240x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT15_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -679676,17 +678893,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 60 + ThreadTile1: 3 + ThreadTileA: 60 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -679697,17 +678914,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -679747,7 +678964,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -679761,7 +678978,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_10_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -679774,9 +678991,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 + LdsNumBytes: 60928 LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 43520 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -679785,7 +679002,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 + LdsOffsetMetadata: 60928 LdsOffsetMetadata_Blk: 87296 LdsPadA: 4 LdsPadB: 4 @@ -679807,14 +679024,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 10] + MIWaveTile: [5, 9] MIWaveTileA: 5 - MIWaveTileB: 10 + MIWaveTileB: 9 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 320 + MacroTile1: 288 MacroTileA: 160 - MacroTileB: 320 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -679830,19 +679047,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 200 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 NumLoadsA: 20 - NumLoadsB: 40 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -679928,8 +679145,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2604 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_10_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2601 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -679945,9 +679162,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 - ThreadTile1: 10 + ThreadTile1: 9 ThreadTileA: 20 - ThreadTileB: 10 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -679965,10 +679182,10 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -679995,7 +679212,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -680011,7 +679228,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -680022,32 +679239,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -680056,8 +679273,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -680067,15 +679284,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -680096,14 +679313,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 3 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -680189,8 +679406,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2605 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGMn16 + SolutionIndex: 2602 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -680198,17 +679415,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -680219,21 +679436,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -680256,7 +679473,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -680283,68 +679500,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -680357,14 +679574,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -680450,8 +679667,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2606 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 2603 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -680466,10 +679683,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -680486,17 +679703,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -680517,7 +679734,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -680528,12 +679745,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -680544,68 +679761,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_3_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 320 + MacroTile1: 192 MacroTileA: 192 - MacroTileB: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -680618,14 +679835,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -680711,8 +679928,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2607 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGMn8 + SolutionIndex: 2604 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -680720,7 +679937,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -680728,9 +679945,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 48 - ThreadTile1: 5 + ThreadTile1: 3 ThreadTileA: 48 - ThreadTileB: 5 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -680741,21 +679958,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -680778,7 +679995,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -680789,7 +680006,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -680805,34 +680022,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 41984 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -680840,10 +680057,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -680851,22 +680068,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -680874,19 +680091,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 2 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 24 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -680972,26 +680189,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2608 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x320x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGMn16 + SolutionIndex: 2605 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -681008,21 +680225,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -681039,7 +680256,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -681055,7 +680272,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -681066,42 +680283,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 26496 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 45440 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26496 + LdsOffsetMetadata_Blk: 45440 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -681111,15 +680328,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -681135,19 +680352,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 - NumLoadsB: 4 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 12 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -681233,26 +680450,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2609 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT7_4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2606 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -681263,27 +680480,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -681311,12 +680528,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -681327,68 +680544,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SVW8_VWA8_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 32 - LSPA: 64 + LSPA: 16 LSPB: 64 - LVCA: 4 + LVCA: 16 LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 29056 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 48000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 29056 + LdsOffsetMetadata_Blk: 48000 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -681396,19 +680613,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 14 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -681494,26 +680711,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2610 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn16 + SolutionIndex: 2607 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -681524,14 +680741,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -681544,7 +680761,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -681577,7 +680794,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -681588,7 +680805,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -681597,13 +680814,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 20480 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -681612,21 +680829,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -681634,22 +680851,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -681657,19 +680874,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 32 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -681755,26 +680972,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2611 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2608 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -681785,14 +681002,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -681805,7 +681022,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -681833,7 +681050,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -681849,12 +681066,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -681862,9 +681079,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -681873,7 +681090,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 @@ -681895,14 +681112,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -681918,19 +681135,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -682016,15 +681233,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2612 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 2609 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 @@ -682033,9 +681250,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 64 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 64 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -682053,7 +681270,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -682062,11 +681279,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -682095,11 +681312,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -682110,34 +681327,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_5_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_SVW1_VWA1_WG64_4_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 40320 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 + LdsOffsetMetadata: 40320 + LdsOffsetMetadata_Blk: 96000 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -682155,15 +681372,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [7, 9] + MIWaveTileA: 7 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 448 + MacroTile1: 144 + MacroTileA: 448 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -682184,14 +681401,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 28 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -682277,8 +681494,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2613 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn16 + SolutionIndex: 2610 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -682286,17 +681503,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 9 + ThreadTileA: 28 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -682307,13 +681524,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -682323,7 +681540,7 @@ _DepthUB: 32 _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -682344,7 +681561,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -682356,11 +681573,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -682371,34 +681588,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI32x32x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29952 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 11520 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 51200 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29952 - LdsOffsetMetadata_Blk: 51200 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -682406,33 +681623,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -682445,14 +681662,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 16 - NumLoadsB: 10 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -682538,8 +681755,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2614 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI32x32x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGMn16 + SolutionIndex: 2611 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -682547,7 +681764,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -682555,9 +681772,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 6 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -682568,27 +681785,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -682605,7 +681822,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -682621,7 +681838,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -682632,68 +681849,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_4_2 - LSCA: 512 - LSCB: 512 - LSPA: 2 - LSPB: 2 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -682701,20 +681918,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularB: 6 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -682799,26 +682016,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2615 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_2_WGM1 + SolutionIndex: 2612 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -682829,27 +682046,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -682879,7 +682096,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 7 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -682893,7 +682110,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_WG16_8_2 LSCA: 256 LSCB: 256 LSPA: 8 @@ -682923,12 +682140,12 @@ LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -682938,10 +682155,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 2] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 16 MacroTile1: 64 @@ -683060,8 +682277,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2616 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU7_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2613 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -683071,15 +682288,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -683096,11 +682313,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 7] + WorkspaceCheck: [4, 0, 4] _DepthU: 256 _DepthUA: 256 _DepthUB: 256 @@ -683127,7 +682344,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -683140,7 +682357,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 7 + GlobalSplitU: 13 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -683154,32 +682371,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 - LSCA: 256 - LSCB: 256 - LSPA: 4 - LSPB: 4 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -683188,8 +682405,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -683199,15 +682416,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 32 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -683228,15 +682445,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -683321,8 +682538,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2617 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU7_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 + SolutionIndex: 2614 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU13_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -683332,15 +682549,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -683357,15 +682574,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 7] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 13] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -683388,7 +682605,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -683401,7 +682618,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -683415,42 +682632,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_WG16_4_4 + LSCA: 512 + LSCB: 512 LSPA: 4 LSPB: 4 - LVCA: 32 - LVCB: 32 + LVCA: 64 + LVCB: 64 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 33792 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -683460,10 +682677,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] + MIWaveGroup: [1, 1] + MIWaveTile: [1, 2] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 16 MacroTile1: 32 @@ -683489,15 +682706,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -683582,8 +682799,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2618 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU6_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_1_WGM1 + SolutionIndex: 2615 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -683593,15 +682810,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -683618,15 +682835,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -683649,7 +682866,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -683662,7 +682879,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -683676,68 +682893,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -683745,19 +682962,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 1 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -683843,8 +683060,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2619 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2616 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -683853,16 +683070,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -683879,15 +683096,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 5] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -683910,7 +683127,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -683921,9 +683138,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -683937,68 +683154,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_8_2 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -684006,19 +683223,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 20 - NumLoadsB: 8 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -684104,8 +683321,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2620 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2617 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -684114,16 +683331,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -684140,15 +683357,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 5] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -684182,12 +683399,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -684198,22 +683415,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 + LdsNumBytes: 57856 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -684222,21 +683439,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 + LdsOffsetMetadata: 57856 LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -684244,22 +683461,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 176 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 176 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -684272,14 +683489,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -684365,8 +683582,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2621 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT4_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2618 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -684374,17 +683591,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -684395,13 +683612,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -684411,7 +683628,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -684443,12 +683660,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -684459,36 +683676,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT240x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT15_3_NTC3_NTD3_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60288 - LdsNumElementsAlignedA: 32640 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32640 - LdsOffsetB_Blk: 98176 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60288 - LdsOffsetMetadata_Blk: 98176 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -684504,14 +683721,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [15, 3] - MIWaveTileA: 15 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 240 + MacroTile0: 128 MacroTile1: 192 - MacroTileA: 240 + MacroTileA: 128 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -684533,13 +683750,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 30 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 30 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -684626,8 +683843,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2622 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT240x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT15_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2619 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -684635,17 +683852,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 60 - ThreadTile1: 3 - ThreadTileA: 60 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -684656,23 +683873,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -684720,7 +683937,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -684887,8 +684104,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2623 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2620 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -684970,7 +684187,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -684981,7 +684198,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -684990,36 +684207,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -685027,22 +684244,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -685055,14 +684272,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -685148,8 +684365,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2624 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2621 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -685157,17 +684374,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -685178,13 +684395,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -685226,12 +684443,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -685242,45 +684459,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_9_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 80896 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -685288,22 +684505,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [3, 9] + MIWaveTileA: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 288 + MacroTileA: 96 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -685311,19 +684528,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 108 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 3 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -685409,8 +684626,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2625 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2622 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -685418,17 +684635,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 9 + ThreadTileA: 12 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -685439,13 +684656,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -685455,7 +684672,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -685487,12 +684704,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -685503,54 +684720,54 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_3_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT12_3_NTC3_NTD3_SVW4_VWA4_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 @@ -685561,10 +684778,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -685578,12 +684795,12 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -685670,8 +684887,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2626 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2623 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT12_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -685679,7 +684896,7 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -685700,13 +684917,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -685749,11 +684966,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -685764,32 +684981,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -685809,15 +685026,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 6] - MIWaveTileA: 6 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 144 + MacroTileA: 256 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -685839,13 +685056,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 24 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 32 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -685931,8 +685148,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2627 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2624 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -685940,17 +685157,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 6 - ThreadTileA: 24 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -685961,13 +685178,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -685977,7 +685194,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -685998,7 +685215,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -686009,7 +685226,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -686025,68 +685242,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26496 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 45440 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26496 - LdsOffsetMetadata_Blk: 45440 - LdsPadA: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -686099,14 +685316,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 12 - NumLoadsB: 3 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -686192,8 +685409,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2628 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2625 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -686208,9 +685425,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -686228,15 +685445,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -686259,7 +685476,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -686270,12 +685487,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -686286,68 +685503,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29056 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 48000 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29056 - LdsOffsetMetadata_Blk: 48000 - LdsPadA: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 224 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -686355,19 +685572,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 14 - NumLoadsB: 3 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -686453,8 +685670,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2629 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT14_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2626 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -686462,16 +685679,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 56 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -686483,21 +685700,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -686532,11 +685749,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -686547,45 +685764,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -686593,22 +685810,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -686621,14 +685838,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -686714,8 +685931,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2630 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2627 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -686723,17 +685940,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -686744,13 +685961,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -686792,8 +686009,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -686808,13 +686025,13 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 @@ -686884,12 +686101,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 192 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsA: 32 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -686975,8 +686192,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2631 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGMn8 + SolutionIndex: 2628 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -687012,7 +686229,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -687021,7 +686238,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -687042,7 +686259,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -687069,32 +686286,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_NTC0_NTD0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40320 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40320 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 104704 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -687103,8 +686320,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -687114,15 +686331,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [7, 9] - MIWaveTileA: 7 - MIWaveTileB: 9 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 6] + MIWaveTileA: 9 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 448 - MacroTile1: 144 - MacroTileA: 448 - MacroTileB: 144 + MacroTile0: 288 + MacroTile1: 192 + MacroTileA: 288 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -687138,19 +686355,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 28 - NumLoadsB: 9 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 216 + NumLoadsA: 36 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -687236,26 +686453,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2632 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT448x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGMn16 + SolutionIndex: 2629 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 9 - ThreadTileA: 28 - ThreadTileB: 9 + ThreadTile0: 36 + ThreadTile1: 6 + ThreadTileA: 36 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -687272,21 +686489,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -687315,11 +686532,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -687330,36 +686547,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -687376,14 +686593,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -687399,19 +686616,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -687497,26 +686714,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2633 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn8 + SolutionIndex: 2630 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -687527,14 +686744,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -687547,7 +686764,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -687564,7 +686781,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -687575,7 +686792,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -687591,68 +686808,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 35712 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 35712 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -687660,19 +686877,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -687758,15 +686975,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2634 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn8 + SolutionIndex: 2631 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 @@ -687774,10 +686991,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -687794,21 +687011,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -687825,7 +687042,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -687836,12 +687053,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -687852,44 +687069,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_WG16_8_2 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -687897,15 +687114,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -687921,19 +687138,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -688019,8 +687236,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2635 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2632 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -688028,17 +687245,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -688049,23 +687266,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -688086,7 +687303,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -688099,10 +687316,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 13 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -688113,68 +687330,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SVW4_VWA4_WG128_2_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -688182,19 +687399,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -688280,8 +687497,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2636 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU13_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2633 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -688289,17 +687506,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -688310,21 +687527,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 13] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -688347,7 +687564,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -688358,8 +687575,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -688374,44 +687591,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_WG16_4_4 - LSCA: 512 - LSCB: 512 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 33792 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 80768 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 80768 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -688419,15 +687636,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 9] + MIWaveTileA: 7 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 224 + MacroTile1: 288 + MacroTileA: 224 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -688443,19 +687660,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 252 + NumGlobalWriteVectorsPerThread: 252 + NumLoadsA: 14 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -688541,8 +687758,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2637 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_4_WGM1 + SolutionIndex: 2634 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -688551,16 +687768,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 9 + ThreadTileA: 28 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -688577,15 +687794,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -688608,7 +687825,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -688619,9 +687836,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -688635,44 +687852,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 39168 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 39168 + LdsOffsetB_Blk: 104704 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 104704 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -688680,15 +687897,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [9, 6] + MIWaveTileA: 9 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 288 + MacroTile1: 192 + MacroTileA: 288 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -688704,19 +687921,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 1 - NumLoadsB: 6 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 216 + NumLoadsA: 36 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -688802,26 +688019,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2638 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2635 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 36 + ThreadTile1: 6 + ThreadTileA: 36 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -688838,21 +688055,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -688869,7 +688086,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -688880,12 +688097,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -688896,44 +688113,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_8_2 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 35712 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35712 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -688941,15 +688158,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -688965,19 +688182,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -689063,26 +688280,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2639 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU5_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2636 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -689093,27 +688310,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -689130,7 +688347,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -689143,10 +688360,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -689157,32 +688374,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT16_1_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -689191,8 +688408,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -689202,15 +688419,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [16, 1] + MIWaveTileA: 16 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -689226,19 +688443,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -689324,26 +688541,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2640 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2637 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT16_1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 256 + ThreadTile1: 1 + ThreadTileA: 256 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -689354,27 +688571,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -689391,7 +688608,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -689407,7 +688624,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -689418,44 +688635,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_2 + LSCA: 512 + LSCB: 512 + LSPA: 4 + LSPB: 4 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 33792 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -689463,15 +688680,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -689487,19 +688704,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -689585,8 +688802,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2641 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2638 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -689594,17 +688811,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -689615,21 +688832,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -689652,7 +688869,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -689663,9 +688880,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -689679,44 +688896,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTC3_NTD3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NLCA1_NLCB1_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -689724,15 +688941,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 4] + MIWaveTileA: 1 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -689748,19 +688965,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 - NumLoadsB: 36 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -689846,8 +689063,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2642 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2639 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU6_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -689856,16 +689073,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 4 + ThreadTileA: 4 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -689882,17 +689099,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 6] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -689913,7 +689130,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -689929,7 +689146,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -689940,44 +689157,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_NTC3_NTD3_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x48x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -689985,15 +689202,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 48 + MacroTileA: 16 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -690009,18 +689226,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 + NumElementsPerThread: 3 + NumGlobalWriteVectorsPerThread: 3 + NumLoadsA: 2 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -690107,8 +689324,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2643 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT10_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2640 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x48x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -690116,16 +689333,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 40 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -690137,21 +689354,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -690174,7 +689391,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -690187,7 +689404,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -690201,44 +689418,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_9_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_8_2 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -690246,15 +689463,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 9] - MIWaveTileA: 3 - MIWaveTileB: 9 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 288 - MacroTileA: 96 - MacroTileB: 288 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -690275,14 +689492,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 108 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 3 - NumLoadsB: 9 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -690368,8 +689585,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2644 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x288x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT3_9_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2641 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -690378,16 +689595,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 9 - ThreadTileA: 12 - ThreadTileB: 9 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -690404,15 +689621,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 4] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -690435,7 +689652,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -690446,12 +689663,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -690462,32 +689679,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT12_3_NTC3_NTD3_SVW4_VWA4_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56832 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56832 - LdsOffsetMetadata_Blk: 91648 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -690496,10 +689713,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -690508,13 +689725,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 3] - MIWaveTileA: 12 + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 16 MacroTile1: 192 - MacroTileA: 192 + MacroTileA: 16 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -690531,19 +689748,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -690629,8 +689846,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2645 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT12_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2642 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -690638,16 +689855,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -690659,7 +689876,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -690669,11 +689886,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 8] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -690707,8 +689924,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -690723,68 +689940,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 144 - MacroTileA: 256 - MacroTileB: 144 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -690797,14 +690014,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 32 - NumLoadsB: 18 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -690890,8 +690107,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2646 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2643 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -690900,16 +690117,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -690926,7 +690143,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -690936,7 +690153,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -690968,12 +690185,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -690984,45 +690201,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 60672 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 60672 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -691030,22 +690247,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -691058,14 +690275,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 40 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -691151,8 +690368,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2647 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2644 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -691160,17 +690377,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -691181,13 +690398,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -691197,7 +690414,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -691234,7 +690451,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -691245,7 +690462,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC0_NTD0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -691254,23 +690471,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 111616 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -691291,14 +690508,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -691319,14 +690536,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -691412,8 +690629,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2648 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC0_NTD0_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2645 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -691421,17 +690638,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -691442,7 +690659,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -691490,8 +690707,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -691506,45 +690723,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 111616 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -691552,22 +690769,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] + MIWaveTile: [5, 2] MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -691580,14 +690797,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 - NumLoadsB: 36 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -691673,8 +690890,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2649 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2646 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -691683,16 +690900,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -691709,7 +690926,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -691719,7 +690936,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -691767,7 +690984,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_11_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -691780,55 +690997,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 62976 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 28160 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 62976 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 176 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -691841,14 +691058,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 32 - NumLoadsB: 24 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -691934,8 +691151,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2650 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2647 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -691944,16 +691161,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -692001,7 +691218,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -692017,7 +691234,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -692028,32 +691245,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 31104 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 104704 + LdsOffsetMetadata: 31104 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -692062,8 +691279,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -692073,15 +691290,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [9, 6] - MIWaveTileA: 9 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 288 - MacroTile1: 192 - MacroTileA: 288 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -692097,19 +691314,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 216 - NumLoadsA: 36 - NumLoadsB: 24 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 16 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -692195,8 +691412,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2651 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2648 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -692204,17 +691421,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 6 - ThreadTileA: 36 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -692225,23 +691442,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -692262,7 +691479,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -692273,12 +691490,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -692289,45 +691506,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -692335,22 +691552,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -692358,19 +691575,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -692456,26 +691673,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2652 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2649 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 128 + ThreadTile1: 2 + ThreadTileA: 128 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -692486,27 +691703,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -692534,7 +691751,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -692550,12 +691767,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG128_2_1 LSCA: 32 LSCB: 32 - LSPA: 16 + LSPA: 64 LSPB: 64 - LVCA: 16 + LVCA: 4 LVCB: 4 LVPA: 8 LVPB: 8 @@ -692563,55 +691780,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -692619,19 +691836,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -692717,26 +691934,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2653 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2650 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -692753,7 +691970,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -692767,7 +691984,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -692784,7 +692001,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -692800,7 +692017,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -692811,32 +692028,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_6_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 29696 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 29696 + LdsOffsetMetadata_Blk: 49408 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -692845,8 +692062,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -692857,14 +692074,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -692880,19 +692097,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 16 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -692978,26 +692195,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2654 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2651 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -693008,27 +692225,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -693045,7 +692262,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -693072,32 +692289,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SVW4_VWA4_WG128_2_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -693106,8 +692323,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -693117,15 +692334,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -693141,19 +692358,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -693239,26 +692456,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2655 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG128_2_1_WGM1 + SolutionIndex: 2652 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 64 - ThreadTile1: 4 + ThreadTile1: 3 ThreadTileA: 64 - ThreadTileB: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -693275,21 +692492,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -693318,11 +692535,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -693333,34 +692550,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SVW8_VWA8_WG64_4_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 80768 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 80768 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -693378,15 +692595,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 9] - MIWaveTileA: 7 - MIWaveTileB: 9 + MIWaveGroup: [4, 1] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 288 - MacroTileA: 224 - MacroTileB: 288 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -693402,19 +692619,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 252 - NumGlobalWriteVectorsPerThread: 252 - NumLoadsA: 14 - NumLoadsB: 18 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -693500,26 +692717,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2656 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x288x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_9_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2653 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 9 - ThreadTileA: 28 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -693530,14 +692747,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -693550,7 +692767,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -693583,7 +692800,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -693594,7 +692811,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -693603,27 +692820,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 39168 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 39168 - LdsOffsetB_Blk: 104704 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 104704 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -693640,13 +692857,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [9, 6] - MIWaveTileA: 9 + MIWaveTile: [8, 6] + MIWaveTileA: 8 MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 288 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 288 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -693668,13 +692885,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 216 - NumLoadsA: 36 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 32 NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 36 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 @@ -693761,8 +692978,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2657 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT288x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT9_6_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn8 + SolutionIndex: 2654 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -693770,16 +692987,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 + ThreadTile0: 32 ThreadTile1: 6 - ThreadTileA: 36 + ThreadTileA: 32 ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true @@ -693791,7 +693008,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -693828,7 +693045,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -693840,11 +693057,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -693855,42 +693072,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35712 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35712 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -693900,15 +693117,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -693929,14 +693146,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 32 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -694022,8 +693239,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2658 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGMn8 + SolutionIndex: 2655 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -694031,17 +693248,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -694052,27 +693269,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: -8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -694089,7 +693306,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -694102,10 +693319,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -694116,45 +693333,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT16_1_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -694162,22 +693379,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [16, 1] - MIWaveTileA: 16 - MIWaveTileB: 1 + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 512 + MacroTile0: 16 MacroTile1: 128 - MacroTileA: 512 + MacroTileA: 16 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -694185,19 +693402,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -694283,26 +693500,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2659 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT16_1_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2656 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 256 - ThreadTile1: 1 - ThreadTileA: 256 - ThreadTileB: 1 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -694313,27 +693530,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 4] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -694350,7 +693567,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -694363,7 +693580,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 6 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -694377,42 +693594,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_8_2 - LSCA: 512 - LSCB: 512 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 33792 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -694422,15 +693639,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 32 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 32 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -694451,14 +693668,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 1 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -694544,8 +693761,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2660 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x512_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2657 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU6_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -694555,15 +693772,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -694580,15 +693797,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + WorkspaceCheck: [4, 0, 6] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -694611,7 +693828,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -694624,7 +693841,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -694638,42 +693855,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NLCA1_NLCB1_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -694683,15 +693900,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 4] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 128 + MacroTile1: 64 MacroTileA: 16 - MacroTileB: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -694712,13 +693929,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -694805,8 +694022,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2661 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU6_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_4_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2658 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -694816,15 +694033,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 4 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -694841,15 +694058,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -694872,7 +694089,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -694883,9 +694100,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 8 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -694899,37 +694116,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x48x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34816 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 2560 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 2560 + LdsOffsetB_Blk: 35328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34816 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 35328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -694944,15 +694161,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 48 + MacroTile1: 128 MacroTileA: 16 - MacroTileB: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -694973,14 +694190,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 3 - NumGlobalWriteVectorsPerThread: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 2 - NumLoadsB: 6 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -695066,8 +694283,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2662 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x48x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_4_4_WGM1 + SolutionIndex: 2659 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -695077,15 +694294,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 2 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -695102,15 +694319,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 8] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -695146,7 +694363,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -695160,7 +694377,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 LSCA: 256 LSCB: 256 LSPA: 8 @@ -695173,9 +694390,9 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 + LdsNumBytes: 43520 LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 52224 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -695184,18 +694401,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 + LdsOffsetMetadata: 43520 LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -695205,15 +694422,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 96 + MacroTile1: 64 MacroTileA: 16 - MacroTileB: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -695234,14 +694451,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -695327,8 +694544,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2663 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2660 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -695338,15 +694555,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -695363,11 +694580,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 256 _DepthUA: 256 _DepthUB: 256 @@ -695394,7 +694611,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -695407,7 +694624,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -695421,37 +694638,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_8_2 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -695466,15 +694683,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [1, 2] MIWaveTile: [1, 3] MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 192 + MacroTile1: 96 MacroTileA: 16 - MacroTileB: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -695495,13 +694712,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 2 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -695588,8 +694805,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2664 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2661 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -695599,9 +694816,9 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -695624,15 +694841,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 2] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -695655,7 +694872,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -695668,10 +694885,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -695682,45 +694899,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -695728,22 +694945,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -695751,18 +694968,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -695849,8 +695066,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2665 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2662 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -695858,17 +695075,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -695879,21 +695096,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -695928,11 +695145,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -695943,36 +695160,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_4_NTC3_NTD3_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC0_NTD0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60672 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60672 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -695989,14 +695206,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -696012,19 +695229,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 40 - NumLoadsB: 4 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -696110,8 +695327,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2666 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT10_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2663 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -696119,17 +695336,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -696140,14 +695357,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -696177,7 +695394,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -696193,7 +695410,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -696204,32 +695421,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC0_NTD0_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 46080 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 111616 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -696238,8 +695455,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -696250,14 +695467,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 128 - MacroTileA: 320 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -696273,18 +695490,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 10 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -696371,8 +695588,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2667 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2664 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -696380,17 +695597,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -696401,21 +695618,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -696438,7 +695655,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -696449,12 +695666,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -696465,45 +695682,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_6_NTC0_NTD0_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 35584 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 111616 - LdsPadA: 8 + LdsOffsetMetadata: 35584 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -696511,22 +695728,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveTile: [10, 6] + MIWaveTileA: 10 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 320 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 320 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -696534,19 +695751,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 10 - NumLoadsB: 4 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 20 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -696632,8 +695849,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2668 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2665 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -696641,17 +695858,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 6 + ThreadTileA: 40 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -696662,21 +695879,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -696699,7 +695916,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -696711,11 +695928,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -696726,42 +695943,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_11_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62976 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 28160 + LdsNumBytes: 40576 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 73856 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62976 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 40576 + LdsOffsetMetadata_Blk: 73856 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -696771,15 +695988,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 128 + MacroTile1: 448 + MacroTileA: 128 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -696795,19 +696012,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -696893,26 +696110,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2669 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_11_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2666 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -696923,27 +696140,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -696972,11 +696189,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -696987,34 +696204,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SVW8_VWA8_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31104 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 45184 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 73856 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31104 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 45184 + LdsOffsetMetadata_Blk: 73856 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -697032,15 +696249,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 128 + MacroTile1: 512 + MacroTileA: 128 + MacroTileB: 512 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -697056,19 +696273,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 16 - NumLoadsB: 13 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -697154,26 +696371,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2670 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_13_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2667 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -697184,13 +696401,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -697204,7 +696421,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -697232,7 +696449,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -697248,12 +696465,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG16_16_1 LSCA: 32 LSCB: 32 - LSPA: 64 + LSPA: 16 LSPB: 64 - LVCA: 4 + LVCA: 16 LVCB: 4 LVPA: 8 LVPB: 8 @@ -697261,55 +696478,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 40576 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 73856 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 40576 + LdsOffsetMetadata_Blk: 73856 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 2] + MIWaveGroup: [1, 4] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 448 + MacroTileA: 128 + MacroTileB: 448 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -697322,14 +696539,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -697415,8 +696632,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2671 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 + SolutionIndex: 2668 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -697431,10 +696648,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -697451,8 +696668,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -697493,12 +696710,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -697509,45 +696726,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SVW8_VWA8_WG64_4_1 LSCA: 32 LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -697555,9 +696772,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 512 MacroTile1: 128 @@ -697567,10 +696784,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -697584,13 +696801,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 2 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -697676,8 +696893,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2672 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGM1 + SolutionIndex: 2669 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -697685,17 +696902,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -697706,13 +696923,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -697722,7 +696939,7 @@ _DepthUB: 32 _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -697754,12 +696971,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -697770,45 +696987,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_6_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SVW1_VWA1_WG64_4_1 LSCA: 32 LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29696 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29696 - LdsOffsetMetadata_Blk: 49408 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -697816,22 +697033,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 320 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 320 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -697844,14 +697061,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 16 - NumLoadsB: 12 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -697937,8 +697154,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2673 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2670 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -697946,17 +697163,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -697967,13 +697184,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -698015,12 +697232,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -698031,45 +697248,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -698077,22 +697294,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -698105,14 +697322,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -698198,8 +697415,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2674 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2671 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -698207,17 +697424,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -698228,13 +697445,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -698244,7 +697461,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -698277,11 +697494,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -698292,34 +697509,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SVW8_VWA8_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SVW4_VWA4_WG64_4_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42496 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 32128 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42496 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 32128 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -698338,14 +697555,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveTile: [4, 14] + MIWaveTileA: 4 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -698366,14 +697583,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 2 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 16 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -698459,8 +697676,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2675 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn8 + SolutionIndex: 2672 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -698468,17 +697685,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 16 + ThreadTile1: 14 + ThreadTileA: 16 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -698489,14 +697706,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -698526,7 +697743,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -698542,7 +697759,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -698553,42 +697770,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 34432 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34432 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -698598,15 +697815,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -698627,14 +697844,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 32 - NumLoadsB: 24 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -698720,8 +697937,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2676 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn8 + SolutionIndex: 2673 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -698729,17 +697946,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -698750,27 +697967,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -698787,7 +698004,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -698798,7 +698015,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -698814,42 +698031,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 16 + LVCA: 4 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 32128 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 32128 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 8 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -698860,14 +698077,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -698888,14 +698105,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 32 - NumLoadsB: 24 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -698981,8 +698198,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2677 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2674 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -698998,9 +698215,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -699018,20 +698235,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -699048,7 +698265,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -699059,12 +698276,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -699075,44 +698292,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_WG16_16_1 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -699121,14 +698338,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -699144,19 +698361,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 - NumLoadsB: 8 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -699242,26 +698459,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2678 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2675 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -699272,7 +698489,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -699282,17 +698499,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -699309,7 +698526,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -699320,12 +698537,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 6 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -699336,44 +698553,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_16_1 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SVW8_VWA8_WG64_4_1 + LSCA: 32 + LSCB: 32 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -699381,15 +698598,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [8, 8] + MIWaveTileA: 8 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -699405,19 +698622,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -699503,26 +698720,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2679 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU6_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2676 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 8 + ThreadTileA: 32 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -699533,27 +698750,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 6] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -699570,7 +698787,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -699583,10 +698800,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -699597,68 +698814,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG128_2_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 512 + MacroTile1: 128 + MacroTileA: 512 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -699666,19 +698883,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -699764,26 +698981,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2680 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2677 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -699794,27 +699011,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -699831,7 +699048,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -699842,12 +699059,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 8 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -699858,34 +699075,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 - LdsNumElementsAlignedA: 2560 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 2560 - LdsOffsetB_Blk: 35328 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 35328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -699893,33 +699110,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 2] + MIWaveTileA: 8 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 512 MacroTile1: 128 - MacroTileA: 16 + MacroTileA: 512 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -699927,19 +699144,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 - NumLoadsB: 16 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -700025,25 +699242,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2681 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_2_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2678 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 128 ThreadTile1: 2 - ThreadTileA: 4 + ThreadTileA: 128 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -700055,27 +699272,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 8] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -700092,7 +699309,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -700103,12 +699320,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -700119,44 +699336,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -700164,15 +699381,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 512 + MacroTile1: 112 + MacroTileA: 512 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -700188,19 +699405,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -700286,26 +699503,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2682 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2679 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -700316,27 +699533,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -700353,7 +699570,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -700364,12 +699581,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -700380,44 +699597,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_WG16_8_2 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 52224 + LdsNumBytes: 60160 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60160 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -700425,15 +699642,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] - MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 96 - MacroTileA: 16 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -700449,19 +699666,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 2 - NumLoadsB: 12 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 24 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -700547,26 +699764,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2683 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU2_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2680 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 3 - ThreadTileA: 4 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -700577,27 +699794,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -700614,7 +699831,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -700625,12 +699842,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -700641,32 +699858,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -700675,10 +699892,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -700686,15 +699903,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -700710,19 +699927,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -700808,26 +700025,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2684 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NLCA1_NLCB1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2681 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -700838,27 +700055,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -700875,7 +700092,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -700886,8 +700103,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -700902,32 +700119,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC0_NTD0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_WG16_16_1 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -700936,10 +700153,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -700947,15 +700164,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -700976,14 +700193,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 28 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -701069,8 +700286,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2685 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIWT5_7_NTC0_NTD0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 2682 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -701079,16 +700296,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -701105,17 +700322,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -701136,7 +700353,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -701152,7 +700369,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -701163,68 +700380,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_WG16_8_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -701232,20 +700449,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumLoadsPerpendicularB: 8 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -701330,8 +700547,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2686 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2683 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_WG16_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -701339,17 +700556,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -701360,21 +700577,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -701397,7 +700614,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -701408,12 +700625,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -701424,44 +700641,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_6_NTC0_NTD0_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_WG16_8_2 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35584 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35584 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -701469,15 +700686,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 6] - MIWaveTileA: 10 - MIWaveTileB: 6 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -701492,20 +700709,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -701591,8 +700808,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2687 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIWT10_6_NTC0_NTD0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2684 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -701600,17 +700817,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 6 - ThreadTileA: 40 - ThreadTileB: 6 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -701621,21 +700838,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -701658,7 +700875,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -701669,12 +700886,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -701685,44 +700902,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40576 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 73856 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40576 - LdsOffsetMetadata_Blk: 73856 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -701731,14 +700948,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -701753,20 +700970,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -701852,26 +701069,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2688 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2685 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -701882,7 +701099,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -701893,16 +701110,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -701919,7 +701136,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -701932,10 +701149,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -701946,44 +701163,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45184 - LdsNumElementsAlignedA: 8320 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 73856 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45184 - LdsOffsetMetadata_Blk: 73856 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -701992,14 +701209,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 512 - MacroTileA: 128 - MacroTileB: 512 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -702015,18 +701232,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -702113,26 +701330,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2689 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x512x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2686 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -702143,7 +701360,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -702153,17 +701370,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -702180,7 +701397,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -702191,12 +701408,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -702207,44 +701424,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_WG16_8_2 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40576 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 73856 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40576 - LdsOffsetMetadata_Blk: 73856 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -702252,15 +701469,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 448 - MacroTileA: 128 - MacroTileB: 448 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -702276,19 +701493,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 8 - NumLoadsB: 7 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -702374,26 +701591,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2690 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x448x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM8 + SolutionIndex: 2687 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -702404,27 +701621,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -702441,7 +701658,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -702452,12 +701669,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -702468,44 +701685,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SVW8_VWA8_WG64_4_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_WG16_8_2 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 16 + LSPB: 4 LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVCB: 64 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -702513,15 +701730,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 160 + MacroTileA: 16 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -702537,19 +701754,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 8 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 1 + NumLoadsB: 40 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 40 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -702635,26 +701852,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2691 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGM1 + SolutionIndex: 2688 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWA8_GRVWB2_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -702665,27 +701882,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -702702,7 +701919,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -702729,88 +701946,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_WG16_8_2 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 52224 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 3] + MIWaveTileA: 1 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 96 + MacroTileA: 16 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalB: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 2 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -702896,25 +702113,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2692 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2689 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 4 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 4 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -702932,21 +702149,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -702963,7 +702180,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -702974,12 +702191,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -702990,44 +702207,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -703035,15 +702252,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -703059,19 +702276,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -703157,26 +702374,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2693 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2690 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -703187,27 +702404,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 3] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -703224,7 +702441,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -703237,10 +702454,10 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -703251,44 +702468,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 4 + LVCA: 64 + LVCB: 64 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32128 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32128 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -703296,15 +702513,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 14] - MIWaveTileA: 4 - MIWaveTileB: 14 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -703320,19 +702537,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 16 - NumLoadsB: 14 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 48 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 48 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -703418,26 +702635,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2694 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2691 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 14 - ThreadTileA: 16 - ThreadTileB: 14 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -703448,27 +702665,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -703485,7 +702702,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -703497,11 +702714,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -703512,44 +702729,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 LSPB: 16 - LVCA: 16 + LVCA: 64 LVCB: 16 - LVPA: 8 - LVPB: 8 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34432 - LdsNumElementsAlignedA: 12672 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 12672 - LdsOffsetB_Blk: 78208 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34432 - LdsOffsetMetadata_Blk: 78208 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -703558,14 +702775,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [12, 5] - MIWaveTileA: 12 - MIWaveTileB: 5 + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 320 - MacroTileA: 192 - MacroTileB: 320 + MacroTile0: 16 + MacroTile1: 192 + MacroTileA: 16 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -703581,19 +702798,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 12 - NumLoadsB: 20 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 12 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -703679,26 +702896,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2695 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT12_5_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2692 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 5 - ThreadTileA: 48 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -703709,7 +702926,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -703719,17 +702936,17 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -703746,7 +702963,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -703757,12 +702974,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -703773,33 +702990,33 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA512_LPA8_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 16 - LVCA: 4 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32128 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32128 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 8 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 + LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 @@ -703807,8 +703024,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -703819,14 +703036,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -703847,14 +703064,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 4 - NumLoadsB: 14 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -703940,8 +703157,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2696 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA8_GRVWB2_GSU1_LBSPPA512_LPA8_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2693 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -703949,17 +703166,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -703970,27 +703187,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -704018,7 +703235,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -704034,12 +703251,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG32_8_1 LSCA: 32 LSCB: 32 - LSPA: 16 + LSPA: 64 LSPB: 64 - LVCA: 16 + LVCA: 4 LVCB: 4 LVPA: 8 LVPB: 8 @@ -704047,32 +703264,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 36352 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 + LdsOffsetMetadata: 36352 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -704080,22 +703297,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 384 + MacroTileA: 128 + MacroTileB: 384 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -704108,14 +703325,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -704201,8 +703418,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2697 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM1 + SolutionIndex: 2694 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -704211,15 +703428,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -704237,8 +703454,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -704268,7 +703485,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -704279,12 +703496,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -704295,68 +703512,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SVW8_VWA8_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [8, 8] - MIWaveTileA: 8 - MIWaveTileB: 8 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -704369,14 +703586,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -704462,8 +703679,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2698 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_8_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn8 + SolutionIndex: 2695 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -704471,17 +703688,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 8 - ThreadTileA: 32 - ThreadTileB: 8 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -704492,27 +703709,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -704545,7 +703762,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -704556,7 +703773,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SVW4_VWA4_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SVW1_VWA1_WG64_4_1 LSCA: 32 LSCB: 32 LSPA: 64 @@ -704565,23 +703782,23 @@ LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -704601,15 +703818,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -704630,14 +703847,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 240 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -704723,8 +703940,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2699 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG128_2_1_WGMn8 + SolutionIndex: 2696 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -704732,17 +703949,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -704753,14 +703970,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: -8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -704801,12 +704018,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -704817,68 +704034,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SVW8_VWA8_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_10_SVW2_VWA2_WG64_4_1 LSCA: 32 LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 36992 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 36992 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 10] + MIWaveTileA: 6 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 128 - MacroTileA: 512 - MacroTileB: 128 + MacroTile0: 384 + MacroTile1: 160 + MacroTileA: 384 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -704891,14 +704108,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 24 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -704984,8 +704201,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2700 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT8_2_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn8 + SolutionIndex: 2697 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_10_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -704993,17 +704210,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 128 - ThreadTile1: 2 - ThreadTileA: 128 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 10 + ThreadTileA: 24 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -705014,14 +704231,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -705067,7 +704284,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -705078,7 +704295,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SVW4_VWA4_WG64_4_1 LSCA: 32 LSCB: 32 LSPA: 16 @@ -705087,23 +704304,23 @@ LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 32128 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 15232 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 32128 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -705124,14 +704341,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 14] + MIWaveTileA: 4 + MIWaveTileB: 14 MIWaveTileMetadata: 0 - MacroTile0: 512 - MacroTile1: 112 - MacroTileA: 512 - MacroTileB: 112 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -705153,13 +704370,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 16 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -705245,8 +704462,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2701 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT512x112x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG64_4_1_WGMn8 + SolutionIndex: 2698 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -705254,17 +704471,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 4 SubGroup0: 16 SubGroup1: 16 SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 14 + ThreadTileA: 16 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -705275,14 +704492,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: -8 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -705291,7 +704508,7 @@ _DepthUB: 32 _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -705312,7 +704529,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -705324,11 +704541,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -705339,42 +704556,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SVW4_VWA4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60160 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 34944 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60160 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 34944 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -705384,15 +704601,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -705413,14 +704630,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 24 - NumLoadsB: 32 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -705506,8 +704723,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2702 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn8 + SolutionIndex: 2699 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -705515,17 +704732,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -705536,27 +704753,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -705589,7 +704806,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -705600,7 +704817,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -705609,27 +704826,27 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -705645,15 +704862,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 12] - MIWaveTileA: 4 - MIWaveTileB: 12 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 9] + MIWaveTileA: 6 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 288 + MacroTileA: 192 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -705674,14 +704891,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 24 + NumElementsPerThread: 216 + NumGlobalWriteVectorsPerThread: 108 + NumLoadsA: 24 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -705767,8 +704984,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2703 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT4_12_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGMn16 + SolutionIndex: 2700 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -705776,17 +704993,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 12 - ThreadTileA: 16 - ThreadTileB: 12 + ThreadTile0: 24 + ThreadTile1: 9 + ThreadTileA: 24 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -705797,14 +705014,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: -16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -705834,7 +705051,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -705845,7 +705062,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -705861,42 +705078,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_WG16_16_1 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_PLR1_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -705906,15 +705123,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 5] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 160 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -705935,14 +705152,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 10 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 4 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -706028,8 +705245,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2704 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2701 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_PLR1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -706039,15 +705256,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 5 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -706064,15 +705281,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -706095,7 +705312,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -706106,8 +705323,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false @@ -706122,32 +705339,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_WG16_8_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_PLR1_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 4 LSPB: 4 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVCA: 64 + LVCB: 64 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -706156,8 +705373,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -706167,15 +705384,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 32 + MacroTile1: 128 MacroTileA: 16 - MacroTileB: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -706196,15 +705413,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 - NumThreads: 128 + NumLoadsPerpendicularB: 32 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -706289,8 +705506,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2705 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_WG16_8_1_WGM1 + SolutionIndex: 2702 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -706300,15 +705517,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 2 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -706325,17 +705542,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -706383,7 +705600,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_PLR1_WG16_16_1 LSCA: 256 LSCB: 256 LSPA: 8 @@ -706413,12 +705630,12 @@ LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -706428,10 +705645,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 2] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 MacroTile1: 64 @@ -706550,8 +705767,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2706 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_2_NTB4_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2703 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -706561,15 +705778,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -706586,7 +705803,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -706617,7 +705834,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -706628,9 +705845,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -706644,32 +705861,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 12800 + LdsNumElementsAlignedA: 2560 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 2560 + LdsOffsetB_Blk: 18944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 12800 + LdsOffsetMetadata_Blk: 18944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -706678,8 +705895,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -706712,7 +705929,7 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 @@ -706721,11 +705938,11 @@ NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -706811,8 +706028,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2707 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2704 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -706851,11 +706068,11 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -706891,7 +706108,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -706905,7 +706122,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_PLR1_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 4 @@ -706918,9 +706135,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -706929,7 +706146,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 @@ -706951,14 +706168,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -706973,20 +706190,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -707072,8 +706289,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2708 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2705 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -707089,9 +706306,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -707112,7 +706329,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 4] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -707152,7 +706369,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -707166,7 +706383,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_WG16_16_1 LSCA: 256 LSCB: 256 LSPA: 8 @@ -707179,9 +706396,9 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 + LdsNumBytes: 43520 LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 52224 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -707190,18 +706407,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 + LdsOffsetMetadata: 43520 LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -707211,15 +706428,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 96 + MacroTile1: 64 MacroTileA: 16 - MacroTileB: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -707240,14 +706457,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -707333,8 +706550,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2709 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2706 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -707344,15 +706561,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -707369,11 +706586,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 4] _DepthU: 256 _DepthUA: 256 _DepthUB: 256 @@ -707411,9 +706628,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -707427,22 +706644,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWA8_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_PLR1_WG16_16_1 LSCA: 128 LSCB: 128 - LSPA: 16 - LSPB: 4 - LVCA: 16 - LVCB: 64 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 LVPA: 2 LVPB: 2 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -707451,18 +706668,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -707472,15 +706689,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 3] MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -707501,14 +706718,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 1 - NumLoadsB: 40 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 40 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -707594,8 +706811,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2710 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_GRVWA8_GRVWB2_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2707 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -707605,15 +706822,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 5 + ThreadTile1: 3 ThreadTileA: 4 - ThreadTileB: 5 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -707630,17 +706847,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -707674,7 +706891,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -707688,7 +706905,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_WG16_16_1 LSCA: 256 LSCB: 256 LSPA: 8 @@ -707701,9 +706918,9 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 + LdsNumBytes: 43520 LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 52224 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -707712,18 +706929,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 + LdsOffsetMetadata: 43520 LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -707733,15 +706950,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 96 + MacroTile1: 64 MacroTileA: 16 - MacroTileB: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -707756,20 +706973,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 12 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -707855,8 +707072,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2711 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x96x256_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2708 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -707866,15 +707083,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -707891,11 +707108,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 3] _DepthU: 256 _DepthUA: 256 _DepthUB: 256 @@ -707935,7 +707152,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -707949,7 +707166,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_PLR1_WG16_8_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -707962,29 +707179,29 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 55296 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -707994,15 +707211,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 6] MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 192 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -708023,14 +707240,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 1 - NumLoadsB: 4 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -708116,8 +707333,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2712 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_GRVWA8_GRVWB8_GSU3_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2709 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_PLR1_SU0_SUM0_SUS0_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -708127,15 +707344,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 1 + ThreadTile1: 6 ThreadTileA: 4 - ThreadTileB: 1 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -708152,11 +707369,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -708183,7 +707400,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -708195,8 +707412,8 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 @@ -708210,32 +707427,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_PLR1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 2 + LSPB: 8 + LVCA: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -708244,8 +707461,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -708256,14 +707473,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 192 + MacroTile1: 64 MacroTileA: 16 - MacroTileB: 192 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -708278,20 +707495,20 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 0 + NonTemporalB: 4 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 48 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 48 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -708377,8 +707594,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2713 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA2_GRVWB2_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2710 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -708394,9 +707611,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -708417,13 +707634,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -708444,7 +707661,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -708456,11 +707673,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -708471,44 +707688,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_3_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 LSPB: 16 - LVCA: 64 + LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 21376 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 13056 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 21376 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -708517,13 +707734,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] - MIWaveTileA: 1 + MIWaveTile: [8, 3] + MIWaveTileA: 8 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 128 MacroTile1: 192 - MacroTileA: 16 + MacroTileA: 128 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -708540,18 +707757,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 + NumElementsPerThread: 96 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 + NumLoadsA: 8 NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 @@ -708638,25 +707855,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2714 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_GRVWA2_GRVWB8_GSU2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2711 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_3_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 32 ThreadTile1: 3 - ThreadTileA: 4 + ThreadTileA: 32 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -708668,27 +707885,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -708732,7 +707949,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -708745,19 +707962,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 63104 + LdsNumElementsAlignedA: 43520 + LdsNumElementsAlignedB: 19584 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 43520 + LdsOffsetB_Blk: 109056 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 + LdsOffsetMetadata: 63104 + LdsOffsetMetadata_Blk: 109056 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -708777,15 +707994,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] + MIWaveGroup: [4, 1] MIWaveTile: [5, 9] MIWaveTileA: 5 MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 320 + MacroTile1: 144 + MacroTileA: 320 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -708799,21 +708016,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 180 NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 - NumLoadsB: 36 + NumLoadsA: 40 + NumLoadsB: 18 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 18 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -708899,20 +708116,20 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2715 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT5_9_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 2712 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 20 @@ -708935,8 +708152,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -708949,7 +708166,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -708966,7 +708183,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -708993,34 +708210,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTA0_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36352 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36352 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -709028,33 +708245,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [2, 2] MIWaveTile: [4, 3] MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 384 + MacroTile1: 96 MacroTileA: 128 - MacroTileB: 384 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -709067,14 +708284,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 2 - NumLoadsB: 6 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -709160,8 +708377,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2716 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x384x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2713 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -709170,15 +708387,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -709197,20 +708414,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -709243,7 +708460,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -709254,7 +708471,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTA0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -709263,36 +708480,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedA: 46080 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 46080 + LdsOffsetB_Blk: 111616 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata_Blk: 111616 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -709300,22 +708517,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveTile: [10, 3] + MIWaveTileA: 10 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 320 + MacroTile1: 96 + MacroTileA: 320 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -709328,14 +708545,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 10 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -709421,8 +708638,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2717 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2714 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -709430,16 +708647,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 40 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 40 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -709451,14 +708668,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -709488,7 +708705,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -709504,7 +708721,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -709515,34 +708732,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SVW1_VWA1_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -709550,10 +708767,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -709561,22 +708778,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 192 - MacroTileA: 320 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -709589,13 +708806,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 240 - NumLoadsA: 5 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 @@ -709682,8 +708899,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2718 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 2715 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -709691,16 +708908,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 80 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -709712,27 +708929,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -709749,7 +708966,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -709765,7 +708982,7 @@ GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -709776,32 +708993,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_10_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36992 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 21760 + LdsNumElementsAlignedB: 39168 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 21760 + LdsOffsetB_Blk: 87296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36992 - LdsOffsetMetadata_Blk: 91648 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 87296 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -709810,8 +709027,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -709821,15 +709038,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [6, 10] - MIWaveTileA: 6 - MIWaveTileB: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 9] + MIWaveTileA: 5 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 384 - MacroTile1: 160 - MacroTileA: 384 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 288 + MacroTileA: 160 + MacroTileB: 288 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -709850,14 +709067,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 120 - NumLoadsA: 24 - NumLoadsB: 10 + NumElementsPerThread: 180 + NumGlobalWriteVectorsPerThread: 180 + NumLoadsA: 20 + NumLoadsB: 36 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 36 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -709943,8 +709160,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2719 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT6_10_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2716 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -709952,17 +709169,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 10 - ThreadTileA: 24 - ThreadTileB: 10 + ThreadTile0: 20 + ThreadTile1: 9 + ThreadTileA: 20 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -709973,27 +709190,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -710010,7 +709227,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -710021,12 +709238,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -710037,42 +709254,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32128 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 15232 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32128 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -710082,15 +709299,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 14] - MIWaveTileA: 4 - MIWaveTileB: 14 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -710111,14 +709328,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 16 - NumLoadsB: 14 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -710204,8 +709421,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2720 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_14_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2717 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -710213,17 +709430,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 14 - ThreadTileA: 16 - ThreadTileB: 14 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -710234,27 +709451,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -710271,7 +709488,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -710283,11 +709500,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -710298,42 +709515,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SVW4_VWA4_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34944 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34944 - LdsOffsetMetadata_Blk: 86656 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 107776 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -710343,15 +709560,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [20, 3] - MIWaveTileA: 20 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 320 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 320 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -710372,14 +709589,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 240 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 3 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 40 + NumLoadsB: 20 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 40 + NumLoadsPerpendicularB: 20 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -710465,8 +709682,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2721 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIWT20_3_SU8_SUM0_SUS256_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2718 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -710474,17 +709691,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 3 - ThreadTileA: 80 - ThreadTileB: 3 + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -710495,27 +709712,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -710532,7 +709749,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -710544,11 +709761,11 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -710559,42 +709776,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 26752 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 26752 + LdsOffsetMetadata_Blk: 41088 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -710604,15 +709821,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 9] - MIWaveTileA: 6 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 288 - MacroTileA: 192 - MacroTileB: 288 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -710633,14 +709850,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 216 - NumGlobalWriteVectorsPerThread: 108 - NumLoadsA: 24 - NumLoadsB: 36 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -710726,8 +709943,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2722 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_9_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2719 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGMn16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -710735,17 +709952,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 9 - ThreadTileA: 24 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -710756,27 +709973,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -710793,7 +710010,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -710820,44 +710037,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_PLR1_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -710865,15 +710082,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 160 - MacroTileA: 16 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -710889,19 +710106,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 10 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 4 - NumLoadsB: 10 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -710987,26 +710204,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2723 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x160x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_NTB0_PLR1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2720 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -711023,22 +710240,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: -16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 1 + _staggerStrideShift: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -711063,13 +710280,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -711081,32 +710296,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_PLR1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_4_1 LSCA: 128 LSCB: 128 LSPA: 4 LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 2 - LVPB: 2 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 + LdsNumBytes: 25600 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 16384 LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -711118,7 +710333,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -711126,15 +710341,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 128 + MacroTile1: 16 MacroTileA: 16 - MacroTileB: 128 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -711155,15 +710370,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 4 - NumLoadsB: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 32 - NumThreads: 256 + NumLoadsPerpendicularB: 4 + NumThreads: 64 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -711171,7 +710386,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -711235,8 +710450,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -711248,26 +710463,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2724 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2721 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 2 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 2 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -711284,22 +710499,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -711315,7 +710530,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -711324,13 +710539,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -711342,32 +710555,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_PLR1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 + LSCA: 128 + LSCB: 128 LSPA: 8 LSPB: 8 - LVCA: 32 - LVCB: 32 + LVCA: 16 + LVCB: 16 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -711376,10 +710589,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -711387,15 +710600,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [1, 2] MIWaveTile: [1, 1] MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 32 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -711410,7 +710623,7 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 @@ -711419,12 +710632,12 @@ NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 - NumThreads: 256 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -711432,7 +710645,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -711496,8 +710709,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -711509,20 +710722,20 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2725 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2722 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU32_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -711545,22 +710758,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 32] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -711576,7 +710789,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -711585,13 +710798,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 22 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -711603,32 +710814,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_WG16_16_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 + LSCA: 128 + LSCB: 128 LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 12800 - LdsNumElementsAlignedA: 2560 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 16384 - LdsOffsetB: 2560 - LdsOffsetB_Blk: 18944 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 12800 - LdsOffsetMetadata_Blk: 18944 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -711637,10 +710848,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -711648,15 +710859,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [1, 2] MIWaveTile: [1, 1] MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 32 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -711680,12 +710891,12 @@ NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 - NumThreads: 256 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -711693,7 +710904,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -711757,8 +710968,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -711770,20 +710981,20 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2726 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2723 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU22_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -711806,22 +711017,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 22] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -711846,13 +711057,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -711864,32 +711073,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_PLR1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 LSCA: 128 LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 + LSPA: 8 + LSPB: 8 + LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 + LdsNumBytes: 30208 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 16384 LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -711901,7 +711110,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -711909,15 +711118,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 192 + MacroTile1: 32 MacroTileA: 16 - MacroTileB: 192 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -711932,21 +711141,21 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 - NumThreads: 256 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -711954,7 +711163,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -712018,8 +711227,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -712031,26 +711240,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2727 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU4_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB4_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2724 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -712067,11 +711276,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -712082,7 +711291,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -712098,7 +711307,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -712107,13 +711316,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 23 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -712125,32 +711332,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_WG16_16_1 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 + LSCA: 128 + LSCB: 128 LSPA: 8 LSPB: 8 - LVCA: 32 - LVCB: 32 + LVCA: 16 + LVCB: 16 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -712159,10 +711366,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -712170,15 +711377,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [1, 2] MIWaveTile: [1, 1] MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 64 + MacroTile1: 32 MacroTileA: 16 - MacroTileB: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -712202,12 +711409,12 @@ NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 - NumThreads: 256 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -712215,7 +711422,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -712279,8 +711486,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -712292,20 +711499,20 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2728 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU4_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2725 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU23_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -712328,22 +711535,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 23] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -712368,13 +711575,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -712386,32 +711591,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_PLR1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 LSCA: 128 LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 + LSPA: 8 + LSPB: 8 + LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 + LdsNumBytes: 30208 LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 + LdsOffsetA_Blk: 16384 LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -712423,7 +711628,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -712431,15 +711636,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 3] + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 16 - MacroTile1: 192 + MacroTile1: 32 MacroTileA: 16 - MacroTileB: 192 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -712460,15 +711665,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 12 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 12 - NumThreads: 256 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -712476,7 +711681,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -712540,8 +711745,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -712553,26 +711758,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2729 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2726 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -712589,11 +711794,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 16] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -712604,7 +711809,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -712620,7 +711825,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -712629,13 +711834,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -712647,32 +711850,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_WG16_16_1 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 37376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -712681,10 +711884,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -712723,12 +711926,12 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 8 + NumLoadsA: 1 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -712737,7 +711940,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -712801,8 +712004,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -712814,13 +712017,13 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2730 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU3_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB0_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2727 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 @@ -712851,21 +712054,21 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -712890,13 +712093,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 24 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -712908,44 +712109,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_PLR1_WG16_8_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 LSCA: 128 LSCB: 128 - LSPA: 16 - LSPB: 16 + LSPA: 8 + LSPB: 8 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 55296 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 25600 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -712953,15 +712154,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 6] + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] MIWaveTileA: 1 - MIWaveTileB: 6 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 192 - MacroTileA: 16 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -712982,15 +712183,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 1 - NumLoadsB: 12 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 12 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -712998,7 +712199,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -713062,8 +712263,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -713075,26 +712276,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2731 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x192x128_MI16x16x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_6_NTB0_PLR1_SU0_SUM0_SUS0_WG16_8_2_WGM1 + SolutionIndex: 2728 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU24_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 - ThreadTile1: 6 + ThreadTile1: 1 ThreadTileA: 4 - ThreadTileB: 6 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -713111,11 +712312,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 24] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -713126,7 +712327,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -713142,7 +712343,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -713151,13 +712352,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -713169,32 +712368,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_PLR1_WG16_16_1 - LSCA: 256 - LSCB: 256 - LSPA: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 LSPB: 8 - LVCA: 128 - LVCB: 32 + LVCA: 16 + LVCB: 16 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 74240 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 25600 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -713203,10 +712402,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -713214,15 +712413,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [2, 1] MIWaveTile: [1, 1] MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -713237,7 +712436,7 @@ NoTailLoop: false NonTemporal: -1 NonTemporalA: 0 - NonTemporalB: 4 + NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 @@ -713245,13 +712444,13 @@ NumElementsPerBatchStore: 16 NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 8 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 8 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -713259,7 +712458,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -713323,8 +712522,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -713336,20 +712535,20 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2732 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x256_MI16x16x1_SN_CLR1_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTB4_PLR1_SU0_SUM0_SUS0_WG16_16_1_WGM1 + SolutionIndex: 2729 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU32_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 4 @@ -713372,22 +712571,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 32] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -713403,7 +712602,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -713412,14 +712611,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 17 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -713430,44 +712627,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_3_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 + LSPB: 8 LVCA: 16 LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 21376 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 13056 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 21376 - LdsOffsetMetadata_Blk: 41088 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -713475,15 +712672,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 3] - MIWaveTileA: 8 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -713499,20 +712696,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 12 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 12 - NumThreads: 256 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -713520,7 +712717,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -713584,8 +712781,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -713597,26 +712794,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2733 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_3_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 2730 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU17_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -713627,27 +712824,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 17] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -713664,7 +712861,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -713673,14 +712870,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -713691,44 +712886,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63104 - LdsNumElementsAlignedA: 43520 - LdsNumElementsAlignedB: 19584 + LdsNumBytes: 27136 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 43520 - LdsOffsetB_Blk: 109056 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63104 - LdsOffsetMetadata_Blk: 109056 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 27136 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -713736,15 +712931,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 144 - MacroTileA: 320 - MacroTileB: 144 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -713758,21 +712953,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 40 - NumLoadsB: 18 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 18 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -713781,7 +712976,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -713845,8 +713040,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -713858,26 +713053,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2734 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x144x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_NTA4_NTC3_NTD3_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2731 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -713888,23 +713083,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 32] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -713925,7 +713120,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -713934,14 +713129,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -713952,32 +713145,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTA0_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 27136 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 27136 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -713986,10 +713179,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -713997,15 +713190,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -714021,19 +713214,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -714042,7 +713235,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -714106,8 +713299,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -714119,26 +713312,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2735 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2732 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -714149,27 +713342,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -714195,13 +713388,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true @@ -714213,7 +713404,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTA0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -714226,19 +713417,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 46080 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 46080 - LdsOffsetB_Blk: 111616 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 111616 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -714250,7 +713441,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -714258,15 +713449,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 96 - MacroTileA: 320 - MacroTileB: 96 + MacroTile0: 32 + MacroTile1: 256 + MacroTileA: 32 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -714282,19 +713473,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 10 - NumLoadsB: 3 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -714303,7 +713494,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -714367,8 +713558,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -714380,26 +713571,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2736 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2733 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -714416,8 +713607,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -714430,7 +713621,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -714447,7 +713638,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -714456,14 +713647,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 24 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -714474,32 +713663,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 46592 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -714508,10 +713697,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -714519,15 +713708,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 48 + MacroTile1: 64 + MacroTileA: 48 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -714543,19 +713732,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 + NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 3 + NumLoadsA: 3 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -714564,7 +713753,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -714628,8 +713817,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -714641,26 +713830,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2737 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGMn16 + SolutionIndex: 2734 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU24_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -714671,27 +713860,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 24] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -714708,7 +713897,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -714717,13 +713906,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -714735,44 +713922,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60928 - LdsNumElementsAlignedA: 21760 - LdsNumElementsAlignedB: 39168 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21760 - LdsOffsetB_Blk: 87296 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60928 - LdsOffsetMetadata_Blk: 87296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -714780,15 +713967,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 9] - MIWaveTileA: 5 - MIWaveTileB: 9 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 288 - MacroTileA: 160 - MacroTileB: 288 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -714804,19 +713991,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 180 - NumGlobalWriteVectorsPerThread: 180 - NumLoadsA: 20 - NumLoadsB: 36 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 36 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -714825,7 +714012,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -714889,8 +714076,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -714902,26 +714089,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2738 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x288x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT5_9_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2735 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 9 - ThreadTileA: 20 - ThreadTileB: 9 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -714938,21 +714125,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 32] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -714969,7 +714156,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -714978,14 +714165,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -714996,32 +714181,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 46592 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -715030,10 +714215,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -715041,15 +714226,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 48 + MacroTile1: 64 + MacroTileA: 48 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -715065,19 +714250,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 3 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -715086,7 +714271,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -715150,8 +714335,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -715163,26 +714348,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2739 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGMn16 + SolutionIndex: 2736 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -715193,27 +714378,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -715230,7 +714415,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -715239,14 +714424,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -715257,44 +714440,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 42240 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 42240 - LdsOffsetB_Blk: 107776 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 107776 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -715302,15 +714485,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [10, 5] - MIWaveTileA: 10 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 320 - MacroTile1: 160 - MacroTileA: 320 - MacroTileB: 160 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -715326,19 +714509,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 200 - NumGlobalWriteVectorsPerThread: 100 - NumLoadsA: 40 - NumLoadsB: 20 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 40 - NumLoadsPerpendicularB: 20 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -715347,7 +714530,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -715411,8 +714594,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -715424,26 +714607,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2740 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT10_5_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGMn16 + SolutionIndex: 2737 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 5 - ThreadTileA: 40 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -715454,27 +714637,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -715491,7 +714674,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -715500,14 +714683,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -715518,44 +714699,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG16_16_1 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 64 + LSPB: 16 LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26752 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26752 - LdsOffsetMetadata_Blk: 41088 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -715564,14 +714745,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -715587,19 +714768,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -715608,7 +714789,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -715672,8 +714853,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -715685,26 +714866,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2741 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGMn16 + SolutionIndex: 2738 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -715715,28 +714896,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: -16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -715752,7 +714933,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -715761,13 +714942,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer - GlobalSplitUCoalesced: false GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true @@ -715779,32 +714958,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -715813,10 +714992,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -715824,15 +715003,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -715848,20 +715027,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 64 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -715869,7 +715048,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -715933,8 +715112,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -715946,26 +715125,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2742 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGMn16 + SolutionIndex: 2739 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU32_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -715982,22 +715161,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: -16 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 32] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 0 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -716025,9 +715204,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -716038,32 +715217,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 - LSPA: 4 - LSPB: 4 + LSPA: 16 + LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -716083,15 +715262,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -716112,15 +715291,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 - NumThreads: 64 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -716205,8 +715384,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2743 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_1_WGM8 + SolutionIndex: 2740 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -716214,17 +715393,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -716235,17 +715414,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 32] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -716256,7 +715435,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -716284,9 +715463,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -716297,32 +715476,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 - LSPA: 8 - LSPB: 8 + LSPA: 16 + LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -716342,15 +715521,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -716371,15 +715550,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -716464,8 +715643,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2744 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU32_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 + SolutionIndex: 2741 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -716473,17 +715652,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -716494,17 +715673,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -716515,7 +715694,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -716531,7 +715710,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -716542,10 +715721,10 @@ ExpandPointerSwap: 0 GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 22 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -716556,32 +715735,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 8 - LSPB: 8 - LVCA: 16 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_9_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 16 + LVCA: 8 LVCB: 16 - LVPA: 1 - LVPB: 1 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -716590,8 +715769,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -716601,15 +715780,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 9] + MIWaveTileA: 2 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 144 + MacroTileA: 128 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -716630,15 +715809,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 4 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 9 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -716723,8 +715902,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2745 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU22_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 + SolutionIndex: 2742 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_9_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -716732,17 +715911,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 9 + ThreadTileA: 8 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -716753,28 +715932,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 22] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -716790,7 +715969,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -716800,11 +715979,11 @@ EnableMatrixInstruction: true ExpandPointerSwap: 0 GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -716815,42 +715994,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 8 - LSPB: 8 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_2_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 19584 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 43648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 19584 + LdsOffsetMetadata_Blk: 43648 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -716860,15 +716039,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 2] + MIWaveTileA: 10 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -716889,15 +716068,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 5 NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -716982,8 +716161,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2746 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 + SolutionIndex: 2743 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -716991,17 +716170,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 40 + ThreadTile1: 2 + ThreadTileA: 40 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -717012,28 +716191,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -717049,7 +716228,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -717059,11 +716238,11 @@ EnableMatrixInstruction: true ExpandPointerSwap: 0 GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 23 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -717074,42 +716253,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 8 - LSPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_4_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 16 + LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 1 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 55936 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 55936 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -717119,15 +716298,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -717148,15 +716327,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 16 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -717241,8 +716420,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2747 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU23_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 + SolutionIndex: 2744 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -717250,17 +716429,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -717271,28 +716450,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 23] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -717320,9 +716499,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 16 + GlobalSplitU: 4 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -717333,32 +716512,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 128 - LSPA: 8 - LSPB: 8 + LSPA: 16 + LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -717378,15 +716557,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -717407,15 +716586,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -717500,8 +716679,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2748 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU16_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 + SolutionIndex: 2745 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -717509,17 +716688,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreVectorWidth: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -717530,17 +716709,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] + WorkspaceCheck: [4, 0, 4] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -717551,7 +716730,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -717581,7 +716760,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -717592,7 +716771,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -717601,23 +716780,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -717637,14 +716816,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 + MacroTile0: 128 MacroTile1: 64 - MacroTileA: 16 + MacroTileA: 128 MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 @@ -717666,13 +716845,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -717759,8 +716938,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2749 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2746 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -717768,17 +716947,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -717789,13 +716968,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -717810,7 +716989,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -717838,9 +717017,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 24 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -717851,32 +717030,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_WG32_8_1 LSCA: 128 LSCB: 128 - LSPA: 8 - LSPB: 8 + LSPA: 16 + LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 25600 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 25600 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -717896,15 +717075,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 1] + MIWaveTileA: 2 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -717925,7 +717104,7 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 + NumElementsPerThread: 8 NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 4 NumLoadsB: 2 @@ -717933,7 +717112,7 @@ NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -718018,8 +717197,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2750 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU24_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 + SolutionIndex: 2747 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -718027,16 +717206,16 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 + ThreadTile0: 8 ThreadTile1: 1 - ThreadTileA: 4 + ThreadTileA: 8 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -718048,17 +717227,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 24] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -718069,7 +717248,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -718097,9 +717276,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -718110,32 +717289,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG16_16_1 LSCA: 128 LSCB: 128 - LSPA: 8 - LSPB: 8 + LSPA: 16 + LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 45568 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 25600 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 25600 + LdsOffsetMetadata: 45568 + LdsOffsetMetadata_Blk: 74240 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -718155,15 +717334,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 32 - MacroTile1: 16 + MacroTile1: 128 MacroTileA: 32 - MacroTileB: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -718184,15 +717363,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -718277,8 +717456,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2751 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU32_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 + SolutionIndex: 2748 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -718286,17 +717465,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -718307,17 +717486,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -718328,7 +717507,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -718344,7 +717523,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -718354,9 +717533,9 @@ EnableMatrixInstruction: true ExpandPointerSwap: 0 GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 17 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 GroupLoadStore: false @@ -718369,42 +717548,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 8 - LSPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x32_MI16x16x1_SN_LDSB1_GRVWA2_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT7_4_SVW1_VWA1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 32 LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 25088 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 40448 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 40448 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -718414,15 +717593,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -718443,15 +717622,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 8 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -718536,8 +717715,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2752 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU17_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 + SolutionIndex: 2749 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x32_MI16x16x1_SN_LDSB1_GRVWA2_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT7_4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -718547,15 +717726,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -718572,15 +717751,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 17] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -718603,7 +717782,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -718614,10 +717793,10 @@ ExpandPointerSwap: 0 GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 16 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -718628,32 +717807,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_5_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 LSPB: 16 - LVCA: 16 + LVCA: 8 LVCB: 16 - LVPA: 2 - LVPB: 2 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27136 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 47616 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27136 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -718662,8 +717841,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -718673,15 +717852,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 80 + MacroTileA: 256 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -718702,14 +717881,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -718795,8 +717974,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2753 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2750 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU16_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_5_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -718804,17 +717983,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -718825,21 +718004,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 16] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -718862,7 +718041,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -718876,7 +718055,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -718887,32 +718066,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT8_4_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27136 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27136 - LdsOffsetMetadata_Blk: 41472 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -718921,8 +718100,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -718932,15 +718111,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -718961,13 +718140,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -719054,8 +718233,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2754 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2751 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT8_4_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -719063,17 +718242,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -719084,21 +718263,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -719121,7 +718300,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -719130,12 +718309,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -719146,44 +718326,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_4_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB1024_MIWT1_1_NTC0_NTD0_SS0_SVW1_VWA1_WG16_4_4 + LSCA: 512 + LSCB: 512 + LSPA: 4 + LSPB: 4 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -719191,15 +718371,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 256 - MacroTileA: 32 - MacroTileB: 256 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -719219,15 +718399,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 1 - NumLoadsB: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 1 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -719236,7 +718416,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -719313,26 +718493,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2755 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 - SourceSwap: 1 + SolutionIndex: 2752 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_MIWT1_1_NTC0_NTD0_SS0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 + SourceSwap: 0 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 4 - ThreadTileA: 8 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -719343,21 +718523,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -719380,7 +718560,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -719389,12 +718569,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 24 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -719405,34 +718586,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO0_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 46592 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 46592 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -719440,33 +718621,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 64 - MacroTileA: 48 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -719474,19 +718655,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 3 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -719495,7 +718676,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -719572,26 +718753,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2756 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU24_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2753 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -719602,27 +718783,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 24] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -719639,7 +718820,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -719648,12 +718829,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -719664,44 +718846,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_SPO0_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 50688 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -719709,15 +718891,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [3, 2] - MIWaveTileA: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 128 - MacroTileA: 48 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -719737,15 +718919,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -719754,7 +718936,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -719831,25 +719013,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2757 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2754 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 16 ThreadTile1: 2 - ThreadTileA: 12 + ThreadTileA: 16 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -719861,21 +719043,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -719898,7 +719080,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -719912,7 +719094,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -719923,32 +719105,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32256 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 29184 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 46592 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32256 - LdsOffsetMetadata_Blk: 46592 + LdsOffsetMetadata: 29184 + LdsOffsetMetadata_Blk: 41472 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -719957,8 +719139,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -719969,14 +719151,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 - MacroTile1: 64 - MacroTileA: 48 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -719997,13 +719179,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 3 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularA: 2 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -720090,8 +719272,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2758 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2755 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -720099,17 +719281,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -720120,7 +719302,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -720131,10 +719313,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -720157,7 +719339,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -720166,6 +719348,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -720182,34 +719365,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTC3_NTD3_NEPBS0_SSO0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 79360 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -720217,33 +719400,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [2, 2] MIWaveTile: [3, 2] MIWaveTileA: 3 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 48 + MacroTile0: 192 MacroTile1: 128 - MacroTileA: 48 + MacroTileA: 192 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -720251,19 +719434,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -720272,7 +719455,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -720349,13 +719532,13 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2759 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2756 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SSO0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 @@ -720365,9 +719548,9 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 48 ThreadTile1: 2 - ThreadTileA: 12 + ThreadTileA: 48 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -720385,15 +719568,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -720416,7 +719599,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -720425,12 +719608,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -720441,34 +719625,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -720476,33 +719660,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -720510,19 +719694,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -720531,7 +719715,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -720608,26 +719792,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2760 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2757 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -720638,28 +719822,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 0 + _staggerStrideShift: 1 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -720675,7 +719859,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -720687,9 +719871,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -720700,32 +719884,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 27648 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 + LdsOffsetMetadata: 27648 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -720734,8 +719918,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -720745,15 +719929,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -720774,15 +719958,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 - NumThreads: 64 + NumLoadsPerpendicularB: 2 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -720867,8 +720051,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2761 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU32_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_1_WGM8 + SolutionIndex: 2758 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -720876,17 +720060,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -720897,21 +720081,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -720934,7 +720118,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -720944,11 +720128,11 @@ EnableMatrixInstruction: true ExpandPointerSwap: 0 GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -720959,42 +720143,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_4_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 25344 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 25344 + LdsOffsetMetadata_Blk: 49408 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -721005,14 +720189,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -721033,13 +720217,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -721126,8 +720310,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2762 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2759 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_4_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -721135,17 +720319,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -721156,7 +720340,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -721166,11 +720350,11 @@ WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -721202,6 +720386,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -721218,7 +720403,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_SPO0_SVW2_VWA2_WG32_2_4 LSCA: 128 LSCB: 128 LSPA: 16 @@ -721231,39 +720416,39 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] + MIWaveGroup: [1, 1] MIWaveTile: [2, 2] MIWaveTileA: 2 MIWaveTileB: 2 @@ -721276,10 +720461,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -721287,11 +720472,11 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 16 NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 @@ -721308,7 +720493,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -721385,25 +720570,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2763 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2760 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 + SubGroup0: 2 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 2 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 32 ThreadTile1: 2 - ThreadTileA: 8 + ThreadTileA: 32 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -721421,8 +720606,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 2, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -721452,7 +720637,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -721461,9 +720646,10 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 @@ -721477,44 +720663,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_9_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC0_NTD0_NEPBS0_SPO0_SVW2_VWA2_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -721522,15 +720708,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 9] - MIWaveTileA: 2 - MIWaveTileB: 9 + MIWaveGroup: [1, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 144 - MacroTileA: 128 - MacroTileB: 144 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -721550,15 +720736,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 4 - NumLoadsB: 9 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -721567,7 +720753,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -721644,26 +720830,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2764 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_9_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2761 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC0_NTD0_NEPBS0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 9 - ThreadTileA: 8 - ThreadTileB: 9 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -721680,15 +720866,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -721711,7 +720897,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -721720,12 +720906,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -721736,44 +720923,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_2_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_SVW4_VWA4_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 19584 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 43648 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19584 - LdsOffsetMetadata_Blk: 43648 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -721781,14 +720968,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 2] - MIWaveTileA: 10 - MIWaveTileB: 2 + MIWaveGroup: [1, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 64 MacroTile1: 128 - MacroTileA: 160 + MacroTileA: 64 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -721805,19 +720992,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -721826,7 +721013,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -721903,26 +721090,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2765 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2762 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 2 - ThreadTileA: 40 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -721933,21 +721120,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -721979,9 +721166,10 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 @@ -721995,68 +721183,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55936 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55936 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -722064,19 +721252,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 16 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -722085,7 +721273,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -722162,13 +721350,13 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2766 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2763 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 @@ -722178,10 +721366,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -722198,8 +721386,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -722238,10 +721426,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 4 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 GroupLoadStore: false @@ -722254,7 +721443,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SPO0_SVW4_VWA4_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -722267,7 +721456,7 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 65536 LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 @@ -722284,14 +721473,14 @@ LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -722299,10 +721488,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 128 MacroTile1: 64 @@ -722323,11 +721512,11 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 32 NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 @@ -722344,7 +721533,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -722421,26 +721610,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2767 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU4_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2764 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 4 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -722457,11 +721646,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 4] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -722497,6 +721686,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -722513,7 +721703,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC0_NTD0_SPO0_SVW4_VWA4_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -722526,9 +721716,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 49152 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -722537,20 +721727,20 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 47616 LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -722558,15 +721748,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 64 + MacroTile1: 48 MacroTileA: 128 - MacroTileB: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -722586,15 +721776,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -722603,7 +721793,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -722680,26 +721870,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2768 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2765 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -722716,8 +721906,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -722747,7 +721937,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -722756,6 +721946,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -722772,44 +721963,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -722817,10 +722008,10 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 MacroTile1: 32 @@ -722845,15 +722036,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 8 NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -722862,7 +722053,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -722939,26 +722130,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2769 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2766 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -722975,15 +722166,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -723006,7 +722197,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -723015,12 +722206,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -723031,44 +722223,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA8_LPB8_LRVW4_MIWT4_3_NTC3_NTD3_SPO0_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45568 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 25344 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45568 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalReadVectorWidth: 4 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -723076,15 +722268,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 128 - MacroTileA: 32 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -723100,19 +722292,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 3 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -723121,7 +722313,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -723198,26 +722390,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2770 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2767 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA8_LPB8_LRVW4_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 2 - ThreadTileA: 8 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -723228,21 +722420,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -723265,7 +722457,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -723274,12 +722466,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -723290,68 +722483,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x32_MI16x16x1_SN_LDSB1_GRVWA2_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT7_4_SVW1_VWA1_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + LSCA: 128 + LSCB: 128 LSPA: 16 - LSPB: 32 + LSPB: 16 LVCA: 16 - LVCB: 8 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25088 - LdsNumElementsAlignedA: 7680 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16896 LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 7680 - LdsOffsetB_Blk: 40448 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25088 - LdsOffsetMetadata_Blk: 40448 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -723359,19 +722552,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -723380,7 +722573,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -723457,26 +722650,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2771 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x32_MI16x16x1_SN_LDSB1_GRVWA2_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT7_4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2768 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -723487,21 +722680,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 2, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -723524,7 +722717,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -723533,10 +722726,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 4 - GlobalSplitU: 16 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 GroupLoadStore: false @@ -723549,44 +722743,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_5_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA0_NTC3_NTD3_NEPBS0_SPO0_SVW4_VWA4_WG32_4_2_WGMXCC1 + LSCA: 128 + LSCB: 128 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 47616 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -723594,15 +722788,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 5] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 80 - MacroTileA: 256 - MacroTileB: 80 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -723618,19 +722812,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -723639,7 +722833,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -723716,26 +722910,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2772 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU16_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_5_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2769 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA0_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1_WGMXCC1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 5 + ThreadTile1: 4 ThreadTileA: 16 - ThreadTileB: 5 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -723752,15 +722946,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 16] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -723783,7 +722977,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -723792,12 +722986,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -723808,22 +723003,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT8_4_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SPO1_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 + LdsNumBytes: 65536 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 20480 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -723832,20 +723027,20 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 + LdsOffsetMetadata: 52224 LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -723853,15 +723048,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -723877,13 +723072,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -723898,7 +723093,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -723975,25 +723170,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2773 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT8_4_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 2770 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 32 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -724005,21 +723200,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -724042,7 +723237,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -724057,7 +723252,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -724068,42 +723263,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB1024_MIWT1_1_NTC0_NTD0_SS0_SVW1_VWA1_WG16_4_4 - LSCA: 512 - LSCB: 512 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 27648 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 27648 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -724113,15 +723308,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -724137,19 +723332,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 1 - NumGlobalWriteVectorsPerThread: 1 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -724235,26 +723430,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2774 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_MIWT1_1_NTC0_NTD0_SS0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 - SourceSwap: 0 + SolutionIndex: 2771 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -724265,21 +723460,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -724317,7 +723512,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -724328,7 +723523,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -724337,23 +723532,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -724374,13 +723569,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 128 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 128 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -724401,14 +723596,14 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 + NumLoadsA: 4 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -724495,25 +723690,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2775 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2772 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 32 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 32 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -724525,14 +723720,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -724545,7 +723740,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -724562,7 +723757,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -724588,37 +723783,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_SPO0_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -724633,15 +723828,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -724657,19 +723852,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -724755,26 +723950,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2776 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 2773 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -724791,21 +723986,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -724831,12 +724026,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -724847,68 +724043,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29184 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 41472 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29184 - LdsOffsetMetadata_Blk: 41472 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] + MIWaveGroup: [2, 2] MIWaveTile: [4, 2] MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 64 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -724916,18 +724112,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -724937,7 +724133,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -725014,25 +724210,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2777 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2774 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 64 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 64 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -725044,14 +724240,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -725060,11 +724256,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -725096,7 +724292,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -725107,7 +724303,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTC3_NTD3_NEPBS0_SSO0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS0_PLR1_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -725116,23 +724312,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -725152,15 +724348,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -725181,14 +724377,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -725274,26 +724470,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2778 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SSO0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 2775 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS0_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 2 - ThreadTileA: 48 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -725304,14 +724500,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -725324,7 +724520,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -725356,7 +724552,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -725367,7 +724563,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -725376,23 +724572,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -725413,13 +724609,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -725436,18 +724632,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -725534,25 +724730,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2779 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2776 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -725564,14 +724760,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -725584,7 +724780,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -725601,7 +724797,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -725610,9 +724806,10 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -725626,44 +724823,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27648 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 31104 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27648 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 31104 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -725671,15 +724868,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -725695,19 +724892,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 16 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -725716,7 +724913,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -725793,26 +724990,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2780 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2777 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 13 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -725829,21 +725026,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -725869,12 +725066,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -725885,45 +725083,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_4_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_SVW4_VWA4_WG64_4_1 LSCA: 32 LSCB: 32 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25344 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25344 - LdsOffsetMetadata_Blk: 49408 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -725931,22 +725129,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -725954,18 +725152,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -725975,7 +725173,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -726052,25 +725250,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2781 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_4_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 2778 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 64 ThreadTile1: 4 - ThreadTileA: 32 + ThreadTileA: 64 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -726082,14 +725280,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -726119,7 +725317,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -726145,44 +725343,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_SPO0_SVW2_VWA2_WG32_2_4 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC4_NTD4_SSO0_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -726190,15 +725388,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -726214,13 +725412,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -726312,26 +725510,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2782 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2779 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -726348,21 +725546,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -726379,7 +725577,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -726390,11 +725588,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -726405,44 +725603,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC0_NTD0_NEPBS0_SPO0_SVW2_VWA2_WG16_8_2 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_9_NTC4_NTD4_SSO0_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 26752 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 9856 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26752 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -726450,15 +725648,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 9] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 9 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 144 + MacroTileA: 256 + MacroTileB: 144 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -726474,19 +725672,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 16 + NumLoadsB: 9 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 9 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -726572,26 +725770,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2783 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC0_NTD0_NEPBS0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 2780 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_9_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 32 - SubGroupA: 4 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 9 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 9 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -726602,27 +725800,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -726639,7 +725837,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -726665,68 +725863,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_SVW4_VWA4_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 128 - MacroTileA: 64 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -726734,19 +725932,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -726832,26 +726030,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2784 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x128x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 + SolutionIndex: 2781 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -726868,21 +726066,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -726914,7 +726112,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -726925,7 +726123,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -726934,23 +726132,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -726962,7 +726160,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -726971,14 +726169,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -726998,15 +726196,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -727092,26 +726290,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2785 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2782 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -727122,14 +726320,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -727142,7 +726340,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -727159,7 +726357,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -727185,22 +726383,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SPO0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -727209,44 +726407,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -727254,19 +726452,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -727352,26 +726550,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2786 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 2783 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -727388,21 +726586,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -727419,7 +726617,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -727428,7 +726626,6 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -727445,44 +726642,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC0_NTD0_SPO0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_8_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -727490,15 +726687,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 8] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 48 + MacroTile1: 256 MacroTileA: 128 - MacroTileB: 48 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -727518,15 +726715,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -727535,7 +726732,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -727612,26 +726809,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2787 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 2784 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_8_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 8 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -727648,15 +726845,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -727690,7 +726887,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -727705,12 +726902,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG16_4_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GRVWA2_LBSPPA1024_LBSPPB512_LPA4_LPB8_LRVW4_MIWT4_3_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG16_4_4 LSCA: 256 LSCB: 256 - LSPA: 8 + LSPA: 2 LSPB: 8 - LVCA: 32 + LVCA: 128 LVCB: 32 LVPA: 1 LVPB: 1 @@ -727718,23 +726915,23 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 25344 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -727751,14 +726948,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 32 + MacroTile1: 48 MacroTileA: 64 - MacroTileB: 32 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -727779,14 +726976,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -727872,8 +727069,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2788 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2785 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA1024_LBSPPB512_LPA4_LPB8_LRVW4_MIWT4_3_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -727889,9 +727086,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -727918,7 +727115,7 @@ _DepthUB: 256 _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -727939,7 +727136,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -727954,7 +727151,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -727965,37 +727162,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA8_LPB8_LRVW4_MIWT4_3_NTC3_NTD3_SPO0_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_CLR1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC0_NTD0_PLR1_SS1_SPO0_SVW2_VWA2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 25344 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 4 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -728010,15 +727207,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 48 + MacroTile1: 80 MacroTileA: 64 - MacroTileB: 48 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -728034,19 +727231,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 3 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -728132,8 +727329,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2789 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA8_LPB8_LRVW4_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 2786 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC0_NTD0_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -728141,17 +727338,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -728162,21 +727359,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -728214,7 +727411,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -728225,7 +727422,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_PLR1_SS1_SPO0_SVW4_VWA4_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -728234,59 +727431,59 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 128 MacroTile1: 64 - MacroTileA: 64 + MacroTileA: 128 MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -728299,13 +727496,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 16 + NumElementsPerThread: 32 NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -728392,8 +727589,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2790 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2787 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -728401,17 +727598,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -728422,13 +727619,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -728474,7 +727671,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -728485,7 +727682,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA0_NTC3_NTD3_NEPBS0_SPO0_SVW4_VWA4_WG32_4_2_WGMXCC1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_CLR1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_PLR1_SVW2_VWA2_WG64_4_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -728494,33 +727691,33 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -728530,15 +727727,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 64 + MacroTile1: 80 MacroTileA: 128 - MacroTileB: 64 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -728559,14 +727756,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -728652,26 +727849,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2791 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA0_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1_WGMXCC1 + SolutionIndex: 2788 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 + StoreVectorWidth: 2 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -728682,13 +727879,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -728719,7 +727916,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -728734,7 +727931,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -728745,44 +727942,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SPO1_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -728790,15 +727987,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 64 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -728819,14 +728016,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -728912,8 +728109,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2792 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 2789 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -728921,17 +728118,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -728942,21 +728139,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -728990,11 +728187,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -729005,68 +728202,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SSO0_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27648 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27648 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -729079,14 +728276,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -729172,26 +728369,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2793 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2790 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -729202,14 +728399,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -729218,11 +728415,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -729254,7 +728451,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -729265,7 +728462,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -729274,23 +728471,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -729311,14 +728508,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -729339,14 +728536,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -729432,26 +728629,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2794 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2791 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -729462,7 +728659,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -729482,7 +728679,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -729499,7 +728696,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -729514,7 +728711,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -729525,32 +728722,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x32x128_MI16x16x1_SN_GRVWA8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTC0_NTD0_NLCA1_SS1_SPO0_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -729559,8 +728756,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -729571,14 +728768,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 96 + MacroTile1: 32 + MacroTileA: 96 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -729594,19 +728791,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 12 NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 3 + NumLoadsA: 6 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -729692,26 +728889,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2795 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2792 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x32x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -729722,7 +728919,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -729733,16 +728930,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -729759,7 +728956,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -729770,11 +728967,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -729785,68 +728982,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -729858,15 +729055,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -729952,26 +729149,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2796 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2793 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -729982,27 +729179,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -730019,7 +729216,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -730034,7 +729231,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -730045,68 +729242,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS0_PLR1_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -730119,14 +729316,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -730212,26 +729409,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2797 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS0_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2794 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -730242,27 +729439,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -730290,11 +729487,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -730305,45 +729502,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC4_NTD4_NEPBS16_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -730351,22 +729548,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveTile: [4, 7] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -730379,14 +729576,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 16 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -730472,8 +729669,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2798 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2795 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -730481,17 +729678,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -730502,13 +729699,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -730539,7 +729736,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -730551,10 +729748,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -730565,42 +729762,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31104 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31104 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -730610,15 +729807,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -730638,15 +729835,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 16 - NumLoadsB: 13 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -730732,26 +729929,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2799 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2796 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -730762,27 +729959,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -730799,7 +729996,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -730810,11 +730007,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -730825,34 +730022,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -730860,10 +730057,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -730871,22 +730068,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -730898,15 +730095,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -730992,8 +730189,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2800 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2797 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -731001,17 +730198,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -731022,21 +730219,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -731059,7 +730256,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -731070,7 +730267,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -731085,68 +730282,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC4_NTD4_SSO0_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_3_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 48768 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 8 + LdsOffsetMetadata: 48768 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -731154,19 +730351,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -731252,12 +730449,12 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2801 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2798 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 @@ -731268,10 +730465,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -731288,21 +730485,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -731319,7 +730516,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -731330,11 +730527,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -731345,45 +730542,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_9_NTC4_NTD4_SSO0_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_PLR1_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26752 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 9856 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26752 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -731391,22 +730588,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 9] - MIWaveTileA: 4 - MIWaveTileB: 9 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 144 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 144 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -731414,19 +730611,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 16 - NumLoadsB: 9 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 9 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -731512,8 +730709,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2802 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x144x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_9_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2799 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -731521,17 +730718,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 9 - ThreadTileA: 16 - ThreadTileB: 9 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -731542,27 +730739,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -731594,7 +730791,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -731605,7 +730802,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_PLR1_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -731614,23 +730811,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -731650,15 +730847,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -731674,19 +730871,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -731772,26 +730969,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2803 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2800 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -731802,14 +730999,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -731822,7 +731019,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -731850,8 +731047,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -731865,68 +731062,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_11_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 57216 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 23936 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 57216 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 176 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -731938,15 +731135,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -732032,26 +731229,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2804 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2801 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_11_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -732069,7 +731266,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -732078,11 +731275,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -732110,11 +731307,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -732125,32 +731322,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -732171,13 +731368,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveTile: [3, 3] + MIWaveTileA: 3 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -732194,18 +731391,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -732292,25 +731489,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2805 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2802 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 48 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 48 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -732322,7 +731519,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -732368,8 +731565,9 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -732384,12 +731582,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_8_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -732397,32 +731595,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -732430,22 +731628,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 8] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -732453,19 +731651,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -732474,7 +731672,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -732551,26 +731749,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2806 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_8_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2803 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -732587,8 +731785,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -732597,11 +731795,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -732618,7 +731816,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -732633,7 +731831,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -732644,68 +731842,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GRVWA2_LBSPPA1024_LBSPPB512_LPA4_LPB8_LRVW4_MIWT4_3_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 2 - LSPB: 8 - LVCA: 128 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 25344 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 4 + LocalReadVectorWidth: 8 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -732713,18 +731911,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 32 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -732811,25 +732009,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2807 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA1024_LBSPPB512_LPA4_LPB8_LRVW4_MIWT4_3_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2804 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 48 ThreadTile1: 3 - ThreadTileA: 16 + ThreadTileA: 48 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -732841,27 +732039,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -732878,7 +732076,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -732889,11 +732087,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -732904,44 +732102,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_CLR1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC0_NTD0_PLR1_SS1_SPO0_SVW2_VWA2_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_6_SSO0_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -732949,15 +732147,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 80 - MacroTileA: 64 - MacroTileB: 80 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -732973,19 +732171,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -733071,26 +732269,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2808 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC0_NTD0_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 2805 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -733101,27 +732299,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -733138,7 +732336,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -733149,11 +732347,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -733164,22 +732362,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_PLR1_SS1_SPO0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SSO0_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 64256 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -733188,20 +732386,20 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 64256 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -733209,15 +732407,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -733238,14 +732436,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -733331,26 +732529,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2809 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 2806 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG32_8_1_WGM32 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -733361,27 +732559,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -733398,7 +732596,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -733409,11 +732607,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -733424,34 +732622,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_CLR1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_PLR1_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -733459,33 +732657,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -733498,14 +732696,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -733591,26 +732789,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2810 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2807 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -733621,27 +732819,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -733658,7 +732856,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -733684,44 +732882,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_PLR1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SPO1_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -733729,15 +732927,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -733751,21 +732949,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 NumLoadsA: 4 - NumLoadsB: 5 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -733851,8 +733049,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2811 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2808 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -733861,16 +733059,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -733887,15 +733085,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -733918,7 +733116,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -733929,11 +733127,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -733944,88 +733142,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SSO0_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SPO1_SVW1_VWA1_WG16_4_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -734111,26 +733309,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2812 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 2809 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -734141,27 +733339,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -734193,7 +733391,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -734204,7 +733402,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTA4_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -734213,23 +733411,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 16896 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -734249,14 +733447,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 128 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 128 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -734271,20 +733469,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -734371,26 +733569,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2813 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2810 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -734401,13 +733599,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -734438,7 +733636,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -734453,7 +733651,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -734464,34 +733662,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x32x128_MI16x16x1_SN_GRVWA8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTC0_NTD0_NLCA1_SS1_SPO0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -734499,33 +733697,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 1] - MIWaveTileA: 3 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 32 - MacroTileA: 96 - MacroTileB: 32 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -734533,19 +733731,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 6 - NumLoadsB: 2 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -734631,26 +733829,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2814 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x32x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2811 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 1 - ThreadTileA: 12 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -734661,7 +733859,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -734672,16 +733870,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -734707,13 +733905,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -734724,7 +733921,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SVW1_VWA1_WG64_4_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -734733,35 +733930,35 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -734769,15 +733966,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 64 + MacroTile1: 80 + MacroTileA: 64 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -734793,19 +733990,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -734814,7 +734011,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -734891,26 +734088,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2815 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 2812 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 + StoreVectorWidth: 1 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -734921,14 +734118,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -734958,7 +734155,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -734973,7 +734170,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -734984,68 +734181,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -735053,19 +734250,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -735151,26 +734348,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2816 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 2813 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM4 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -735181,27 +734378,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -735229,11 +734426,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -735244,45 +734441,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC4_NTD4_NEPBS16_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -735290,22 +734487,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -735318,14 +734515,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 16 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -735411,26 +734608,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2817 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2814 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -735441,13 +734638,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -735461,7 +734658,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -735489,7 +734686,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -735504,12 +734701,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -735517,55 +734714,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -735573,19 +734770,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -735671,26 +734868,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2818 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2815 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -735721,7 +734918,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -735738,7 +734935,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -735749,11 +734946,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -735764,44 +734961,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_PLR1_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA0_NTC3_NTD3_NLCA1_SS1_SPO1_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -735809,15 +735006,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -735838,14 +735035,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -735931,8 +735128,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2819 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2816 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA0_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -735940,17 +735137,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -735961,21 +735158,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -736013,7 +735210,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -736024,7 +735221,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_3_PLR1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -736033,27 +735230,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48768 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48768 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -736069,15 +735266,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -736098,14 +735295,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 6 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -736191,26 +735388,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2820 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2817 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -736221,13 +735418,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -736241,7 +735438,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -736269,11 +735466,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -736284,68 +735481,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_PLR1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTA0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 5] + MIWaveTileA: 7 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 224 MacroTile1: 160 - MacroTileA: 256 + MacroTileA: 224 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -736358,13 +735555,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 28 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -736451,25 +735648,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2821 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2818 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 28 ThreadTile1: 5 - ThreadTileA: 32 + ThreadTileA: 28 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -736481,13 +735678,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -736529,7 +735726,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -736544,12 +735741,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_PLR1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -736557,55 +735754,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 57216 + LdsNumElementsAlignedA: 29568 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 29568 + LdsOffsetB_Blk: 95104 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 + LdsOffsetMetadata: 57216 + LdsOffsetMetadata_Blk: 95104 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -736618,14 +735815,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 28 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -736711,26 +735908,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2822 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2819 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -736747,7 +735944,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -736761,7 +735958,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -736790,10 +735987,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -736804,68 +736001,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_11_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57216 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 23936 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57216 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 176 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 176 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -736873,19 +736070,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 32 - NumLoadsB: 22 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -736971,26 +736168,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2823 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT4_11_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2820 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -737001,7 +736198,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -737021,7 +736218,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -737047,13 +736244,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -737064,68 +736260,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_10_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 44032 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 44032 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 10] + MIWaveTileA: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -737133,19 +736329,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -737154,7 +736350,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -737231,26 +736427,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2824 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2821 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_10_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 10 + ThreadTileA: 8 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -737261,14 +736457,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -737281,7 +736477,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -737298,7 +736494,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -737309,11 +736505,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -737324,44 +736520,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -737369,15 +736565,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -737391,21 +736587,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -737491,26 +736687,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2825 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2822 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -737521,27 +736717,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -737558,7 +736754,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -737569,11 +736765,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -737584,88 +736780,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_SVW2_VWA2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 24 - NumLoadsB: 6 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -737751,25 +736947,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2826 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2823 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -737781,27 +736977,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -737830,10 +737026,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -737844,36 +737040,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_6_SSO0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59392 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59392 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -737890,14 +737086,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -737911,21 +737107,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 24 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -738011,26 +737207,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2827 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2824 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -738041,7 +737237,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -738057,7 +737253,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -738087,13 +737283,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -738104,36 +737299,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SSO0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -738141,7 +737336,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -738150,14 +737345,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -738173,19 +737368,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -738194,7 +737389,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -738271,26 +737466,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2828 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG32_8_1_WGM32 + SolutionIndex: 2825 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -738301,14 +737496,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -738317,11 +737512,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -738353,7 +737548,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -738364,7 +737559,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -738373,23 +737568,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -738409,15 +737604,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -738433,19 +737628,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -738531,26 +737726,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2829 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 2826 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -738561,14 +737756,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -738577,7 +737772,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -738598,7 +737793,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -738607,7 +737802,6 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -738624,44 +737818,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SPO1_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -738669,15 +737863,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -738691,21 +737885,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -738714,7 +737908,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -738791,26 +737985,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2830 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2827 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -738827,15 +738021,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -738873,7 +738067,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -738884,7 +738078,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SPO1_SVW1_VWA1_WG16_4_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG16_4_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -738893,23 +738087,23 @@ LVCB: 32 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -738930,14 +738124,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -738958,14 +738152,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -739051,26 +738245,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2831 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG16_4_4_WGM1 + SolutionIndex: 2828 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 16 SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -739081,7 +738275,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -739118,7 +738312,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -739133,7 +738327,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -739144,34 +738338,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTA4_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -739179,33 +738373,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -739218,14 +738412,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -739311,26 +738505,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2832 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2829 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -739341,7 +738535,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -739352,16 +738546,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -739387,13 +738581,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -739404,68 +738597,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_10_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55040 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 21760 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 55040 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 2] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 10 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -739473,19 +738666,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 16 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -739494,7 +738687,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -739571,26 +738764,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2833 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2830 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_10_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -739601,14 +738794,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -739621,7 +738814,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -739638,7 +738831,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -739652,7 +738845,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -739663,32 +738856,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SVW1_VWA1_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 60416 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 60416 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -739697,8 +738890,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -739708,15 +738901,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 1] + MIWaveTileA: 6 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 80 - MacroTileA: 64 - MacroTileB: 80 + MacroTile0: 192 + MacroTile1: 32 + MacroTileA: 192 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -739737,14 +738930,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 6 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -739830,8 +739023,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2834 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 2831 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -739839,17 +739032,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 1 + ThreadTileA: 24 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -739860,21 +739053,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -739906,13 +739099,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -739923,68 +739115,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_5_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 12800 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -739992,19 +739184,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -740013,7 +739205,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -740090,26 +739282,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2835 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM4 + SolutionIndex: 2832 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -740120,14 +739312,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 4 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -740140,7 +739332,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -740166,13 +739358,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -740183,68 +739374,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 7680 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 48 + MacroTileA: 256 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -740252,19 +739443,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -740273,7 +739464,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -740350,26 +739541,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2836 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2833 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -740380,14 +739571,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -740400,7 +739591,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -740426,13 +739617,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -740443,68 +739633,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_7_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 32 + LSPB: 16 LVCA: 8 - LVCB: 8 + LVCB: 16 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 17920 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 112 + MacroTileA: 256 + MacroTileB: 112 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -740512,19 +739702,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 8 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -740533,7 +739723,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -740610,26 +739800,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2837 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT5_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2834 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_7_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -740640,14 +739830,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -740660,8 +739850,8 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -740677,7 +739867,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -740686,13 +739876,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -740703,44 +739892,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA0_NTC3_NTD3_NLCA1_SS1_SPO1_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 41984 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -740748,14 +739937,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 + MacroTile0: 32 MacroTile1: 32 - MacroTileA: 64 + MacroTileA: 32 MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 @@ -740772,19 +739961,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -740793,7 +739982,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -740870,26 +740059,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2838 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA0_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 2835 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -740900,21 +740089,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -740937,7 +740126,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -740946,9 +740135,8 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -740963,32 +740151,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 46080 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -740997,10 +740185,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -741009,14 +740197,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 160 + MacroTileA: 32 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -741032,19 +740220,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 2 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -741053,7 +740241,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -741130,15 +740318,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2839 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2836 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -741146,10 +740334,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -741167,21 +740355,21 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -741197,7 +740385,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -741206,13 +740394,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -741223,44 +740410,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTA0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT2_1_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 - LVPA: 4 - LVPB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 14720 + LdsNumElementsAlignedA: 2176 + LdsNumElementsAlignedB: 4352 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 2176 + LdsOffsetB_Blk: 10368 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 2176 + LdsOffsetMetadata_Blk: 10368 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -741268,15 +740455,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -741292,19 +740479,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -741313,7 +740500,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -741390,26 +740577,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2840 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTA0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2837 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -741420,27 +740607,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -741466,9 +740653,8 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -741483,12 +740669,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -741496,23 +740682,23 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57216 - LdsNumElementsAlignedA: 29568 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 19456 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 29568 - LdsOffsetB_Blk: 95104 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57216 - LdsOffsetMetadata_Blk: 95104 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 19456 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -741520,7 +740706,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -741528,15 +740714,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -741552,19 +740738,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 28 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -741573,7 +740759,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -741650,26 +740836,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2841 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2838 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -741686,8 +740872,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -741700,7 +740886,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -741717,7 +740903,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -741726,13 +740912,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -741743,34 +740928,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_3_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -741778,10 +740963,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -741789,22 +740974,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -741812,19 +740997,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -741833,7 +741018,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -741910,26 +741095,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2842 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2839 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -741940,27 +741125,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -742002,7 +741187,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_10_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -742015,19 +741200,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 44032 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 54784 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44032 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 54784 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -742047,15 +741232,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 10] - MIWaveTileA: 2 - MIWaveTileB: 10 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -742076,14 +741261,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -742169,8 +741354,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2843 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_10_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2840 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -742179,16 +741364,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 10 - ThreadTileA: 8 - ThreadTileB: 10 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -742205,7 +741390,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -742220,7 +741405,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -742236,7 +741421,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -742245,13 +741430,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 23 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -742262,89 +741446,89 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 + LSCA: 128 + LSCB: 128 LSPA: 8 LSPB: 8 - LVCA: 32 - LVCB: 32 + LVCA: 16 + LVCB: 16 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 25600 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -742352,7 +741536,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -742429,25 +741613,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2844 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2841 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU23_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 4 ThreadTile1: 1 - ThreadTileA: 32 + ThreadTileA: 4 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -742459,21 +741643,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] - WorkGroupMapping: 1 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 23] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -742496,7 +741680,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -742505,7 +741689,6 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -742522,44 +741705,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_SVW2_VWA2_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT14_2_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 52736 + LdsNumElementsAlignedA: 32256 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 32256 + LdsOffsetB_Blk: 97792 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 52736 + LdsOffsetMetadata_Blk: 97792 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -742567,15 +741750,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 2] + MIWaveTileA: 14 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -742589,21 +741772,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 7 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -742612,7 +741795,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -742689,26 +741872,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2845 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 2842 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT14_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 56 + ThreadTile1: 2 + ThreadTileA: 56 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -742725,15 +741908,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -742756,7 +741939,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -742765,13 +741948,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -742782,44 +741964,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_4_SVW4_VWA4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 17152 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 17152 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -742828,13 +742010,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 128 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 128 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -742849,20 +742031,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -742872,7 +742054,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -742949,25 +742131,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2846 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2843 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 28 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -742979,27 +742161,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -743016,7 +742198,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -743025,12 +742207,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -743041,44 +742224,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 512 + LSCB: 512 + LSPA: 4 + LSPB: 4 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -743086,15 +742269,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -743110,18 +742293,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -743131,7 +742314,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -743208,26 +742391,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2847 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2844 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -743238,21 +742421,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -743275,7 +742458,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -743286,11 +742469,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -743301,44 +742484,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI32x32x1_SN_LBSPPA512_LBSPPB512_LPA8_LPB8_LRVW8_MIWT1_1_NTC3_NTD3_SS1_SPO0_SVW1_VWA1_WG32_2_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 33792 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 33792 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -743346,15 +742529,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -743370,19 +742553,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -743468,26 +742651,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2848 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2845 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB512_LPA8_LPB8_LRVW8_MIWT1_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_2_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 2 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 2 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -743498,27 +742681,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -743535,7 +742718,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -743544,6 +742727,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -743560,68 +742744,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NEPBS16_SPO0_SVW2_VWA2_WG32_2_4 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 3] - MIWaveTileA: 6 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 96 - MacroTileA: 192 - MacroTileB: 96 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -743629,19 +742813,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 3 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -743650,7 +742834,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -743727,26 +742911,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2849 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2846 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 + SubGroup0: 2 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 2 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 3 - ThreadTileA: 24 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -743763,15 +742947,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 2, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -743794,7 +742978,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -743809,7 +742993,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -743820,44 +743004,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_3_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -743865,15 +743049,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -743887,21 +743071,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -743987,26 +743171,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2850 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2847 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_3_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -744017,21 +743201,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -744054,7 +743238,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -744063,13 +743247,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -744080,22 +743263,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_5_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -744104,7 +743287,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 @@ -744114,10 +743297,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -744126,14 +743309,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -744147,21 +743330,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 6 - NumLoadsB: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -744170,7 +743353,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -744247,26 +743430,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2851 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2848 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -744277,21 +743460,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -744314,7 +743497,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -744323,12 +743506,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -744339,44 +743523,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_10_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SVW1_VWA1_WG16_4_4 + LSCA: 512 + LSCB: 512 + LSPA: 4 + LSPB: 4 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55040 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 21760 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55040 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -744384,15 +743568,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -744412,15 +743596,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 16 - NumLoadsB: 10 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -744429,7 +743613,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -744506,26 +743690,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2852 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_10_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2849 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 + StoreVectorWidth: 1 + SubGroup0: 4 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -744536,21 +743720,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -744573,7 +743757,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -744582,6 +743766,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -744598,44 +743783,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_1_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_3_NTC3_NTD3_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 5120 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 60416 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 32768 - LdsOffsetMetadata_Blk: 60416 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -744643,15 +743828,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 1] - MIWaveTileA: 6 - MIWaveTileB: 1 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 32 - MacroTileA: 192 - MacroTileB: 32 + MacroTile0: 32 + MacroTile1: 48 + MacroTileA: 32 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -744667,19 +743852,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 6 - NumLoadsB: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 3 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -744688,7 +743873,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -744765,26 +743950,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2853 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2850 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 1 - ThreadTileA: 24 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -744801,15 +743986,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -744832,7 +744017,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -744841,12 +744026,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -744857,44 +744043,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_5_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 16 - LVCA: 8 - LVCB: 16 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA8_LPB8_LRVW4_MIWT4_3_NTC0_NTD0_SPO0_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 12800 + LdsNumBytes: 58368 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 25344 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 51200 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 51200 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 58368 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalReadVectorWidth: 4 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -744902,15 +744088,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 80 - MacroTileA: 128 - MacroTileB: 80 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -744930,15 +744116,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 40 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 3 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -744947,7 +744133,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -745024,26 +744210,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2854 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2851 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA8_LPB8_LRVW4_MIWT4_3_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 16 + StoreVectorWidth: 4 + SubGroup0: 4 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -745054,21 +744240,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -745091,7 +744277,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -745100,12 +744286,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -745116,68 +744303,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_1_NTC0_NTD0_SPO1_SVW2_VWA2_WG32_2_4 + LSCA: 128 + LSCB: 128 + LSPA: 16 LSPB: 16 - LVCA: 8 + LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 4 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42496 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 7680 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42496 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 48 - MacroTileA: 256 - MacroTileB: 48 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -745189,15 +744376,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -745206,7 +744393,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -745283,26 +744470,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2855 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x48x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2852 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_1_NTC0_NTD0_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -745313,21 +744500,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 2, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -745359,12 +744546,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -745375,22 +744563,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_7_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 - LSPB: 16 + LSPB: 32 LVCA: 8 - LVCB: 16 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52736 + LdsNumBytes: 57856 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 17920 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -745399,21 +744587,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52736 + LdsOffsetMetadata: 57856 LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -745421,22 +744609,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 112 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 112 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -745444,19 +744632,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 8 - NumLoadsB: 7 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -745465,7 +744653,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -745542,26 +744730,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2856 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x112x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_7_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 2853 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -745572,14 +744760,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -745592,8 +744780,8 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 0 + _staggerStrideShift: 1 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -745609,7 +744797,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -745618,12 +744806,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -745634,44 +744823,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC4_NTD4_SPO1_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 41984 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -745679,14 +744868,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 64 MacroTile1: 32 - MacroTileA: 32 + MacroTileA: 64 MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 @@ -745703,19 +744892,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 2 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -745724,7 +744913,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -745801,26 +744990,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2857 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 2854 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC4_NTD4_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -745831,21 +745020,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -745877,12 +745066,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -745893,7 +745083,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SPO0_SVW2_VWA2_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -745902,35 +745092,35 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 46080 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -745938,15 +745128,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [1, 5] - MIWaveTileA: 1 - MIWaveTileB: 5 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 160 - MacroTileA: 32 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -745962,19 +745152,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 2 - NumLoadsB: 10 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -745983,7 +745173,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -746060,26 +745250,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2858 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x160x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 2855 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 5 - ThreadTileA: 4 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -746090,14 +745280,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -746111,7 +745301,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -746127,7 +745317,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -746141,7 +745331,7 @@ GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -746152,32 +745342,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT2_1_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_6_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 14720 - LdsNumElementsAlignedA: 2176 - LdsNumElementsAlignedB: 4352 + LdsNumBytes: 59136 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 8192 - LdsOffsetB: 2176 - LdsOffsetB_Blk: 10368 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 2176 - LdsOffsetMetadata_Blk: 10368 + LdsOffsetMetadata: 59136 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -746186,8 +745376,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -746197,15 +745387,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 64 - MacroTileA: 32 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -746226,14 +745416,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 2 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 16 + NumLoadsB: 12 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 12 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -746319,8 +745509,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2859 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x64x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2856 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_6_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -746328,17 +745518,17 @@ StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -746349,21 +745539,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -746386,7 +745576,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -746395,6 +745585,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -746411,44 +745602,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SPO1_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 19456 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 19456 - LdsOffsetMetadata_Blk: 41984 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -746456,15 +745647,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -746484,14 +745675,14 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 2 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 @@ -746501,7 +745692,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -746578,26 +745769,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2860 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2857 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 2 + ThreadTile1: 1 ThreadTileA: 8 - ThreadTileB: 2 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -746614,15 +745805,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -746654,12 +745845,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -746670,7 +745862,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC0_NTD0_SPO0_SVW2_VWA2_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -746679,35 +745871,35 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -746715,15 +745907,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 64 + MacroTile1: 80 + MacroTileA: 64 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -746743,15 +745935,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -746760,7 +745952,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -746837,26 +746029,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2861 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 2858 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -746867,14 +746059,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -746913,12 +746105,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -746929,32 +746122,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC4_NTD4_NEPBS16_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54784 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54784 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -746966,7 +746159,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -746974,15 +746167,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 4] + MIWaveTileA: 5 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -746998,19 +746191,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -747019,7 +746212,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -747096,25 +746289,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2862 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2859 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 20 ThreadTile1: 4 - ThreadTileA: 24 + ThreadTileA: 20 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -747126,14 +746319,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -747147,7 +746340,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -747163,7 +746356,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -747172,10 +746365,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 23 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 GroupLoadStore: false @@ -747188,32 +746382,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 25600 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 25600 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -747222,10 +746416,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -747233,15 +746427,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -747257,20 +746451,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -747278,7 +746472,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -747355,26 +746549,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2863 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU23_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 + SolutionIndex: 2860 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM4 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -747391,21 +746585,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 23] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -747431,12 +746625,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -747447,7 +746642,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT14_2_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -747456,59 +746651,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52736 - LdsNumElementsAlignedA: 32256 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 32256 - LdsOffsetB_Blk: 97792 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52736 - LdsOffsetMetadata_Blk: 97792 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 2] - MIWaveTileA: 14 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -747516,19 +746711,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 7 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -747537,7 +746732,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -747614,26 +746809,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2864 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT14_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2861 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 2 - ThreadTileA: 56 - ThreadTileB: 2 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -747644,14 +746839,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -747664,7 +746859,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -747681,7 +746876,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -747690,12 +746885,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -747706,32 +746902,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_4_SVW4_VWA4_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_NEPBS16_PLR1_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 17152 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 41216 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 17152 - LdsOffsetMetadata_Blk: 41216 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -747740,10 +746936,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -747752,14 +746948,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -747775,19 +746971,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -747796,7 +746992,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -747873,26 +747069,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2865 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2862 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -747903,23 +747099,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -747949,9 +747145,10 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -747965,45 +747162,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_8_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SSO4_SVW4_VWA4_WG64_4_1 LSCA: 32 LSCB: 32 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 LVPA: 8 LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25856 - LdsNumElementsAlignedA: 8448 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 8448 - LdsOffsetB_Blk: 41216 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25856 - LdsOffsetMetadata_Blk: 41216 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 + LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -748011,22 +747208,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 8] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -748034,19 +747231,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 128 NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -748055,7 +747252,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -748132,26 +747329,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2866 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_8_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2863 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 8 - ThreadTileA: 16 - ThreadTileB: 8 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -748168,8 +747365,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -748182,7 +747379,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -748199,7 +747396,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -748225,68 +747422,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 512 - LSCB: 512 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC4_NTD4_SSO0_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -748294,19 +747491,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -748392,26 +747589,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2867 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2864 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -748428,21 +747625,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -748459,7 +747656,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -748474,7 +747671,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -748485,44 +747682,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI32x32x1_SN_LBSPPA512_LBSPPB512_LPA8_LPB8_LRVW8_MIWT1_1_NTC3_NTD3_SS1_SPO0_SVW1_VWA1_WG32_2_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1_WGMXCC4 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 33792 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 33792 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -748530,15 +747727,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 32 - MacroTileA: 32 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -748554,19 +747751,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -748652,26 +747849,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2868 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB512_LPA8_LPB8_LRVW8_MIWT1_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_2_4_WGM1 + SolutionIndex: 2865 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM4_WGMXCC4 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -748682,27 +747879,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 4 + WorkGroupMappingXCC: 4 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -748719,7 +747916,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -748745,44 +747942,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NEPBS16_SPO0_SVW2_VWA2_WG32_2_4 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -748790,15 +747987,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -748814,19 +748011,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -748912,26 +748109,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2869 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2866 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -748948,21 +748145,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -748979,7 +748176,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -748990,11 +748187,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -749005,42 +748202,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_3_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 31104 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 31104 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -749050,15 +748247,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 96 - MacroTileA: 160 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -749079,14 +748276,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 16 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -749172,26 +748369,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2870 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_3_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2867 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -749202,27 +748399,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -749248,6 +748445,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -749264,7 +748462,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_5_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -749277,55 +748475,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 160 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -749333,18 +748531,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -749354,7 +748552,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -749431,15 +748629,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2871 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2868 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -749447,9 +748645,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 + ThreadTile0: 32 ThreadTile1: 5 - ThreadTileA: 24 + ThreadTileA: 32 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -749467,8 +748665,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -749481,7 +748679,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -749498,7 +748696,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -749507,13 +748705,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 14 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -749524,44 +748721,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SVW1_VWA1_WG16_4_4 - LSCA: 512 - LSCB: 512 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -749569,15 +748766,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -749597,14 +748794,14 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -749614,7 +748811,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -749691,26 +748888,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2872 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_4_WGM1 + SolutionIndex: 2869 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU14_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -749721,21 +748918,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + WorkspaceCheck: [4, 0, 14] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -749784,7 +748981,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_3_NTC3_NTD3_SPO0_SVW2_VWA2_WG16_4_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SPO1_SVW2_VWA2_WG16_4_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -749797,19 +748994,19 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -749830,14 +749027,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 48 - MacroTileA: 32 - MacroTileB: 48 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -749853,19 +749050,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 3 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -749951,13 +749148,13 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2873 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_3_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2870 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 @@ -749967,10 +749164,10 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -750018,7 +749215,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -750033,7 +749230,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -750044,68 +749241,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA8_LPB8_LRVW4_MIWT4_3_NTC0_NTD0_SPO0_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58368 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 25344 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58368 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 4 + LocalReadVectorWidth: 8 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -750113,18 +749310,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 3 - NumLoadsA: 8 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 4 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -750211,25 +749408,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2874 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA8_LPB8_LRVW4_MIWT4_3_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 2871 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 32 ThreadTile1: 3 - ThreadTileA: 16 + ThreadTileA: 32 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -750241,21 +749438,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -750278,7 +749475,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -750293,7 +749490,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -750304,44 +749501,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_1_NTC0_NTD0_SPO1_SVW2_VWA2_WG32_2_4 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -750349,15 +749546,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -750373,19 +749570,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -750471,8 +749668,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2875 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_1_NTC0_NTD0_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2872 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -750480,17 +749677,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 1 - ThreadTileA: 32 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -750501,21 +749698,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -750553,7 +749750,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -750564,7 +749761,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -750573,23 +749770,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -750609,15 +749806,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -750638,14 +749835,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -750731,8 +749928,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2876 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2873 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -750740,17 +749937,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -750761,14 +749958,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -750798,7 +749995,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -750809,11 +750006,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -750824,44 +750021,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC4_NTD4_SPO1_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -750869,15 +750066,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -750898,13 +750095,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 20 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -750991,8 +750188,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2877 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC4_NTD4_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 2874 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC4_NTD4_NEPBS0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -751000,17 +750197,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -751021,21 +750218,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -751058,7 +750255,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -751069,7 +750266,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -751084,44 +750281,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SPO0_SVW2_VWA2_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -751129,15 +750326,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -751153,19 +750350,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -751251,26 +750448,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2878 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 2875 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTC4_NTD4_NEPBS0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -751287,15 +750484,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -751327,12 +750524,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -751343,68 +750541,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_6_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59136 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59136 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -751412,19 +750610,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 16 - NumLoadsB: 12 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 12 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -751433,7 +750631,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -751510,16 +750708,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2879 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_6_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 2876 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -751527,9 +750725,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -751540,14 +750738,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -751560,7 +750758,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -751577,7 +750775,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -751586,7 +750784,6 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -751603,44 +750800,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SPO1_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SVW2_VWA2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -751648,15 +750845,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -751676,15 +750873,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -751693,7 +750890,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -751770,26 +750967,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2880 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2877 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 1 + ThreadTile1: 3 ThreadTileA: 8 - ThreadTileB: 1 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -751806,15 +751003,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -751863,7 +751060,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC0_NTD0_SPO0_SVW2_VWA2_WG32_4_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -751876,19 +751073,19 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -751909,14 +751106,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 80 - MacroTileA: 64 - MacroTileB: 80 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -751932,19 +751129,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -752030,8 +751227,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2881 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 2878 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -752046,10 +751243,10 @@ SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -752097,7 +751294,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -752108,11 +751305,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -752123,32 +751320,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC4_NTD4_NEPBS16_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_PLR1_SS1_SPO1_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -752157,10 +751354,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -752169,14 +751366,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -752192,19 +751389,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -752290,8 +751487,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2882 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2879 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -752299,17 +751496,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -752320,7 +751517,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -752331,10 +751528,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -752368,11 +751565,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -752383,32 +751580,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -752429,14 +751626,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -752457,14 +751654,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 - NumLoadsB: 4 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -752550,26 +751747,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2883 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_PLR1_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM4 + SolutionIndex: 2880 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -752580,14 +751777,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 4 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -752600,7 +751797,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -752643,7 +751840,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -752656,32 +751853,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -752689,22 +751886,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveTile: [4, 6] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 128 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 128 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -752716,14 +751913,14 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -752810,26 +752007,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2884 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2881 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -752846,7 +752043,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -752860,7 +752057,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -752889,10 +752086,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -752903,34 +752100,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_NEPBS16_PLR1_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_3_PLR1_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 48768 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 48768 + LdsOffsetMetadata_Blk: 86656 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -752948,15 +752145,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -752972,19 +752169,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -753070,26 +752267,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2885 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2882 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_3_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -753100,13 +752297,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -753116,11 +752313,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -753137,7 +752334,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -753148,7 +752345,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -753163,32 +752360,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SSO4_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA2_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -753197,8 +752394,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -753236,15 +752433,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 128 NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -753330,15 +752527,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2886 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2883 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 @@ -753371,16 +752568,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -753412,7 +752609,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -753423,7 +752620,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC4_NTD4_SSO0_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -753432,23 +752629,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -753468,15 +752665,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -753492,19 +752689,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -753590,8 +752787,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2887 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2884 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -753599,17 +752796,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -753620,13 +752817,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -753683,7 +752880,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1_WGMXCC4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -753752,11 +752949,11 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 192 NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 @@ -753850,12 +753047,12 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2888 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM4_WGMXCC4 + SolutionIndex: 2885 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM4 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 @@ -753888,7 +753085,7 @@ WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 4 - WorkGroupMappingXCC: 4 + WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -753900,7 +753097,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -753943,7 +753140,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -753956,19 +753153,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -753989,14 +753186,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -754012,19 +753209,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -754110,12 +753307,12 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2889 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 2886 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM4 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 @@ -754126,10 +753323,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -754147,7 +753344,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -754160,7 +753357,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -754177,7 +753374,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -754188,11 +753385,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -754203,45 +753400,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC3_NTD3_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31104 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31104 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -754249,22 +753446,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 208 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 208 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -754276,15 +753473,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 16 - NumLoadsB: 13 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -754370,8 +753567,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2890 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2887 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -754379,17 +753576,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -754400,27 +753597,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -754463,7 +753660,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -754476,55 +753673,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 38912 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 38912 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -754532,19 +753729,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -754630,12 +753827,12 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2891 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 2888 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 @@ -754646,10 +753843,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -754666,8 +753863,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -754680,7 +753877,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -754706,10 +753903,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 14 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 GroupLoadStore: false @@ -754722,12 +753920,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTA4_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -754735,9 +753933,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 + LdsNumBytes: 43008 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 20480 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -754746,7 +753944,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 + LdsOffsetMetadata: 43008 LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 @@ -754759,7 +753957,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -754768,14 +753966,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] + MIWaveTile: [4, 5] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 128 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 128 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -754789,21 +753987,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -754812,7 +754010,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -754889,15 +754087,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2892 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU14_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 2889 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 @@ -754906,9 +754104,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -754926,10 +754124,10 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 14] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -754939,7 +754137,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -754956,7 +754154,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -754967,7 +754165,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -754982,68 +754180,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SPO1_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -755051,19 +754249,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -755149,26 +754347,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2893 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2890 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -755185,21 +754383,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -755242,7 +754440,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_PLR1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -755255,19 +754453,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -755287,15 +754485,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -755316,14 +754514,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -755409,26 +754607,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2894 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2891 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 3 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 3 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -755445,7 +754643,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -755459,7 +754657,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -755491,7 +754689,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -755502,7 +754700,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_3_NTA0_NTC4_NTD4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -755511,36 +754709,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -755548,22 +754746,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -755571,19 +754769,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -755669,26 +754867,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2895 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2892 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_3_NTA0_NTC4_NTD4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -755699,13 +754897,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -755747,7 +754945,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -755762,12 +754960,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTA0_NTC4_NTD4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -755775,32 +754973,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -755808,22 +755006,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -755831,19 +755029,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -755929,26 +755127,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2896 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2893 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTA0_NTC4_NTD4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -755965,7 +755163,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -755979,7 +755177,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -756011,7 +755209,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -756022,7 +755220,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -756031,36 +755229,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -756068,22 +755266,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 160 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -756091,18 +755289,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -756189,26 +755387,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2897 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC4_NTD4_NEPBS0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2894 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -756219,13 +755417,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -756235,11 +755433,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -756267,11 +755465,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -756282,22 +755480,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -756306,21 +755504,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -756328,22 +755526,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 160 - MacroTile1: 192 + MacroTile1: 256 MacroTileA: 160 - MacroTileB: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -756351,19 +755549,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -756449,26 +755647,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2898 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTC4_NTD4_NEPBS0_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2895 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -756479,13 +755677,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -756499,7 +755697,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -756531,7 +755729,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -756542,7 +755740,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -756551,23 +755749,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -756587,15 +755785,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -756615,15 +755813,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -756709,26 +755907,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2899 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2896 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -756739,13 +755937,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -756776,7 +755974,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -756785,12 +755983,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -756801,34 +756000,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS0_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -756836,10 +756035,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -756847,22 +756046,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -756870,18 +756069,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -756891,7 +756090,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -756968,25 +756167,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2900 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2897 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 8 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -756998,27 +756197,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -757035,7 +756234,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -757061,37 +756260,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA0_NTC4_NTD4_SS1_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -757106,15 +756305,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -757130,19 +756329,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -757228,8 +756427,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2901 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 2898 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA0_NTC4_NTD4_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -757238,16 +756437,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -757264,15 +756463,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -757295,7 +756494,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -757306,11 +756505,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -757321,44 +756520,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_PLR1_SS1_SPO1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_NEPBS0_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -757367,14 +756566,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -757395,14 +756594,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -757488,26 +756687,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2902 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2899 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -757518,7 +756717,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -757529,16 +756728,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -757570,7 +756769,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -757581,7 +756780,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -757590,59 +756789,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -757650,19 +756849,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -757748,26 +756947,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2903 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2900 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -757778,7 +756977,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -757798,7 +756997,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -757824,13 +757023,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -757841,7 +757039,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_5_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -757850,23 +757048,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 15360 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 15360 + LdsOffsetB_Blk: 80896 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 80896 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -757878,7 +757076,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -757887,14 +757085,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 6] - MIWaveTileA: 4 - MIWaveTileB: 6 + MIWaveTile: [3, 5] + MIWaveTileA: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 160 + MacroTileA: 96 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -757910,19 +757108,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -757931,7 +757129,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -758008,26 +757206,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2904 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_6_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2901 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 6 - ThreadTileA: 16 - ThreadTileB: 6 + ThreadTile0: 12 + ThreadTile1: 5 + ThreadTileA: 12 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -758038,14 +757236,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -758075,7 +757273,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -758086,7 +757284,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -758101,88 +757299,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_3_PLR1_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48768 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48768 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 - NumLoadsB: 6 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -758268,26 +757466,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2905 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_3_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2902 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -758304,21 +757502,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -758335,7 +757533,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -758346,11 +757544,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -758361,68 +757559,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA2_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSUAMB_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT8_2_NTA0_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [8, 2] + MIWaveTileA: 8 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -758430,18 +757628,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -758528,25 +757726,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2906 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2903 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT8_2_NTA0_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 32 ThreadTile1: 2 - ThreadTileA: 64 + ThreadTileA: 32 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -758558,23 +757756,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -758595,7 +757793,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -758610,7 +757808,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -758621,34 +757819,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_NTC4_NTD4_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -758656,10 +757854,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -758667,41 +757865,41 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveTile: [3, 3] + MIWaveTileA: 3 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -758788,25 +757986,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2907 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2904 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_NTC4_NTD4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 12 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 12 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -758818,27 +758016,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -758866,11 +758064,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -758881,45 +758079,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_NTC4_NTD4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -758927,42 +758125,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -759048,26 +758246,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2908 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM4 + SolutionIndex: 2905 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_NTC4_NTD4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -759078,14 +758276,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 4 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -759098,7 +758296,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -759126,11 +758324,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -759141,87 +758339,87 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTA4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [9, 4] + MIWaveTileA: 9 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 144 MacroTile1: 256 - MacroTileA: 128 + MacroTileA: 144 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 18 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 18 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -759308,25 +758506,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2909 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM4 + SolutionIndex: 2906 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 36 ThreadTile1: 4 - ThreadTileA: 32 + ThreadTileA: 36 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -759338,14 +758536,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 4 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -759358,7 +758556,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -759390,7 +758588,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -759401,7 +758599,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -759410,23 +758608,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -759446,15 +758644,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -759470,19 +758668,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -759568,26 +758766,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2910 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2907 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -759598,13 +758796,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -759661,7 +758859,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -759674,32 +758872,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38912 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38912 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -759707,22 +758905,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -759730,19 +758928,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -759828,26 +759026,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2911 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTA0_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 2908 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -759864,7 +759062,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -759878,7 +759076,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -759907,10 +759105,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -759921,36 +759119,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTA4_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_NEPBS0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -759967,14 +759165,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 - MIWaveTileB: 5 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 160 - MacroTileA: 128 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -759988,21 +759186,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -760088,8 +759286,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2912 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2909 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -760097,17 +759295,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 5 - ThreadTileA: 16 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -760118,7 +759316,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -760134,7 +759332,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -760166,11 +759364,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -760181,32 +759379,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -760226,15 +759424,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -760250,19 +759448,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -760348,8 +759546,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2913 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2910 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -760357,17 +759555,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -760378,13 +759576,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -760394,7 +759592,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -760441,7 +759639,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -760454,9 +759652,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -760465,7 +759663,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 @@ -760486,15 +759684,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -760510,19 +759708,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -760608,8 +759806,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2914 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2911 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -760618,16 +759816,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -760644,7 +759842,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -760701,7 +759899,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_3_NTA0_NTC4_NTD4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -760714,32 +759912,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -760747,22 +759945,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 96 - MacroTileA: 160 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -760775,14 +759973,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -760868,26 +760066,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2915 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_3_NTA0_NTC4_NTD4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2912 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -760904,7 +760102,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -760918,7 +760116,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -760946,11 +760144,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -760961,45 +760159,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTA0_NTC4_NTD4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS16_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -761007,22 +760205,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -761034,15 +760232,15 @@ NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -761128,26 +760326,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2916 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTA0_NTC4_NTD4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2913 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -761158,13 +760356,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -761178,7 +760376,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -761195,7 +760393,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -761206,11 +760404,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -761221,44 +760419,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC3_NTD3_NLCA1_SS1_SPO1_SVW2_VWA2_WG32_2_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -761266,15 +760464,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -761288,20 +760486,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -761388,26 +760586,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2917 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2914 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -761418,27 +760616,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -761466,11 +760664,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -761481,88 +760679,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTA4_NTC3_NTD3_NEPBS16_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -761648,8 +760846,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2918 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2915 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTA4_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -761657,17 +760855,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -761678,7 +760876,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -761694,7 +760892,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -761730,7 +760928,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -761741,7 +760939,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTA4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -761750,23 +760948,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -761787,14 +760985,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -761808,21 +761006,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -761908,8 +761106,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2919 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2916 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -761917,17 +761115,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -761938,7 +761136,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -761975,7 +761173,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -761984,13 +761182,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -762001,34 +761198,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS0_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -762036,33 +761233,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -762070,19 +761267,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -762091,7 +761288,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -762168,25 +761365,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2920 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2917 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -762198,27 +761395,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -762235,7 +761432,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -762244,13 +761441,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -762261,44 +761457,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA0_NTC4_NTD4_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SVW1_VWA1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 70144 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 70144 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -762306,15 +761502,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 16 + MacroTile1: 128 + MacroTileA: 16 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -762330,19 +761526,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -762351,7 +761547,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -762428,26 +761624,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2921 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA0_NTC4_NTD4_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2918 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -762458,21 +761654,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -762504,13 +761700,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -762521,36 +761716,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_NEPBS0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 25088 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 37376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -762558,7 +761753,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -762566,15 +761761,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 32 + MacroTile1: 128 + MacroTileA: 32 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -762590,19 +761785,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 1 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -762611,7 +761806,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -762688,26 +761883,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2922 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2919 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -762718,14 +761913,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -762734,11 +761929,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -762755,7 +761950,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -762764,13 +761959,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -762781,34 +761975,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -762816,33 +762010,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -762850,19 +762044,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 5 - NumLoadsB: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -762871,7 +762065,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -762948,26 +762142,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2923 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2920 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 - ThreadTile1: 2 - ThreadTileA: 80 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -762978,28 +762172,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 32] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -763015,7 +762209,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -763040,32 +762234,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_5_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 15360 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 15360 - LdsOffsetB_Blk: 80896 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 80896 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 25600 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -763074,8 +762268,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -763085,15 +762279,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 5] - MIWaveTileA: 3 - MIWaveTileB: 5 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 160 - MacroTileA: 96 - MacroTileB: 160 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -763114,15 +762308,15 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 3 - NumLoadsB: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 5 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -763207,8 +762401,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2924 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_5_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 2921 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -763218,15 +762412,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 5 - ThreadTileA: 12 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -763243,15 +762437,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -763274,7 +762468,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -763283,13 +762477,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -763300,88 +762493,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 49664 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 74240 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 49664 + LdsOffsetMetadata_Blk: 74240 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 32 + MacroTile1: 256 MacroTileA: 64 - MacroTileB: 32 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 2 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -763390,7 +762583,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -763467,26 +762660,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2925 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2922 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 1 - ThreadTileA: 32 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -763497,21 +762690,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -763534,7 +762727,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -763543,13 +762736,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -763560,44 +762752,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSUAMB_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT8_2_NTA0_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT12_2_SVW4_VWA4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 46592 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 46592 + LdsOffsetMetadata_Blk: 91648 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -763605,15 +762797,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 2] + MIWaveTileA: 12 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -763629,18 +762821,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -763650,7 +762842,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -763727,25 +762919,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2926 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT8_2_NTA0_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 2923 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT12_2_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 48 ThreadTile1: 2 - ThreadTileA: 32 + ThreadTileA: 48 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -763757,28 +762949,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -763803,11 +762995,10 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 17 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 GroupLoadStore: false @@ -763820,32 +763011,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_NTC4_NTD4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 LSCA: 128 LSCB: 128 - LSPA: 16 - LSPB: 16 + LSPA: 8 + LSPB: 8 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 25600 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -763857,7 +763048,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -763865,15 +763056,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -763887,22 +763078,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -763910,7 +763101,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -763987,26 +763178,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2927 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTA4_NTC4_NTD4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2924 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU17_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -764023,11 +763214,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 17] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -764063,9 +763254,8 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 4 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -764080,12 +763270,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_NTC4_NTD4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_2_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 16 LSPB: 32 - LVCA: 32 + LVCA: 16 LVCB: 8 LVPA: 4 LVPB: 4 @@ -764093,19 +763283,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 + LdsNumBytes: 38400 + LdsNumElementsAlignedA: 17920 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 38400 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -764117,7 +763307,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -764125,14 +763315,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] + MIWaveGroup: [1, 4] + MIWaveTile: [7, 2] MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 112 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 112 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -764147,20 +763337,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 7 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularA: 7 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -764170,7 +763360,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -764247,26 +763437,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2928 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_NTC4_NTD4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2925 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 28 - ThreadTile1: 4 + ThreadTile1: 2 ThreadTileA: 28 - ThreadTileB: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -764283,8 +763473,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -764297,8 +763487,8 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -764314,7 +763504,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -764323,13 +763513,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -764340,44 +763529,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTA4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT14_4_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 - LVPA: 4 - LVPB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 65408 + LdsNumElementsAlignedA: 15232 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 15232 + LdsOffsetB_Blk: 48000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 15232 + LdsOffsetMetadata_Blk: 48000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -764386,13 +763575,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [9, 4] - MIWaveTileA: 9 + MIWaveTile: [14, 4] + MIWaveTileA: 14 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 144 + MacroTile0: 224 MacroTile1: 256 - MacroTileA: 144 + MacroTileA: 224 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -764407,20 +763596,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 18 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 18 + NumLoadsPerpendicularA: 7 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -764430,7 +763619,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -764507,25 +763696,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2929 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2926 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT14_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 + ThreadTile0: 56 ThreadTile1: 4 - ThreadTileA: 36 + ThreadTileA: 56 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -764537,27 +763726,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -764589,7 +763778,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -764600,7 +763789,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -764609,23 +763798,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -764646,14 +763835,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -764669,19 +763858,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -764767,8 +763956,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2930 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2927 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -764776,17 +763965,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -764797,14 +763986,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -764834,7 +764023,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -764849,7 +764038,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -764860,68 +764049,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 16896 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] + MIWaveGroup: [1, 2] MIWaveTile: [4, 3] MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -764929,18 +764118,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -765027,25 +764216,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2931 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2928 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -765057,27 +764246,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -765105,11 +764294,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -765120,36 +764309,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_NEPBS0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -765166,14 +764355,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -765189,19 +764378,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -765287,26 +764476,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2932 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2929 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -765317,7 +764506,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -765333,11 +764522,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -765354,7 +764543,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -765369,7 +764558,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -765380,44 +764569,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG32_2_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -765425,15 +764614,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -765449,19 +764638,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -765547,26 +764736,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2933 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2930 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -765577,27 +764766,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -765614,7 +764803,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -765640,44 +764829,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_SPO1_SVW2_VWA2_WG32_2_4 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -765685,15 +764874,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -765709,19 +764898,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -765807,26 +764996,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2934 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2931 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -765843,21 +765032,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -765889,7 +765078,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -765900,7 +765089,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SSO0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -765909,23 +765098,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -765946,13 +765135,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveTile: [2, 4] + MIWaveTileA: 2 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 128 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 128 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -765969,18 +765158,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -766067,25 +765256,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2935 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2932 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU0_SUM0_SUS0_SSO0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 32 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 32 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -766097,7 +765286,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -766117,7 +765306,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -766160,7 +765349,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS16_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -766229,11 +765418,11 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 192 NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 @@ -766327,15 +765516,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2936 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2933 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 @@ -766377,7 +765566,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -766420,7 +765609,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC3_NTD3_NLCA1_SS1_SPO1_SVW2_VWA2_WG32_2_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC4_NTD4_SPO0_SVW2_VWA2_WG32_4_2 LSCA: 256 LSCB: 256 LSPA: 8 @@ -766433,75 +765622,75 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] + MIWaveGroup: [2, 1] MIWaveTile: [2, 1] MIWaveTileA: 2 MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 32 + MacroTile1: 16 MacroTileA: 64 - MacroTileB: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 2 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -766587,25 +765776,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2937 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2934 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC4_NTD4_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 8 ThreadTile1: 1 - ThreadTileA: 32 + ThreadTileA: 8 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -766623,7 +765812,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -766654,7 +765843,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -766665,11 +765854,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -766680,44 +765869,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTA4_NTC3_NTD3_NEPBS16_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA3_NTC0_NTD0_NEPBS0_SPO0_SVW2_VWA2_WG32_4_2_WGMXCC1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -766725,15 +765914,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 80 + MacroTileA: 64 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -766747,21 +765936,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 3 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -766847,26 +766036,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2938 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_NTA4_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 2935 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA3_NTC0_NTD0_NEPBS0_SU2_SUM0_SUS256_SPO0_SVW2_VWA2_WG32_4_2_WGM1_WGMXCC1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 2 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -766877,27 +766066,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -766914,7 +766103,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -766929,7 +766118,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -766940,88 +766129,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTA4_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSUAMB_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -767107,25 +766296,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2939 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2936 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_GSUAMB_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -767137,27 +766326,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -767174,7 +766363,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -767183,6 +766372,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -767199,17 +766389,17 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_3_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 48640 @@ -767225,8 +766415,8 @@ LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 48640 LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -767234,10 +766424,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -767249,18 +766439,18 @@ MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -767268,13 +766458,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 NumLoadsB: 3 NumLoadsCoalescedA: 1 @@ -767289,7 +766479,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -767366,25 +766556,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2940 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 2937 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_3_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 32 ThreadTile1: 3 - ThreadTileA: 8 + ThreadTileA: 32 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -767402,21 +766592,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -767433,7 +766623,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -767442,8 +766632,9 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -767458,32 +766649,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC4_NTD4_NEPBS0_PLR1_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41472 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 58880 + LdsNumElementsAlignedA: 17920 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 70144 + LdsOffsetB: 17920 + LdsOffsetB_Blk: 83456 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41472 - LdsOffsetMetadata_Blk: 70144 + LdsOffsetMetadata: 58880 + LdsOffsetMetadata_Blk: 83456 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -767492,10 +766683,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -767504,14 +766695,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [1, 2] - MIWaveTileA: 1 - MIWaveTileB: 2 + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 128 - MacroTileA: 16 - MacroTileB: 128 + MacroTile0: 112 + MacroTile1: 256 + MacroTileA: 112 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -767527,18 +766718,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 14 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -767548,7 +766739,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -767625,13 +766816,13 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2941 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2938 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC4_NTD4_NEPBS0_PLR1_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM4 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 @@ -767641,10 +766832,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 2 - ThreadTileA: 4 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -767662,20 +766853,20 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -767701,12 +766892,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -767717,7 +766909,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS0_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -767726,59 +766918,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25088 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25088 - LdsOffsetMetadata_Blk: 37376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [2, 2] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 32 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -767786,18 +766978,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 1 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -767807,7 +766999,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -767884,25 +767076,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2942 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2939 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS0_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 64 ThreadTile1: 2 - ThreadTileA: 8 + ThreadTileA: 64 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -767914,14 +767106,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -767934,7 +767126,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -767951,7 +767143,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -767960,10 +767152,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 GroupLoadStore: false @@ -767976,34 +767169,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -768011,10 +767204,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -768022,22 +767215,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -768045,19 +767238,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -768066,7 +767259,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -768143,26 +767336,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2943 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2940 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -768179,22 +767372,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 0 + _staggerStrideShift: 1 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -768210,7 +767403,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -768219,12 +767412,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -768235,68 +767429,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 8 - LSPB: 8 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 25600 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 25600 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -768304,20 +767498,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumLoadsPerpendicularB: 3 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -768325,7 +767519,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -768402,26 +767596,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2944 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 + SolutionIndex: 2941 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -768432,27 +767626,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -768478,12 +767672,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -768494,7 +767689,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -768503,59 +767698,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49664 - LdsNumElementsAlignedA: 8704 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 8704 - LdsOffsetB_Blk: 74240 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 49664 - LdsOffsetMetadata_Blk: 74240 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 256 - MacroTileA: 64 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -768563,19 +767758,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 2 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -768584,7 +767779,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -768661,26 +767856,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2945 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2942 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM4 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -768691,14 +767886,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -768737,12 +767932,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -768753,7 +767949,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT12_2_SVW4_VWA4_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -768762,59 +767958,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46592 - LdsNumElementsAlignedA: 26112 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 26112 - LdsOffsetB_Blk: 91648 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46592 - LdsOffsetMetadata_Blk: 91648 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [12, 2] - MIWaveTileA: 12 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -768822,19 +768018,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -768843,7 +768039,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -768920,26 +768116,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2946 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT12_2_SU0_SUM0_SUS0_SVW4_VWA4_WG16_16_1_WGM8 + SolutionIndex: 2943 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 2 - ThreadTileA: 48 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -768950,14 +768146,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -768971,7 +768167,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -768987,7 +768183,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -768996,12 +768192,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 17 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -769012,44 +768209,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT4_11_NTC4_NTD4_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 57216 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 23936 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 25600 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 25600 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57216 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -769057,15 +768254,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -769081,20 +768278,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -769102,7 +768299,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -769179,26 +768376,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2947 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU17_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 + SolutionIndex: 2944 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT4_11_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 + StoreVectorWidth: 4 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -769209,27 +768406,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 17] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -769246,7 +768443,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -769255,12 +768452,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -769271,44 +768469,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_2_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_NTC4_NTD4_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 LSPA: 16 - LSPB: 32 + LSPB: 64 LVCA: 16 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38400 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 26752 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38400 - LdsOffsetMetadata_Blk: 83456 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26752 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -769317,14 +768515,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [7, 2] - MIWaveTileA: 7 - MIWaveTileB: 2 + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 128 - MacroTileA: 112 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -769340,18 +768538,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 56 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 7 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -769361,7 +768559,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -769438,26 +768636,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2948 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x128x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT7_2_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 2945 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_NTC4_NTD4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 8 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 2 - ThreadTileA: 28 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -769468,28 +768666,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 - - 1LDSBuffer: 0 + _staggerStrideShift: 2 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -769505,7 +768703,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -769514,9 +768712,10 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 @@ -769530,68 +768729,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT14_4_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1_WGMXCC1 + LSCA: 64 + LSCB: 64 LSPA: 32 LSPB: 32 LVCA: 8 LVCB: 8 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65408 - LdsNumElementsAlignedA: 15232 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 15232 - LdsOffsetB_Blk: 48000 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 15232 - LdsOffsetMetadata_Blk: 48000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -769599,19 +768798,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -769620,7 +768819,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -769697,13 +768896,13 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2949 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT14_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2946 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8_WGMXCC1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 @@ -769713,10 +768912,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 4 - ThreadTileA: 56 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -769733,21 +768932,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -769764,7 +768963,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -769775,11 +768974,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -769790,68 +768989,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GRVWA2_LBSPPA2048_LBSPPB512_LPA4_LPB8_LRVW4_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SPO1_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 2 + LSPB: 8 + LVCA: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 58240 + LdsNumElementsAlignedA: 32896 + LdsNumElementsAlignedB: 25344 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 32896 + LdsOffsetB_Blk: 98432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 + LdsOffsetMetadata: 58240 + LdsOffsetMetadata_Blk: 98432 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalReadVectorWidth: 4 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -769864,14 +769063,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 3 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -769957,26 +769156,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2950 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM32 + SolutionIndex: 2947 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA2048_LBSPPB512_LPA4_LPB8_LRVW4_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -769987,27 +769186,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 32 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -770024,7 +769223,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -770039,7 +769238,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -770050,68 +769249,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -770124,14 +769323,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -770217,26 +769416,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2951 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG16_8_2_WGM1 + SolutionIndex: 2948 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -770247,27 +769446,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -770299,7 +769498,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -770310,7 +769509,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -770319,36 +769518,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -770356,22 +769555,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -770383,15 +769582,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 5 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -770477,26 +769676,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2952 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2949 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -770507,13 +769706,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -770544,7 +769743,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -770555,7 +769754,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -770570,44 +769769,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG32_2_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -770615,15 +769814,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -770644,14 +769843,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -770737,26 +769936,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2953 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2950 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 2 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 1 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 1 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -770773,21 +769972,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -770804,7 +770003,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -770815,11 +770014,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -770830,68 +770029,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_SPO1_SVW2_VWA2_WG32_2_4 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [9, 4] + MIWaveTileA: 9 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 144 + MacroTile1: 256 + MacroTileA: 144 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -770904,14 +770103,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 18 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 18 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -770997,8 +770196,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2954 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2951 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -771006,17 +770205,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 36 + ThreadTile1: 4 + ThreadTileA: 36 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -771027,21 +770226,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -771079,7 +770278,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -771090,7 +770289,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SSO0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -771099,23 +770298,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -771136,14 +770335,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -771163,15 +770362,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -771257,26 +770456,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2955 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU0_SUM0_SUS0_SSO0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2952 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -771287,7 +770486,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -771307,7 +770506,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -771324,7 +770523,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -771339,7 +770538,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -771350,34 +770549,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTC0_NTD0_PLR1_SS1_SPO0_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -771385,10 +770584,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -771396,22 +770595,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -771419,19 +770618,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 + NumElementsPerThread: 48 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -771517,26 +770716,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2956 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2953 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTC0_NTD0_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -771547,21 +770746,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -771599,7 +770798,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -771610,7 +770809,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC4_NTD4_SPO0_SVW2_VWA2_WG32_4_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG16_4_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -771619,33 +770818,33 @@ LVCB: 32 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42496 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42496 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -771655,15 +770854,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 16 + MacroTile1: 32 MacroTileA: 64 - MacroTileB: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -771679,19 +770878,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 + NumElementsPerThread: 8 NumGlobalWriteVectorsPerThread: 2 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -771777,8 +770976,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2957 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC4_NTD4_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 2954 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -771786,17 +770985,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreVectorWidth: 4 + SubGroup0: 4 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -771807,13 +771006,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -771859,7 +771058,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -771870,7 +771069,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA3_NTC0_NTD0_NEPBS0_SPO0_SVW2_VWA2_WG32_4_2_WGMXCC1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_PLR1_SS1_SPO0_SVW4_VWA4_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -771879,23 +771078,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -771916,14 +771115,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 80 - MacroTileA: 64 - MacroTileB: 80 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -771937,21 +771136,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 3 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 - NumLoadsA: 4 - NumLoadsB: 5 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -772037,26 +771236,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2958 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTA3_NTC0_NTD0_NEPBS0_SU2_SUM0_SUS256_SPO0_SVW2_VWA2_WG32_4_2_WGM1_WGMXCC1 + SolutionIndex: 2955 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 2 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 16 SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -772067,7 +771266,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -772104,7 +771303,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -772130,44 +771329,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSUAMB_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -772175,15 +771374,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 64 + MacroTile1: 160 MacroTileA: 128 - MacroTileB: 64 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -772204,14 +771403,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -772297,8 +771496,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2959 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_GSUAMB_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_SU0_SUM0_SUS0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 2956 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -772308,15 +771507,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -772333,15 +771532,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -772390,7 +771589,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_3_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -772403,19 +771602,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -772427,7 +771626,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -772435,15 +771634,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] + MIWaveGroup: [2, 2] MIWaveTile: [2, 3] MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -772463,15 +771662,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 96 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 3 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -772557,20 +771756,20 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2960 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_3_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2957 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 @@ -772593,7 +771792,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -772607,7 +771806,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -772650,7 +771849,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC4_NTD4_NEPBS0_PLR1_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC4_NTD4_NEPBS16_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -772723,7 +771922,7 @@ NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 + NumElementsPerBatchStore: 16 NumElementsPerThread: 112 NumGlobalWriteVectorsPerThread: 112 NumLoadsA: 14 @@ -772817,12 +772016,12 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2961 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC4_NTD4_NEPBS0_PLR1_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM4 + SolutionIndex: 2958 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 @@ -772854,7 +772053,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [16, 16, 1] - WorkGroupMapping: 4 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -772867,7 +772066,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -772899,7 +772098,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -772910,7 +772109,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS0_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -772919,23 +772118,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -772985,7 +772184,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -773077,16 +772276,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2962 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS0_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2959 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -773107,7 +772306,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -773127,7 +772326,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -773170,7 +772369,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -773183,9 +772382,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -773194,7 +772393,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 @@ -773216,14 +772415,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -773243,15 +772442,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -773337,8 +772536,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2963 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2960 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -773354,9 +772553,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 64 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 64 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -773404,7 +772603,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -773415,11 +772614,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -773430,32 +772629,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -773464,8 +772663,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -773475,15 +772674,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -773503,15 +772702,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -773597,8 +772796,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2964 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x32_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2961 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM4 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -773606,17 +772805,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -773627,27 +772826,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -773664,7 +772863,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -773690,44 +772889,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SPO1_SVW2_VWA2_WG32_2_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -773735,15 +772934,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -773757,21 +772956,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -773857,8 +773056,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2965 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM4 + SolutionIndex: 2962 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -773867,16 +773066,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -773893,15 +773092,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 4 + WorkGroup: [32, 2, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -773924,7 +773123,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -773950,68 +773149,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_GSUAMB_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA0_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] + MIWaveGroup: [2, 1] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -774019,19 +773218,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -774117,26 +773316,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2966 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2963 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA0_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -774153,15 +773352,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -774196,10 +773395,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -774210,36 +773409,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT4_11_NTC4_NTD4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57216 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 23936 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57216 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -774255,15 +773454,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -774279,19 +773478,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -774377,26 +773576,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2967 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT4_11_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2964 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -774407,13 +773606,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -774423,7 +773622,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -774444,7 +773643,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -774459,7 +773658,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -774470,68 +773669,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_NTC4_NTD4_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26752 - LdsNumElementsAlignedA: 8320 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26752 - LdsOffsetMetadata_Blk: 41088 - LdsPadA: 4 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -774543,14 +773742,14 @@ NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -774637,26 +773836,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2968 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_NTC4_NTD4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 2965 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -774667,27 +773866,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -774704,7 +773903,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -774730,88 +773929,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1_WGMXCC1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SPO1_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -774897,26 +774096,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2969 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8_WGMXCC1 + SolutionIndex: 2966 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -774933,21 +774132,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -774964,7 +774163,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -774975,11 +774174,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -774990,45 +774189,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GRVWA2_LBSPPA2048_LBSPPB512_LPA4_LPB8_LRVW4_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SPO1_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 2 - LSPB: 8 - LVCA: 128 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_1_NTA0_NTC0_NTD0_NLCA1_SS1_SPO1_SVW2_VWA2_WG32_2_4 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58240 - LdsNumElementsAlignedA: 32896 - LdsNumElementsAlignedB: 25344 + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 32896 - LdsOffsetB_Blk: 98432 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58240 - LdsOffsetMetadata_Blk: 98432 - LdsPadA: 4 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -775036,22 +774235,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 48 + MacroTile1: 32 MacroTileA: 64 - MacroTileB: 48 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -775059,19 +774258,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 3 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -775157,8 +774356,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2970 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x256_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA2048_LBSPPB512_LPA4_LPB8_LRVW4_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 2967 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_1_NTA0_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -775166,17 +774365,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -775187,23 +774386,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -775224,7 +774423,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -775239,7 +774438,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -775250,68 +774449,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA0_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -775324,14 +774523,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -775417,26 +774616,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2971 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2968 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -775447,27 +774646,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -775484,7 +774683,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -775499,7 +774698,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -775510,68 +774709,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA0_SVW2_VWA2_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 2] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -775584,14 +774783,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -775677,26 +774876,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2972 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2969 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -775707,21 +774906,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -775759,7 +774958,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -775770,7 +774969,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_NTC4_NTD4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -775779,59 +774978,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -775839,19 +775038,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -775937,26 +775136,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2973 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 2970 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_NTC4_NTD4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -775967,13 +775166,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -775983,7 +775182,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -776019,7 +775218,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -776030,7 +775229,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -776039,27 +775238,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 57216 + LdsNumElementsAlignedA: 29568 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 29568 + LdsOffsetB_Blk: 95104 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57216 + LdsOffsetMetadata_Blk: 95104 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -776076,14 +775275,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 4] - MIWaveTile: [9, 4] - MIWaveTileA: 9 - MIWaveTileB: 4 + MIWaveTile: [14, 3] + MIWaveTileA: 14 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 144 - MacroTile1: 256 - MacroTileA: 144 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -776104,14 +775303,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 18 - NumLoadsB: 8 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 28 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 18 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -776197,26 +775396,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2974 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x256x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT9_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2971 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 4 - ThreadTileA: 36 - ThreadTileB: 4 + ThreadTile0: 56 + ThreadTile1: 3 + ThreadTileA: 56 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -776227,7 +775426,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -776247,7 +775446,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -776264,7 +775463,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -776279,7 +775478,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -776290,88 +775489,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA4_NTC4_NTD4_SVW2_VWA2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -776457,25 +775656,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2975 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 2972 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA4_NTC4_NTD4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -776487,27 +775686,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -776524,7 +775723,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -776535,7 +775734,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -776550,32 +775749,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTC0_NTD0_PLR1_SS1_SPO0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTA4_NTC4_NTD4_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -776584,10 +775783,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -776596,13 +775795,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveTile: [5, 4] + MIWaveTileA: 5 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 + MacroTile0: 160 MacroTile1: 128 - MacroTileA: 96 + MacroTileA: 160 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -776617,21 +775816,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -776717,15 +775916,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2976 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_4_NTC0_NTD0_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2973 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTA4_NTC4_NTD4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 @@ -776733,9 +775932,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 + ThreadTile0: 20 ThreadTile1: 4 - ThreadTileA: 12 + ThreadTileA: 20 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -776758,16 +775957,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -776784,7 +775983,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -776793,13 +775992,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -776810,44 +776008,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_2_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 79360 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -776855,15 +776053,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -776879,18 +776077,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 3 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -776900,7 +776098,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -776977,25 +776175,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2977 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 2974 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 24 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 24 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -777007,21 +776205,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -777044,7 +776242,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -777055,11 +776253,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -777070,88 +776268,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_PLR1_SS1_SPO0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 59904 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 59904 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 2] + MIWaveTileA: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 20 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -777237,26 +776435,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2978 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 2975 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 2 + SubGroup1: 128 + SubGroupA: 2 + SubGroupB: 128 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -777267,27 +776465,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -777304,7 +776502,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -777313,13 +776511,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -777330,44 +776527,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_5_SVW2_VWA2_WG32_8_1 + LSCA: 32 + LSCB: 32 LSPA: 32 LSPB: 32 LVCA: 8 LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 23936 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 23936 + LdsOffsetMetadata_Blk: 45824 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -777376,13 +776573,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 5] - MIWaveTileA: 4 + MIWaveTile: [6, 5] + MIWaveTileA: 6 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 192 MacroTile1: 160 - MacroTileA: 128 + MacroTileA: 192 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 @@ -777399,18 +776596,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 4 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -777420,7 +776617,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -777497,25 +776694,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2979 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_5_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 2976 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 24 ThreadTile1: 5 - ThreadTileA: 16 + ThreadTileA: 24 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -777527,21 +776724,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -777564,7 +776761,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -777590,88 +776787,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 NumLoadsA: 4 - NumLoadsB: 6 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -777757,26 +776954,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2980 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2977 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -777793,15 +776990,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -777824,7 +777021,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -777835,11 +777032,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -777850,44 +777047,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC4_NTD4_NEPBS16_SVW1_VWA1_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA4_NTC3_NTD3_SVW2_VWA2_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 58880 - LdsNumElementsAlignedA: 17920 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17920 - LdsOffsetB_Blk: 83456 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 58880 - LdsOffsetMetadata_Blk: 83456 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -777895,15 +777092,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [1, 2] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 112 - MacroTile1: 256 - MacroTileA: 112 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -777917,21 +777114,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -778017,26 +777214,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2981 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT112x256x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 2978 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA4_NTC3_NTD3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -778047,21 +777244,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -778093,13 +777290,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -778110,7 +777306,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -778119,36 +777315,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 40960 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -778156,22 +777352,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [5, 3] + MIWaveTileA: 5 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 96 + MacroTileA: 160 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -778179,19 +777375,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 60 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -778200,7 +777396,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -778277,26 +777473,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2982 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2979 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 20 + ThreadTile1: 3 + ThreadTileA: 20 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -778307,14 +777503,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -778328,7 +777524,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -778344,7 +777540,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -778353,13 +777549,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -778370,68 +777565,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_10_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 LSPA: 32 LSPB: 32 LVCA: 8 LVCB: 8 - LVPA: 4 - LVPB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 60544 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 16896 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 10 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -778439,19 +777634,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -778460,7 +777655,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -778537,26 +777732,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2983 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 2980 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_10_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -778567,27 +777762,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -778613,13 +777808,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -778630,45 +777824,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_14_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -778676,22 +777870,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 14] + MIWaveTileA: 4 + MIWaveTileB: 14 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -778699,19 +777893,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 16 + NumLoadsB: 14 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 14 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -778720,7 +777914,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -778797,26 +777991,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2984 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM4 + SolutionIndex: 2981 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_14_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 14 + ThreadTileA: 16 + ThreadTileB: 14 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -778827,14 +778021,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 4 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -778843,12 +778037,12 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -778864,7 +778058,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -778873,13 +778067,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 22 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -778890,45 +778083,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SPO1_SVW2_VWA2_WG32_2_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 4 + LVCA: 16 + LVCB: 16 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -778936,43 +778129,43 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 + MIWaveTile: [1, 1] + MIWaveTileA: 1 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumThreads: 64 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -778980,7 +778173,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -779057,25 +778250,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2985 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2982 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU22_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 4 ThreadTile1: 1 - ThreadTileA: 32 + ThreadTileA: 4 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -779087,28 +778280,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] - WorkGroupMapping: 1 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 22] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -779133,13 +778326,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 12 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -779150,7 +778342,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_GSUAMB_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA0_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG32_4_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_16_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -779159,35 +778351,35 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 37376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 37376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -779195,15 +778387,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 16 + MacroTile1: 64 + MacroTileA: 16 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -779219,19 +778411,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -779240,7 +778432,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -779317,26 +778509,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2986 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_3_NTA0_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 2983 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU12_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -779347,17 +778539,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 12] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -779368,7 +778560,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -779384,7 +778576,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -779393,11 +778585,10 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 24 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 GroupLoadStore: false @@ -779410,32 +778601,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 + LSCA: 128 + LSCB: 128 LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -779444,10 +778635,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -779455,15 +778646,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [1, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 16 + MacroTile1: 32 + MacroTileA: 16 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -779479,20 +778670,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 - NumThreads: 256 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -779500,7 +778691,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -779577,26 +778768,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2987 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2984 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU24_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -779613,22 +778804,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 24] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -779644,7 +778835,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -779653,13 +778844,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 18 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -779670,34 +778860,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 + LSCA: 128 + LSCB: 128 LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 25600 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -779705,33 +778895,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -779739,20 +778929,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -779760,7 +778950,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -779837,26 +779027,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2988 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 2985 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU18_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -779867,27 +779057,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 18] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -779904,7 +779094,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -779913,7 +779103,6 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -779930,44 +779119,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SPO1_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_3_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 24576 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 24576 + LdsOffsetMetadata_Blk: 41984 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -779975,15 +779164,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -779997,21 +779186,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -780020,7 +779209,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -780097,26 +779286,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2989 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2986 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 1 + ThreadTile1: 3 ThreadTileA: 8 - ThreadTileB: 1 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -780133,15 +779322,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -780164,7 +779353,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -780173,10 +779362,9 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 @@ -780190,68 +779378,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_1_NTA0_NTC0_NTD0_NLCA1_SS1_SPO1_SVW2_VWA2_WG32_2_4 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_4_SVW2_VWA2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 32768 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 23936 + LdsNumElementsAlignedA: 6528 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetB: 6528 + LdsOffsetB_Blk: 39296 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 23936 + LdsOffsetMetadata_Blk: 39296 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 96 + MacroTile1: 256 + MacroTileA: 96 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -780263,15 +779451,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -780280,7 +779468,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -780357,26 +779545,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2990 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x128_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_1_NTA0_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 2987 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 1 - ThreadTileA: 32 - ThreadTileB: 1 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -780393,15 +779581,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -780424,7 +779612,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -780433,13 +779621,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -780450,44 +779637,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_6_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 39936 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 74752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 39936 + LdsOffsetMetadata_Blk: 74752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -780495,15 +779682,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 6] + MIWaveTileA: 2 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 64 + MacroTile1: 192 + MacroTileA: 64 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -780519,19 +779706,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -780540,7 +779727,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -780617,26 +779804,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2991 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA0_SU8_SUM0_SUS256_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 2988 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_6_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 6 + ThreadTileA: 8 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -780647,21 +779834,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -780684,7 +779871,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -780693,10 +779880,9 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 @@ -780710,44 +779896,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA0_SVW2_VWA2_WG16_8_2 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT14_4_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64384 + LdsNumElementsAlignedA: 29568 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 29568 + LdsOffsetB_Blk: 95104 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64384 + LdsOffsetMetadata_Blk: 95104 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -780755,15 +779941,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 4] + MIWaveTileA: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -780779,19 +779965,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 14 + NumLoadsB: 16 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 14 + NumLoadsPerpendicularB: 16 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -780800,7 +779986,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -780877,26 +780063,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2992 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 2989 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT14_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 56 + ThreadTile1: 4 + ThreadTileA: 56 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -780913,15 +780099,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -780953,13 +780139,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -780970,32 +780155,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_NTC4_NTD4_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_2_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 23040 LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -781007,7 +780192,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -781015,14 +780200,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 2] + MIWaveTileA: 10 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 160 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 160 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 @@ -781039,18 +780224,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularA: 5 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -781060,7 +780245,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -781137,26 +780322,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2993 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA0_NTC4_NTD4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2990 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 40 + ThreadTile1: 2 + ThreadTileA: 40 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -781167,14 +780352,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -781187,7 +780372,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -781204,7 +780389,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -781213,13 +780398,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 32 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -781230,44 +780414,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57216 - LdsNumElementsAlignedA: 29568 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29568 - LdsOffsetB_Blk: 95104 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57216 - LdsOffsetMetadata_Blk: 95104 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -781275,15 +780459,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -781299,19 +780483,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 28 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -781320,7 +780504,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -781397,26 +780581,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2994 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 2991 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -781427,27 +780611,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 32] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -781464,7 +780648,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -781479,7 +780663,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -781490,37 +780674,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA4_NTC4_NTD4_SVW2_VWA2_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_SPO0_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -781535,15 +780719,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 48 + MacroTile1: 32 MacroTileA: 64 - MacroTileB: 48 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -781557,21 +780741,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -781657,26 +780841,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2995 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA4_NTC4_NTD4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 2992 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -781687,21 +780871,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -781724,7 +780908,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -781735,11 +780919,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -781750,87 +780934,87 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTA4_NTC4_NTD4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_SVW2_VWA2_WG32_2_4 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 4] - MIWaveTileA: 5 - MIWaveTileB: 4 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -781917,26 +781101,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2996 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_4_NTA4_NTC4_NTD4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2993 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 2 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 2 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 4 - ThreadTileA: 20 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -781947,27 +781131,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -781984,7 +781168,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -781993,6 +781177,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -782009,44 +781194,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_2_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 512 + LSCB: 512 + LSPA: 4 + LSPB: 4 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 13824 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 13824 - LdsOffsetB_Blk: 79360 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 79360 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -782054,15 +781239,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 2] - MIWaveTileA: 6 - MIWaveTileB: 2 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 128 - MacroTileA: 96 - MacroTileB: 128 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -782082,14 +781267,14 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 3 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -782099,7 +781284,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -782176,26 +781361,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2997 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 2994 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 2 - ThreadTileA: 24 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -782212,15 +781397,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -782243,7 +781428,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -782254,11 +781439,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -782269,88 +781454,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_MIWT2_2_NTC3_NTD3_SPO1_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [5, 2] - MIWaveTileA: 5 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 160 - NumLoadsA: 20 - NumLoadsB: 8 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -782436,25 +781621,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2998 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT5_2_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 2995 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_MIWT2_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 2 - SubGroup1: 128 - SubGroupA: 2 - SubGroupB: 128 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 80 + ThreadTile0: 8 ThreadTile1: 2 - ThreadTileA: 80 + ThreadTileA: 8 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -782466,27 +781651,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -782503,7 +781688,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -782512,9 +781697,10 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 @@ -782528,44 +781714,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_5_SVW2_VWA2_WG32_8_1 - LSCA: 32 - LSCB: 32 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_3_NTC4_NTD4_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23936 - LdsNumElementsAlignedA: 13056 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 13056 - LdsOffsetB_Blk: 45824 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23936 - LdsOffsetMetadata_Blk: 45824 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -782573,15 +781759,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 32 + MacroTile1: 48 + MacroTileA: 32 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -782597,19 +781783,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 6 - NumLoadsB: 5 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 6 + NumGlobalWriteVectorsPerThread: 3 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -782618,7 +781804,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -782695,26 +781881,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 2999 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_5_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 2996 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_3_NTC4_NTD4_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -782731,15 +781917,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -782788,7 +781974,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTC0_NTD0_SPO0_SVW2_VWA2_WG32_2_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -782801,32 +781987,32 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -782838,38 +782024,38 @@ MIWaveTileA: 2 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -782955,8 +782141,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3000 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 2997 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -782965,15 +782151,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 32 ThreadTile1: 1 - ThreadTileA: 8 + ThreadTileA: 32 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -782991,7 +782177,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -783022,7 +782208,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 512 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -783048,42 +782234,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA4_NTC3_NTD3_SVW2_VWA2_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SVW2_VWA2_WG16_4_4 + LSCA: 512 + LSCB: 512 + LSPA: 4 + LSPB: 4 + LVCA: 64 + LVCB: 64 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -783093,15 +782279,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 - MIWaveTileB: 2 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -783115,15 +782301,15 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -783215,26 +782401,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3001 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA4_NTC3_NTD3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 2998 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -783251,15 +782437,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 512 + _DepthUA: 512 + _DepthUB: 512 + _DepthUMetadata: 512 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -783282,7 +782468,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -783291,12 +782477,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -783307,44 +782494,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_3_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_MIWT2_2_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 34304 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40960 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 34304 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -783352,15 +782539,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 3] - MIWaveTileA: 5 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 96 - MacroTileA: 160 - MacroTileB: 96 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -783376,19 +782563,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 60 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 3 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -783397,7 +782584,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -783474,26 +782661,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3002 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_3_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 2999 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_MIWT2_2_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 3 - ThreadTileA: 20 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -783504,28 +782691,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -783541,7 +782728,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -783550,12 +782737,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -783566,44 +782754,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_10_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC4_NTD4_NEPBS16_SPO0_SVW2_VWA2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60544 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 40960 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 16896 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 40448 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -783611,15 +782799,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 10] - MIWaveTileA: 4 - MIWaveTileB: 10 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 80 + MacroTileA: 64 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -783635,18 +782823,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 8 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 10 + NumLoadsA: 4 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -783656,7 +782844,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -783733,26 +782921,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3003 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_10_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 3000 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 10 - ThreadTileA: 16 - ThreadTileB: 10 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -783763,21 +782951,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -783800,7 +782988,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -783809,9 +782997,10 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -783825,44 +783014,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_14_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -783870,15 +783059,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 14] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 14 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -783894,19 +783083,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 16 - NumLoadsB: 14 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 14 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -783915,7 +783104,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -783992,26 +783181,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3004 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_14_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 3001 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 14 + ThreadTile1: 4 ThreadTileA: 16 - ThreadTileB: 14 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -784028,22 +783217,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -784059,7 +783248,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -784068,12 +783257,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 22 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -784084,34 +783274,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 4 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -784119,33 +783309,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -784153,20 +783343,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 - NumThreads: 64 + NumLoadsPerpendicularB: 8 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -784174,7 +783364,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -784251,26 +783441,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3005 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU22_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_4_1_WGM8 + SolutionIndex: 3002 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -784281,28 +783471,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 22] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -784318,7 +783508,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -784330,7 +783520,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 12 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 GroupLoadStore: false @@ -784343,32 +783533,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_16_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_7_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 37376 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 37376 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -784377,8 +783567,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] @@ -784388,15 +783578,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 64 - MacroTileA: 16 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -784417,14 +783607,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 1 - NumLoadsB: 4 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 1 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -784510,8 +783700,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3006 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x64x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU12_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM8 + SolutionIndex: 3003 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -784520,16 +783710,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -784546,22 +783736,22 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 12] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -784586,10 +783776,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 24 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 GroupLoadStore: false @@ -784602,32 +783793,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG16_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 LSCA: 128 LSCB: 128 - LSPA: 8 - LSPB: 8 + LSPA: 16 + LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 1 - LVPB: 1 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 4608 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 4608 - LdsOffsetB_Blk: 20992 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 4608 - LdsOffsetMetadata_Blk: 20992 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -784639,7 +783830,7 @@ LoopIters: 8 LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -784647,15 +783838,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 32 - MacroTileA: 16 - MacroTileB: 32 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -784671,20 +783862,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 4 - NumThreads: 128 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -784692,7 +783883,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -784769,26 +783960,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3007 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x32x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU24_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG16_8_1_WGM8 + SolutionIndex: 3004 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTC4_NTD4_NEPBS0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM4 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -784805,11 +783996,11 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 24] + WorkspaceCheck: [4, 0, 1] _DepthU: 128 _DepthUA: 128 _DepthUB: 128 @@ -784820,7 +784011,7 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 0 - - 1LDSBuffer: 0 + - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true @@ -784836,7 +784027,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -784845,10 +784036,11 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 18 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 GroupLoadStore: false @@ -784861,34 +784053,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_WG32_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 8 - LSPB: 8 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS0_SSO4_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 30208 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 25600 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 9216 - LdsOffsetMetadata_Blk: 25600 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -784896,33 +784088,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -784930,20 +784122,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -784951,7 +784143,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -785028,26 +784220,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3008 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU18_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_4_1_WGM8 + SolutionIndex: 3005 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SSO4_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -785064,15 +784256,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 18] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -785095,7 +784287,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -785104,12 +784296,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -785120,44 +784313,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_3_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_CLR1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC4_NTD4_PLR1_SPO0_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 24576 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 41984 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 24576 - LdsOffsetMetadata_Blk: 41984 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -785165,15 +784358,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 96 + MacroTile1: 32 MacroTileA: 64 - MacroTileB: 96 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -785189,19 +784382,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 2 - NumLoadsB: 3 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -785210,7 +784403,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -785287,26 +784480,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3009 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_3_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 3006 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_CLR1_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC4_NTD4_PLR1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -785317,21 +784510,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -785354,7 +784547,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -785363,11 +784556,12 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 - GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true @@ -785379,44 +784573,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_4_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSUAMBSK_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_3_NTC0_NTD0_SPO0_SVW2_VWA2_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23936 - LdsNumElementsAlignedA: 6528 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 6528 - LdsOffsetB_Blk: 39296 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23936 - LdsOffsetMetadata_Blk: 39296 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -785424,15 +784618,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 256 - MacroTileA: 96 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -785452,15 +784646,15 @@ NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 3 - NumLoadsB: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 3 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -785469,7 +784663,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -785546,26 +784740,27 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3010 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 3007 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU2_GSUAMBSK_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_3_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -785582,16 +784777,16 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 - _GlobalAccumulation: MultipleBuffer + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 @@ -785613,7 +784808,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -785622,6 +784817,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -785638,44 +784834,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_6_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTA3_NTC0_NTD0_NEPBS0_SPO0_SVW2_VWA2_WG16_8_2_WGMXCC1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 39936 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 74752 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 39936 - LdsOffsetMetadata_Blk: 74752 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -785683,15 +784879,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 6] - MIWaveTileA: 2 - MIWaveTileB: 6 + MIWaveGroup: [1, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 192 + MacroTile1: 96 MacroTileA: 64 - MacroTileB: 192 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -785705,20 +784901,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 3 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 2 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularA: 4 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -785728,7 +784924,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -785805,26 +785001,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3011 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_6_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 3008 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTA3_NTC0_NTD0_NEPBS0_SU2_SUM0_SUS256_SPO0_SVW2_VWA2_WG16_8_2_WGM1_WGMXCC1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 2 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 6 - ThreadTileA: 8 - ThreadTileB: 6 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -785841,15 +785037,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 8, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -785881,12 +785077,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 4 - GlobalReadVectorWidthB: 4 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -785897,36 +785094,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT14_4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64384 - LdsNumElementsAlignedA: 29568 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 29568 - LdsOffsetB_Blk: 95104 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64384 - LdsOffsetMetadata_Blk: 95104 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -785934,7 +785131,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -785942,15 +785139,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 4] - MIWaveTileA: 14 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -785966,19 +785163,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 14 - NumLoadsB: 16 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 14 - NumLoadsPerpendicularB: 16 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -785987,7 +785184,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -786064,25 +785261,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3012 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT14_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 3009 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 56 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -786094,14 +785291,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -786140,6 +785337,7 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -786156,7 +785354,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_2_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_3_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -786169,55 +785367,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 2] - MIWaveTileA: 10 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 128 - MacroTileA: 160 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 96 + MacroTileA: 256 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -786225,19 +785423,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 80 - NumGlobalWriteVectorsPerThread: 40 - NumLoadsA: 5 - NumLoadsB: 4 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -786246,7 +785444,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -786323,26 +785521,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3013 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_2_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 3010 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_3_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 2 - ThreadTileA: 40 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -786359,8 +785557,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -786373,7 +785571,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -786390,7 +785588,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -786399,12 +785597,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 32 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -786415,34 +785614,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -786450,10 +785649,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -786465,18 +785664,18 @@ MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -786484,13 +785683,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -786505,7 +785704,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -786582,25 +785781,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3014 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU32_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 3011 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 64 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 64 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -786612,21 +785811,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 32] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -786649,7 +785848,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -786664,7 +785863,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -786675,68 +785874,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_SPO0_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -786748,15 +785947,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -786842,26 +786041,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3015 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 3012 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -786872,27 +786071,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -786909,7 +786108,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -786924,7 +786123,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -786935,44 +786134,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_SVW2_VWA2_WG32_2_4 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -786980,15 +786179,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 64 - MacroTileA: 64 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -787008,9 +786207,9 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -787102,26 +786301,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3016 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_SU0_SUM0_SUS0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 3013 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -787132,27 +786331,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -787169,7 +786368,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -787180,11 +786379,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -787195,44 +786394,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 512 - LSCB: 512 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 1024 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_5_NTC4_NTD4_SSO0_SVW8_VWA8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 27520 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 10880 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 27520 + LdsOffsetMetadata_Blk: 49408 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -787240,15 +786439,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -787264,19 +786463,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 16 + NumLoadsB: 10 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 10 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -787362,26 +786561,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3017 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GSU1_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3014 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_5_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -787392,27 +786591,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -787429,7 +786628,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -787444,7 +786643,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -787455,68 +786654,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_MIWT2_2_NTC3_NTD3_SPO1_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 2] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 32 - MacroTileA: 32 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -787524,19 +786723,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 2 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 4 - NumLoadsB: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -787622,25 +786821,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3018 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_MIWT2_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3015 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 64 ThreadTile1: 2 - ThreadTileA: 8 + ThreadTileA: 64 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -787652,27 +786851,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -787689,7 +786888,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -787700,11 +786899,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -787715,44 +786914,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_3_NTC4_NTD4_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43008 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43008 - LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -787760,15 +786959,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 48 - MacroTileA: 32 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -787788,15 +786987,15 @@ NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 6 - NumGlobalWriteVectorsPerThread: 3 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -787882,26 +787081,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3019 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_3_NTC4_NTD4_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3016 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -787912,27 +787111,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -787975,7 +787174,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTC0_NTD0_SPO0_SVW2_VWA2_WG32_2_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SPO1_SVW2_VWA2_WG16_4_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -787988,32 +787187,32 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -788025,18 +787224,18 @@ MIWaveTileA: 2 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -788044,19 +787243,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -788142,25 +787341,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3020 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 3017 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 8 ThreadTile1: 1 - ThreadTileA: 32 + ThreadTileA: 8 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -788178,7 +787377,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -788209,7 +787408,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 512 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -788224,7 +787423,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -788235,22 +787434,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SVW2_VWA2_WG16_4_4 - LSCA: 512 - LSCB: 512 - LSPA: 4 - LSPB: 4 - LVCA: 64 - LVCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SPO0_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 1 LVPB: 1 LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 + LdsNumBytes: 50688 LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -788259,7 +787458,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 + LdsOffsetMetadata: 50688 LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 @@ -788269,8 +787468,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -788281,14 +787480,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -788309,8 +787508,8 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -788402,26 +787601,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3021 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x512_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB1024_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3018 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 16 SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -788432,7 +787631,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -788443,10 +787642,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 512 - _DepthUA: 512 - _DepthUB: 512 - _DepthUMetadata: 512 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -788469,7 +787668,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -788495,20 +787694,20 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_MIWT2_2_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 34304 + LdsNumBytes: 65536 LdsNumElementsAlignedA: 16896 LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 @@ -788521,8 +787720,8 @@ LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 34304 LdsOffsetMetadata_Blk: 82432 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 4 @@ -788530,10 +787729,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -788545,18 +787744,18 @@ MIWaveTileA: 2 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 32 - MacroTileA: 32 - MacroTileB: 32 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -788564,13 +787763,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 2 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -788662,8 +787861,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3022 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_MIWT2_2_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3019 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -788672,15 +787871,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 32 ThreadTile1: 2 - ThreadTileA: 8 + ThreadTileA: 32 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -788698,15 +787897,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -788744,7 +787943,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -788755,7 +787954,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC4_NTD4_NEPBS16_SPO0_SVW2_VWA2_WG32_4_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_PLR1_SS1_SPO0_SVW4_VWA4_WG16_8_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -788764,23 +787963,23 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 40960 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 40448 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 44544 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -788800,15 +787999,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 80 + MacroTile1: 96 MacroTileA: 64 - MacroTileB: 80 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -788824,19 +788023,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 20 - NumGlobalWriteVectorsPerThread: 10 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 NumLoadsA: 4 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -788922,8 +788121,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3023 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT2_5_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 3020 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_8_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -788931,17 +788130,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 5 - ThreadTileA: 8 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -788952,13 +788151,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -789015,7 +788214,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_4_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_PLR1_SVW4_VWA4_WG32_8_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -789028,9 +788227,9 @@ LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -789039,18 +788238,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -789060,15 +788259,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 64 + MacroTile1: 96 MacroTileA: 128 - MacroTileB: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -789089,14 +788288,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -789182,8 +788381,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3024 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 3021 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -789193,15 +788392,15 @@ StoreSyncOpt: 0 StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -789218,7 +788417,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -789260,11 +788459,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -789275,22 +788474,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 + LdsNumBytes: 53248 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -789299,21 +788498,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 + LdsOffsetMetadata: 53248 LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -789321,22 +788520,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 128 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -789349,14 +788548,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 16 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -789442,26 +788641,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3025 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 3022 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -789472,14 +788671,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -789492,7 +788691,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -789518,12 +788717,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -789534,7 +788734,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_7_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -789543,59 +788743,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -789603,19 +788803,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 5 - NumLoadsB: 7 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -789624,7 +788824,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -789701,26 +788901,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3026 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_7_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 3023 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM4 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: false + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -789731,14 +788931,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -789751,7 +788951,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -789783,7 +788983,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -789794,7 +788994,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_4_2 LSCA: 128 LSCB: 128 LSPA: 16 @@ -789803,33 +789003,33 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -789839,15 +789039,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -789863,19 +789063,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -789961,8 +789161,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3027 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTC4_NTD4_NEPBS0_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM4 + SolutionIndex: 3024 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -789970,17 +789170,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -789991,14 +789191,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 4 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -790028,7 +789228,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -790054,22 +789254,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS0_SSO4_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTC0_NTD0_SPO0_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 + LdsNumBytes: 55296 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -790078,10 +789278,10 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 + LdsOffsetMetadata: 55296 LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -790089,10 +789289,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -790100,22 +789300,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] + MIWaveTile: [3, 3] MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -790123,19 +789323,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 NumLoadsA: 6 - NumLoadsB: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -790221,26 +789421,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3028 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SSO4_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 3025 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -790257,15 +789457,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -790288,7 +789488,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -790299,11 +789499,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -790314,44 +789514,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_CLR1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC4_NTD4_PLR1_SPO0_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_7_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -790359,15 +789559,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -790383,19 +789583,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -790481,26 +789681,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3029 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_CLR1_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC4_NTD4_PLR1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 3026 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_7_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -790511,27 +789711,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -790548,7 +789748,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -790561,8 +789761,8 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 - GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true @@ -790574,44 +789774,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSUAMBSK_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_3_NTC0_NTD0_SPO0_SVW2_VWA2_WG64_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -790619,15 +789819,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -790648,14 +789848,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -790741,8 +789941,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3030 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU2_GSUAMBSK_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV0_MIWT2_3_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3027 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -790751,17 +789951,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 16 + SubGroup0: 4 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false - SynchronizerSizeCheck: 1 ThreadTile: [1, 1] ThreadTile0: 8 - ThreadTile1: 3 + ThreadTile1: 1 ThreadTileA: 8 - ThreadTileB: 3 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -790778,16 +789977,16 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 - _GlobalAccumulation: MultipleBufferSingleKernel + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 + _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 @@ -790809,7 +790008,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -790835,44 +790034,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTA3_NTC0_NTD0_NEPBS0_SPO0_SVW2_VWA2_WG16_8_2_WGMXCC1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_PLR1_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 48128 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 48128 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -790880,15 +790079,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -790902,21 +790101,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 3 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -791002,26 +790201,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3031 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTA3_NTC0_NTD0_NEPBS0_SU2_SUM0_SUS256_SPO0_SVW2_VWA2_WG16_8_2_WGM1_WGMXCC1 + SolutionIndex: 3028 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 2 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 0 + StaggerUStride: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -791038,15 +790237,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -791084,7 +790283,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -791095,7 +790294,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_PLR1_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -791104,36 +790303,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -791141,22 +790340,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 + MIWaveTile: [3, 4] + MIWaveTileA: 3 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -791169,14 +790368,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -791262,25 +790461,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3032 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS0_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3029 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_PLR1_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 48 ThreadTile1: 4 - ThreadTileA: 16 + ThreadTileA: 48 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -791292,13 +790491,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -791312,7 +790511,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -791355,7 +790554,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_3_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_CLR1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_PLR1_SS1_SPO0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -791368,55 +790567,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48640 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 38912 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48640 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 38912 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 96 - MacroTileA: 256 - MacroTileB: 96 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -791428,15 +790627,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -791522,13 +790721,13 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3033 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x96x64_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_3_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3030 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_CLR1_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 @@ -791538,10 +790737,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -791558,7 +790757,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -791572,7 +790771,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -791615,7 +790814,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -791628,32 +790827,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -791661,22 +790860,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveTile: [4, 7] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -791688,15 +790887,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 4 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -791782,8 +790981,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3034 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3031 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -791792,16 +790991,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -791818,7 +791017,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -791860,11 +791059,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -791875,68 +791074,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -791949,14 +791148,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 16 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -792042,26 +791241,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3035 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3032 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -792072,13 +791271,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -792092,7 +791291,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -792109,7 +791308,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -792124,7 +791323,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -792135,32 +791334,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -792169,8 +791368,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -792181,14 +791380,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -792208,14 +791407,14 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -792302,8 +791501,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3036 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3033 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM4 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -792311,17 +791510,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 48 + ThreadTile1: 2 + ThreadTileA: 48 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -792332,27 +791531,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -792381,10 +791580,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -792395,34 +791594,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_5_NTC4_NTD4_SSO0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SVW2_VWA2_WG16_16_1 LSCA: 32 LSCB: 32 LSPA: 16 - LSPB: 16 + LSPB: 64 LVCA: 16 - LVCB: 16 + LVCB: 4 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27520 - LdsNumElementsAlignedA: 16640 - LdsNumElementsAlignedB: 10880 + LdsNumBytes: 29312 + LdsNumElementsAlignedA: 10880 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16640 - LdsOffsetB_Blk: 49408 + LdsOffsetB: 10880 + LdsOffsetB_Blk: 43648 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27520 - LdsOffsetMetadata_Blk: 49408 + LdsOffsetMetadata: 29312 + LdsOffsetMetadata_Blk: 43648 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -792440,15 +791639,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -792464,19 +791663,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 - NumLoadsA: 16 - NumLoadsB: 10 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 10 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 10 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -792562,8 +791761,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3037 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_5_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 3034 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -792571,17 +791770,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -792592,13 +791791,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -792629,7 +791828,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -792644,7 +791843,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -792655,32 +791854,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTA4_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26624 + LdsNumBytes: 45056 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 + LdsOffsetA_Blk: 65536 LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26624 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -792689,8 +791888,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -792701,14 +791900,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -792722,21 +791921,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -792822,26 +792021,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3038 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3035 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -792852,7 +792051,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -792863,16 +792062,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -792900,11 +792099,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -792915,45 +792114,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -792961,22 +792160,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -792984,19 +792183,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -793082,26 +792281,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3039 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 3036 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -793112,13 +792311,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -793128,7 +792327,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -793149,7 +792348,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -793160,7 +792359,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -793175,68 +792374,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SPO1_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -793249,14 +792448,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -793342,26 +792541,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3040 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3037 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -793378,21 +792577,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -793424,7 +792623,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -793435,7 +792634,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SPO0_SVW4_VWA4_WG16_4_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA0_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -793444,23 +792643,23 @@ LVCB: 32 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -793481,14 +792680,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -793504,19 +792703,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -793602,8 +792801,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3041 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 3038 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA0_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -793611,17 +792810,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 16 SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -793632,7 +792831,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -793669,7 +792868,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -793695,32 +792894,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA0_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 34304 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -793729,8 +792928,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] @@ -793741,14 +792940,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [2, 2] + MIWaveTile: [2, 1] MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 64 + MacroTile1: 32 MacroTileA: 64 - MacroTileB: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -793769,13 +792968,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 16 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -793862,8 +793061,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3042 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x64x128_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA8_LPB8_LRVW8_MIWT2_2_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 3039 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA0_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -793879,9 +793078,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 2 + ThreadTile1: 1 ThreadTileA: 32 - ThreadTileB: 2 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -793903,10 +793102,10 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -793929,7 +793128,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -793940,11 +793139,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -793955,44 +793154,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_PLR1_SS1_SPO0_SVW4_VWA4_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 82432 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 44544 - LdsOffsetMetadata_Blk: 82432 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -794000,15 +793199,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 96 - MacroTileA: 64 - MacroTileB: 96 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -794028,15 +793227,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -794122,26 +793321,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3043 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_8_2_WGM1 + SolutionIndex: 3040 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 SubGroup1: 32 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -794152,27 +793351,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -794189,7 +793388,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -794200,11 +793399,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -794215,44 +793414,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_PLR1_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_NTC4_NTD4_NEPBS16_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 57216 + LdsNumElementsAlignedA: 29568 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 29568 + LdsOffsetB_Blk: 95104 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57216 + LdsOffsetMetadata_Blk: 95104 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -794260,15 +793459,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [1, 4] + MIWaveTile: [14, 3] + MIWaveTileA: 14 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 224 + MacroTile1: 192 + MacroTileA: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -794284,18 +793483,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 28 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 28 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -794382,25 +793581,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3044 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3041 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 56 ThreadTile1: 3 - ThreadTileA: 16 + ThreadTileA: 56 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -794412,27 +793611,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -794461,10 +793660,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -794475,36 +793674,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -794521,14 +793720,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -794544,19 +793743,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 16 - NumLoadsB: 7 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -794642,26 +793841,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3045 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3042 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -794672,7 +793871,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -794688,7 +793887,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -794709,7 +793908,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -794735,32 +793934,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT4_4_NTC4_NTD4_NEPBS16_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -794769,8 +793968,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -794780,15 +793979,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 256 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -794804,19 +794003,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -794902,26 +794101,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3046 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM4 + SolutionIndex: 3043 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT4_4_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 4 + ThreadTileA: 64 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -794938,21 +794137,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 4 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -794969,7 +794168,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -794995,37 +794194,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -795040,15 +794239,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -795062,15 +794261,15 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -795162,26 +794361,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3047 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 3044 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 + SubGroup0: 4 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 2 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -795198,15 +794397,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -795229,7 +794428,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -795255,42 +794454,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTC0_NTD0_SPO0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SPO0_SVW1_VWA1_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -795300,15 +794499,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 96 - MacroTileA: 96 - MacroTileB: 96 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -795322,21 +794521,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 0 NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 36 - NumGlobalWriteVectorsPerThread: 36 - NumLoadsA: 6 - NumLoadsB: 6 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -795422,8 +794621,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3048 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_3_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3045 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -795432,16 +794631,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 3 - ThreadTileA: 12 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -795458,15 +794657,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -795489,7 +794688,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -795500,8 +794699,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 @@ -795515,88 +794714,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_7_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 28 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -795682,26 +794881,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3049 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT6_7_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3046 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 + SubGroup0: 2 SubGroup1: 32 - SubGroupA: 8 + SubGroupA: 2 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -795718,21 +794917,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 2, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -795749,7 +794948,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -795775,37 +794974,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA4_SVW2_VWA2_WG16_8_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -795820,15 +795019,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [1, 2] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -795842,21 +795041,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -795942,26 +795141,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3050 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3047 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_8_2_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -795978,15 +795177,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [16, 8, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -796024,7 +795223,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -796035,7 +795234,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_3_NTA4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -796044,23 +795243,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 48128 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 15360 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 48128 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -796081,14 +795280,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 4] - MIWaveTileA: 6 - MIWaveTileB: 4 + MIWaveTile: [7, 3] + MIWaveTileA: 7 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 96 + MacroTileA: 224 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -796102,21 +795301,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerThread: 84 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 7 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -796202,26 +795401,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3051 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT6_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3048 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_3_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 4 - ThreadTileA: 24 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 3 + ThreadTileA: 28 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -796232,7 +795431,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -796252,7 +795451,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -796280,7 +795479,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -796295,12 +795494,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_PLR1_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -796308,32 +795507,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -796341,42 +795540,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveTile: [7, 4] + MIWaveTileA: 7 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 28 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -796462,25 +795661,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3052 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_PLR1_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3049 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 28 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 28 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -796498,7 +795697,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -796512,7 +795711,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -796540,7 +795739,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -796555,12 +795754,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_CLR1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_PLR1_SS1_SPO0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -796568,32 +795767,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 38912 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 38912 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -796601,22 +795800,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 128 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -796624,18 +795823,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -796722,26 +795921,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3053 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_CLR1_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3050 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -796758,7 +795957,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -796768,11 +795967,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -796798,7 +795997,6 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 - ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 @@ -796815,7 +796013,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_3_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -796828,19 +796026,19 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 83968 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -796852,7 +796050,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -796860,15 +796058,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -796884,19 +796082,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 4 - NumLoadsB: 7 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -796905,7 +796103,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: true + PreloadKernArgs: 1 ProblemType: Activation: true ActivationComputeDataType: 0 @@ -796982,26 +796180,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3054 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3051 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -797018,8 +796216,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -797060,11 +796258,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -797075,45 +796273,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTA4_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -797121,42 +796319,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 7] - MIWaveTileA: 4 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 224 - MacroTileA: 128 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 16 - NumLoadsB: 7 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -797242,26 +796440,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3055 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT4_7_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3052 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTA4_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 7 - ThreadTileA: 16 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -797272,13 +796470,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -797292,7 +796490,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -797324,7 +796522,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -797335,7 +796533,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -797344,23 +796542,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -797381,14 +796579,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -797404,19 +796602,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -797502,26 +796700,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3056 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM4 + SolutionIndex: 3053 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 2 - ThreadTileA: 48 - ThreadTileB: 2 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -797532,14 +796730,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 4 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -797569,7 +796767,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -797580,11 +796778,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -797595,68 +796793,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SVW2_VWA2_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 29312 - LdsNumElementsAlignedA: 10880 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 10880 - LdsOffsetB_Blk: 43648 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 29312 - LdsOffsetMetadata_Blk: 43648 - LdsPadA: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -797664,19 +796862,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 10 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 10 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -797762,26 +796960,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3057 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 3054 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -797792,27 +796990,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -797829,7 +797027,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -797844,7 +797042,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -797855,88 +797053,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTA4_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC3_NTD3_SS1_SPO0_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 45056 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 41984 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 45056 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 41984 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 192 - MacroTileA: 128 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 16 + MacroTileA: 64 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 96 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 4 - NumLoadsB: 6 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -798022,26 +797220,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3058 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x192x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_3_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3055 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 3 - ThreadTileA: 32 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -798052,27 +797250,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -798089,7 +797287,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -798104,7 +797302,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -798115,68 +797313,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SPO1_SVW1_VWA1_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -798189,14 +797387,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -798282,26 +797480,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3059 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3056 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -798312,27 +797510,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -798349,7 +797547,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -798360,7 +797558,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -798375,68 +797573,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 16 + MacroTileA: 64 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -798449,14 +797647,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -798542,26 +797740,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3060 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3057 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -798578,21 +797776,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -798624,7 +797822,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -798635,7 +797833,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA0_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SPO1_SVW1_VWA1_WG16_4_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -798644,23 +797842,23 @@ LVCB: 32 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 17408 LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -798704,13 +797902,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 + NumGlobalWriteVectorsPerThread: 2 NumLoadsA: 4 NumLoadsB: 2 NumLoadsCoalescedA: 1 @@ -798802,16 +798000,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3061 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA0_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3058 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 16 SubGroupA: 4 @@ -798832,7 +798030,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -798884,7 +798082,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -798895,7 +798093,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA0_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC0_NTD0_SS1_SPO0_SVW4_VWA4_WG16_4_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -798904,13 +798102,13 @@ LVCB: 32 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 2048 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 + LdsNumBytes: 41984 LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -798919,21 +798117,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 + LdsOffsetMetadata: 41984 LdsOffsetMetadata_Blk: 98816 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -798941,22 +798139,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 + MIWaveTile: [4, 1] + MIWaveTileA: 4 MIWaveTileB: 1 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 32 + MacroTile1: 16 MacroTileA: 64 - MacroTileB: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -798969,14 +798167,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 1 NumLoadsA: 8 - NumLoadsB: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -799062,8 +798260,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3062 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA0_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 3059 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -799071,16 +798269,16 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 16 ThreadTile1: 1 - ThreadTileA: 32 + ThreadTileA: 16 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -799092,13 +798290,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -799140,7 +798338,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -799155,32 +798353,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_NEPBS16_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SPO0_SVW1_VWA1_WG16_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 - LVCA: 32 + LSPB: 8 + LVCA: 8 LVCB: 8 - LVPA: 4 - LVPB: 4 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 5120 + LdsNumElementsAlignedA: 2560 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 2560 + LdsOffsetB_Blk: 10752 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 5120 + LdsOffsetMetadata_Blk: 10752 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -799192,7 +798390,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -799200,15 +798398,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -799224,20 +798422,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 - NumThreads: 256 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 64 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -799322,26 +798520,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3063 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3060 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG16_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -799358,7 +798556,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -799372,7 +798570,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -799389,7 +798587,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -799400,11 +798598,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -799415,44 +798613,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_NTC4_NTD4_NEPBS16_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SPO0_SVW1_VWA1_WG32_4_1 + LSCA: 128 + LSCB: 128 LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57216 - LdsNumElementsAlignedA: 29568 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 13824 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 29568 - LdsOffsetB_Blk: 95104 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57216 - LdsOffsetMetadata_Blk: 95104 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 13824 + LdsOffsetMetadata_Blk: 25600 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -799460,15 +798658,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [14, 3] - MIWaveTileA: 14 - MIWaveTileB: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 192 - MacroTileA: 224 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -799484,20 +798682,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 28 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 6 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -799582,26 +798780,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3064 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x192x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA4_LPB8_LRVW4_MIAV0_MIWT14_3_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 3061 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 56 - ThreadTile1: 3 - ThreadTileA: 56 - ThreadTileB: 3 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -799612,27 +798810,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -799649,7 +798847,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -799660,8 +798858,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 @@ -799675,44 +798873,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SPO1_SVW1_VWA1_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -799720,15 +798918,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 16 + MacroTileA: 64 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -799744,19 +798942,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -799842,26 +799040,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3065 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3062 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -799878,21 +799076,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -799909,7 +799107,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -799921,10 +799119,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -799935,34 +799133,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT4_4_NTC4_NTD4_NEPBS16_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x64_MI16x16x1_SN_GRVWB4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SPO1_SVW1_VWA1_WG32_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 16 + LSPB: 8 + LVCA: 8 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 7680 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 2560 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 13312 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 7680 + LdsOffsetMetadata_Blk: 13312 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -799970,33 +799168,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 32 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -800004,20 +799202,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -800102,26 +799300,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3066 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT4_4_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 3063 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x64_MI16x16x1_SN_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG32_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -800132,27 +799330,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -800169,7 +799367,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -800184,7 +799382,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -800195,42 +799393,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS0_SPO0_SVW4_VWA1_WG32_4_1 + LSCA: 128 + LSCB: 128 LSPA: 8 LSPB: 8 - LVCA: 32 - LVCB: 32 + LVCA: 16 + LVCB: 16 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 13824 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 13824 + LdsOffsetMetadata_Blk: 25600 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -800240,15 +799438,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -800262,22 +799460,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -800362,9 +799560,9 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3067 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 - SourceSwap: 1 + SolutionIndex: 3064 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS0_SU0_SUM0_SUS0_SPO0_SVW4_VWA1_WG32_4_1_WGM1 + SourceSwap: 0 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 @@ -800372,16 +799570,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -800392,21 +799590,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -800444,7 +799642,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -800455,7 +799653,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SPO0_SVW1_VWA1_WG16_4_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTA0_NTC3_NTD3_SS1_SPO1_SVW2_VWA2_WG16_4_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -800464,23 +799662,23 @@ LVCB: 32 LVPA: 1 LVPB: 1 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 17408 + LdsNumBytes: 42496 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 42496 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -800501,13 +799699,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 + MIWaveTile: [4, 1] + MIWaveTileA: 4 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 32 + MacroTile0: 64 MacroTile1: 16 - MacroTileA: 32 + MacroTileA: 64 MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 @@ -800522,20 +799720,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 + NumElementsPerThread: 4 NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 + NumLoadsA: 8 NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 @@ -800622,25 +799820,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3068 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG16_4_4_WGM1 + SolutionIndex: 3065 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTA0_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 16 SubGroupA: 4 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 16 ThreadTile1: 1 - ThreadTileA: 8 + ThreadTileA: 16 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -800652,7 +799850,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -800715,7 +799913,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SPO0_SVW2_VWA2_WG16_4_4 LSCA: 256 LSCB: 256 LSPA: 8 @@ -800728,32 +799926,32 @@ LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -800765,18 +799963,18 @@ MIWaveTileA: 2 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -800789,14 +799987,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -800882,8 +800080,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3069 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 3066 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -800892,15 +800090,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 8 ThreadTile1: 1 - ThreadTileA: 32 + ThreadTileA: 8 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true @@ -800918,7 +800116,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -800949,7 +800147,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -800975,37 +800173,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA4_SVW2_VWA2_WG16_8_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -801020,15 +800218,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 2] - MIWaveTile: [8, 2] - MIWaveTileA: 8 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -801042,15 +800240,15 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -801142,25 +800340,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3070 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_8_2_WGM1 + SolutionIndex: 3067 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 16 ThreadTile1: 2 - ThreadTileA: 32 + ThreadTileA: 16 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -801178,15 +800376,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 8, 2] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -801209,7 +800407,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -801224,7 +800422,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -801235,44 +800433,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_3_NTA4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC0_NTD0_NLCA1_SS1_SPO1_SVW4_VWA4_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 2048 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 15360 + LdsNumBytes: 50688 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 50688 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -801280,15 +800478,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 3] - MIWaveTileA: 7 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 96 - MacroTileA: 224 - MacroTileB: 96 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -801304,19 +800502,19 @@ NonTemporal: -1 NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 84 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 7 - NumLoadsB: 3 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -801402,26 +800600,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3071 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x96x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_3_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3068 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 3 - ThreadTileA: 28 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -801432,27 +800630,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -801469,7 +800667,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -801480,11 +800678,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -801495,44 +800693,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SPO1_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -801540,15 +800738,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [1, 1] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -801569,13 +800767,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 28 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -801662,26 +800860,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3072 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTA4_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3069 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -801692,21 +800890,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -801729,7 +800927,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -801740,11 +800938,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -801755,68 +800953,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -801824,19 +801022,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -801922,26 +801120,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3073 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3070 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -801952,27 +801150,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -801989,7 +801187,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -801998,12 +801196,13 @@ EnableF32XdlMathOp: false EnableMatrixInstruction: true ExpandPointerSwap: 0 + ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -802014,44 +801213,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_3_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: false + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -802059,15 +801258,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -802083,19 +801282,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 5 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 5 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -802104,7 +801303,7 @@ PackedC1IndicesX: [1] PrefetchGlobalRead: 2 PrefetchLocalRead: 1 - PreloadKernArgs: 1 + PreloadKernArgs: true ProblemType: Activation: true ActivationComputeDataType: 0 @@ -802181,25 +801380,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3074 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_3_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM8 + SolutionIndex: 3071 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GSU5_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: false + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 40 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -802211,21 +801410,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + WorkspaceCheck: [4, 0, 5] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -802248,7 +801447,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -802259,11 +801458,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -802274,88 +801473,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTA4_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA2_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 16 + LVCA: 64 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -802441,25 +801640,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3075 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTA4_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3072 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 16 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 16 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -802471,27 +801670,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -802508,7 +801707,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -802534,22 +801733,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_PLR1_SS1_SPO0_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 + LdsNumBytes: 52224 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -802558,10 +801757,10 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 + LdsOffsetMetadata: 52224 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -802569,10 +801768,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -802580,22 +801779,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -802603,19 +801802,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -802701,26 +801900,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3076 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3073 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -802737,21 +801936,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -802768,7 +801967,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -802783,7 +801982,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -802794,88 +801993,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA4_SVW2_VWA2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -802961,8 +802160,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3077 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 3074 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -802970,16 +802169,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 8 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 8 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -802991,27 +802190,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -803028,7 +802227,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -803043,7 +802242,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -803054,37 +802253,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC3_NTD3_SS1_SPO0_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA0_SVW2_VWA2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 50176 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -803099,15 +802298,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 64 - MacroTile1: 16 + MacroTile1: 48 MacroTileA: 64 - MacroTileB: 16 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -803128,14 +802327,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -803221,26 +802420,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3078 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 3075 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -803251,21 +802450,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -803288,7 +802487,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -803303,7 +802502,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -803314,37 +802513,37 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SPO1_SVW1_VWA1_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false @@ -803359,15 +802558,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -803381,21 +802580,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -803481,26 +802680,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3079 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG16_4_4_WGM1 + SolutionIndex: 3076 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 4 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -803511,21 +802710,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 4, 2] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -803548,7 +802747,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -803563,7 +802762,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -803574,22 +802773,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC3_NTD3_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC0_NTD0_PLR1_SS1_SPO0_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42496 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -803598,18 +802797,18 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42496 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] @@ -803619,15 +802818,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 1] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 16 - MacroTileA: 64 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -803643,19 +802842,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 2 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -803741,8 +802940,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3080 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3077 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC0_NTD0_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -803750,17 +802949,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 1 + ThreadTile1: 3 ThreadTileA: 16 - ThreadTileB: 1 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -803771,21 +802970,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -803808,7 +803007,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -803821,7 +803020,7 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 GroupLoadStore: false @@ -803834,44 +803033,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SPO1_SVW1_VWA1_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC3_NTD3_PLR1_SS1_SPO0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 50176 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -803879,15 +803078,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -803903,19 +803102,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -804001,26 +803200,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3081 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG16_4_4_WGM1 + SolutionIndex: 3078 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 1 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -804037,15 +803236,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -804068,7 +803267,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -804081,9 +803280,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -804094,44 +803293,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC0_NTD0_SS1_SPO0_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC0_NTD0_PLR1_SS1_SPO0_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 41984 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 56320 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 41984 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 56320 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -804139,15 +803338,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [7, 4] + MIWaveTileA: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 16 - MacroTileA: 64 - MacroTileB: 16 + MacroTile0: 224 + MacroTile1: 128 + MacroTileA: 224 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -804168,14 +803367,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 7 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -804261,8 +803460,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3082 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 3079 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC0_NTD0_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -804270,17 +803469,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 28 + ThreadTile1: 4 + ThreadTileA: 28 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -804291,21 +803490,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -804343,7 +803542,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -804354,68 +803553,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_GRVWB8_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SPO0_SVW1_VWA1_WG16_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_PLR1_SS1_SPO0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 + LSPA: 32 + LSPB: 32 LVCA: 8 LVCB: 8 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 128 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 5120 - LdsNumElementsAlignedA: 2560 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 35840 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 8192 - LdsOffsetB: 2560 - LdsOffsetB_Blk: 10752 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 5120 - LdsOffsetMetadata_Blk: 10752 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 35840 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 16 - MacroTile1: 16 - MacroTileA: 16 - MacroTileB: 16 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -804423,20 +803622,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 2 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 - NumThreads: 64 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -804521,8 +803720,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3083 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG16_4_1_WGM1 + SolutionIndex: 3080 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -804530,17 +803729,17 @@ StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -804551,13 +803750,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -804588,7 +803787,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -804614,34 +803813,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SPO0_SVW1_VWA1_WG32_4_1 - LSCA: 128 - LSCB: 128 - LSPA: 8 - LSPB: 8 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTA4_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 13824 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 25600 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 13824 - LdsOffsetMetadata_Blk: 25600 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -804649,54 +803848,54 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -804781,26 +803980,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3084 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_4_1_WGM1 + SolutionIndex: 3081 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 48 + ThreadTile1: 2 + ThreadTileA: 48 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -804817,21 +804016,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -804848,7 +804047,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -804859,11 +804058,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -804874,44 +804073,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SPO1_SVW1_VWA1_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA4_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 23040 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 57344 + LdsNumElementsAlignedA: 36864 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 51200 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 36864 + LdsOffsetB_Blk: 102400 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 23040 - LdsOffsetMetadata_Blk: 51200 + LdsOffsetMetadata: 57344 + LdsOffsetMetadata_Blk: 102400 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -804919,15 +804118,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 16 - MacroTileA: 64 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -804941,21 +804140,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 1 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 1 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -805041,26 +804240,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3085 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG32_4_2_WGM1 + SolutionIndex: 3082 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -805071,23 +804270,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -805119,11 +804318,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 4 - GlobalSplitU: 1 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -805134,32 +804333,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x64_MI16x16x1_SN_GRVWB4_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SPO1_SVW1_VWA1_WG32_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_PLR1_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 16 - LSPB: 8 - LVCA: 8 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 128 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 7680 - LdsNumElementsAlignedA: 5120 - LdsNumElementsAlignedB: 2560 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 36864 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 8192 - LdsOffsetB: 5120 - LdsOffsetB_Blk: 13312 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 36864 + LdsOffsetB_Blk: 102400 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 7680 - LdsOffsetMetadata_Blk: 13312 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 102400 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -805171,7 +804370,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -805179,15 +804378,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -805203,20 +804402,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 2 - NumLoadsB: 2 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 2 - NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -805301,8 +804500,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3086 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x64_MI16x16x1_SN_GRVWB4_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG32_4_1_WGM1 + SolutionIndex: 3083 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_CLR1_GRVWA2_GSU5_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -805310,17 +804509,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -805331,23 +804530,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 5] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -805368,7 +804567,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -805379,11 +804578,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -805394,34 +804593,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_GRVWB8_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS0_SPO0_SVW4_VWA1_WG32_4_1 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 - LVCA: 16 - LVCB: 16 - LVPA: 1 - LVPB: 1 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 13824 - LdsNumElementsAlignedA: 9216 - LdsNumElementsAlignedB: 4608 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 16384 - LdsOffsetB: 9216 - LdsOffsetB_Blk: 25600 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 13824 - LdsOffsetMetadata_Blk: 25600 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -805429,33 +804628,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -805463,20 +804662,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 - NumThreads: 128 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 + NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -805561,26 +804760,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3087 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SS0_SU0_SUM0_SUS0_SPO0_SVW4_VWA1_WG32_4_1_WGM1 - SourceSwap: 0 + SolutionIndex: 3084 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA2_GSU5_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -805591,23 +804790,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -805628,7 +804827,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -805639,11 +804838,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 5 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -805654,44 +804853,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTA0_NTC3_NTD3_SS1_SPO1_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_PLR1_SVW4_VWA4_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 42496 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 42496 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -805699,15 +804898,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 1] - MIWaveTileA: 4 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 16 - MacroTileA: 64 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -805728,14 +804927,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 - NumLoadsB: 2 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -805821,8 +805020,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3088 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_1_NTA0_NTC3_NTD3_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3085 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_CLR1_GRVWA2_GSU5_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -805830,17 +805029,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 1 - ThreadTileA: 16 - ThreadTileB: 1 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -805851,23 +805050,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 5] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -805888,7 +805087,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -805899,11 +805098,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -805914,44 +805113,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_PLR1_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -805959,15 +805158,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -805981,21 +805180,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -806081,26 +805280,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3089 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC0_NTD0_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3086 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_CLR1_GRVWA2_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 16 - SubGroupA: 4 - SubGroupB: 16 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -806111,21 +805310,21 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -806148,7 +805347,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -806159,9 +805358,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 3 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 GroupLoadStore: false @@ -806174,44 +805373,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SS1_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_PLR1_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -806219,15 +805418,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -806248,14 +805447,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -806341,26 +805540,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3090 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3087 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWA2_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -806377,15 +805576,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + WorkspaceCheck: [4, 0, 3] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -806408,7 +805607,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -806423,7 +805622,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -806434,88 +805633,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC0_NTD0_NLCA1_SS1_SPO1_SVW4_VWA4_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 2048 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50688 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50688 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -806601,26 +805800,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3091 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA2048_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW4_VWA4_WG16_4_4_WGM1 + SolutionIndex: 3088 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -806631,27 +805830,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -806668,7 +805867,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -806679,7 +805878,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -806694,44 +805893,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SPO1_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 51200 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 17408 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 51200 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -806739,15 +805938,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -806761,21 +805960,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -806861,26 +806060,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3092 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_2_NTA4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3089 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -806897,21 +806096,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -806928,7 +806127,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -806939,11 +806138,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -806954,44 +806153,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_SVW2_VWA2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 57344 + LdsNumElementsAlignedA: 36864 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 36864 + LdsOffsetB_Blk: 102400 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 57344 + LdsOffsetMetadata_Blk: 102400 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -806999,15 +806198,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -807023,19 +806222,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -807121,26 +806320,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3093 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC0_NTD0_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 3090 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -807151,27 +806350,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -807188,7 +806387,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -807199,9 +806398,9 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 GroupLoadStore: false @@ -807214,22 +806413,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 + LdsNumBytes: 52224 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -807238,44 +806437,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 + LdsOffsetMetadata: 52224 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -807288,14 +806487,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -807381,26 +806580,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3094 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GSU5_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 3091 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -807417,21 +806616,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -807448,7 +806647,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -807463,7 +806662,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -807474,44 +806673,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA2_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SPO0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 4 - LSPB: 16 - LVCA: 64 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -807519,15 +806718,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -807548,14 +806747,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -807641,26 +806840,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3095 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_4_NTC3_NTD3_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 3092 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 4 - ThreadTileA: 16 - ThreadTileB: 4 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -807671,27 +806870,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -807708,7 +806907,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -807719,11 +806918,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -807734,34 +806933,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_PLR1_SS1_SPO0_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -807769,33 +806968,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -807808,14 +807007,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -807901,26 +807100,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3096 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_CLR1_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_NTC3_NTD3_NLCA1_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3093 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -807931,27 +807130,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -807968,7 +807167,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -807979,7 +807178,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -807994,44 +807193,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA4_SVW2_VWA2_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SVW2_VWA2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 57984 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57984 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -808039,15 +807238,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -808061,21 +807260,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -808161,26 +807360,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3097 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 3094 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -808197,21 +807396,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -808228,7 +807427,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -808239,7 +807438,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -808254,68 +807453,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA0_SVW2_VWA2_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] MIWaveTileA: 2 - MIWaveTileB: 3 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -808328,14 +807527,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -808421,26 +807620,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3098 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 3095 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 16 + SubGroup1: 32 SubGroupA: 8 - SubGroupB: 16 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 3 - ThreadTileA: 8 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -808457,17 +807656,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -808488,7 +807687,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -808514,22 +807713,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -808538,64 +807737,64 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] + MIWaveGroup: [2, 2] MIWaveTile: [4, 3] MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 3 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -808681,8 +807880,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3099 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 3096 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM4 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -808691,15 +807890,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 16 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -808717,21 +807916,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -808748,7 +807947,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -808759,11 +807958,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -808774,32 +807973,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC0_NTD0_PLR1_SS1_SPO0_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_SVW1_VWA1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedA: 35840 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 35840 + LdsOffsetB_Blk: 101376 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata_Blk: 101376 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -808808,10 +808007,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -808820,14 +808019,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [7, 5] + MIWaveTileA: 7 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 96 - MacroTileA: 128 - MacroTileB: 96 + MacroTile0: 224 + MacroTile1: 160 + MacroTileA: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -808843,19 +808042,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 48 - NumGlobalWriteVectorsPerThread: 12 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 28 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -808941,26 +808140,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3100 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_CLR1_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_3_NTC0_NTD0_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3097 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM4 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 5 + ThreadTileA: 28 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -808971,27 +808170,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -809019,11 +808218,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -809034,68 +808233,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC3_NTD3_PLR1_SS1_SPO0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 128 - MacroTileA: 224 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -809108,14 +808307,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -809201,26 +808400,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3101 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3098 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -809231,27 +808430,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -809281,9 +808480,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -809294,7 +808493,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC0_NTD0_PLR1_SS1_SPO0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -809303,36 +808502,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 56320 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 56320 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -809340,22 +808539,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 4] - MIWaveTileA: 7 - MIWaveTileB: 4 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 256 MacroTile1: 128 - MacroTileA: 224 + MacroTileA: 256 MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -809363,18 +808562,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 112 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 7 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 7 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -809461,26 +808660,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3102 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x128x64_MI16x16x1_SN_CLR1_GSU2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_4_NTC0_NTD0_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3099 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 4 - ThreadTileA: 28 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -809491,17 +808690,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 2] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -809511,7 +808710,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -809543,7 +808742,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -809554,7 +808753,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_PLR1_SS1_SPO0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -809563,23 +808762,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -809591,7 +808790,7 @@ LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -809600,14 +808799,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 2] - MIWaveTileA: 2 - MIWaveTileB: 2 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -809628,14 +808827,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -809721,26 +808920,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3103 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI32x32x1_SN_CLR1_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV1_MIWT2_2_NTC3_NTD3_PLR1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3100 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM4 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 2 - ThreadTileA: 32 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -809751,14 +808950,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -809771,7 +808970,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -809803,7 +809002,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -809814,7 +809013,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTA4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -809823,23 +809022,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -809860,14 +809059,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 128 - MacroTileA: 192 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -809881,21 +809080,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 96 + NumElementsPerThread: 192 NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 6 - NumLoadsB: 4 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -809981,8 +809180,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3104 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x128x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_2_NTA4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3101 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -809990,17 +809189,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 2 - ThreadTileA: 48 - ThreadTileB: 2 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -810011,7 +809210,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -810059,11 +809258,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -810074,45 +809273,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57344 - LdsNumElementsAlignedA: 36864 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 36864 - LdsOffsetB_Blk: 102400 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57344 - LdsOffsetMetadata_Blk: 102400 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -810120,42 +809319,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 + MIWaveTile: [3, 4] + MIWaveTileA: 3 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -810241,25 +809440,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3105 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_NTA4_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3102 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 48 ThreadTile1: 4 - ThreadTileA: 32 + ThreadTileA: 48 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -810271,13 +809470,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -810287,7 +809486,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -810320,10 +809519,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -810334,36 +809533,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_PLR1_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 36864 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 36864 - LdsOffsetB_Blk: 102400 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 102400 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -810380,14 +809579,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -810408,14 +809607,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -810501,26 +809700,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3106 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_CLR1_GRVWA2_GSU5_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3103 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -810531,7 +809730,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -810541,7 +809740,7 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -810551,7 +809750,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -810580,10 +809779,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -810594,45 +809793,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -810640,22 +809839,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -810668,14 +809867,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -810761,8 +809960,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3107 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA2_GSU5_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3104 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -810770,17 +809969,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -810791,17 +809990,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -810841,9 +810040,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 5 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -810854,7 +810053,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_PLR1_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -810863,13 +810062,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -810878,21 +810077,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -810900,9 +810099,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 192 @@ -810912,10 +810111,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -810929,7 +810128,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 32 NumLoadsB: 6 NumLoadsCoalescedA: 1 @@ -811021,26 +810220,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3108 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_CLR1_GRVWA2_GSU5_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_PLR1_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3105 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -811051,17 +810250,17 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 5] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -811071,7 +810270,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -811101,9 +810300,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -811114,7 +810313,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_PLR1_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -811123,23 +810322,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -811160,14 +810359,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -811188,14 +810387,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -811281,8 +810480,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3109 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_CLR1_GRVWA2_GSU3_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_PLR1_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3106 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -811290,17 +810489,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -811311,7 +810510,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -811321,13 +810520,13 @@ WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -811361,9 +810560,9 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 - GlobalSplitU: 3 + GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -811374,7 +810573,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_PLR1_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -811383,23 +810582,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -811419,15 +810618,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -811448,14 +810647,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -811541,26 +810740,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3110 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_CLR1_GRVWA2_GSU3_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 3107 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -811571,27 +810770,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 3] + WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -811619,11 +810818,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -811634,32 +810833,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -811680,14 +810879,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -811709,13 +810908,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -811801,26 +811000,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3111 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3108 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -811831,7 +811030,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -811847,11 +811046,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -811883,7 +811082,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -811894,7 +811093,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -811903,23 +811102,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -811939,14 +811138,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 - MIWaveTileB: 3 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 160 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -811968,13 +811167,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 32 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -812061,8 +811260,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3112 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 3109 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -812070,17 +811269,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 3 - ThreadTileA: 40 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -812091,13 +811290,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -812107,7 +811306,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -812140,10 +811339,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -812154,36 +811353,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57344 - LdsNumElementsAlignedA: 36864 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 36864 - LdsOffsetB_Blk: 102400 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57344 - LdsOffsetMetadata_Blk: 102400 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -812200,14 +811399,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -812228,14 +811427,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -812321,8 +811520,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3113 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3110 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -812330,17 +811529,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 4 - ThreadTileA: 32 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -812351,7 +811550,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -812399,11 +811598,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -812414,32 +811613,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -812460,14 +811659,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -812488,14 +811687,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -812581,16 +811780,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3114 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3111 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -812598,9 +811797,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 64 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 64 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -812611,14 +811810,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -812627,7 +811826,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -812660,10 +811859,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -812674,36 +811873,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -812720,13 +811919,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 + MIWaveTile: [8, 7] + MIWaveTileA: 8 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 160 + MacroTile0: 256 MacroTile1: 224 - MacroTileA: 160 + MacroTileA: 256 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -812748,14 +811947,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -812841,25 +812040,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3115 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3112 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 + ThreadTile0: 32 ThreadTile1: 7 - ThreadTileA: 20 + ThreadTileA: 32 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -812871,7 +812070,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -812887,7 +812086,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -812934,7 +812133,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -812947,55 +812146,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -813008,14 +812207,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -813101,15 +812300,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3116 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3113 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -813117,10 +812316,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -813137,8 +812336,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -813147,7 +812346,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -813179,7 +812378,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -813194,12 +812393,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -813207,55 +812406,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57984 - LdsNumElementsAlignedA: 21120 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 21120 - LdsOffsetB_Blk: 86656 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57984 - LdsOffsetMetadata_Blk: 86656 - LdsPadA: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -813270,12 +812469,12 @@ NumElementsPerBatchStore: 0 NumElementsPerThread: 160 NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 8 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -813361,26 +812560,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3117 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA4_LPB8_LRVW4_MIAV0_MIWT10_4_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 3114 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -813397,7 +812596,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -813439,7 +812638,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -813454,12 +812653,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -813467,9 +812666,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -813478,7 +812677,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 @@ -813499,15 +812698,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -813528,14 +812727,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -813621,26 +812820,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3118 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3115 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -813657,7 +812856,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -813667,11 +812866,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -813714,7 +812913,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -813881,8 +813080,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3119 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM4 + SolutionIndex: 3116 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -813918,7 +813117,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 4 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -813959,11 +813158,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -813974,45 +813173,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 61440 - LdsNumElementsAlignedA: 35840 - LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 35840 - LdsOffsetB_Blk: 101376 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 101376 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -814020,22 +813219,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 5] - MIWaveTileA: 7 - MIWaveTileB: 5 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 160 - MacroTileA: 224 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -814048,14 +813247,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 28 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -814141,8 +813340,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3120 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA128_LPA16_LPB16_LRVW8_MIAV0_MIWT7_5_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM4 + SolutionIndex: 3117 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -814150,17 +813349,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 5 - ThreadTileA: 28 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -814171,14 +813370,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 4 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -814219,11 +813418,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -814234,32 +813433,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -814279,15 +813478,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -814308,14 +813507,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -814401,8 +813600,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3121 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3118 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -814410,17 +813609,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -814431,13 +813630,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -814447,7 +813646,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -814483,7 +813682,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -814494,7 +813693,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -814503,23 +813702,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -814540,14 +813739,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -814568,14 +813767,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -814661,8 +813860,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3122 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3119 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -814670,17 +813869,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -814691,7 +813890,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -814739,8 +813938,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 @@ -814754,45 +813953,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -814800,22 +813999,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 224 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 224 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -814828,14 +814027,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -814921,8 +814120,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3123 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM4 + SolutionIndex: 3120 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -814931,16 +814130,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -814957,8 +814156,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 4 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -814967,7 +814166,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -815003,7 +814202,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -815014,7 +814213,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -815023,23 +814222,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -815060,14 +814259,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -815089,13 +814288,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -815181,8 +814380,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3124 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3121 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -815190,17 +814389,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -815211,14 +814410,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -815263,7 +814462,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -815274,7 +814473,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -815283,23 +814482,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -815319,15 +814518,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -815348,14 +814547,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -815441,8 +814640,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3125 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU0_SUM0_SUS0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3122 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM4 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -815450,17 +814649,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -815471,14 +814670,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -815520,10 +814719,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -815534,45 +814733,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -815580,22 +814779,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -815608,14 +814807,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -815701,8 +814900,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3126 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3123 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -815710,17 +814909,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -815731,13 +814930,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -815780,7 +814979,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 @@ -815794,34 +814993,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT11_4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 60800 + LdsNumElementsAlignedA: 23936 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 23936 + LdsOffsetB_Blk: 89472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata: 60800 + LdsOffsetMetadata_Blk: 89472 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -815839,14 +815038,14 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [11, 4] + MIWaveTileA: 11 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 176 MacroTile1: 256 - MacroTileA: 224 + MacroTileA: 176 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -815868,14 +815067,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 176 + NumLoadsA: 22 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 22 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -815961,26 +815160,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3127 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SU0_SUM0_SUS0_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3124 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT11_4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 44 + ThreadTile1: 4 + ThreadTileA: 44 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -815997,7 +815196,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -816007,11 +815206,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -816040,10 +815239,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -816054,45 +815253,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -816100,22 +815299,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -816128,14 +815327,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -816221,8 +815420,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3128 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3125 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -816230,17 +815429,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -816251,13 +815450,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -816303,7 +815502,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -816314,7 +815513,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -816323,23 +815522,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 40960 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -816359,15 +815558,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -816388,14 +815587,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 20 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -816481,8 +815680,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3129 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3126 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 @@ -816490,17 +815689,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -816511,13 +815710,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -816527,7 +815726,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -816574,7 +815773,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -816587,9 +815786,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 60416 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -816598,7 +815797,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 + LdsOffsetMetadata: 60416 LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 @@ -816620,14 +815819,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] + MIWaveTile: [8, 5] MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -816648,14 +815847,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -816741,12 +815940,12 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3130 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3127 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 @@ -816758,9 +815957,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -816791,7 +815990,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -816823,7 +816022,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -816834,7 +816033,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -816843,23 +816042,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -816880,14 +816079,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -816909,13 +816108,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 32 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -817001,26 +816200,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3131 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3128 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -817031,14 +816230,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -817047,11 +816246,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -817083,7 +816282,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -817094,7 +816293,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -817103,13 +816302,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -817118,21 +816317,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -817140,9 +816339,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 192 @@ -817152,10 +816351,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -817169,7 +816368,7 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 32 NumLoadsB: 6 NumLoadsCoalescedA: 1 @@ -817261,26 +816460,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3132 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 3129 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -817291,13 +816490,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -817343,7 +816542,7 @@ GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -817354,7 +816553,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -817363,23 +816562,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -817400,14 +816599,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -817429,13 +816628,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -817521,26 +816720,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3133 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3130 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -817551,7 +816750,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -817599,11 +816798,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -817614,45 +816813,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -817660,22 +816859,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -817688,14 +816887,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -817781,26 +816980,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3134 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 3131 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -817811,14 +817010,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -817827,7 +817026,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -817860,10 +817059,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -817874,45 +817073,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -817920,22 +817119,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -817948,14 +817147,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -818041,26 +817240,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3135 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3132 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -818071,13 +817270,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -818087,7 +817286,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -818134,7 +817333,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -818147,32 +817346,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -818180,22 +817379,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -818208,14 +817407,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -818301,26 +817500,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3136 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIWT6_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 3133 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -818337,8 +817536,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -818347,7 +817546,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -818379,11 +817578,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -818394,68 +817593,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1_WGMXCC4 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -818463,19 +817662,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -818561,16 +817760,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3137 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3134 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM4_WGMXCC4 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -818578,9 +817777,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -818591,15 +817790,15 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 4 + WorkGroupMappingXCC: 4 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -818607,7 +817806,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -818639,11 +817838,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -818654,32 +817853,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB2_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -818729,13 +817928,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -818821,16 +818020,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3138 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3135 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -818851,7 +818050,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -818867,7 +818066,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -818899,11 +818098,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -818914,45 +818113,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -818960,22 +818159,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -818988,14 +818187,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -819081,26 +818280,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3139 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 3136 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -819111,14 +818310,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -819127,7 +818326,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -819159,11 +818358,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -819174,45 +818373,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTC3_NTD3_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -819220,22 +818419,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -819248,14 +818447,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -819341,26 +818540,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3140 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3137 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTC3_NTD3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -819371,13 +818570,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -819387,7 +818586,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -819419,11 +818618,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -819434,32 +818633,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -819480,14 +818679,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -819508,14 +818707,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -819601,16 +818800,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3141 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3138 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -819618,9 +818817,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 64 - ThreadTile1: 2 + ThreadTile1: 3 ThreadTileA: 64 - ThreadTileB: 2 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -819631,7 +818830,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -819647,7 +818846,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -819679,7 +818878,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -819694,12 +818893,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SSO4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -819770,11 +818969,11 @@ NumElementsPerBatchStore: 0 NumElementsPerThread: 192 NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 + NumLoadsA: 24 NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 @@ -819861,8 +819060,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3142 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3139 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -819940,10 +819139,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -819954,45 +819153,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -820000,22 +819199,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -820028,14 +819227,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -820121,8 +819320,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3143 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3140 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -820130,17 +819329,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -820151,13 +819350,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -820199,11 +819398,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -820214,45 +819413,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SSO4_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -820260,22 +819459,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -820289,13 +819488,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -820381,8 +819580,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3144 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 3141 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -820390,17 +819589,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -820411,13 +819610,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -820427,7 +819626,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -820459,7 +819658,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -820474,12 +819673,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO4_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -820487,9 +819686,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -820498,7 +819697,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 @@ -820519,15 +819718,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -820548,14 +819747,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -820641,26 +819840,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3145 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU0_SUM0_SUS0_SVW2_VWA2_WG128_2_1_WGM4 + SolutionIndex: 3142 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -820677,8 +819876,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 4 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -820687,11 +819886,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -820723,7 +819922,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -820734,7 +819933,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SSO4_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -820743,36 +819942,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -820780,22 +819979,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -820808,14 +820007,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 32 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -820901,26 +820100,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3146 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3143 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SSO4_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -820931,14 +820130,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -820983,7 +820182,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -820994,7 +820193,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT11_4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SSO4_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -821003,23 +820202,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60800 - LdsNumElementsAlignedA: 23936 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23936 - LdsOffsetB_Blk: 89472 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60800 - LdsOffsetMetadata_Blk: 89472 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 @@ -821039,15 +820238,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [11, 4] - MIWaveTileA: 11 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 176 - MacroTile1: 256 - MacroTileA: 176 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -821068,14 +820267,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 176 - NumLoadsA: 22 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 22 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -821161,26 +820360,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3147 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT11_4_SU8_SUM0_SUS256_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 3144 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SSO4_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 44 - ThreadTile1: 4 - ThreadTileA: 44 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -821191,14 +820390,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -821207,7 +820406,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -821228,7 +820427,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -821240,10 +820439,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -821254,42 +820453,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 26752 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 26752 + LdsOffsetMetadata_Blk: 41088 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -821299,15 +820498,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -821328,14 +820527,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -821421,8 +820620,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3148 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3145 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -821430,17 +820629,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 7 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 7 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -821451,27 +820650,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -821514,7 +820713,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_SVW2_VWA2_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -821527,55 +820726,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64000 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 40960 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64000 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 4] - MIWaveTileA: 10 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 256 - MacroTileA: 160 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -821588,14 +820787,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 20 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -821681,15 +820880,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3149 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT10_4_SU0_SUM0_SUS0_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 3146 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -821697,10 +820896,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 40 - ThreadTile1: 4 - ThreadTileA: 40 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -821717,8 +820916,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -821727,11 +820926,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -821760,7 +820959,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -821774,36 +820973,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60416 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60416 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -821820,14 +821019,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 5] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -821848,14 +821047,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 40 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 NumLoadsA: 32 - NumLoadsB: 5 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -821941,15 +821140,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3150 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT8_5_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3147 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 @@ -821958,9 +821157,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -821991,7 +821190,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -822201,8 +821400,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3151 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 3148 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -822238,7 +821437,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -822283,7 +821482,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -822294,7 +821493,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -822303,23 +821502,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -822340,14 +821539,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -822369,13 +821568,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -822461,8 +821660,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3152 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3149 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -822470,17 +821669,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -822491,14 +821690,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -822507,7 +821706,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -822540,7 +821739,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -822554,45 +821753,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -822600,22 +821799,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -822628,14 +821827,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 32 - NumLoadsB: 28 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -822721,8 +821920,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3153 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3150 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -822731,16 +821930,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -822757,7 +821956,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -822800,10 +821999,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -822814,45 +822013,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -822860,22 +822059,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -822888,14 +822087,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 32 - NumLoadsB: 28 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -822981,26 +822180,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3154 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3151 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -823011,13 +822210,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -823063,7 +822262,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -823074,7 +822273,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -823083,23 +822282,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -823120,14 +822319,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -823148,14 +822347,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -823241,26 +822440,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3155 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3152 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -823271,7 +822470,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -823287,7 +822486,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -823319,11 +822518,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -823334,32 +822533,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -823409,12 +822608,12 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 32 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -823501,8 +822700,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3156 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3153 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -823510,7 +822709,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -823531,7 +822730,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -823547,7 +822746,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -823583,7 +822782,7 @@ GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -823594,7 +822793,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SVW8_VWA8_WG32_8_1_WGMXCC4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_SSO4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -823603,23 +822802,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -823667,9 +822866,9 @@ NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 + NumElementsPerBatchStore: 0 NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 + NumGlobalWriteVectorsPerThread: 112 NumLoadsA: 32 NumLoadsB: 28 NumLoadsCoalescedA: 1 @@ -823761,16 +822960,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3157 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM4_WGMXCC4 + SolutionIndex: 3154 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -823791,15 +822990,15 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 4 - WorkGroupMappingXCC: 4 + WorkGroupMapping: 1 + WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -823840,7 +823039,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -823854,45 +823053,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB2_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SSO0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -823900,22 +823099,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -823928,14 +823127,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 NumLoadsA: 32 - NumLoadsB: 24 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -824021,8 +823220,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3158 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB2_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3155 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -824031,16 +823230,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -824057,8 +823256,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -824100,7 +823299,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 @@ -824114,45 +823313,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_SSO4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -824160,22 +823359,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 224 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -824183,19 +823382,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -824281,26 +823480,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3159 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3156 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -824317,7 +823516,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -824327,7 +823526,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -824360,7 +823559,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 @@ -824374,45 +823573,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTC3_NTD3_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -824420,22 +823619,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 224 + MacroTile0: 192 MacroTile1: 256 - MacroTileA: 224 + MacroTileA: 192 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -824448,14 +823647,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -824541,8 +823740,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3160 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIAV0_MIWT7_8_NTC3_NTD3_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3157 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -824551,16 +823750,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -824577,7 +823776,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -824587,7 +823786,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -824623,7 +823822,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -824634,7 +823833,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC4_NTD4_SSO0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -824643,23 +823842,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -824680,13 +823879,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 + MIWaveTile: [3, 3] + MIWaveTileA: 3 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -824703,18 +823902,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 32 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 24 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -824801,8 +824000,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3161 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3158 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -824810,16 +824009,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 48 ThreadTile1: 3 - ThreadTileA: 64 + ThreadTileA: 48 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -824831,7 +824030,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -824847,7 +824046,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -824894,7 +824093,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SSO4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SSO4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -824907,9 +824106,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 + LdsNumBytes: 55296 LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -824918,7 +824117,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 + LdsOffsetMetadata: 55296 LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 @@ -824940,14 +824139,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] + MIWaveTile: [3, 3] MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 256 + MacroTile1: 192 MacroTileA: 192 - MacroTileB: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -824968,14 +824167,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 NumLoadsA: 24 - NumLoadsB: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -825061,8 +824260,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3162 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3159 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -825078,9 +824277,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 48 - ThreadTile1: 4 + ThreadTile1: 3 ThreadTileA: 48 - ThreadTileB: 4 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -825143,7 +824342,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -825154,7 +824353,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SSO4_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -825163,36 +824362,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -825200,22 +824399,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -825228,14 +824427,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 24 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -825321,8 +824520,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3163 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3160 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -825330,17 +824529,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -825351,14 +824550,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -825367,7 +824566,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -825403,7 +824602,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -825414,7 +824613,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SSO4_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SSO4_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -825423,13 +824622,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 57856 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -825438,44 +824637,44 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 + LdsOffsetMetadata: 57856 LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -825488,14 +824687,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -825581,8 +824780,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3164 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 3161 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -825590,7 +824789,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -825598,9 +824797,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -825611,14 +824810,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -825663,7 +824862,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -825674,7 +824873,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO4_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SSO0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -825683,23 +824882,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -825720,14 +824919,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -825748,14 +824947,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -825841,16 +825040,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3165 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3162 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -825858,9 +825057,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 64 - ThreadTile1: 3 + ThreadTile1: 2 ThreadTileA: 64 - ThreadTileB: 3 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -825871,7 +825070,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -825923,7 +825122,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -825934,7 +825133,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SSO4_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT11_4_SSO0_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -825943,27 +825142,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 60800 + LdsNumElementsAlignedA: 23936 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 23936 + LdsOffsetB_Blk: 89472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 60800 + LdsOffsetMetadata_Blk: 89472 + LdsPadA: 4 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -825979,15 +825178,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [1, 4] + MIWaveTile: [11, 4] + MIWaveTileA: 11 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 176 + MacroTile1: 256 + MacroTileA: 176 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -826008,14 +825207,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 176 + NumLoadsA: 22 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 22 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -826101,26 +825300,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3166 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIAV0_MIWT8_6_SU8_SUM0_SUS256_SSO4_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 3163 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT11_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 44 + ThreadTile1: 4 + ThreadTileA: 44 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -826131,14 +825330,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -826147,7 +825346,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -826183,7 +825382,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -826194,7 +825393,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SSO4_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_SSO0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -826203,36 +825402,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -826240,22 +825439,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -826263,19 +825462,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -826361,26 +825560,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3167 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SSO4_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 3164 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -826391,14 +825590,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -826407,7 +825606,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -826428,7 +825627,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -826443,7 +825642,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -826454,68 +825653,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SSO0_SVW2_VWA2_WG128_2_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26752 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26752 - LdsOffsetMetadata_Blk: 41088 - LdsPadA: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] - MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -826528,14 +825727,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -826621,8 +825820,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3168 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM1 + SolutionIndex: 3165 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -826630,17 +825829,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -826651,27 +825850,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -826703,7 +825902,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -826714,7 +825913,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SSO4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -826723,23 +825922,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -826760,14 +825959,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -826789,13 +825988,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 32 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -826881,8 +826080,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3169 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 3166 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -826890,17 +826089,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -826911,7 +826110,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -826927,7 +826126,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -826959,11 +826158,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -826974,68 +826173,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -827043,19 +826242,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -827141,8 +826340,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3170 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3167 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -827150,7 +826349,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -827158,9 +826357,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 7 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 7 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -827171,13 +826370,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -827187,7 +826386,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -827220,10 +826419,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -827234,45 +826433,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SSO0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -827280,22 +826479,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -827308,14 +826507,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -827401,26 +826600,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3171 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3168 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -827431,13 +826630,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -827447,7 +826646,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -827494,7 +826693,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -827661,15 +826860,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3172 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 3169 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 1 SubGroup0: 4 SubGroup1: 64 @@ -827740,7 +826939,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -827754,68 +826953,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 57216 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 23936 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 57216 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 176 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -827828,14 +827027,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -827921,8 +827120,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3173 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3170 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -827931,16 +827130,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -828000,10 +827199,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -828014,45 +827213,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -828060,22 +827259,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -828088,14 +827287,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -828181,8 +827380,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3174 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3171 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -828190,17 +827389,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -828211,13 +827410,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -828260,10 +827459,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -828274,45 +827473,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -828320,22 +827519,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 224 + MacroTile1: 256 + MacroTileA: 224 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -828348,14 +827547,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -828441,8 +827640,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3175 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_2_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3172 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -828450,17 +827649,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -828471,14 +827670,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -828523,7 +827722,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -828534,7 +827733,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SSO0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -828543,23 +827742,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 54272 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 54272 + LdsOffsetMetadata_Blk: 82944 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -828580,14 +827779,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -828608,14 +827807,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -828701,26 +827900,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3176 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3173 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -828731,14 +827930,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -828780,10 +827979,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -828794,45 +827993,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_SSO4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC4_NTD4_SSO0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -828840,22 +828039,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -828868,14 +828067,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -828961,26 +828160,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3177 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3174 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -828991,14 +828190,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -829007,7 +828206,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -829043,7 +828242,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -829054,7 +828253,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SSO0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -829063,36 +828262,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -829100,22 +828299,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -829128,14 +828327,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 32 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -829221,8 +828420,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3178 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 3175 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -829230,17 +828429,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -829251,14 +828450,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -829267,7 +828466,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -829300,10 +828499,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -829314,45 +828513,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_SSO4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_SSO0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -829360,22 +828559,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -829388,14 +828587,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -829481,26 +828680,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3179 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3176 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -829511,14 +828710,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -829527,7 +828726,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -829563,7 +828762,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -829574,7 +828773,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SSO0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -829583,36 +828782,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 32256 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -829620,22 +828819,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -829648,14 +828847,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 + NumLoadsA: 32 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -829741,8 +828940,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3180 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3177 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -829750,17 +828949,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -829771,14 +828970,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -829787,7 +828986,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -829823,7 +829022,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -829834,7 +829033,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC4_NTD4_SSO0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SSO0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -829843,23 +829042,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -829880,13 +829079,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -829903,18 +829102,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 24 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -830001,8 +829200,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3181 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3178 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -830010,16 +829209,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -830031,14 +829230,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -830047,7 +829246,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -830083,7 +829282,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -830094,7 +829293,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SSO4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SSO0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -830103,36 +829302,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -830140,22 +829339,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -830168,13 +829367,13 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 24 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 32 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -830261,26 +829460,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3182 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3179 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -830291,14 +829490,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -830307,7 +829506,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -830354,7 +829553,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SSO4_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SSO0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -830367,32 +829566,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -830400,22 +829599,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -830428,14 +829627,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 7 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -830521,26 +829720,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3183 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_7_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 3180 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG64_4_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -830557,8 +829756,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -830567,7 +829766,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -830603,7 +829802,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -830614,7 +829813,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SSO4_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_SSO4_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -830623,23 +829822,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -830659,15 +829858,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -830683,19 +829882,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 32 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -830781,8 +829980,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3184 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_NTC3_NTD3_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3181 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -830790,17 +829989,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -830811,14 +830010,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -830863,7 +830062,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -830874,7 +830073,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SSO0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SSO4_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -830883,13 +830082,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 64512 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -830898,21 +830097,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 64512 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -830920,22 +830119,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -830948,14 +830147,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 NumLoadsA: 32 - NumLoadsB: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -831041,26 +830240,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3185 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3182 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SSO4_SVW8_VWA8_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -831071,14 +830270,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -831123,7 +830322,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -831134,7 +830333,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWB8_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT11_4_SSO0_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT8_6_SSO4_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -831143,27 +830342,27 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60800 - LdsNumElementsAlignedA: 23936 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23936 - LdsOffsetB_Blk: 89472 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60800 - LdsOffsetMetadata_Blk: 89472 - LdsPadA: 4 - LdsPadB: 8 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -831179,15 +830378,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [11, 4] - MIWaveTileA: 11 - MIWaveTileB: 4 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 176 - MacroTile1: 256 - MacroTileA: 176 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -831208,14 +830407,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 176 - NumLoadsA: 22 - NumLoadsB: 8 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 22 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -831301,26 +830500,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3186 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT176x256x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA128_LPA4_LPB8_LRVW4_MIAV0_MIWT11_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 3183 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 44 - ThreadTile1: 4 - ThreadTileA: 44 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -831331,14 +830530,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -831347,7 +830546,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -831383,7 +830582,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -831394,7 +830593,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_SSO0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_SSO4_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -831403,23 +830602,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -831439,15 +830638,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -831468,14 +830667,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -831561,26 +830760,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3187 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3184 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG128_2_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -831591,14 +830790,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -831607,7 +830806,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -831654,7 +830853,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SSO0_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SSO0_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -831821,8 +831020,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3188 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3185 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -831858,7 +831057,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -831903,7 +831102,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -831914,7 +831113,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SSO4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SSO0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -831923,23 +831122,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -831960,14 +831159,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -831989,13 +831188,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -832081,26 +831280,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3189 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 3186 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -832111,14 +831310,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -832127,7 +831326,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -832159,11 +831358,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -832174,32 +831373,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -832219,15 +831418,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -832243,19 +831442,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -832341,26 +831540,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3190 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3187 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -832371,14 +831570,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -832420,10 +831619,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -832434,22 +831633,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SSO0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SSO0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 + LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30464 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -832458,21 +831657,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 + LdsOffsetMetadata: 61440 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 4 - LdsPadB: 4 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -832480,22 +831679,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -832508,14 +831707,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 32 - NumLoadsB: 28 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -832601,8 +831800,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3191 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3188 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -832610,17 +831809,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -832631,14 +831830,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -832683,7 +831882,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -832694,7 +831893,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SSO4_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -832703,23 +831902,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -832739,15 +831938,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -832768,14 +831967,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -832861,26 +832060,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3192 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM16 + SolutionIndex: 3189 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG128_2_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -832891,14 +832090,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -832907,7 +832106,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -832940,7 +832139,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -832954,36 +832153,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT8_6_SSO0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57216 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 23936 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57216 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 65536 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -832999,15 +832198,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 176 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 176 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -833028,14 +832227,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 32 - NumLoadsB: 22 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -833121,26 +832320,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3193 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3190 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -833157,8 +832356,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -833188,7 +832387,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -833200,10 +832399,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -833214,42 +832413,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_SVW8_VWA8_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 26752 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 26752 + LdsOffsetMetadata_Blk: 41088 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -833259,15 +832458,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -833288,14 +832487,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -833381,26 +832580,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3194 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3191 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 7 + ThreadTile1: 4 ThreadTileA: 32 - ThreadTileB: 7 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -833411,27 +832610,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -833460,10 +832659,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -833474,45 +832673,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -833520,22 +832719,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -833548,14 +832747,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 32 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -833641,26 +832840,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3195 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM16 + SolutionIndex: 3192 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -833671,14 +832870,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -833719,8 +832918,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 @@ -833734,45 +832933,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 54272 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 54272 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -833780,22 +832979,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [2, 4] - MIWaveTileA: 2 - MIWaveTileB: 4 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -833808,14 +833007,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -833901,8 +833100,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3196 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT2_4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 3193 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -833911,16 +833110,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -833937,8 +833136,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -833947,7 +833146,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -833980,7 +833179,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 @@ -833994,45 +833193,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC4_NTD4_SSO0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -834040,22 +833239,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 224 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 224 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -834063,19 +833262,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -834161,26 +833360,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3197 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 3194 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -834197,8 +833396,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -834207,7 +833406,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -834240,10 +833439,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -834254,45 +833453,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 60160 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60160 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -834300,9 +833499,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 MacroTile0: 192 MacroTile1: 256 @@ -834312,10 +833511,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -834329,13 +833528,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 24 - NumLoadsB: 8 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -834421,26 +833620,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3198 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM32 + SolutionIndex: 3195 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -834451,13 +833650,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -834467,7 +833666,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -834514,7 +833713,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_SSO0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_6_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -834527,9 +833726,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 + LdsNumBytes: 59904 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30464 + LdsNumElementsAlignedB: 26112 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -834538,7 +833737,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 + LdsOffsetMetadata: 59904 LdsOffsetMetadata_Blk: 99328 LdsPadA: 4 LdsPadB: 4 @@ -834560,14 +833759,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] + MIWaveTile: [8, 6] MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTileB: 6 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -834583,19 +833782,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 32 - NumLoadsB: 28 + NumLoadsB: 24 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularB: 24 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -834681,15 +833880,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3199 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG32_8_1_WGM8 + SolutionIndex: 3196 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_6_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 @@ -834698,9 +833897,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 7 + ThreadTile1: 6 ThreadTileA: 32 - ThreadTileB: 7 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -834718,7 +833917,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -834760,10 +833959,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -834774,34 +833973,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SSO0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 32256 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -834849,13 +834048,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 32 - NumLoadsB: 7 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -834941,16 +834140,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3200 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM16 + SolutionIndex: 3197 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreSyncOpt: 4 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -834971,14 +834170,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -835019,11 +834218,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -835034,32 +834233,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SSO0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -835079,15 +834278,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -835108,14 +834307,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -835201,26 +834400,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3201 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM32 + SolutionIndex: 3198 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -835231,14 +834430,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 32 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -835247,7 +834446,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -835279,11 +834478,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -835294,68 +834493,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SSO0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -835368,14 +834567,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -835461,16 +834660,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3202 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3199 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -835478,9 +834677,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -835491,13 +834690,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -835507,7 +834706,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -835539,11 +834738,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -835554,32 +834753,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SSO0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -835629,12 +834828,12 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 32 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -835721,16 +834920,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3203 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG64_4_1_WGM32 + SolutionIndex: 3200 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -835751,14 +834950,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 32 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -835767,7 +834966,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -835803,7 +835002,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -835814,7 +835013,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_SSO4_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_SSO0_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -835823,23 +835022,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -835859,15 +835058,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -835888,14 +835087,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -835981,26 +835180,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3204 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 3201 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -836011,14 +835210,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -836063,7 +835262,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -836074,7 +835273,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SSO4_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SSO4_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -836083,36 +835282,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false LdsNumBytes: 64512 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -836120,22 +835319,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -836149,13 +835348,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 32 - NumLoadsB: 6 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -836241,8 +835440,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3205 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SSO4_SVW8_VWA8_WG32_8_1_WGM8 + SolutionIndex: 3202 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -836250,17 +835449,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -836271,14 +835470,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -836287,7 +835486,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -836323,7 +835522,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -836334,7 +835533,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT8_6_SSO4_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_SSO4_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -836343,13 +835542,13 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 + LdsNumBytes: 62464 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -836358,21 +835557,21 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 + LdsOffsetMetadata: 62464 LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -836380,9 +835579,9 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] - MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 MacroTile1: 192 @@ -836392,10 +835591,10 @@ MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -836403,13 +835602,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumGlobalWriteVectorsPerThread: 96 NumLoadsA: 32 NumLoadsB: 6 NumLoadsCoalescedA: 1 @@ -836501,8 +835700,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3206 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SSO4_SVW4_VWA4_WG32_8_1_WGM32 + SolutionIndex: 3203 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -836510,17 +835709,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 6 - ThreadTileA: 32 - ThreadTileB: 6 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -836531,14 +835730,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -836594,7 +835793,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_SSO4_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SSO4_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -836663,8 +835862,8 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 @@ -836761,8 +835960,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3207 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG128_2_1_WGM8 + SolutionIndex: 3204 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -836798,7 +835997,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [128, 2, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -836840,10 +836039,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -836854,68 +836053,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SSO0_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SSO0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -836928,14 +836127,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 32 - NumLoadsB: 5 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -837021,8 +836220,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3208 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM32 + SolutionIndex: 3205 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -837030,7 +836229,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -837038,9 +836237,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -837051,13 +836250,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -837114,7 +836313,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SSO0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SSO4_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -837281,15 +836480,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3209 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 3206 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -837318,7 +836517,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -837360,7 +836559,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 1 @@ -837374,45 +836573,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SSO0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC4_NTD4_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 65280 + LdsNumElementsAlignedA: 30464 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 30464 + LdsOffsetB_Blk: 96000 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 65280 + LdsOffsetMetadata_Blk: 96000 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -837420,22 +836619,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [7, 8] + MIWaveTileA: 7 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 224 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 224 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -837443,19 +836642,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 224 + NumLoadsA: 28 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 28 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -837541,26 +836740,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3210 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SSO0_SVW1_VWA1_WG64_4_1_WGM8 + SolutionIndex: 3207 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC4_NTD4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 28 + ThreadTile1: 8 + ThreadTileA: 28 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -837577,7 +836776,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -837587,7 +836786,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -837620,7 +836819,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -837634,45 +836833,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SSO0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -837680,22 +836879,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -837703,19 +836902,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -837801,26 +837000,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3211 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 3208 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -837837,7 +837036,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -837880,10 +837079,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -837894,68 +837093,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SSO4_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_NEPBS16_SSO0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -837963,19 +837162,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 32 - NumLoadsB: 5 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -838061,16 +837260,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3212 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG128_2_1_WGM32 + SolutionIndex: 3209 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -838078,9 +837277,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 5 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 5 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -838091,14 +837290,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 32 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -838140,10 +837339,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -838154,36 +837353,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA16_LPB16_LRVW8_MIWT8_6_SSO0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_NEPBS16_SSO0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 64256 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65536 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 64256 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -838200,14 +837399,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -838223,19 +837422,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 112 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -838321,8 +837520,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3213 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM32 + SolutionIndex: 3210 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG32_8_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -838330,7 +837529,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -838338,9 +837537,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -838351,14 +837550,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -838388,7 +837587,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -838400,7 +837599,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 8 @@ -838414,42 +837613,42 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_SVW8_VWA8_WG16_16_1 - LSCA: 32 - LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SSO0_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26752 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26752 - LdsOffsetMetadata_Blk: 41088 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -838459,15 +837658,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 4] + MIWaveGroup: [2, 2] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 4 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 256 - MacroTileA: 128 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -838487,15 +837686,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -838581,8 +837780,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3214 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LPA4_LPB8_LRVW4_MIWT8_4_SU8_SUM0_SUS256_SVW8_VWA8_WG16_16_1_WGM16 + SolutionIndex: 3211 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -838591,16 +837790,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 8 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 4 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 4 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -838617,21 +837816,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -838660,7 +837859,7 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -838674,45 +837873,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SSO0_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 63744 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63744 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -838720,22 +837919,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -838748,14 +837947,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 56 NumLoadsA: 32 - NumLoadsB: 6 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -838841,8 +838040,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3215 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 3212 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -838851,16 +838050,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -838877,8 +838076,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -838923,7 +838122,7 @@ GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -838934,7 +838133,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SSO4_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -838943,23 +838142,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -839007,9 +838206,9 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 + NumElementsPerBatchStore: 16 NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 32 NumLoadsB: 28 NumLoadsCoalescedA: 1 @@ -839101,8 +838300,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3216 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM32 + SolutionIndex: 3213 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SU8_SUM0_SUS256_SSO4_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -839110,7 +838309,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -839131,7 +838330,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -839183,7 +838382,7 @@ GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -839194,7 +838393,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SSO0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -839203,23 +838402,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -839240,14 +838439,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -839269,13 +838468,13 @@ NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -839361,26 +838560,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3217 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM32 + SolutionIndex: 3214 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -839391,7 +838590,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -839443,7 +838642,7 @@ GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -839454,7 +838653,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -839463,23 +838662,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60160 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60160 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -839500,14 +838699,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -839527,15 +838726,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 24 - NumLoadsB: 32 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -839621,26 +838820,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3218 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM32 + SolutionIndex: 3215 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -839651,7 +838850,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -839703,7 +838902,7 @@ GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -839714,7 +838913,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_6_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -839723,23 +838922,23 @@ LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 59904 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 26112 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 59904 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 LdsPadA: 4 LdsPadB: 4 LdsPadMetadata: 0 @@ -839760,14 +838959,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 6] + MIWaveTile: [8, 7] MIWaveTileA: 8 - MIWaveTileB: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -839788,14 +838987,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 32 - NumLoadsB: 24 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 24 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -839881,8 +839080,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3219 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_6_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM32 + SolutionIndex: 3216 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -839890,7 +839089,7 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -839898,9 +839097,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 6 + ThreadTile1: 7 ThreadTileA: 32 - ThreadTileB: 6 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -839911,7 +839110,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -839974,7 +839173,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -840047,7 +839246,7 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 + NumElementsPerBatchStore: 16 NumElementsPerThread: 224 NumGlobalWriteVectorsPerThread: 28 NumLoadsA: 32 @@ -840141,8 +839340,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3220 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3217 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -840219,8 +839418,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 2 @@ -840234,68 +839433,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NEPBS0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 60160 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 60160 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -840308,14 +839507,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 24 + NumLoadsB: 32 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 32 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -840401,8 +839600,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3221 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 3218 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -840417,10 +839616,10 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -840437,8 +839636,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -840447,7 +839646,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -840483,7 +839682,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -840494,7 +839693,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -840503,23 +839702,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -840539,15 +839738,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -840568,14 +839767,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -840661,26 +839860,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3222 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM32 + SolutionIndex: 3219 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM4 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -840691,14 +839890,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 32 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -840743,7 +839942,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -840754,7 +839953,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS0_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -840763,23 +839962,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -840799,15 +839998,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -840828,14 +840027,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -840921,8 +840120,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3223 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM16 + SolutionIndex: 3220 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -840930,17 +840129,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -840951,13 +840150,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -841000,10 +840199,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -841014,45 +840213,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_SSO0_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NEPBS0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 57216 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 23936 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 57216 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -841060,22 +840259,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 176 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -841083,19 +840282,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 NumLoadsA: 32 - NumLoadsB: 5 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -841181,26 +840380,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3224 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 3221 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -841211,14 +840410,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -841259,11 +840458,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -841274,32 +840473,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SSO4_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS16_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -841319,15 +840518,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -841347,15 +840546,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 24 - NumLoadsB: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -841441,8 +840640,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3225 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SSO4_SVW1_VWA1_WG64_4_1_WGM32 + SolutionIndex: 3222 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -841450,17 +840649,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -841471,14 +840670,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 32 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -841519,7 +840718,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -841534,12 +840733,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_SSO4_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS0_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -841547,9 +840746,9 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 + LdsNumBytes: 57856 LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -841558,7 +840757,7 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 + LdsOffsetMetadata: 57856 LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 @@ -841579,15 +840778,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -841603,19 +840802,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -841701,8 +840900,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3226 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM16 + SolutionIndex: 3223 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -841711,16 +840910,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -841737,8 +840936,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -841747,7 +840946,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -841779,7 +840978,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -841794,12 +840993,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SSO4_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS16_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 @@ -841867,14 +841066,14 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 + NumElementsPerBatchStore: 16 NumElementsPerThread: 160 NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 + NumLoadsA: 8 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -841961,8 +841160,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3227 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 3224 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -841998,7 +841197,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -842007,7 +841206,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -842028,7 +841227,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -842039,11 +841238,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -842054,44 +841253,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SSO0_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSUAMB_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTA4_NTC0_NTD0_SPO0_SVW1_VWA1_WG32_4_2 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -842099,15 +841298,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -842121,21 +841320,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 2 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -842221,26 +841420,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3228 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3225 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_GSUAMB_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreVectorWidth: 1 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -842251,27 +841450,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -842288,7 +841487,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -842299,7 +841498,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -842314,44 +841513,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SSO4_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC4_NTD4_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 + LSCA: 256 + LSCB: 256 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 50176 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 50176 + LdsOffsetMetadata_Blk: 98816 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -842359,15 +841558,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -842381,21 +841580,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 32 - NumLoadsB: 6 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -842481,26 +841680,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3229 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM32 + SolutionIndex: 3226 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC4_NTD4_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 2 + SubGroup1: 32 + SubGroupA: 2 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 32 + ThreadTile1: 1 + ThreadTileA: 32 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -842517,21 +841716,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 32 + WorkGroup: [32, 2, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -842548,7 +841747,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -842559,11 +841758,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -842574,44 +841773,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC4_NTD4_SVW1_VWA1_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA0_NTC4_NTD4_SVW2_VWA2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65280 - LdsNumElementsAlignedA: 30464 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 30464 - LdsOffsetB_Blk: 96000 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 65280 - LdsOffsetMetadata_Blk: 96000 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -842619,15 +841818,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [7, 8] - MIWaveTileA: 7 - MIWaveTileB: 8 + MIWaveGroup: [2, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 224 - MacroTile1: 256 - MacroTileA: 224 - MacroTileB: 256 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -842648,14 +841847,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 224 - NumLoadsA: 28 - NumLoadsB: 32 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 4 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 28 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -842741,8 +841940,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3230 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT224x256x64_MI16x16x1_SN_GSU1_LBSPPA128_LPA4_LPB4_LRVW4_MIWT7_8_NTC4_NTD4_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM8 + SolutionIndex: 3227 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA0_NTC4_NTD4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -842750,17 +841949,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 2 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 28 - ThreadTile1: 8 - ThreadTileA: 28 - ThreadTileB: 8 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -842771,27 +841970,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -842808,7 +842007,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -842819,11 +842018,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -842834,44 +842033,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GSUAMB_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTA4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 46080 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 46080 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -842880,14 +842079,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 96 + MacroTile1: 64 + MacroTileA: 96 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -842901,21 +842100,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -843001,8 +842200,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3231 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM8 + SolutionIndex: 3228 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -843010,17 +842209,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -843031,27 +842230,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -843080,10 +842279,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -843094,36 +842293,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_NEPBS16_SSO0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTA0_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -843140,13 +842339,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 + MIWaveTile: [5, 7] + MIWaveTileA: 5 MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 160 MacroTile1: 224 - MacroTileA: 256 + MacroTileA: 160 MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 @@ -843167,15 +842366,15 @@ NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -843261,25 +842460,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3232 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM16 + SolutionIndex: 3229 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTA0_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 20 ThreadTile1: 7 - ThreadTileA: 32 + ThreadTileA: 20 ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true @@ -843291,14 +842490,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -843307,7 +842506,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -843340,10 +842539,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -843354,45 +842553,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_NEPBS16_SSO0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64256 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64256 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -843400,22 +842599,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -843423,19 +842622,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 112 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 24 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 24 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -843521,26 +842720,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3233 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT8_7_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SSO0_SVW2_VWA2_WG32_8_1_WGM16 + SolutionIndex: 3230 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -843551,14 +842750,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -843567,7 +842766,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -843599,11 +842798,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -843614,45 +842813,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SSO0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -843660,22 +842859,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -843687,15 +842886,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -843781,26 +842980,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3234 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3231 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -843811,14 +843010,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -843827,7 +843026,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -843859,11 +843058,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -843874,45 +843073,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SSO0_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63744 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63744 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -843920,22 +843119,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -843948,14 +843147,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 56 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -844041,26 +843240,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3235 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SU8_SUM0_SUS256_SSO0_SVW4_VWA4_WG32_8_1_WGM32 + SolutionIndex: 3232 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -844071,14 +843270,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -844087,7 +843286,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -844119,11 +843318,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -844134,45 +843333,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SSO4_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1_WGMXCC4 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 64512 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 36864 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 64512 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -844180,22 +843379,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -844203,19 +843402,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 192 + NumLoadsA: 6 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -844301,26 +843500,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3236 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SU8_SUM0_SUS256_SSO4_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3233 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8_WGMXCC4 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -844331,15 +843530,15 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 - WorkGroupMappingXCC: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -844347,7 +843546,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -844368,7 +843567,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -844379,11 +843578,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -844394,44 +843593,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SSO0_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC4_NTD4_SPO0_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 + LVPA: 1 + LVPB: 1 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -844439,15 +843638,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -844463,19 +843662,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -844561,26 +843760,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3237 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SU8_SUM0_SUS256_SSO0_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3234 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC4_NTD4_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -844591,27 +843790,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroup: [16, 4, 4] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -844628,7 +843827,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -844639,11 +843838,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -844654,44 +843853,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SPO1_SVW1_VWA1_WG64_4_1 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -844699,15 +843898,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 16 + MacroTileA: 64 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -844723,19 +843922,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -844821,26 +844020,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3238 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3235 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -844851,27 +844050,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -844888,7 +844087,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -844899,11 +844098,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -844914,44 +844113,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_SPO0_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 49152 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -844959,15 +844158,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -844988,14 +844187,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -845081,26 +844280,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3239 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3236 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 8 - SubGroup1: 32 + SubGroup1: 16 SubGroupA: 8 - SubGroupB: 32 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -845111,27 +844310,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -845148,7 +844347,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -845159,11 +844358,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -845174,44 +844373,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_SPO0_SVW4_VWA4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -845220,14 +844419,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -845247,15 +844446,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -845341,26 +844540,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3240 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NEPBS16_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3237 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 0 + StorePriorityOpt: 0 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -845371,27 +844570,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -845420,10 +844619,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -845434,36 +844633,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NEPBS0_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT9_2_NTA0_NTC4_NTD4_SVW1_VWA1_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 60160 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 34816 + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 60160 - LdsOffsetMetadata_Blk: 90880 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -845471,7 +844670,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -845479,15 +844678,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 8] - MIWaveTileA: 6 - MIWaveTileB: 8 + MIWaveGroup: [1, 4] + MIWaveTile: [9, 2] + MIWaveTileA: 9 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 256 - MacroTileA: 192 - MacroTileB: 256 + MacroTile0: 144 + MacroTile1: 128 + MacroTileA: 144 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -845503,19 +844702,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 24 - NumLoadsB: 32 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 18 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 32 + NumLoadsPerpendicularA: 18 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -845601,26 +844800,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3241 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_8_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM32 + SolutionIndex: 3238 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT9_2_NTA0_NTC4_NTD4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 1 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 8 - ThreadTileA: 24 - ThreadTileB: 8 + ThreadTile0: 36 + ThreadTile1: 2 + ThreadTileA: 36 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -845631,14 +844830,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -845647,11 +844846,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -845694,7 +844893,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -845707,32 +844906,32 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 37888 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 20480 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 37888 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -845740,22 +844939,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -845767,15 +844966,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -845861,8 +845060,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3242 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM4 + SolutionIndex: 3239 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -845871,16 +845070,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -845897,8 +845096,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 4 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -845943,7 +845142,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -845954,7 +845153,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS0_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -845963,59 +845162,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 27648 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 27648 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -846027,15 +845226,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -846121,26 +845320,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3243 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 3240 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 4 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -846151,14 +845350,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -846171,7 +845370,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -846188,7 +845387,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -846199,11 +845398,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -846214,44 +845413,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NEPBS0_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC4_NTD4_NEPBS16_SVW2_VWA2_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57216 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 23936 + LdsNumBytes: 65536 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57216 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 - LocalSplitU: 1 + LocalReadVectorWidth: 8 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: 1 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -846259,15 +845458,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 4] MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -846283,19 +845482,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -846381,26 +845580,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3244 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM32 + SolutionIndex: 3241 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + SubGroup0: 8 SubGroup1: 16 - SubGroupA: 16 + SubGroupA: 8 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 11 + ThreadTile1: 4 ThreadTileA: 16 - ThreadTileB: 11 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -846411,27 +845610,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 32 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -846463,7 +845662,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -846474,7 +845673,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS16_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -846483,23 +845682,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -846519,15 +845718,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -846548,14 +845747,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -846641,26 +845840,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3245 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 3242 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -846671,14 +845870,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -846719,7 +845918,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -846734,12 +845933,12 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS0_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 @@ -846747,55 +845946,55 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 160 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -846807,14 +846006,14 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 24 NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 24 NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 @@ -846901,8 +846100,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3246 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM32 + SolutionIndex: 3243 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -846917,9 +846116,9 @@ SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 + ThreadTile0: 24 ThreadTile1: 5 - ThreadTileA: 32 + ThreadTileA: 24 ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true @@ -846937,8 +846136,8 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 32 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -846983,7 +846182,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -846994,7 +846193,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS16_SVW2_VWA2_WG128_2_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -847003,23 +846202,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -847039,15 +846238,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 160 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -847063,19 +846262,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -847161,8 +846360,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3247 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM32 + SolutionIndex: 3244 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -847170,17 +846369,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -847191,14 +846390,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 32 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -847228,7 +846427,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -847239,11 +846438,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -847254,88 +846453,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSUAMB_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTA4_NTC0_NTD0_SPO0_SVW1_VWA1_WG32_4_2 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 26112 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 52224 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 26112 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 52224 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 2 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 32 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -847421,26 +846620,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3248 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_GSUAMB_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIAV1_MIWT1_1_NTA4_NTC0_NTD0_SU0_SUM0_SUS0_SPO0_SVW1_VWA1_WG32_4_2_WGM1 + SolutionIndex: 3245 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 0 StaggerUMapping: 0 StaggerUStride: 0 - StorePriorityOpt: 0 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -847451,23 +846650,23 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -847488,7 +846687,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -847499,7 +846698,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -847514,44 +846713,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC4_NTD4_NLCA1_SS1_SPO0_SVW2_VWA2_WG32_2_4 - LSCA: 256 - LSCB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 LSPA: 8 - LSPB: 8 + LSPB: 32 LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 50176 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 16896 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 50176 - LdsOffsetMetadata_Blk: 98816 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -847559,15 +846758,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 32 - MacroTileA: 64 - MacroTileB: 32 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -847581,20 +846780,20 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 8 - NumGlobalWriteVectorsPerThread: 4 - NumLoadsA: 8 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -847681,26 +846880,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3249 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x32x256_MI32x32x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA1024_LBSPPB512_LPA8_LPB8_LRVW8_MIAV1_MIWT2_1_NTA4_NTC4_NTD4_NLCA1_SS1_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG32_2_4_WGM1 + SolutionIndex: 3246 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 2 - SubGroup1: 32 - SubGroupA: 2 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 1 - ThreadTileA: 32 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 2 + ThreadTileA: 64 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -847717,21 +846916,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 2, 4] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -847748,7 +846947,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -847774,68 +846973,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA0_NTC4_NTD4_SVW2_VWA2_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 31232 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31232 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [2, 3] - MIWaveTileA: 2 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 48 - MacroTileA: 64 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -847843,19 +847042,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 12 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 4 - NumLoadsB: 3 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -847941,25 +847140,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3250 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_NTA0_NTC4_NTD4_SU8_SUM0_SUS256_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 3247 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM4 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 16 - SubGroupA: 8 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 8 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -847977,15 +847176,15 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 4 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -848008,7 +847207,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -848019,11 +847218,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -848034,44 +847233,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GSUAMB_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTA4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_NEPBS16_PLR1_SVW8_VWA8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 46080 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 46080 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 128 + LoopIters: 4 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -848080,14 +847279,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 2] - MIWaveTileA: 3 - MIWaveTileB: 2 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 96 - MacroTile1: 64 - MacroTileA: 96 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -848101,21 +847300,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 24 - NumLoadsA: 6 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -848201,26 +847400,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3251 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_GRVWA8_GSU1_GSUAMB_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT3_2_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3248 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreSyncOpt: 0 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 12 - ThreadTile1: 2 - ThreadTileA: 12 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -848231,7 +847430,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -848242,12 +847441,12 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -848280,10 +847479,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -848294,36 +847493,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTA0_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NTC4_NTD4_NEPBS0_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 57216 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 23936 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57216 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -848339,15 +847538,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] + MIWaveTileA: 4 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -848368,14 +847567,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 44 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -848461,8 +847660,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3252 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTA0_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3249 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -848470,17 +847669,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 4 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 11 + ThreadTileA: 16 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -848491,13 +847690,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -848507,7 +847706,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -848540,10 +847739,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -848554,45 +847753,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_7_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 55808 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 55808 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -848600,22 +847799,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 - MIWaveTileB: 4 + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 192 - MacroTile1: 256 + MacroTile1: 224 MacroTileA: 192 - MacroTileB: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -848628,14 +847827,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 NumLoadsA: 24 - NumLoadsB: 8 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -848721,8 +847920,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3253 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3250 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_7_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -848730,17 +847929,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 4 - ThreadTileA: 48 - ThreadTileB: 4 + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -848751,13 +847950,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -848767,7 +847966,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -848803,7 +848002,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -848814,7 +848013,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS16_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -848823,23 +848022,23 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -848860,13 +848059,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 192 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 @@ -848883,18 +848082,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -848981,8 +848180,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3254 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_3_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3251 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -848990,16 +848189,16 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 + StoreVectorWidth: 4 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 64 ThreadTile1: 3 - ThreadTileA: 48 + ThreadTileA: 64 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true @@ -849011,14 +848210,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -849048,7 +848247,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -849074,32 +848273,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_SSO4_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 27648 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 + LdsOffsetMetadata: 27648 + LdsOffsetMetadata_Blk: 51200 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -849108,8 +848307,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -849120,14 +848319,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] + MIWaveTile: [4, 2] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 192 + MacroTile1: 128 MacroTileA: 256 - MacroTileB: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -849143,19 +848342,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -849241,8 +848440,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3255 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3252 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -849258,9 +848457,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 64 - ThreadTile1: 3 + ThreadTile1: 2 ThreadTileA: 64 - ThreadTileB: 3 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -849282,16 +848481,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -849308,7 +848507,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -849323,7 +848522,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -849334,32 +848533,32 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SVW1_VWA1_WG64_4_1_WGMXCC4 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC3_NTD3_SSO4_SVW2_VWA2_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 64512 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 36864 + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 64512 - LdsOffsetMetadata_Blk: 93184 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 8 LdsPadB: 8 LdsPadMetadata: 0 @@ -849368,8 +848567,8 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 4 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [32, 32, 8, 1, 1, 1] @@ -849380,13 +848579,13 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 4] - MIWaveTileA: 3 + MIWaveTile: [4, 4] + MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 192 + MacroTile0: 256 MacroTile1: 256 - MacroTileA: 192 + MacroTileA: 256 MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 @@ -849403,19 +848602,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 192 - NumLoadsA: 6 - NumLoadsB: 8 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 128 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 8 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -849501,25 +848700,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3256 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x256x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIAV0_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM8_WGMXCC4 + SolutionIndex: 3253 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC3_NTD3_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 + ThreadTile0: 64 ThreadTile1: 4 - ThreadTileA: 48 + ThreadTileA: 64 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -849531,27 +848730,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 - WorkGroupMappingXCC: 4 + WorkGroupMapping: 1 + WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -849568,7 +848767,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -849583,7 +848782,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -849594,68 +848793,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC4_NTD4_SPO0_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_3_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -849668,14 +848867,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 144 + NumLoadsA: 6 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -849761,26 +848960,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3257 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTC4_NTD4_SU0_SUM0_SUS0_SPO0_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3254 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreSyncOpt: 4 + StoreVectorWidth: 1 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 - ThreadTile1: 1 - ThreadTileA: 8 - ThreadTileB: 1 + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -849791,27 +848990,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -849828,7 +849027,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -849843,7 +849042,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -849854,68 +849053,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SPO1_SVW1_VWA1_WG64_4_1 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 16 - LoopUnroll: 256 + LoopIters: 8 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [1, 1] - MIWaveTileA: 1 - MIWaveTileB: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 64 - MacroTile1: 16 - MacroTileA: 64 - MacroTileB: 16 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -849923,19 +849122,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 0 - NonTemporalD: 0 + NonTemporalC: 3 + NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 4 - NumGlobalWriteVectorsPerThread: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 NumLoadsA: 8 - NumLoadsB: 2 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -850021,26 +849220,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3258 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT64x16x256_MI16x16x1_SN_GRVWB8_GSU1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_NTC0_NTD0_SU0_SUM0_SUS0_SPO1_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3255 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 1 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 4 + StoreVectorWidth: 4 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 4 - ThreadTile1: 1 - ThreadTileA: 4 - ThreadTileB: 1 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -850051,7 +849250,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -850062,16 +849261,16 @@ WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -850088,7 +849287,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -850099,11 +849298,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -850114,22 +849313,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_SPO0_SVW4_VWA4_WG32_4_2 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_11_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 49152 + LdsNumBytes: 57728 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedB: 23936 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -850138,20 +849337,20 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 + LdsOffsetMetadata: 57728 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -850159,15 +849358,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 11] MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTileB: 11 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 48 - MacroTileA: 128 - MacroTileB: 48 + MacroTile0: 256 + MacroTile1: 176 + MacroTileA: 256 + MacroTileB: 176 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -850183,19 +849382,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 - NumLoadsA: 8 - NumLoadsB: 3 + NumElementsPerThread: 176 + NumGlobalWriteVectorsPerThread: 88 + NumLoadsA: 32 + NumLoadsB: 22 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 22 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -850281,26 +849480,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3259 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 3256 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_11_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 3 + ThreadTile1: 11 ThreadTileA: 16 - ThreadTileB: 3 + ThreadTileB: 11 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -850311,27 +849510,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -850348,7 +849547,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -850359,11 +849558,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -850374,34 +849573,34 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_SPO0_SVW4_VWA4_WG32_8_1 - LSCA: 128 - LSCB: 128 - LSPA: 16 - LSPB: 16 - LVCA: 16 - LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_2_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 32 + LVCA: 32 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 34816 LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -850409,10 +849608,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 128 + LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -850424,18 +849623,18 @@ MIWaveTileA: 4 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -850443,18 +849642,18 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 8 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 64 + NumLoadsA: 32 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 32 NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 @@ -850541,25 +849740,25 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3260 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_SU0_SUM0_SUS0_SPO0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3257 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 0 + StaggerUStride: 256 + StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 4 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 64 ThreadTile1: 2 - ThreadTileA: 16 + ThreadTileA: 64 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true @@ -850571,27 +849770,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -850623,7 +849822,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -850634,7 +849833,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x128x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT9_2_NTA0_NTC4_NTD4_SVW1_VWA1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_NEPBS16_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -850643,59 +849842,59 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 43520 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 20480 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 43520 - LdsOffsetMetadata_Blk: 88576 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [9, 2] - MIWaveTileA: 9 - MIWaveTileB: 2 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 144 - MacroTile1: 128 - MacroTileA: 144 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -850707,15 +849906,15 @@ NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 72 - NumGlobalWriteVectorsPerThread: 72 - NumLoadsA: 18 - NumLoadsB: 4 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 32 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 18 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -850801,26 +850000,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3261 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT144x128x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT9_2_NTA0_NTC4_NTD4_SU0_SUM0_SUS0_SVW1_VWA1_WG16_16_1_WGM1 + SolutionIndex: 3258 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 36 - ThreadTile1: 2 - ThreadTileA: 36 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -850831,13 +850030,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] + WorkGroup: [128, 2, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -850847,11 +850046,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -850868,7 +850067,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -850894,22 +850093,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC4_NTD4_NEPBS16_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 64 + LSPB: 64 + LVCA: 4 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 37888 + LdsNumBytes: 35840 LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 20480 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -850918,10 +850117,10 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 37888 + LdsOffsetMetadata: 35840 LdsOffsetMetadata_Blk: 82944 - LdsPadA: 16 - LdsPadB: 16 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -850929,10 +850128,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 - LoopUnroll: 64 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -850944,18 +850143,18 @@ MIWaveTileA: 4 MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 128 - MacroTileA: 128 - MacroTileB: 128 + MacroTile0: 256 + MacroTile1: 256 + MacroTileA: 256 + MacroTileB: 256 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -850963,13 +850162,13 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 64 - NumGlobalWriteVectorsPerThread: 16 + NumElementsPerThread: 256 + NumGlobalWriteVectorsPerThread: 64 NumLoadsA: 4 NumLoadsB: 4 NumLoadsCoalescedA: 1 @@ -851061,8 +850260,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3262 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3259 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -851071,15 +850270,15 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 + ThreadTile0: 64 ThreadTile1: 4 - ThreadTileA: 16 + ThreadTileA: 64 ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true @@ -851097,21 +850296,21 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -851143,7 +850342,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -851154,7 +850353,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_GRVWA8_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SVW2_VWA2_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -851163,36 +850362,36 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 27648 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 10240 + LdsNumBytes: 62464 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 50176 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27648 - LdsOffsetMetadata_Blk: 50176 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 62464 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 - MIBlock: [16, 16, 16, 1, 1, 1] + MIArchVgpr: 0 + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -851200,22 +850399,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -851223,19 +850422,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 8 - NumLoadsA: 4 - NumLoadsB: 2 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -851321,26 +850520,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3263 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIAV1_MIWT4_2_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG32_8_1_WGM1 + SolutionIndex: 3260 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 2 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 2 - ThreadTileA: 16 - ThreadTileB: 2 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -851351,14 +850550,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -851371,7 +850570,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -851388,7 +850587,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 128 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -851399,11 +850598,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -851414,44 +850613,44 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC4_NTD4_NEPBS16_SVW2_VWA2_WG32_4_2 - LSCA: 128 - LSCB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC4_NTD4_SVW4_VWA4_WG64_4_1 + LSCA: 32 + LSCB: 32 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 2 - LVPB: 2 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 256 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 65536 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 31104 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 14208 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 31104 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalReadVectorWidth: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -851459,15 +850658,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 4] + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveTileB: 13 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 64 - MacroTileA: 128 - MacroTileB: 64 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -851488,14 +850687,14 @@ NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 32 - NumGlobalWriteVectorsPerThread: 16 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 16 + NumLoadsB: 13 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 13 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -851581,26 +850780,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3264 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_GSU1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIAV1_MIWT4_4_NTC4_NTD4_NEPBS16_SU0_SUM0_SUS0_SVW2_VWA2_WG32_4_2_WGM1 + SolutionIndex: 3261 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 8 + StoreVectorWidth: 4 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 16 - ThreadTile1: 4 + ThreadTile1: 13 ThreadTileA: 16 - ThreadTileB: 4 + ThreadTileB: 13 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -851611,27 +850810,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] + WorkGroup: [64, 4, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 128 - _DepthUA: 128 - _DepthUB: 128 - _DepthUMetadata: 128 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -851659,11 +850858,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -851674,45 +850873,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_NEPBS0_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -851720,22 +850919,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 128 + MacroTile1: 224 MacroTileA: 256 - MacroTileB: 128 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -851747,15 +850946,15 @@ NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 8 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -851841,26 +851040,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3265 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_CLR1_GRVWA8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_PLR1_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3262 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 8 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -851871,13 +851070,13 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [32, 8, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -851887,7 +851086,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -851920,10 +851119,10 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -851934,36 +851133,36 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 8 - LSPB: 32 + LSPB: 8 LVCA: 32 - LVCB: 8 + LVCB: 32 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 1024 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 25600 + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 33024 + LdsNumElementsAlignedB: 30464 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetB: 33024 + LdsOffsetB_Blk: 98560 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 16 - LdsPadB: 16 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 98560 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -851980,14 +851179,14 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [6, 5] - MIWaveTileA: 6 - MIWaveTileB: 5 + MIWaveTile: [8, 7] + MIWaveTileA: 8 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 160 - MacroTileA: 192 - MacroTileB: 160 + MacroTile0: 256 + MacroTile1: 224 + MacroTileA: 256 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -852003,19 +851202,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 24 - NumLoadsB: 5 + NumElementsPerThread: 224 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 32 + NumLoadsB: 28 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 32 + NumLoadsPerpendicularB: 28 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -852101,8 +851300,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3266 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA16_LPB16_LRVW8_MIAV0_MIWT6_5_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3263 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -852110,17 +851309,17 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreVectorWidth: 8 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 5 - ThreadTileA: 24 - ThreadTileB: 5 + ThreadTile0: 32 + ThreadTile1: 7 + ThreadTileA: 32 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -852131,14 +851330,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -852147,7 +851346,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 1 + _UseSgprForGRO: 0 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -852168,7 +851367,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -852183,7 +851382,7 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -852194,88 +851393,88 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS0_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC4_NTD4_SS1_SPO1_SVW2_VWA2_WG16_4_4 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 25600 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 4 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 1] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 4 NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 0 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 2 + NumGlobalWriteVectorsPerThread: 1 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -852361,26 +851560,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3267 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3264 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC4_NTD4_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 SourceSwap: 1 - StaggerU: 8 + StaggerU: 0 StaggerUMapping: 0 - StaggerUStride: 256 + StaggerUStride: 0 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 2 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -852391,27 +851590,27 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 4, 4] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -852428,7 +851627,7 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -852439,7 +851638,7 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer @@ -852454,22 +851653,22 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_NTC3_NTD3_SVW4_VWA4_WG32_4_2 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 52224 + LdsNumBytes: 49152 LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedB: 13824 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 @@ -852478,64 +851677,64 @@ LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 52224 + LdsOffsetMetadata: 47616 LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 1 + LocalSplitU: 2 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: 1 + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] + MIWaveGroup: [2, 1] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 NonTemporalC: 3 NonTemporalD: 3 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 32 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 6 + NumLoadsA: 8 + NumLoadsB: 3 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -852621,26 +851820,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3268 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SU0_SUM0_SUS0_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 3265 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_4_2_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -852657,17 +851856,17 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroup: [32, 4, 2] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -852714,7 +851913,7 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTA4_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG16_16_1 LSCA: 64 LSCB: 64 LSPA: 8 @@ -852727,75 +851926,75 @@ LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 32 - NumLoadsB: 4 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 20 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -852881,15 +852080,15 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3269 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3266 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 + StoreSyncOpt: 4 StoreVectorWidth: 2 SubGroup0: 4 SubGroup1: 64 @@ -852897,10 +852096,10 @@ SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -852917,7 +852116,7 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false @@ -852927,7 +852126,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -852959,11 +852158,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 2 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -852974,45 +852173,45 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTA4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 8 LSPB: 32 - LVCA: 8 + LVCA: 32 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -853020,42 +852219,42 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 0 + NonTemporalA: 4 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerBatchStore: 0 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 20 + NumLoadsB: 7 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 7 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -853141,26 +852340,26 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3270 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_CLR1_GRVWA8_GRVWB8_GSU1_LBSPPA256_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC3_NTD3_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW2_VWA2_WG64_4_1_WGM4 + SolutionIndex: 3267 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 4 + StoreVectorWidth: 1 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -853171,14 +852370,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 4 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 1 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -853191,7 +852390,7 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -853219,11 +852418,11 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -853234,68 +852433,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_NEPBS16_PLR1_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 224 + MacroTile1: 160 MacroTileA: 256 - MacroTileB: 224 + MacroTileB: 160 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -853303,19 +852502,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -853401,16 +852600,16 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3271 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_CLR1_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LBSPPB128_LPA4_LPB4_LRVW4_MIAV0_MIWT8_7_NTC3_NTD3_NEPBS16_PLR1_SU0_SUM0_SUS0_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 3268 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 + StaggerUStride: 256 StorePriorityOpt: 1 StoreRemapVectorWidth: 0 - StoreSyncOpt: 0 - StoreVectorWidth: 8 + StoreSyncOpt: 4 + StoreVectorWidth: 2 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 @@ -853418,9 +852617,9 @@ SuppressNoLoadLoop: false ThreadTile: [1, 1] ThreadTile0: 32 - ThreadTile1: 7 + ThreadTile1: 5 ThreadTileA: 32 - ThreadTileB: 7 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -853431,14 +852630,14 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [128, 2, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -853447,11 +852646,11 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 0 + _staggerStrideShift: 1 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true @@ -853479,8 +852678,8 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalWriteVectorWidth: 4 @@ -853494,68 +852693,68 @@ InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, UseUniversalArgs: true} KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NTC4_NTD4_NEPBS0_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 LdsInitCVgprs: false - LdsNumBytes: 57216 - LdsNumElementsAlignedA: 33280 - LdsNumElementsAlignedB: 23936 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33280 - LdsOffsetB_Blk: 98816 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57216 - LdsOffsetMetadata_Blk: 98816 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 8 + LdsPadB: 8 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 + LoopIters: 8 LoopUnroll: 64 MFMA_BF16_1K: false MIArchVgpr: 0 - MIBlock: [16, 16, 16, 1, 1, 1] + MIBlock: [32, 32, 8, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveTileB: 3 MIWaveTileMetadata: 0 MacroTile0: 256 - MacroTile1: 176 + MacroTile1: 192 MacroTileA: 256 - MacroTileB: 176 + MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 16 - MatrixInstM: 16 - MatrixInstN: 16 - MatrixInstruction: [16, 16, 16, 1] + MatrixInstK: 8 + MatrixInstM: 32 + MatrixInstN: 32 + MatrixInstruction: [32, 32, 8, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -853567,15 +852766,15 @@ NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 44 - NumLoadsA: 32 - NumLoadsB: 22 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -853661,8 +852860,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3272 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA512_LPA4_LPB4_LRVW4_MIWT4_11_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3269 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM32 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -853671,16 +852870,16 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 64 + ThreadTile1: 3 + ThreadTileA: 64 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true UnrollMajorLDSA: true @@ -853698,7 +852897,7 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 + WorkGroupMapping: 32 WorkGroupMappingXCC: 1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] @@ -853707,7 +852906,7 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 @@ -853716,6 +852915,8 @@ ActivationAlt: false ActivationFuncCall: true ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -853728,10 +852929,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -853740,10 +852944,12 @@ ForceDisableShadowInit: false GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -853751,45 +852957,47 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_7_NTC3_NTD3_NEPBS0_SVW2_VWA2_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_K1_LBSPPA512_LBSPPB128_LPA4_LPB8_LRVW4_MIWT8_5_SVW8_VWA8_VWB1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 16 + LSPB: 64 + LVCA: 16 + LVCB: 4 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 31360 LdsInitCVgprs: false - LdsNumBytes: 55808 - LdsNumElementsAlignedA: 25344 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 31360 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 25344 - LdsOffsetB_Blk: 90880 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55808 - LdsOffsetMetadata_Blk: 90880 + LdsOffsetMetadata: 31360 + LdsOffsetMetadata_Blk: 41088 LdsPadA: 4 - LdsPadB: 4 + LdsPadB: 8 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false MIArchVgpr: 0 MIBlock: [16, 16, 16, 1, 1, 1] @@ -853799,15 +853007,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [6, 7] - MIWaveTileA: 6 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 224 - MacroTileA: 192 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -853823,19 +853031,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 4 + NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 168 - NumGlobalWriteVectorsPerThread: 84 - NumLoadsA: 24 - NumLoadsB: 28 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 24 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -853861,6 +853070,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -853892,6 +853102,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -853908,8 +853119,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: 1 - TransposeB: 0 + TransposeA: true + TransposeB: false UseBeta: true UseBias: 1 UseE: false @@ -853921,8 +853132,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3273 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT6_7_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG32_8_1_WGM1 + SolutionIndex: 3270 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA4_LPB8_LRVW4_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_VWB1_WG16_16_1_WGM16_WGMXCC1_WGMXCCGn1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -853930,19 +853141,24 @@ StorePriorityOpt: 1 StoreRemapVectorWidth: 0 StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 24 - ThreadTile1: 7 - ThreadTileA: 24 - ThreadTileB: 7 + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -853951,31 +853167,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 8 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 + WorkGroupMappingXCCGroup: -1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 2 - 1LDSBuffer: 1 ActivationAlt: false ActivationFuncCall: true ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -853988,10 +853207,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -854003,6 +853225,8 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true @@ -854011,10 +853235,11 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS16_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_K1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_VWB1_WG64_4_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -854026,6 +853251,7 @@ LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 LdsInitCVgprs: false LdsNumBytes: 61440 LdsNumElementsAlignedA: 33792 @@ -854087,6 +853313,7 @@ NonTemporalD: 4 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 NumElementsPerThread: 192 NumGlobalWriteVectorsPerThread: 48 @@ -854121,6 +853348,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -854152,6 +853380,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -854168,8 +853397,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: 1 - TransposeB: 0 + TransposeA: true + TransposeB: false UseBeta: true UseBias: 1 UseE: false @@ -854181,8 +853410,8 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3274 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 3271 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_VWB1_WG64_4_1_WGM16_WGMXCC1_WGMXCCGn1 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 @@ -854191,6 +853420,9 @@ StoreRemapVectorWidth: 0 StoreSyncOpt: 4 StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 @@ -854203,6 +853435,8 @@ ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -854218,8 +853452,9 @@ WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 WorkGroup: [64, 4, 1] - WorkGroupMapping: 8 + WorkGroupMapping: 16 WorkGroupMappingXCC: 1 + WorkGroupMappingXCCGroup: -1 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -854232,10 +853467,12 @@ _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 _staggerStrideShift: 1 - - 1LDSBuffer: 1 + - 1LDSBuffer: 0 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -854248,10 +853485,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -854263,7 +853503,9 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -854271,71 +853513,73 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_SSO4_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG16_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 4 + LSPB: 4 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25600 LdsInitCVgprs: false - LdsNumBytes: 27648 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 9216 + LdsNumBytes: 25600 + LdsNumElementsAlignedA: 4608 + LdsNumElementsAlignedB: 4608 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 51200 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 4608 + LdsOffsetB_Blk: 20992 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 27648 - LdsOffsetMetadata_Blk: 51200 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 4608 + LdsOffsetMetadata_Blk: 20992 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 - MIWaveTileB: 2 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -854343,20 +853587,21 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 NumLoadsA: 4 - NumLoadsB: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 2 - NumThreads: 256 + NumLoadsPerpendicularB: 4 + NumThreads: 64 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -854381,6 +853626,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -854412,6 +853658,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -854420,6 +853667,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -854441,28 +853690,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3275 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_2_NTC4_NTD4_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3272 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG16_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 4 - SubGroup1: 64 + SubGroup1: 16 SubGroupA: 4 - SubGroupB: 64 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 2 - ThreadTileA: 64 - ThreadTileB: 2 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -854471,31 +853725,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -854508,10 +853765,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DebugStreamK: 0 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -854523,7 +853783,9 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -854531,71 +853793,73 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC3_NTD3_SSO4_SVW2_VWA2_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG32_4_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 26112 LdsInitCVgprs: false - LdsNumBytes: 36864 - LdsNumElementsAlignedA: 18432 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 26112 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 8704 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 18432 - LdsOffsetB_Blk: 83968 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 36864 - LdsOffsetMetadata_Blk: 83968 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 26112 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -854603,20 +853867,21 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 128 - NumLoadsA: 4 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 4 - NumThreads: 256 + NumThreads: 128 OptNoLoadLoop: 1 PackedC0IdxChars: [I] PackedC0IndicesX: [0] @@ -854641,6 +853906,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -854672,6 +853938,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -854680,6 +853947,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -854701,28 +853970,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3276 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LBSPPB128_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC3_NTD3_SU8_SUM0_SUS256_SSO4_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3273 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS512_SVW1_VWA1_VWB1_WG32_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 512 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -854731,31 +854005,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 - - 1LDSBuffer: 1 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -854768,10 +854045,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -854783,7 +854063,9 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -854791,10 +854073,11 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_3_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_VWB1_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -854803,36 +854086,37 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 30720 LdsInitCVgprs: false - LdsNumBytes: 55296 - LdsNumElementsAlignedA: 27648 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 5120 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 27648 - LdsOffsetB_Blk: 93184 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 55296 - LdsOffsetMetadata_Blk: 93184 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 25600 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -854840,22 +854124,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [3, 3] - MIWaveTileA: 3 - MIWaveTileB: 3 + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 192 - MacroTile1: 192 - MacroTileA: 192 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -854863,19 +854147,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 144 - NumGlobalWriteVectorsPerThread: 144 - NumLoadsA: 6 - NumLoadsB: 6 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 1 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 6 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 1 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -854901,6 +854186,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -854932,6 +854218,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -854940,6 +854227,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -854961,28 +854250,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3277 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT192x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA128_LPA8_LPB8_LRVW8_MIWT3_3_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG64_4_1_WGM1 + SolutionIndex: 3274 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 48 - ThreadTile1: 3 - ThreadTileA: 48 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -854991,15 +854285,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -855011,11 +854306,13 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -855028,10 +854325,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -855043,7 +854343,9 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -855051,37 +854353,39 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NEPBS16_SVW4_VWA4_WG64_4_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 26624 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -855089,10 +854393,10 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -855100,22 +854404,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -855123,19 +854427,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -855161,6 +854466,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -855192,6 +854498,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -855200,6 +854507,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -855221,28 +854530,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3278 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_NTC3_NTD3_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3275 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -855251,31 +854565,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -855288,10 +854605,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 256 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -855299,11 +854619,13 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -855311,47 +854633,49 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_11_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_2_SVW1_VWA1_VWB2_WG32_8_1 + LSCA: 256 + LSCB: 256 LSPA: 8 LSPB: 8 LVCA: 32 LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 51200 LdsInitCVgprs: false - LdsNumBytes: 57728 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 23936 + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 33792 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57728 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 16 + LoopUnroll: 256 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -855359,15 +854683,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 11] - MIWaveTileA: 4 - MIWaveTileB: 11 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 176 - MacroTileA: 256 - MacroTileB: 176 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -855383,19 +854707,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 176 - NumGlobalWriteVectorsPerThread: 88 - NumLoadsA: 32 - NumLoadsB: 22 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 22 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -855421,6 +854746,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -855452,6 +854778,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -855460,6 +854787,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -855481,28 +854810,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3279 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x176x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIWT4_11_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3276 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_2_SU8_SUM0_SUS512_SVW1_VWA1_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 512 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 11 - ThreadTileA: 16 - ThreadTileB: 11 + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -855511,31 +854845,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthA: 1 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -855548,10 +854885,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -855559,10 +854899,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true @@ -855571,48 +854913,50 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_2_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_VWB2_WG32_8_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 18432 LdsInitCVgprs: false - LdsNumBytes: 53248 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 18432 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 9216 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53248 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 18432 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -855620,22 +854964,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 2] - MIWaveTileA: 4 + MIWaveTile: [2, 2] + MIWaveTileA: 2 MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 128 - MacroTileA: 256 - MacroTileB: 128 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -855643,19 +854987,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 128 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 32 - NumLoadsB: 4 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -855681,6 +855026,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -855712,6 +855058,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -855720,6 +855067,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -855741,28 +855090,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3280 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x128x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT4_2_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM1 + SolutionIndex: 3277 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 + ThreadTile0: 8 ThreadTile1: 2 - ThreadTileA: 64 + ThreadTileA: 8 ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -855772,14 +855126,15 @@ Valid: true VectorStore: -1 VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -855787,15 +855142,17 @@ _DepthUB: 64 _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -855808,10 +855165,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -855819,10 +855179,12 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true @@ -855831,37 +855193,39 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_NEPBS16_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 34816 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 17408 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -855869,33 +855233,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] + MIWaveGroup: [2, 2] + MIWaveTile: [2, 2] MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -855903,19 +855267,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 32 - NumLoadsB: 5 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -855941,6 +855306,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -855972,6 +855338,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -855980,6 +855347,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -856001,28 +855370,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3281 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA2_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM1 + SolutionIndex: 3278 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_2_SU8_SUM0_SUS256_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 + StoreSyncOpt: 0 StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 8 SubGroup1: 32 SubGroupA: 8 SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -856032,30 +855406,33 @@ Valid: true VectorStore: -1 VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -856068,10 +855445,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -856081,9 +855461,11 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -856091,71 +855473,73 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC4_NTD4_NEPBS16_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 - LSPA: 64 - LSPB: 64 - LVCA: 4 - LVCB: 4 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_5_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 57856 LdsInitCVgprs: false - LdsNumBytes: 35840 - LdsNumElementsAlignedA: 17408 - LdsNumElementsAlignedB: 18432 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 17408 - LdsOffsetB_Blk: 82944 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 35840 - LdsOffsetMetadata_Blk: 82944 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 4] - MIWaveTileA: 4 - MIWaveTileB: 4 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 256 - MacroTileA: 256 - MacroTileB: 256 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -856163,19 +855547,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 256 - NumGlobalWriteVectorsPerThread: 64 - NumLoadsA: 4 - NumLoadsB: 4 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 - NumLoadsPerpendicularB: 4 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -856201,6 +855586,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -856232,6 +855618,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -856240,6 +855627,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -856261,28 +855650,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3282 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x256x32_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_4_NTC4_NTD4_NEPBS16_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM8 + SolutionIndex: 3279 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 4 - ThreadTileA: 64 - ThreadTileB: 4 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -856291,7 +855685,7 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 @@ -856299,23 +855693,26 @@ WavefrontSize: 64 WorkGroup: [64, 4, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -856328,10 +855725,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -856339,11 +855739,13 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthA: 4 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -856351,71 +855753,73 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SVW2_VWA2_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT80x64x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_1_SVW1_VWA1_VWB1_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 32 + LSPA: 16 LSPB: 32 - LVCA: 8 + LVCA: 16 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadA: 128 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 23040 LdsInitCVgprs: false - LdsNumBytes: 62464 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 12800 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12800 + LdsOffsetB_Blk: 45568 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 62464 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 45568 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [1, 4] + MIWaveTile: [5, 1] + MIWaveTileA: 5 + MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 80 + MacroTile1: 64 + MacroTileA: 80 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -856423,19 +855827,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 96 - NumLoadsA: 8 - NumLoadsB: 6 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 5 + NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -856461,6 +855866,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -856492,6 +855898,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -856500,6 +855907,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -856521,28 +855930,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3283 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIAV0_MIWT4_3_NTC4_NTD4_SU8_SUM0_SUS256_SVW2_VWA2_WG64_4_1_WGM8 + SolutionIndex: 3280 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT80x64x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 2 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 4 SubGroup1: 64 SubGroupA: 4 SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 20 + ThreadTile1: 1 + ThreadTileA: 20 + ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -856551,15 +855965,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 1 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] + WorkGroup: [16, 16, 1] WorkGroupMapping: 8 - WorkGroupMappingXCC: 1 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 @@ -856571,11 +855986,13 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -856588,10 +856005,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 32 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -856599,11 +856019,13 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -856611,47 +856033,49 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC4_NTD4_SVW4_VWA4_WG64_4_1 - LSCA: 32 - LSCB: 32 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 128 LSPA: 16 LSPB: 16 LVCA: 16 LVCB: 16 - LVPA: 8 - LVPB: 8 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 45056 LdsInitCVgprs: false - LdsNumBytes: 31104 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 14208 + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31104 - LdsOffsetMetadata_Blk: 49664 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 2 - LoopUnroll: 32 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -856659,15 +856083,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [4, 13] - MIWaveTileA: 4 - MIWaveTileB: 13 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 208 - MacroTileA: 256 - MacroTileB: 208 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -856683,19 +856107,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 208 - NumGlobalWriteVectorsPerThread: 52 - NumLoadsA: 16 - NumLoadsB: 13 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 16 - NumLoadsPerpendicularB: 13 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -856721,6 +856146,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -856752,6 +856178,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -856760,6 +856187,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -856781,28 +856210,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3284 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x208x32_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA256_LPA4_LPB4_LRVW4_MIAV0_MIWT4_13_NTC4_NTD4_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM1 + SolutionIndex: 3281 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 - StoreVectorWidth: 4 - SubGroup0: 16 - SubGroup1: 16 - SubGroupA: 16 - SubGroupB: 16 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 13 - ThreadTileA: 16 - ThreadTileB: 13 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -856811,31 +856245,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 32 - _DepthUA: 32 - _DepthUB: 32 - _DepthUMetadata: 32 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -856848,10 +856285,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -856859,11 +856299,13 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -856871,39 +856313,41 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_NEPBS0_SVW8_VWA8_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_VWB2_WG16_16_1 LSCA: 64 LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 27136 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 27136 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 18432 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 27136 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false @@ -856911,7 +856355,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -856919,15 +856363,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 64 + MacroTile1: 128 + MacroTileA: 64 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -856943,19 +856387,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 2 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -856981,6 +856426,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -857012,6 +856458,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -857020,6 +856467,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -857041,28 +856490,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3285 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_NTC3_NTD3_NEPBS0_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM1 + SolutionIndex: 3282 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -857071,31 +856526,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 - VectorWidthB: 1 + VectorWidthA: 4 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -857108,10 +856566,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -857119,11 +856580,13 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 2 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 8 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -857131,47 +856594,49 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SVW8_VWA8_WG32_8_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT2_4_SVW2_VWA2_VWB4_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 51712 LdsInitCVgprs: false - LdsNumBytes: 63488 - LdsNumElementsAlignedA: 33024 - LdsNumElementsAlignedB: 30464 + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33024 - LdsOffsetB_Blk: 98560 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 63488 - LdsOffsetMetadata_Blk: 98560 - LdsPadA: 4 - LdsPadB: 4 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 - LocalReadVectorWidth: 4 + LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -857179,15 +856644,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [8, 7] - MIWaveTileA: 8 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 224 - MacroTileA: 256 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -857203,19 +856668,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 224 - NumGlobalWriteVectorsPerThread: 28 - NumLoadsA: 32 - NumLoadsB: 28 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 32 - NumLoadsPerpendicularB: 28 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -857241,6 +856707,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -857272,6 +856739,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -857280,6 +856748,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -857301,28 +856771,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3286 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x224x64_MI16x16x1_SN_GRVWA2_GRVWB2_GSU1_LBSPPA1024_LPA4_LPB4_LRVW4_MIWT8_7_SU8_SUM0_SUS256_SVW8_VWA8_WG32_8_1_WGM32 + SolutionIndex: 3283 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT2_4_SU8_SUM0_SUS256_SVW2_VWA2_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 7 - ThreadTileA: 32 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -857331,31 +856807,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 - VectorWidthB: 1 + VectorWidthA: 2 + VectorWidthB: 4 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 32 - WorkGroupMappingXCC: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer - _UseSgprForGRO: 0 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -857368,10 +856847,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 256 + DebugStreamK: 0 + DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -857383,6 +856865,8 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true @@ -857391,47 +856875,49 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC4_NTD4_SS1_SPO1_SVW2_VWA2_WG16_4_4 - LSCA: 256 - LSCB: 256 - LSPA: 8 - LSPB: 8 - LVCA: 32 - LVCB: 32 - LVPA: 1 - LVPB: 1 - LdsBlockSizePerPadA: 1024 - LdsBlockSizePerPadB: 512 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_1_SVW2_VWA2_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 33280 LdsInitCVgprs: false - LdsNumBytes: 25600 - LdsNumElementsAlignedA: 16896 - LdsNumElementsAlignedB: 8704 + LdsNumBytes: 33280 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 10240 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 16896 - LdsOffsetB_Blk: 49664 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 25600 - LdsOffsetMetadata_Blk: 49664 + LdsOffsetMetadata: 33280 + LdsOffsetMetadata_Blk: 88576 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 4 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -857439,15 +856925,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 1] - MIWaveTile: [2, 1] - MIWaveTileA: 2 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 1] + MIWaveTileA: 10 MIWaveTileB: 1 MIWaveTileMetadata: 0 - MacroTile0: 32 - MacroTile1: 16 - MacroTileA: 32 - MacroTileB: 16 + MacroTile0: 160 + MacroTile1: 64 + MacroTileA: 160 + MacroTileB: 64 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -857461,20 +856947,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 2 - NumGlobalWriteVectorsPerThread: 1 - NumLoadsA: 4 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 5 NumLoadsB: 2 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularA: 5 NumLoadsPerpendicularB: 2 NumThreads: 256 OptNoLoadLoop: 1 @@ -857501,6 +856988,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -857532,6 +857020,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -857540,6 +857029,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -857561,28 +857052,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3287 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT32x16x256_MI16x16x1_SN_GSU1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_1_NTA4_NTC4_NTD4_SS1_SU0_SUM0_SUS0_SPO1_SVW2_VWA2_WG16_4_4_WGM1 + SolutionIndex: 3284 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 - StaggerU: 0 + StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 0 - StorePriorityOpt: 1 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 StoreSyncOpt: 0 StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 SubGroup0: 4 - SubGroup1: 16 + SubGroup1: 64 SubGroupA: 4 - SubGroupB: 16 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 8 + ThreadTile0: 40 ThreadTile1: 1 - ThreadTileA: 8 + ThreadTileA: 40 ThreadTileB: 1 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -857597,15 +857093,16 @@ WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 4, 4] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 256 - _DepthUA: 256 - _DepthUB: 256 - _DepthUMetadata: 256 + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 @@ -857614,8 +857111,10 @@ _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -857628,10 +857127,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -857643,7 +857145,9 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -857651,10 +857155,11 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_NTC3_NTD3_SVW4_VWA4_WG32_4_2 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_5_SVW2_VWA2_VWB1_WG64_4_1 LSCA: 128 LSCB: 128 LSPA: 16 @@ -857663,35 +857168,36 @@ LVCB: 16 LVPA: 2 LVPB: 2 - LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadA: 512 LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 57856 LdsInitCVgprs: false - LdsNumBytes: 49152 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 13824 + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 47616 - LdsOffsetMetadata_Blk: 99328 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 - LocalSplitU: 2 + LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 1 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -857699,15 +857205,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 1] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 MIWaveTileMetadata: 0 MacroTile0: 128 - MacroTile1: 48 + MacroTile1: 80 MacroTileA: 128 - MacroTileB: 48 + MacroTileB: 80 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -857721,21 +857227,22 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 3 - NonTemporalD: 3 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 24 - NumGlobalWriteVectorsPerThread: 6 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 NumLoadsA: 8 - NumLoadsB: 3 + NumLoadsB: 5 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 3 + NumLoadsPerpendicularB: 5 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -857761,6 +857268,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -857792,6 +857300,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -857800,6 +857309,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -857821,28 +857332,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3288 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_GRVWA8_GSU1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_NTA4_NTC3_NTD3_SU8_SUM0_SUS256_SVW4_VWA4_WG32_4_2_WGM1 + SolutionIndex: 3285 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 SubGroup1: 16 - SubGroupA: 8 + SubGroupA: 16 SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 16 - ThreadTile1: 3 - ThreadTileA: 16 - ThreadTileB: 3 + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -857851,15 +857367,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 4, 2] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 128 @@ -857874,8 +857391,10 @@ _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -857888,10 +857407,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -857899,11 +857421,13 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -857911,35 +857435,37 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTA4_NTC4_NTD4_NEPBS0_SVW2_VWA2_WG16_16_1 - LSCA: 64 - LSCB: 64 - LSPA: 8 - LSPB: 32 - LVCA: 32 - LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 LdsInitCVgprs: false - LdsNumBytes: 53760 - LdsNumElementsAlignedA: 23040 - LdsNumElementsAlignedB: 30720 + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 23040 - LdsOffsetB_Blk: 88576 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 53760 - LdsOffsetMetadata_Blk: 88576 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -857948,10 +857474,10 @@ LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 4 - LoopUnroll: 64 + LoopIters: 8 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -857959,15 +857485,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [10, 3] - MIWaveTileA: 10 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 MIWaveTileB: 3 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 192 - MacroTileA: 160 - MacroTileB: 192 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -857981,20 +857507,21 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 120 - NumGlobalWriteVectorsPerThread: 60 - NumLoadsA: 20 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularA: 8 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -858021,6 +857548,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -858052,6 +857580,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -858060,6 +857589,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -858081,28 +857612,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3289 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT10_3_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW2_VWA2_WG16_16_1_WGM1 + SolutionIndex: 3286 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 40 + ThreadTile0: 16 ThreadTile1: 3 - ThreadTileA: 40 + ThreadTileA: 16 ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -858111,31 +857648,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -858148,10 +857688,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -858159,11 +857702,13 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 + GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 GlobalSplitU: 1 - GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -858171,35 +857716,37 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTA4_NTC4_NTD4_NEPBS0_SVW1_VWA1_WG32_8_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT2_8_SVW2_VWA2_VWB8_WG64_4_1 LSCA: 64 LSCB: 64 - LSPA: 8 + LSPA: 32 LSPB: 32 - LVCA: 32 + LVCA: 8 LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 128 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 35328 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 25600 - LdsNumElementsAlignedB: 35840 + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 16896 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 25600 - LdsOffsetB_Blk: 91136 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 91136 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 83968 LdsPadA: 16 LdsPadB: 16 LdsPadMetadata: 0 @@ -858211,7 +857758,7 @@ LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -858219,15 +857766,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [2, 2] - MIWaveTile: [5, 7] - MIWaveTileA: 5 - MIWaveTileB: 7 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 8] + MIWaveTileA: 2 + MIWaveTileB: 8 MIWaveTileMetadata: 0 - MacroTile0: 160 - MacroTile1: 224 - MacroTileA: 160 - MacroTileB: 224 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -858241,21 +857788,29999 @@ NoReject: false NoTailLoop: false NonTemporal: -1 - NonTemporalA: 4 + NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 - NumElementsPerBatchStore: 0 - NumElementsPerThread: 140 - NumGlobalWriteVectorsPerThread: 140 - NumLoadsA: 20 - NumLoadsB: 7 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 20 - NumLoadsPerpendicularB: 7 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3287 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT2_8_SU8_SUM0_SUS128_SVW2_VWA2_VWB8_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 8 + ThreadTileA: 8 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_4_SVW4_VWA4_VWB4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 34816 + LdsInitCVgprs: false + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3288 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_4_SU8_SUM0_SUS128_SVW4_VWA4_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_5_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 43008 + LdsInitCVgprs: false + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3289 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_5_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT10_2_SVW2_VWA2_VWB2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 41472 + LdsInitCVgprs: false + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 2] + MIWaveTileA: 10 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 5 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3290 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT10_2_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 2 + ThreadTileA: 40 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_3_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 32768 + LdsInitCVgprs: false + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3291 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_3_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_7_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 53248 + LdsInitCVgprs: false + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3292 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_7_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMBSK_K1_LBSPPA256_LBSPPB256_LPA4_LPB4_LRVW4_MIWT4_4_SVW4_VWA4_VWB4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 16896 + LdsInitCVgprs: false + LdsNumBytes: 16896 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 8448 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 16896 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3293 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA4_LPB4_LRVW4_MIWT4_4_SU8_SUM0_SUS64_SVW4_VWA4_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB256_LPA16_LPB16_LRVW8_MIWT5_6_SVW1_VWA1_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 53248 + LdsInitCVgprs: false + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3294 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB256_LPA16_LPB16_LRVW8_MIWT5_6_SU8_SUM0_SUS128_SVW1_VWA1_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT8_4_SVW8_VWA8_VWB4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 51712 + LdsInitCVgprs: false + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3295 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT8_4_SU8_SUM0_SUS128_SVW8_VWA8_VWB4_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_7_SVW1_VWA1_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 + LdsInitCVgprs: false + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 7] + MIWaveTileA: 5 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 224 + MacroTileA: 160 + MacroTileB: 224 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 140 + NumGlobalWriteVectorsPerThread: 140 + NumLoadsA: 5 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3296 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_7_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 7 + ThreadTileA: 20 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_10_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 63488 + LdsInitCVgprs: false + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 46080 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 320 + MacroTileA: 128 + MacroTileB: 320 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 4 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 10 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3297 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x320x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_10_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT10_4_SVW2_VWA2_VWB4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 57856 + LdsInitCVgprs: false + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 4] + MIWaveTileA: 10 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3298 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT10_4_SU8_SUM0_SUS128_SVW2_VWA2_VWB4_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 4 + ThreadTileA: 40 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_3_SVW8_VWA8_VWB1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 21376 + LdsInitCVgprs: false + LdsNumBytes: 21376 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21376 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 3] + MIWaveTileA: 8 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3299 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_3_SU8_SUM0_SUS64_SVW8_VWA8_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_5_SVW1_VWA1_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 51200 + LdsInitCVgprs: false + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 5] + MIWaveTileA: 5 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 160 + MacroTileA: 160 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 100 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 5 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3300 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_5_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 5 + ThreadTileA: 20 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_5_SVW2_VWA2_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 64640 + LdsInitCVgprs: false + LdsNumBytes: 64640 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 43520 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 64640 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 320 + MacroTileA: 160 + MacroTileB: 320 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 10 + NumLoadsB: 20 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 20 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3301 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x320x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_5_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_3_SVW2_VWA2_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 53760 + LdsInitCVgprs: false + LdsNumBytes: 53760 + LdsNumElementsAlignedA: 23040 + LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 23040 + LdsOffsetB_Blk: 88576 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 53760 + LdsOffsetMetadata_Blk: 88576 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [10, 3] + MIWaveTileA: 10 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3302 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT10_3_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 3 + ThreadTileA: 40 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT20_3_SVW4_VWA4_VWB1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 34176 + LdsInitCVgprs: false + LdsNumBytes: 34176 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 86656 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 34176 + LdsOffsetMetadata_Blk: 86656 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 3] + MIWaveTileA: 20 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 192 + MacroTileA: 320 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 10 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3303 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x192x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT20_3_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 80 + ThreadTile1: 3 + ThreadTileA: 80 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB512_LPA4_LPB4_LRVW4_MIWT4_8_SVW4_VWA4_VWB8_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25088 + LdsInitCVgprs: false + LdsNumBytes: 25088 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 16640 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 25088 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3304 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB512_LPA4_LPB4_LRVW4_MIWT4_8_SU8_SUM0_SUS64_SVW4_VWA4_VWB8_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_5_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 64000 + LdsInitCVgprs: false + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 42240 + LdsNumElementsAlignedB: 21760 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 42240 + LdsOffsetB_Blk: 107776 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 107776 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [10, 5] + MIWaveTileA: 10 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 160 + MacroTileA: 320 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 200 + NumGlobalWriteVectorsPerThread: 100 + NumLoadsA: 20 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 20 + NumLoadsPerpendicularB: 10 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3305 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x160x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT10_5_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 40 + ThreadTile1: 5 + ThreadTileA: 40 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_6_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 21504 + LdsInitCVgprs: false + LdsNumBytes: 21504 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21504 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3306 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_6_SU8_SUM0_SUS64_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_7_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 23680 + LdsInitCVgprs: false + LdsNumBytes: 23680 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 15232 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 23680 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 7] + MIWaveTileA: 4 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 224 + MacroTileA: 128 + MacroTileB: 224 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 112 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3307 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x224x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_7_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 7 + ThreadTileA: 16 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT5_8_SVW1_VWA1_VWB8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 59392 + LdsInitCVgprs: false + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 33792 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3308 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT5_8_SU8_SUM0_SUS128_SVW1_VWA1_VWB8_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG32_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 30208 + LdsInitCVgprs: false + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 25600 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3309 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG32_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG16_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 8 + LSPB: 8 + LVCA: 8 + LVCB: 8 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 13312 + LdsInitCVgprs: false + LdsNumBytes: 13312 + LdsNumElementsAlignedA: 2560 + LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 2560 + LdsOffsetB_Blk: 10752 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 2560 + LdsOffsetMetadata_Blk: 10752 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 64 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3310 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG16_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 26624 + LdsInitCVgprs: false + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 5120 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 21504 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 5120 + LdsOffsetMetadata_Blk: 21504 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 1 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 1 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3311 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 29184 + LdsInitCVgprs: false + LdsNumBytes: 29184 + LdsNumElementsAlignedA: 10240 + LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 10240 + LdsOffsetB_Blk: 26624 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 10240 + LdsOffsetMetadata_Blk: 26624 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 16 + MacroTileA: 64 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3312 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_VWB1_WG32_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 23040 + LdsInitCVgprs: false + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 48 + MacroTileA: 32 + MacroTileB: 48 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 + NumThreads: 128 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3313 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG32_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 256 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_2_SVW1_VWA1_VWB2_WG64_4_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 51712 + LdsInitCVgprs: false + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 16896 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 16 + LoopUnroll: 256 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 2] + MIWaveTileA: 1 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 32 + MacroTileA: 64 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3314 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT1_2_SU8_SUM0_SUS512_SVW1_VWA1_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 512 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 2 + ThreadTileA: 4 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 32256 + LdsInitCVgprs: false + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 48 + MacroTileA: 64 + MacroTileB: 48 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3315 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_3_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_1_SVW1_VWA1_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 30720 + LdsInitCVgprs: false + LdsNumBytes: 30720 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 5120 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 58368 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 30720 + LdsOffsetMetadata_Blk: 58368 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 1] + MIWaveTileA: 5 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 32 + MacroTileA: 160 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 5 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3316 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT5_1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 1 + ThreadTileA: 20 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SVW1_VWA1_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 41472 + LdsInitCVgprs: false + LdsNumBytes: 41472 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 83968 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 41472 + LdsOffsetMetadata_Blk: 83968 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [1, 5] + MIWaveTileA: 1 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 80 + MacroTileA: 64 + MacroTileB: 80 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 20 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3317 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_5_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 5 + ThreadTileA: 4 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 + LdsInitCVgprs: false + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3318 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT2_4_SVW2_VWA2_VWB4_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 51712 + LdsInitCVgprs: false + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 16896 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3319 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT2_4_SU8_SUM0_SUS256_SVW2_VWA2_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_5_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 57856 + LdsInitCVgprs: false + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3320 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x112x128_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA4_LPB4_LRVW4_MIWT2_7_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 62848 + LdsInitCVgprs: false + LdsNumBytes: 62848 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 29568 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 62848 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 112 + MacroTileA: 128 + MacroTileB: 112 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 16 + NumLoadsB: 14 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 14 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3321 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x112x128_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA4_LPB4_LRVW4_MIWT2_7_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_SVW8_VWA8_VWB2_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 35328 + LdsInitCVgprs: false + LdsNumBytes: 35328 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 35328 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 2] + MIWaveTileA: 8 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3322 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_2_SU8_SUM0_SUS128_SVW8_VWA8_VWB2_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 2 + ThreadTileA: 32 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT5_8_SVW1_VWA1_VWB8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 59392 + LdsInitCVgprs: false + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 33792 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 8] + MIWaveTileA: 5 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 256 + MacroTileA: 160 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 160 + NumLoadsA: 5 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3323 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT5_8_SU8_SUM0_SUS128_SVW1_VWA1_VWB8_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 8 + ThreadTileA: 20 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT8_3_SVW8_VWA8_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 47616 + LdsInitCVgprs: false + LdsNumBytes: 47616 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 47616 + LdsOffsetMetadata_Blk: 82432 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 3] + MIWaveTileA: 8 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3324 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT8_3_SU8_SUM0_SUS128_SVW8_VWA8_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 3 + ThreadTileA: 32 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 + LdsInitCVgprs: false + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 96 + MacroTileA: 128 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3325 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT20_2_SVW4_VWA4_VWB2_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 62592 + LdsInitCVgprs: false + LdsNumBytes: 62592 + LdsNumElementsAlignedA: 21120 + LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 21120 + LdsOffsetB_Blk: 53888 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 21120 + LdsOffsetMetadata_Blk: 53888 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [20, 2] + MIWaveTileA: 20 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 320 + MacroTile1: 128 + MacroTileA: 320 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 10 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 10 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3326 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT320x128x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT20_2_SU8_SUM0_SUS64_SVW4_VWA4_VWB2_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 80 + ThreadTile1: 2 + ThreadTileA: 80 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT4_8_SVW4_VWA4_VWB8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 51200 + LdsInitCVgprs: false + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 33792 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3327 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT4_8_SU8_SUM0_SUS128_SVW4_VWA4_VWB8_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 256 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_VWB1_WG16_8_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 43520 + LdsInitCVgprs: false + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 16 + LoopUnroll: 256 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 2] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 48 + MacroTile1: 32 + MacroTileA: 48 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 12 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 8 + NumThreads: 128 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3328 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT3_1_SU8_SUM0_SUS512_SVW1_VWA1_VWB1_WG16_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 512 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SVW2_VWA2_VWB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 27136 + LdsInitCVgprs: false + LdsNumBytes: 27136 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 27136 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [2, 1] + MIWaveTileA: 2 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 64 + MacroTileA: 32 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 8 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3329 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_1_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 1 + ThreadTileA: 8 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_VWB1_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 32256 + LdsInitCVgprs: false + LdsNumBytes: 32256 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 18432 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 32256 + LdsOffsetMetadata_Blk: 46592 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 48 + MacroTile1: 64 + MacroTileA: 48 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 3 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3330 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT3_2_SVW1_VWA1_VWB2_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 45056 + LdsInitCVgprs: false + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 96 + MacroTile1: 64 + MacroTileA: 96 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3331 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x64x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT3_2_SU8_SUM0_SUS256_SVW1_VWA1_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_5_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 31232 + LdsInitCVgprs: false + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 12800 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3332 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_5_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_4_SVW2_VWA2_VWB4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 27136 + LdsInitCVgprs: false + LdsNumBytes: 27136 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 27136 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3333 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_4_SU8_SUM0_SUS128_SVW2_VWA2_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMBSK_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_5_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 31232 + LdsInitCVgprs: false + LdsNumBytes: 31232 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 12800 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 31232 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 5] + MIWaveTileA: 2 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 80 + MacroTileA: 128 + MacroTileB: 80 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 40 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3334 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x80x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_5_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 5 + ThreadTileA: 8 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 2 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x112x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB2_GSUAMBSK_K1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT2_7_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 32704 + LdsInitCVgprs: false + LdsNumBytes: 32704 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 7680 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 25088 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 8704 + LdsOffsetMetadata_Blk: 25088 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 7] + MIWaveTileA: 2 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 112 + MacroTileA: 128 + MacroTileB: 112 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 56 + NumGlobalWriteVectorsPerThread: 28 + NumLoadsA: 4 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3335 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x112x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB2_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT2_7_SU8_SUM0_SUS64_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 7 + ThreadTileA: 8 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x192x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMBSK_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_3_SVW4_VWA4_VWB1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 17280 + LdsInitCVgprs: false + LdsNumBytes: 17280 + LdsNumElementsAlignedA: 4224 + LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 4224 + LdsOffsetB_Blk: 36992 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 17280 + LdsOffsetMetadata_Blk: 36992 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 3] + MIWaveTileA: 4 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 192 + MacroTileA: 64 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3336 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x192x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_3_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 3 + ThreadTileA: 16 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_5_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 19328 + LdsInitCVgprs: false + LdsNumBytes: 19328 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 19328 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3337 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_5_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG32_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 30208 + LdsInitCVgprs: false + LdsNumBytes: 30208 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 4608 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 25600 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 9216 + LdsOffsetMetadata_Blk: 25600 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 128 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3338 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x128_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG32_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 18432 + LdsInitCVgprs: false + LdsNumBytes: 18432 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 18432 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3339 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 256 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG32_8_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 34816 + LdsInitCVgprs: false + LdsNumBytes: 34816 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 34816 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 16 + LoopUnroll: 256 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 32 + MacroTileA: 32 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3340 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x32x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS512_SVW1_VWA1_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 512 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 256 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SVW1_VWA1_VWB1_WG32_4_1 + LSCA: 256 + LSCB: 256 + LSPA: 4 + LSPB: 4 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 43520 + LdsInitCVgprs: false + LdsNumBytes: 43520 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 26112 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 43520 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 16 + LoopUnroll: 256 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 3] + MIWaveTileA: 1 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 48 + MacroTileA: 32 + MacroTileB: 48 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 12 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 12 + NumThreads: 128 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3341 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x48x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_3_SU8_SUM0_SUS512_SVW1_VWA1_VWB1_WG32_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 512 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 3 + ThreadTileA: 4 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 24576 + LdsInitCVgprs: false + LdsNumBytes: 24576 + LdsNumElementsAlignedA: 9216 + LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 9216 + LdsOffsetB_Blk: 41984 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 24576 + LdsOffsetMetadata_Blk: 41984 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 96 + MacroTileA: 64 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 2 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3342 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT2_3_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_4_SVW2_VWA2_VWB4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 27136 + LdsInitCVgprs: false + LdsNumBytes: 27136 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 27136 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 4] + MIWaveTileA: 2 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3343 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT2_4_SU8_SUM0_SUS128_SVW2_VWA2_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 4 + ThreadTileA: 8 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB256_LPA16_LPB16_LRVW8_MIWT5_6_SVW1_VWA1_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 53248 + LdsInitCVgprs: false + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 6] + MIWaveTileA: 5 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 192 + MacroTileA: 160 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 120 + NumLoadsA: 5 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3344 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB256_LPA16_LPB16_LRVW8_MIWT5_6_SU8_SUM0_SUS128_SVW1_VWA1_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 6 + ThreadTileA: 20 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_5_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 43008 + LdsInitCVgprs: false + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 5] + MIWaveTileA: 4 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 160 + MacroTileA: 128 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 4 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3345 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_5_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 5 + ThreadTileA: 16 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA4_LPB4_LRVW4_MIWT4_4_SVW4_VWA4_VWB4_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 16896 + LdsInitCVgprs: false + LdsNumBytes: 16896 + LdsNumElementsAlignedA: 8448 + LdsNumElementsAlignedB: 8448 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8448 + LdsOffsetB_Blk: 41216 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 16896 + LdsOffsetMetadata_Blk: 41216 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 4] + MIWaveTileA: 4 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 128 + MacroTileA: 128 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 64 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3346 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA4_LPB4_LRVW4_MIWT4_4_SU8_SUM0_SUS64_SVW4_VWA4_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 4 + ThreadTileA: 16 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA4_LPB4_LRVW4_MIWT8_4_SVW8_VWA8_VWB4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25216 + LdsInitCVgprs: false + LdsNumBytes: 25216 + LdsNumElementsAlignedA: 8320 + LdsNumElementsAlignedB: 16896 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8320 + LdsOffsetB_Blk: 41088 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 25216 + LdsOffsetMetadata_Blk: 41088 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 256 + MacroTileA: 128 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 4 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3347 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x256x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA4_LPB4_LRVW4_MIWT8_4_SU8_SUM0_SUS64_SVW8_VWA8_VWB4_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_VWB1_WG16_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 23040 + LdsInitCVgprs: false + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 46592 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 2] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 48 + MacroTile1: 32 + MacroTileA: 48 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 + NumThreads: 128 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3348 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG16_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SVW2_VWA2_VWB2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 23040 + LdsInitCVgprs: false + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 18432 + LdsNumElementsAlignedB: 4608 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 18432 + LdsOffsetB_Blk: 51200 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 51200 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 2] + MIWaveTileA: 2 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 32 + MacroTileA: 128 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3349 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_2_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 8 + ThreadTile1: 2 + ThreadTileA: 8 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT3_4_SVW1_VWA1_VWB4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 + LdsInitCVgprs: false + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 33792 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3350 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_1_SVW2_VWA2_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 24064 + LdsInitCVgprs: false + LdsNumBytes: 24064 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 10240 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 24064 + LdsOffsetMetadata_Blk: 46592 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 1] + MIWaveTileA: 6 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 96 + MacroTile1: 64 + MacroTileA: 96 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 3 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3351 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 1 + ThreadTileA: 24 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT6_2_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 36864 + LdsInitCVgprs: false + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 64 + MacroTileA: 192 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3352 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT6_2_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 2 + ThreadTileA: 24 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT6_2_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 36864 + LdsInitCVgprs: false + LdsNumBytes: 36864 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 36864 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 64 + MacroTileA: 192 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3353 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT6_2_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 2 + ThreadTileA: 24 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT6_2_SVW2_VWA2_VWB2_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60928 + LdsInitCVgprs: false + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [6, 2] + MIWaveTileA: 6 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3354 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT6_2_SU8_SUM0_SUS256_SVW2_VWA2_VWB2_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 2 + ThreadTileA: 24 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_3_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 43008 + LdsInitCVgprs: false + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 15360 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 3] + MIWaveTileA: 6 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 96 + MacroTileA: 192 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 72 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 3 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3355 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x96x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_3_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 3 + ThreadTileA: 24 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT12_3_SVW4_VWA4_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 56832 + LdsInitCVgprs: false + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3356 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT12_3_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_6_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 45056 + LdsInitCVgprs: false + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 82944 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 82944 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 6] + MIWaveTileA: 4 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 192 + MacroTileA: 128 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 4 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3357 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_6_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 6 + ThreadTileA: 16 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT6_4_SVW2_VWA2_VWB4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 64000 + LdsInitCVgprs: false + LdsNumBytes: 64000 + LdsNumElementsAlignedA: 55296 + LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 55296 + LdsOffsetB_Blk: 120832 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 64000 + LdsOffsetMetadata_Blk: 120832 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 384 + MacroTile1: 64 + MacroTileA: 384 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 12 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3358 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT6_4_SU8_SUM0_SUS128_SVW2_VWA2_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_5_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 53248 + LdsInitCVgprs: false + LdsNumBytes: 53248 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 53248 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 5] + MIWaveTileA: 6 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 160 + MacroTileA: 192 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 120 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3359 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_5_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 5 + ThreadTileA: 24 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT8_4_SVW8_VWA8_VWB4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 51200 + LdsInitCVgprs: false + LdsNumBytes: 51200 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 51200 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 4] + MIWaveTileA: 8 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 16 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3360 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB512_LPA16_LPB16_LRVW8_MIWT8_4_SU8_SUM0_SUS128_SVW8_VWA8_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 4 + ThreadTileA: 32 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT12_3_SVW4_VWA4_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 56832 + LdsInitCVgprs: false + LdsNumBytes: 56832 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 30720 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 56832 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3361 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT12_3_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT12_3_SVW4_VWA4_VWB1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 58496 + LdsInitCVgprs: false + LdsNumBytes: 58496 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 13056 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 45440 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 12672 + LdsOffsetMetadata_Blk: 45440 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 3] + MIWaveTileA: 12 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3362 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT12_3_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 48 + ThreadTile1: 3 + ThreadTileA: 48 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT6_6_SVW2_VWA2_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 55296 + LdsInitCVgprs: false + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 192 + MacroTileA: 192 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3363 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT6_6_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT8_5_SVW8_VWA8_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 59392 + LdsInitCVgprs: false + LdsNumBytes: 59392 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 25600 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 59392 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3364 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB128_LPA16_LPB16_LRVW8_MIWT8_5_SU8_SUM0_SUS128_SVW8_VWA8_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_7_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 63488 + LdsInitCVgprs: false + LdsNumBytes: 63488 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 35840 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 63488 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3365 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x224x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_7_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT12_4_SVW4_VWA4_VWB4_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60928 + LdsInitCVgprs: false + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3366 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT12_4_SU8_SUM0_SUS128_SVW4_VWA4_VWB4_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_13_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61568 + LdsInitCVgprs: false + LdsNumBytes: 61568 + LdsNumElementsAlignedA: 33280 + LdsNumElementsAlignedB: 28288 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33280 + LdsOffsetB_Blk: 98816 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61568 + LdsOffsetMetadata_Blk: 98816 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 13] + MIWaveTileA: 4 + MIWaveTileB: 13 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 208 + MacroTileA: 256 + MacroTileB: 208 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 208 + NumGlobalWriteVectorsPerThread: 52 + NumLoadsA: 16 + NumLoadsB: 13 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 16 + NumLoadsPerpendicularB: 13 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3367 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x208x64_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_13_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 13 + ThreadTileA: 16 + ThreadTileB: 13 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT12_5_SVW4_VWA4_VWB1_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 34432 + LdsInitCVgprs: false + LdsNumBytes: 34432 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 21760 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 78208 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 34432 + LdsOffsetMetadata_Blk: 78208 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 320 + MacroTileA: 192 + MacroTileB: 320 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 6 + NumLoadsB: 10 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 10 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3368 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x320x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT12_5_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT6_8_SVW2_VWA2_VWB8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 + LdsInitCVgprs: false + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 33792 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3369 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT6_8_SU8_SUM0_SUS128_SVW2_VWA2_VWB8_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_10_SVW4_VWA4_VWB2_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 57856 + LdsInitCVgprs: false + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 10] + MIWaveTileA: 4 + MIWaveTileB: 10 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 40 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3370 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_10_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 10 + ThreadTileA: 16 + ThreadTileB: 10 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_6_SVW8_VWA8_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 1024 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 + LdsInitCVgprs: false + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 33792 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 33792 + LdsOffsetB_Blk: 99328 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 99328 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 6] + MIWaveTileA: 8 + MIWaveTileB: 6 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3371 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA1024_LBSPPB256_LPA16_LPB16_LRVW8_MIWT8_6_SU8_SUM0_SUS128_SVW8_VWA8_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 6 + ThreadTileA: 32 + ThreadTileB: 6 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG32_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 8 + LVCB: 8 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 15872 + LdsInitCVgprs: false + LdsNumBytes: 15872 + LdsNumElementsAlignedA: 5120 + LdsNumElementsAlignedB: 2560 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 8192 + LdsOffsetB: 5120 + LdsOffsetB_Blk: 13312 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 5120 + LdsOffsetMetadata_Blk: 13312 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 32 + MacroTile1: 16 + MacroTileA: 32 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 1 + NumThreads: 128 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3372 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT32x16x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG32_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 16 + SubGroupA: 8 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_1_SVW4_VWA4_VWB1_WG16_16_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 18944 + LdsInitCVgprs: false + LdsNumBytes: 18944 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 10240 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 18944 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [4, 1] + MIWaveTileA: 4 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 64 + MacroTile1: 64 + MacroTileA: 64 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 16 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 2 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 2 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3373 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT64x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_1_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 1 + ThreadTileA: 16 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_1_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 32768 + LdsInitCVgprs: false + LdsNumBytes: 32768 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 5120 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 60416 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 32768 + LdsOffsetMetadata_Blk: 60416 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 1] + MIWaveTileA: 6 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 32 + MacroTileA: 192 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 6 + NumLoadsB: 1 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 1 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3374 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x32x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA16_LPB16_LRVW8_MIWT6_1_SU8_SUM0_SUS128_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 1 + ThreadTileA: 24 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT3_4_SVW1_VWA1_VWB4_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 + LdsInitCVgprs: false + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 33792 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 4] + MIWaveTileA: 3 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 96 + MacroTile1: 128 + MacroTileA: 96 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 48 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3375 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT3_4_SU8_SUM0_SUS256_SVW1_VWA1_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 4 + ThreadTileA: 12 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SVW4_VWA4_VWB2_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 26624 + LdsInitCVgprs: false + LdsNumBytes: 26624 + LdsNumElementsAlignedA: 17408 + LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 17408 + LdsOffsetB_Blk: 50176 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 26624 + LdsOffsetMetadata_Blk: 50176 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [4, 2] + MIWaveTileA: 4 + MIWaveTileB: 2 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 64 + MacroTileA: 128 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 32 + NumGlobalWriteVectorsPerThread: 8 + NumLoadsA: 4 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 4 + NumLoadsPerpendicularB: 2 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3376 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x64x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT4_2_SU8_SUM0_SUS128_SVW4_VWA4_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 2 + ThreadTileA: 16 + ThreadTileB: 2 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 2 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBufferSingleKernel + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_3_SVW1_VWA1_VWB1_WG32_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 55296 + LdsInitCVgprs: false + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 27648 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [3, 3] + MIWaveTileA: 3 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 96 + MacroTile1: 96 + MacroTileA: 96 + MacroTileB: 96 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 36 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 6 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3377 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT96x96x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_3_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 3 + ThreadTileA: 12 + ThreadTileB: 3 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB512_LPA16_LPB16_LRVW8_MIWT5_4_SVW1_VWA1_VWB4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 43008 + LdsInitCVgprs: false + LdsNumBytes: 43008 + LdsNumElementsAlignedA: 25600 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25600 + LdsOffsetB_Blk: 91136 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 43008 + LdsOffsetMetadata_Blk: 91136 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [5, 4] + MIWaveTileA: 5 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 160 + MacroTile1: 128 + MacroTileA: 160 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 80 + NumGlobalWriteVectorsPerThread: 80 + NumLoadsA: 5 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 5 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3378 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT160x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB512_LPA16_LPB16_LRVW8_MIWT5_4_SU8_SUM0_SUS128_SVW1_VWA1_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 20 + ThreadTile1: 4 + ThreadTileA: 20 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_12_SVW4_VWA4_VWB4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60928 + LdsInitCVgprs: false + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 26112 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3379 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_12_SU8_SUM0_SUS128_SVW4_VWA4_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT6_4_SVW2_VWA2_VWB4_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 45056 + LdsInitCVgprs: false + LdsNumBytes: 45056 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 17408 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 45056 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 96 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3380 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT6_4_SU8_SUM0_SUS128_SVW2_VWA2_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA4_LPB4_LRVW4_MIWT12_4_SVW4_VWA4_VWB4_WG16_16_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 62336 + LdsInitCVgprs: false + LdsNumBytes: 62336 + LdsNumElementsAlignedA: 12672 + LdsNumElementsAlignedB: 16896 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 12672 + LdsOffsetB_Blk: 45440 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 12672 + LdsOffsetMetadata_Blk: 45440 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [12, 4] + MIWaveTileA: 12 + MIWaveTileB: 4 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3381 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA4_LPB4_LRVW4_MIWT12_4_SU8_SUM0_SUS64_SVW4_VWA4_VWB4_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 48 + ThreadTile1: 4 + ThreadTileA: 48 + ThreadTileB: 4 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT12_5_SVW4_VWA4_VWB1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 36224 + LdsInitCVgprs: false + LdsNumBytes: 36224 + LdsNumElementsAlignedA: 25344 + LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 25344 + LdsOffsetB_Blk: 90880 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 36224 + LdsOffsetMetadata_Blk: 90880 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [12, 5] + MIWaveTileA: 12 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 384 + MacroTile1: 160 + MacroTileA: 384 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 + NumLoadsA: 12 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 12 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3382 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT384x160x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT12_5_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 48 + ThreadTile1: 5 + ThreadTileA: 48 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA256_LBSPPB512_LPA4_LPB4_LRVW4_MIWT4_8_SVW4_VWA4_VWB8_WG64_4_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 25216 + LdsInitCVgprs: false + LdsNumBytes: 25216 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 8320 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 49664 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 25216 + LdsOffsetMetadata_Blk: 49664 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3383 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB512_LPA4_LPB4_LRVW4_MIWT4_8_SU8_SUM0_SUS64_SVW4_VWA4_VWB8_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_12_SVW4_VWA4_VWB4_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60928 + LdsInitCVgprs: false + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 26112 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 12] + MIWaveTileA: 4 + MIWaveTileB: 12 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 192 + MacroTileA: 256 + MacroTileB: 192 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 48 + NumLoadsA: 8 + NumLoadsB: 6 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 6 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3384 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT4_12_SU8_SUM0_SUS128_SVW4_VWA4_VWB4_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 12 + ThreadTileA: 16 + ThreadTileB: 12 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 4 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 256 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SVW1_VWA1_VWB1_WG16_4_1 + LSCA: 256 + LSCB: 256 + LSPA: 2 + LSPB: 2 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 17408 + LdsInitCVgprs: false + LdsNumBytes: 17408 + LdsNumElementsAlignedA: 8704 + LdsNumElementsAlignedB: 8704 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 8704 + LdsOffsetB_Blk: 41472 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 17408 + LdsOffsetMetadata_Blk: 41472 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 16 + LoopUnroll: 256 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 1] + MIWaveTile: [1, 1] + MIWaveTileA: 1 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 16 + MacroTile1: 16 + MacroTileA: 16 + MacroTileB: 16 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 4 + NumGlobalWriteVectorsPerThread: 4 + NumLoadsA: 8 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 8 + NumThreads: 64 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3385 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT16x16x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT1_1_SU8_SUM0_SUS512_SVW1_VWA1_VWB1_WG16_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 512 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 16 + SubGroupA: 4 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 4 + ThreadTile1: 1 + ThreadTileA: 4 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_VWB1_WG16_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 16 + LSPB: 16 + LVCA: 8 + LVCB: 8 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 29184 + LdsInitCVgprs: false + LdsNumBytes: 29184 + LdsNumElementsAlignedA: 7680 + LdsNumElementsAlignedB: 5120 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 16384 + LdsOffsetB: 7680 + LdsOffsetB_Blk: 24064 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 7680 + LdsOffsetMetadata_Blk: 24064 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 2] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 48 + MacroTile1: 32 + MacroTileA: 48 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 3 + NumLoadsB: 2 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 2 + NumThreads: 128 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3386 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x32x64_MI16x16x1_SN_LDSB0_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIWT3_1_SU8_SUM0_SUS128_SVW1_VWA1_VWB1_WG16_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 256 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_VWB1_WG16_16_1 + LSCA: 256 + LSCB: 256 + LSPA: 8 + LSPB: 8 + LVCA: 32 + LVCB: 32 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 512 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60928 + LdsInitCVgprs: false + LdsNumBytes: 60928 + LdsNumElementsAlignedA: 26112 + LdsNumElementsAlignedB: 34816 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 26112 + LdsOffsetB_Blk: 91648 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 60928 + LdsOffsetMetadata_Blk: 91648 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 16 + LoopUnroll: 256 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 48 + MacroTile1: 64 + MacroTileA: 48 + MacroTileB: 64 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3387 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x64x256_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB512_LPA16_LPB16_LRVW8_MIWT3_1_SU8_SUM0_SUS512_SVW1_VWA1_VWB1_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 512 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 256 + _DepthUA: 256 + _DepthUB: 256 + _DepthUMetadata: 256 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 2 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT6_8_SVW2_VWA2_VWB8_WG32_8_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61440 + LdsInitCVgprs: false + LdsNumBytes: 61440 + LdsNumElementsAlignedA: 27648 + LdsNumElementsAlignedB: 33792 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 61440 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 8] + MIWaveTileA: 6 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 256 + MacroTileA: 192 + MacroTileB: 256 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 192 + NumGlobalWriteVectorsPerThread: 96 + NumLoadsA: 6 + NumLoadsB: 8 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 8 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3388 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x256x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT6_8_SU8_SUM0_SUS128_SVW2_VWA2_VWB8_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 8 + ThreadTileA: 24 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 2] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT4_8_SVW4_VWA4_VWB8_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 1024 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 51712 + LdsInitCVgprs: false + LdsNumBytes: 51712 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 16896 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 51712 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 8] + MIWaveTileA: 4 + MIWaveTileB: 8 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 128 + MacroTileA: 256 + MacroTileB: 128 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 128 + NumGlobalWriteVectorsPerThread: 32 + NumLoadsA: 8 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 4 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3389 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x128x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB1024_LPA16_LPB16_LRVW8_MIWT4_8_SU8_SUM0_SUS128_SVW4_VWA4_VWB8_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 8 + ThreadTileA: 16 + ThreadTileB: 8 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 8 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 8 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_5_SVW8_VWA8_VWB1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 60288 + LdsInitCVgprs: false + LdsNumBytes: 60288 + LdsNumElementsAlignedA: 16640 + LdsNumElementsAlignedB: 10880 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 16640 + LdsOffsetB_Blk: 49408 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 16640 + LdsOffsetMetadata_Blk: 49408 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [8, 5] + MIWaveTileA: 8 + MIWaveTileB: 5 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 160 + MacroTileA: 256 + MacroTileB: 160 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 160 + NumGlobalWriteVectorsPerThread: 20 + NumLoadsA: 8 + NumLoadsB: 5 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 5 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3390 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x160x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA4_LPB4_LRVW4_MIWT8_5_SU8_SUM0_SUS64_SVW8_VWA8_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 8 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 32 + ThreadTile1: 5 + ThreadTileA: 32 + ThreadTileB: 5 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 8 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 0 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 32 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_7_SVW2_VWA2_VWB1_WG32_8_1 + LSCA: 32 + LSCB: 32 + LSPA: 32 + LSPB: 32 + LVCA: 8 + LVCB: 8 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 61056 + LdsInitCVgprs: false + LdsNumBytes: 61056 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 15232 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 13056 + LdsOffsetMetadata_Blk: 45824 + LdsPadA: 4 + LdsPadB: 4 + LdsPadMetadata: 0 + LocalReadVectorWidth: 4 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 2 + LoopUnroll: 32 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [2, 2] + MIWaveTile: [6, 7] + MIWaveTileA: 6 + MIWaveTileB: 7 + MIWaveTileMetadata: 0 + MacroTile0: 192 + MacroTile1: 224 + MacroTileA: 192 + MacroTileB: 224 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 168 + NumGlobalWriteVectorsPerThread: 84 + NumLoadsA: 6 + NumLoadsB: 7 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 7 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3391 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x224x32_MI16x16x1_SN_LDSB0_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB128_LPA4_LPB4_LRVW4_MIWT6_7_SU8_SUM0_SUS64_SVW2_VWA2_VWB1_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 64 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 24 + ThreadTile1: 7 + ThreadTileA: 24 + ThreadTileB: 7 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 2 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 64 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 4 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 4 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSUAMB_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_9_SVW4_VWA4_VWB1_WG64_4_1 + LSCA: 64 + LSCB: 64 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 + LVPA: 4 + LVPB: 4 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 57856 + LdsInitCVgprs: false + LdsNumBytes: 57856 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 23040 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 57856 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 4 + LoopUnroll: 64 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 9] + MIWaveTileA: 4 + MIWaveTileB: 9 + MIWaveTileMetadata: 0 + MacroTile0: 256 + MacroTile1: 144 + MacroTileA: 256 + MacroTileB: 144 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 36 + NumLoadsA: 8 + NumLoadsB: 9 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 9 + NumThreads: 256 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3392 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x144x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA16_LPB16_LRVW8_MIWT4_9_SU8_SUM0_SUS128_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 128 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 4 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 16 + ThreadTile1: 9 + ThreadTileA: 16 + ThreadTileB: 9 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 4 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 64 + _DepthUA: 64 + _DepthUB: 64 + _DepthUMetadata: 64 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBuffer + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SVW1_VWA1_VWB1_WG16_8_1 + LSCA: 128 + LSCB: 128 + LSPA: 8 + LSPB: 8 + LVCA: 16 + LVCB: 16 + LVPA: 1 + LVPB: 1 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 23040 + LdsInitCVgprs: false + LdsNumBytes: 23040 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 9216 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 46592 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 23040 + LdsOffsetMetadata_Blk: 46592 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [1, 2] + MIWaveTile: [3, 1] + MIWaveTileA: 3 + MIWaveTileB: 1 + MIWaveTileMetadata: 0 + MacroTile0: 48 + MacroTile1: 32 + MacroTileA: 48 + MacroTileB: 32 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 12 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 6 + NumLoadsB: 4 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 + NumThreads: 128 + OptNoLoadLoop: 1 + PackedC0IdxChars: [I] + PackedC0IndicesX: [0] + PackedC1IdxChars: [J] + PackedC1IndicesX: [1] + PrefetchGlobalRead: 2 + PrefetchLocalRead: 1 + PreloadKernArgs: true + ProblemType: + Activation: true + ActivationComputeDataType: 0 + ActivationNoGuard: false + ActivationType: hipblaslt_all + AllowNoFreeDims: false + AssignedDerivedParameters: true + Batched: true + BetaOnlyUseBias: false + BiasDataTypeList: [0, 4] + BiasSrc: D + ComplexConjugateA: false + ComplexConjugateB: false + ComputeDataType: 0 + DataType: 4 + DataTypeA: 4 + DataTypeAmaxD: 0 + DataTypeB: 4 + DataTypeE: 4 + DestDataType: 4 + F32XdlMathOp: 0 + Gradient: false + GroupedGemm: false + HighPrecisionAccumulate: true + Index0: 0 + Index01A: 0 + Index01B: 1 + Index1: 1 + IndexAssignmentsA: [3, 0, 2] + IndexAssignmentsB: [3, 1, 2] + IndexAssignmentsLD: [4, 5, 6, 7] + IndexAssignmentsMetadata: [3, 0, 2] + IndexUnroll: 3 + IndexUnrollA: 0 + IndexUnrollB: 0 + IndexUnrollM: 0 + IndicesBatch: [2] + IndicesFree: [0, 1] + IndicesSummation: [3] + MirrorDimsA: [] + MirrorDimsB: [] + MirrorDimsMetadata: [] + NumIndicesBatch: 1 + NumIndicesC: 3 + NumIndicesFree: 2 + NumIndicesLD: 4 + NumIndicesSummation: 1 + OperationType: GEMM + OutputAmaxD: false + SetConstStrideA: [] + SetConstStrideB: [] + SetConstStrideBias: [] + SilentHighPrecisionAccumulate: false + Sparse: 0 + StochasticRounding: false + StridedBatched: true + SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false + TLUA: false + TLUB: false + Tensor0: 0 + Tensor1: 1 + TileA: 0 + TileAwareSelection: false + TileB: 1 + TotalIndices: 4 + TransposeA: 1 + TransposeB: 0 + UseBeta: true + UseBias: 1 + UseE: false + UseInitialStridesAB: false + UseInitialStridesCD: false + UseScaleAB: '' + UseScaleAlphaVec: 1 + UseScaleCD: false + ScheduleGlobalRead: 1 + ScheduleIterAlg: 3 + ScheduleLocalWrite: 1 + SolutionIndex: 3393 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x32x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT3_1_SU8_SUM0_SUS256_SVW1_VWA1_VWB1_WG16_8_1_WGM8_WGMXCC4_WGMXCCG80 + SourceSwap: 1 + StaggerU: 8 + StaggerUMapping: 0 + StaggerUStride: 256 + StorePriorityOpt: false + StoreRemapVectorWidth: 0 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 32 + SubGroupA: 4 + SubGroupB: 32 + SuppressNoLoadLoop: false + ThreadTile: [1, 1] + ThreadTile0: 12 + ThreadTile1: 1 + ThreadTileA: 12 + ThreadTileB: 1 + TransposeLDS: 1 + TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 + UnrollMajorLDSA: true + UnrollMajorLDSB: true + UnrollMajorLDSMetadata: true + Use64bShadowLimit: 1 + UseInstOffsetForGRO: 0 + UseSgprForGRO: -1 + Valid: true + VectorStore: -1 + VectorWidthA: 1 + VectorWidthB: 1 + WaveSeparateGlobalReadA: 0 + WaveSeparateGlobalReadB: 0 + WaveSeparateGlobalReadMetadata: 0 + WavefrontSize: 64 + WorkGroup: [16, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 + WorkGroupReduction: false + WorkspaceCheck: [4, 0, 1] + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBuffer + _UseSgprForGRO: 1 + _VectorStore: 1 + _WorkspaceSizePerElemBias: 0 + _WorkspaceSizePerElemC: 4 + _staggerStrideShift: 0 + - 1LDSBuffer: 1 + ActivationAlt: false + ActivationFuncCall: false + ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 + AssertFree0ElementMultiple: 1 + AssertFree1ElementMultiple: 1 + AssertSummationElementMultiple: 1 + AssignedDerivedParameters: true + AssignedProblemIndependentDerivedParameters: true + BufferLoad: true + BufferStore: true + CUCount: null + ClusterLocalRead: 1 + CodeObjectVersion: default + ConvertAfterDS: false + CustomKernelName: '' + DebugStreamK: 0 + DepthU: 128 + DirectToLds: false + DirectToLdsA: false + DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false + DirectToVgprSparseMetadata: false + EdgeType: ShiftPtr + EnableF32XdlMathOp: false + EnableMatrixInstruction: true + ExpandPointerSwap: 0 + ForceDisableShadowInit: false + GlobalReadPerMfma: 1 + GlobalReadVectorWidthA: 8 + GlobalReadVectorWidthB: 8 + GlobalSplitU: 1 + GlobalSplitUAlgorithm: MultipleBufferSingleKernel + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 + GroupLoadStore: false + GuaranteeNoPartialA: true + GuaranteeNoPartialB: true + GuaranteeNoPartialMetadata: true + ISA: [9, 4, 2] + InnerUnroll: 1 + InterleaveAlpha: 0 + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true + KernelLanguage: Assembly + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMBSK_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SVW2_VWA2_VWB1_WG64_4_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 + LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadB: 256 + LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 48640 + LdsInitCVgprs: false + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 34816 + LdsNumElementsAlignedB: 13824 + LdsNumElementsAlignedMetadata: 0 + LdsOffsetA: 0 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 34816 + LdsOffsetB_Blk: 100352 + LdsOffsetBias: 0 + LdsOffsetBiasGSU: 0 + LdsOffsetBiasNonGSU: 0 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 100352 + LdsPadA: 16 + LdsPadB: 16 + LdsPadMetadata: 0 + LocalReadVectorWidth: 8 + LocalSplitU: 1 + LocalWritePerMfma: -1 + LocalWriteUseSgprA: false + LocalWriteUseSgprB: false + LoopIters: 8 + LoopUnroll: 128 + MFMA_BF16_1K: false + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] + MIInputPerThread: 4 + MIInputPerThreadA: 4 + MIInputPerThreadB: 4 + MIInputPerThreadMetadata: 4 + MIOutputVectorWidth: 4 + MIRegPerOut: 1 + MIWaveGroup: [4, 1] + MIWaveTile: [2, 3] + MIWaveTileA: 2 + MIWaveTileB: 3 + MIWaveTileMetadata: 0 + MacroTile0: 128 + MacroTile1: 48 + MacroTileA: 128 + MacroTileB: 48 + MagicDivAlg: 2 + MatrixInstB: 1 + MatrixInstBM: 1 + MatrixInstBN: 1 + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] + MaxOccupancy: 40 + NoLdsWriteCode: false + NoReject: false + NoTailLoop: false + NonTemporal: -1 + NonTemporalA: 0 + NonTemporalB: 0 + NonTemporalC: 0 + NonTemporalD: 0 + NonTemporalE: 0 + NonTemporalMetadata: 0 + NonTemporalWS: 0 + NumElementsPerBatchStore: 16 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 12 + NumLoadsA: 8 + NumLoadsB: 3 + NumLoadsCoalescedA: 1 + NumLoadsCoalescedB: 1 + NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularB: 3 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -858281,6 +887806,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -858312,6 +887838,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -858320,6 +887847,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -858341,28 +887870,34 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3290 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT160x224x64_MI16x16x1_SN_GRVWA2_GSU1_LBSPPA128_LBSPPB128_LPA16_LPB16_LRVW8_MIAV0_MIWT5_7_NTA4_NTC4_NTD4_NEPBS0_SU8_SUM0_SUS256_SVW1_VWA1_WG32_8_1_WGM1 + SolutionIndex: 3394 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT128x48x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMBSK_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB256_LPA16_LPB16_LRVW8_MIWT2_3_SU8_SUM0_SUS256_SVW2_VWA2_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 1 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false + SynchronizerSizeCheck: 1 ThreadTile: [1, 1] - ThreadTile0: 20 - ThreadTile1: 7 - ThreadTileA: 20 - ThreadTileB: 7 + ThreadTile0: 8 + ThreadTile1: 3 + ThreadTileA: 8 + ThreadTileB: 3 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -858371,31 +887906,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 1 + VectorWidthA: 2 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [32, 8, 1] - WorkGroupMapping: 1 - WorkGroupMappingXCC: 1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 - _GlobalAccumulation: MultipleBuffer + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 + _GlobalAccumulation: MultipleBufferSingleKernel _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -858408,10 +887946,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' - DepthU: 64 + DebugStreamK: 0 + DepthU: 128 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -858423,7 +887964,9 @@ GlobalReadVectorWidthB: 8 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 2 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 1 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -858431,37 +887974,39 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SVW2_VWA2_WG128_2_1 - LSCA: 64 - LSCB: 64 - LSPA: 32 - LSPB: 32 - LVCA: 8 - LVCB: 8 - LVPA: 4 - LVPB: 4 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT3_2_SVW1_VWA1_VWB2_WG16_16_1 + LSCA: 128 + LSCB: 128 + LSPA: 16 + LSPB: 16 + LVCA: 16 + LVCB: 16 + LVPA: 2 + LVPB: 2 LdsBlockSizePerPadA: 256 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadB: 512 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 48640 LdsInitCVgprs: false - LdsNumBytes: 57856 - LdsNumElementsAlignedA: 34816 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 48640 + LdsNumElementsAlignedA: 13824 + LdsNumElementsAlignedB: 34816 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 34816 - LdsOffsetB_Blk: 100352 + LdsOffsetB: 13824 + LdsOffsetB_Blk: 79360 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 57856 - LdsOffsetMetadata_Blk: 100352 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 48640 + LdsOffsetMetadata_Blk: 79360 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 @@ -858469,33 +888014,33 @@ LocalWriteUseSgprA: false LocalWriteUseSgprB: false LoopIters: 8 - LoopUnroll: 64 + LoopUnroll: 128 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [4, 1] - MIWaveTile: [2, 5] - MIWaveTileA: 2 - MIWaveTileB: 5 + MIWaveGroup: [1, 4] + MIWaveTile: [3, 2] + MIWaveTileA: 3 + MIWaveTileB: 2 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 160 - MacroTileA: 256 - MacroTileB: 160 + MacroTile0: 48 + MacroTile1: 128 + MacroTileA: 48 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -858503,19 +888048,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 80 - NumLoadsA: 8 - NumLoadsB: 5 + NumElementsPerThread: 24 + NumGlobalWriteVectorsPerThread: 24 + NumLoadsA: 3 + NumLoadsB: 8 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularA: 3 + NumLoadsPerpendicularB: 8 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -858541,6 +888087,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -858572,6 +888119,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -858580,6 +888128,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -858601,28 +888151,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3291 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x160x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA256_LPA8_LPB8_LRVW8_MIWT2_5_SU8_SUM0_SUS256_SVW2_VWA2_WG128_2_1_WGM16 + SolutionIndex: 3395 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT48x128x128_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB512_LPA16_LPB16_LRVW8_MIWT3_2_SU8_SUM0_SUS256_SVW1_VWA1_VWB2_WG16_16_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 StaggerUStride: 256 - StorePriorityOpt: 1 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 2 - SubGroup0: 8 - SubGroup1: 32 - SubGroupA: 8 - SubGroupB: 32 + StoreSyncOpt: 0 + StoreVectorWidth: 1 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 4 + SubGroup1: 64 + SubGroupA: 4 + SubGroupB: 64 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 12 + ThreadTile1: 2 + ThreadTileA: 12 + ThreadTileB: 2 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -858631,31 +888186,34 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 2 - VectorWidthB: 1 + VectorWidthA: 1 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [128, 2, 1] - WorkGroupMapping: 16 - WorkGroupMappingXCC: 1 + WorkGroup: [16, 16, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 128 + _DepthUA: 128 + _DepthUB: 128 + _DepthUMetadata: 128 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true + AssertAIGreaterThanEqual: -1 + AssertAILessThanEqual: -1 AssertFree0ElementMultiple: 1 AssertFree1ElementMultiple: 1 AssertSummationElementMultiple: 1 @@ -858668,10 +888226,13 @@ CodeObjectVersion: default ConvertAfterDS: false CustomKernelName: '' + DebugStreamK: 0 DepthU: 64 DirectToLds: false DirectToLdsA: false DirectToLdsB: false + DirectToVgprA: false + DirectToVgprB: false DirectToVgprSparseMetadata: false EdgeType: ShiftPtr EnableF32XdlMathOp: false @@ -858681,9 +888242,11 @@ GlobalReadPerMfma: 1 GlobalReadVectorWidthA: 8 GlobalReadVectorWidthB: 8 - GlobalSplitU: 1 + GlobalSplitU: 2 GlobalSplitUAlgorithm: MultipleBuffer - GlobalWriteVectorWidth: 4 + GlobalSplitUCoalesced: false + GlobalSplitUWorkGroupMappingRoundRobin: false + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -858691,10 +888254,11 @@ ISA: [9, 4, 2] InnerUnroll: 1 InterleaveAlpha: 0 - InternalSupportParams: {SupportCustomStaggerU: true, SupportCustomWGM: true, SupportUserGSU: true, - UseUniversalArgs: true} + InternalSupportParams: {KernArgsVersion: 2, SupportCustomStaggerU: true, SupportCustomWGM: true, + SupportUserGSU: true, UseUniversalArgs: true} + Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_WG64_4_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSUAMB_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT6_6_SVW2_VWA2_VWB2_WG32_8_1 LSCA: 64 LSCB: 64 LSPA: 32 @@ -858703,36 +888267,37 @@ LVCB: 8 LVPA: 4 LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LdsBlockSizePerPadA: 256 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 + LdsBytesNoAmax: 55296 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 + LdsNumBytes: 55296 + LdsNumElementsAlignedA: 27648 LdsNumElementsAlignedB: 27648 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetB: 27648 + LdsOffsetB_Blk: 93184 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 55296 + LdsOffsetMetadata_Blk: 93184 + LdsPadA: 16 + LdsPadB: 16 LdsPadMetadata: 0 LocalReadVectorWidth: 8 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 + LoopIters: 4 LoopUnroll: 64 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -858740,22 +888305,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [6, 6] + MIWaveTileA: 6 + MIWaveTileB: 6 MIWaveTileMetadata: 0 - MacroTile0: 256 + MacroTile0: 192 MacroTile1: 192 - MacroTileA: 256 + MacroTileA: 192 MacroTileB: 192 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -858763,18 +888328,19 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 + NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 - NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 + NumElementsPerThread: 144 + NumGlobalWriteVectorsPerThread: 72 + NumLoadsA: 6 NumLoadsB: 6 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 + NumLoadsPerpendicularA: 6 NumLoadsPerpendicularB: 6 NumThreads: 256 OptNoLoadLoop: 1 @@ -858801,6 +888367,7 @@ ComputeDataType: 0 DataType: 4 DataTypeA: 4 + DataTypeAmaxD: 0 DataTypeB: 4 DataTypeE: 4 DestDataType: 4 @@ -858832,6 +888399,7 @@ NumIndicesLD: 4 NumIndicesSummation: 1 OperationType: GEMM + OutputAmaxD: false SetConstStrideA: [] SetConstStrideB: [] SetConstStrideBias: [] @@ -858840,6 +888408,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -858861,28 +888431,33 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3292 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_HAS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_LBSPPA512_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_WG64_4_1_WGM32 + SolutionIndex: 3396 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x192x64_MI16x16x1_SN_LDSB1_GRVWA8_GRVWB8_GSU2_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB256_LPA16_LPB16_LRVW8_MIWT6_6_SU8_SUM0_SUS128_SVW2_VWA2_VWB2_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 128 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + StoreSyncOpt: 0 + StoreVectorWidth: 2 + StreamK: 0 + StreamKAtomic: 0 + StreamKXCCMapping: 0 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 6 + ThreadTileA: 24 + ThreadTileB: 6 TransposeLDS: 1 TransposeLDSMetadata: true + ULSGRODoubleG2L: 0 + UnrollLoopSwapGlobalReadOrder: 0 UnrollMajorLDSA: true UnrollMajorLDSB: true UnrollMajorLDSMetadata: true @@ -858891,17 +888466,18 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 - VectorWidthB: 1 + VectorWidthA: 2 + VectorWidthB: 2 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 32 - WorkGroupMappingXCC: 1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false - WorkspaceCheck: [4, 0, 1] + WorkspaceCheck: [4, 0, 2] _DepthU: 64 _DepthUA: 64 _DepthUB: 64 @@ -858911,10 +888487,10 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true AssertAIGreaterThanEqual: -1 AssertAILessThanEqual: -1 @@ -858944,13 +888520,13 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 2 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 2 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalSplitUWorkGroupMappingRoundRobin: false - GlobalWriteVectorWidth: 8 + GlobalWriteVectorWidth: 4 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -858962,35 +888538,35 @@ SupportUserGSU: true, UseUniversalArgs: true} Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_K1_LBSPPA512_LBSPPB128_LPA4_LPB8_LRVW4_MIWT8_5_SVW8_VWA8_VWB1_WG16_16_1 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB2_GSUAMB_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_15_SVW4_VWA4_VWB1_WG64_4_1 LSCA: 32 LSCB: 32 - LSPA: 16 - LSPB: 64 - LVCA: 16 - LVCB: 4 + LSPA: 32 + LSPB: 16 + LVCA: 8 + LVCB: 16 LVPA: 8 LVPB: 8 - LdsBlockSizePerPadA: 512 + LdsBlockSizePerPadA: 256 LdsBlockSizePerPadB: 128 LdsBlockSizePerPadMetadata: 0 - LdsBytesNoAmax: 31360 + LdsBytesNoAmax: 33280 LdsInitCVgprs: false - LdsNumBytes: 31360 - LdsNumElementsAlignedA: 8320 - LdsNumElementsAlignedB: 23040 + LdsNumBytes: 33280 + LdsNumElementsAlignedA: 16896 + LdsNumElementsAlignedB: 16384 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 32768 - LdsOffsetB: 8320 - LdsOffsetB_Blk: 41088 + LdsOffsetA_Blk: 65536 + LdsOffsetB: 16896 + LdsOffsetB_Blk: 82432 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 31360 - LdsOffsetMetadata_Blk: 41088 + LdsOffsetMetadata: 33280 + LdsOffsetMetadata_Blk: 82432 LdsPadA: 4 - LdsPadB: 8 + LdsPadB: 4 LdsPadMetadata: 0 LocalReadVectorWidth: 4 LocalSplitU: 1 @@ -859000,7 +888576,7 @@ LoopIters: 2 LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 + MIArchVgpr: false MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 @@ -859008,15 +888584,15 @@ MIInputPerThreadMetadata: 4 MIOutputVectorWidth: 4 MIRegPerOut: 1 - MIWaveGroup: [1, 4] - MIWaveTile: [8, 5] - MIWaveTileA: 8 - MIWaveTileB: 5 + MIWaveGroup: [4, 1] + MIWaveTile: [4, 15] + MIWaveTileA: 4 + MIWaveTileB: 15 MIWaveTileMetadata: 0 - MacroTile0: 128 - MacroTile1: 320 - MacroTileA: 128 - MacroTileB: 320 + MacroTile0: 256 + MacroTile1: 240 + MacroTileA: 256 + MacroTileB: 240 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 @@ -859032,20 +888608,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 160 - NumGlobalWriteVectorsPerThread: 20 + NumElementsPerThread: 240 + NumGlobalWriteVectorsPerThread: 60 NumLoadsA: 8 - NumLoadsB: 5 + NumLoadsB: 15 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 5 + NumLoadsPerpendicularB: 15 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -859112,6 +888688,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -859120,8 +888698,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -859133,29 +888711,29 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3293 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT128x320x32_MI16x16x1_SN_GRVWA2_GRVWB8_GSU1_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA4_LPB8_LRVW4_MIWT8_5_SU8_SUM0_SUS256_SVW8_VWA8_VWB1_WG16_16_1_WGM16_WGMXCC1_WGMXCCGn1 + SolutionIndex: 3397 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT256x240x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB2_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA256_LBSPPB128_LPA4_LPB4_LRVW4_MIWT4_15_SU8_SUM0_SUS64_SVW4_VWA4_VWB1_WG64_4_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 64 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 8 + StoreSyncOpt: 0 + StoreVectorWidth: 4 StreamK: 0 StreamKAtomic: 0 StreamKXCCMapping: 0 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 16 + SubGroup1: 16 + SubGroupA: 16 + SubGroupB: 16 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 32 - ThreadTile1: 5 - ThreadTileA: 32 - ThreadTileB: 5 + ThreadTile0: 16 + ThreadTile1: 15 + ThreadTileA: 16 + ThreadTileB: 15 TransposeLDS: 1 TransposeLDSMetadata: true ULSGRODoubleG2L: 0 @@ -859168,16 +888746,16 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 8 + VectorWidthA: 4 VectorWidthB: 1 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [16, 16, 1] - WorkGroupMapping: 16 - WorkGroupMappingXCC: 1 - WorkGroupMappingXCCGroup: -1 + WorkGroup: [64, 4, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] _DepthU: 32 @@ -859189,10 +888767,10 @@ _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 2 + _staggerStrideShift: 0 - 1LDSBuffer: 1 ActivationAlt: false - ActivationFuncCall: true + ActivationFuncCall: false ActivationFused: true AssertAIGreaterThanEqual: -1 AssertAILessThanEqual: -1 @@ -859209,7 +888787,7 @@ ConvertAfterDS: false CustomKernelName: '' DebugStreamK: 0 - DepthU: 64 + DepthU: 32 DirectToLds: false DirectToLdsA: false DirectToLdsB: false @@ -859222,13 +888800,13 @@ ExpandPointerSwap: 0 ForceDisableShadowInit: false GlobalReadPerMfma: 1 - GlobalReadVectorWidthA: 8 - GlobalReadVectorWidthB: 8 + GlobalReadVectorWidthA: 4 + GlobalReadVectorWidthB: 4 GlobalSplitU: 1 GlobalSplitUAlgorithm: MultipleBuffer GlobalSplitUCoalesced: false GlobalSplitUWorkGroupMappingRoundRobin: false - GlobalWriteVectorWidth: 4 + GlobalWriteVectorWidth: 2 GroupLoadStore: false GuaranteeNoPartialA: true GuaranteeNoPartialB: true @@ -859240,46 +888818,46 @@ SupportUserGSU: true, UseUniversalArgs: true} Kernel: true KernelLanguage: Assembly - KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_K1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIWT4_3_SVW4_VWA4_VWB1_WG64_4_1 - LSCA: 64 - LSCB: 64 + KernelNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSUAMB_K1_LBSPPA128_LBSPPB256_LPA4_LPB4_LRVW4_MIWT6_4_SVW2_VWA2_VWB4_WG32_8_1 + LSCA: 32 + LSCB: 32 LSPA: 32 LSPB: 32 LVCA: 8 LVCB: 8 - LVPA: 4 - LVPB: 4 - LdsBlockSizePerPadA: 512 - LdsBlockSizePerPadB: 128 + LVPA: 8 + LVPB: 8 + LdsBlockSizePerPadA: 128 + LdsBlockSizePerPadB: 256 LdsBlockSizePerPadMetadata: 0 - LdsBytesNoAmax: 61440 + LdsBytesNoAmax: 21504 LdsInitCVgprs: false - LdsNumBytes: 61440 - LdsNumElementsAlignedA: 33792 - LdsNumElementsAlignedB: 27648 + LdsNumBytes: 21504 + LdsNumElementsAlignedA: 13056 + LdsNumElementsAlignedB: 8448 LdsNumElementsAlignedMetadata: 0 LdsOffsetA: 0 - LdsOffsetA_Blk: 65536 - LdsOffsetB: 33792 - LdsOffsetB_Blk: 99328 + LdsOffsetA_Blk: 32768 + LdsOffsetB: 13056 + LdsOffsetB_Blk: 45824 LdsOffsetBias: 0 LdsOffsetBiasGSU: 0 LdsOffsetBiasNonGSU: 0 - LdsOffsetMetadata: 61440 - LdsOffsetMetadata_Blk: 99328 - LdsPadA: 8 - LdsPadB: 8 + LdsOffsetMetadata: 21504 + LdsOffsetMetadata_Blk: 45824 + LdsPadA: 4 + LdsPadB: 4 LdsPadMetadata: 0 - LocalReadVectorWidth: 8 + LocalReadVectorWidth: 4 LocalSplitU: 1 LocalWritePerMfma: -1 LocalWriteUseSgprA: false LocalWriteUseSgprB: false - LoopIters: 8 - LoopUnroll: 64 + LoopIters: 2 + LoopUnroll: 32 MFMA_BF16_1K: false - MIArchVgpr: 0 - MIBlock: [32, 32, 8, 1, 1, 1] + MIArchVgpr: false + MIBlock: [16, 16, 16, 1, 1, 1] MIInputPerThread: 4 MIInputPerThreadA: 4 MIInputPerThreadB: 4 @@ -859287,22 +888865,22 @@ MIOutputVectorWidth: 4 MIRegPerOut: 1 MIWaveGroup: [2, 2] - MIWaveTile: [4, 3] - MIWaveTileA: 4 - MIWaveTileB: 3 + MIWaveTile: [6, 4] + MIWaveTileA: 6 + MIWaveTileB: 4 MIWaveTileMetadata: 0 - MacroTile0: 256 - MacroTile1: 192 - MacroTileA: 256 - MacroTileB: 192 + MacroTile0: 192 + MacroTile1: 128 + MacroTileA: 192 + MacroTileB: 128 MagicDivAlg: 2 MatrixInstB: 1 MatrixInstBM: 1 MatrixInstBN: 1 - MatrixInstK: 8 - MatrixInstM: 32 - MatrixInstN: 32 - MatrixInstruction: [32, 32, 8, 1] + MatrixInstK: 16 + MatrixInstM: 16 + MatrixInstN: 16 + MatrixInstruction: [16, 16, 16, 1] MaxOccupancy: 40 NoLdsWriteCode: false NoReject: false @@ -859310,20 +888888,20 @@ NonTemporal: -1 NonTemporalA: 0 NonTemporalB: 0 - NonTemporalC: 4 - NonTemporalD: 4 + NonTemporalC: 0 + NonTemporalD: 0 NonTemporalE: 0 NonTemporalMetadata: 0 NonTemporalWS: 0 NumElementsPerBatchStore: 16 - NumElementsPerThread: 192 + NumElementsPerThread: 96 NumGlobalWriteVectorsPerThread: 48 - NumLoadsA: 8 - NumLoadsB: 6 + NumLoadsA: 6 + NumLoadsB: 4 NumLoadsCoalescedA: 1 NumLoadsCoalescedB: 1 - NumLoadsPerpendicularA: 8 - NumLoadsPerpendicularB: 6 + NumLoadsPerpendicularA: 6 + NumLoadsPerpendicularB: 4 NumThreads: 256 OptNoLoadLoop: 1 PackedC0IdxChars: [I] @@ -859390,6 +888968,8 @@ StochasticRounding: false StridedBatched: true SupportUserArgs: true + SwizzleTensorA: false + SwizzleTensorB: false TLUA: false TLUB: false Tensor0: 0 @@ -859398,8 +888978,8 @@ TileAwareSelection: false TileB: 1 TotalIndices: 4 - TransposeA: true - TransposeB: false + TransposeA: 1 + TransposeB: 0 UseBeta: true UseBias: 1 UseE: false @@ -859411,29 +888991,29 @@ ScheduleGlobalRead: 1 ScheduleIterAlg: 3 ScheduleLocalWrite: 1 - SolutionIndex: 3294 - SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_AS_SAV_UserArgs_MT256x192x64_MI32x32x1_SN_GRVWA8_GRVWB8_GSU1_GSUC0_GSUWGMRR0_K1_LBSPPA512_LBSPPB128_LPA8_LPB8_LRVW8_MIWT4_3_SU8_SUM0_SUS256_SVW4_VWA4_VWB1_WG64_4_1_WGM16_WGMXCC1_WGMXCCGn1 + SolutionIndex: 3398 + SolutionNameMin: Cijk_Alik_Bljk_HHS_BH_Bias_SAV_UserArgs_MT192x128x32_MI16x16x1_SN_LDSB1_GRVWA4_GRVWB4_GSU1_GSUAMB_GSUC0_GSUWGMRR0_K1_LBSPPA128_LBSPPB256_LPA4_LPB4_LRVW4_MIWT6_4_SU8_SUM0_SUS64_SVW2_VWA2_VWB4_WG32_8_1_WGM8_WGMXCC4_WGMXCCG80 SourceSwap: 1 StaggerU: 8 StaggerUMapping: 0 - StaggerUStride: 256 - StorePriorityOpt: 1 + StaggerUStride: 64 + StorePriorityOpt: false StoreRemapVectorWidth: 0 - StoreSyncOpt: 4 - StoreVectorWidth: 4 + StoreSyncOpt: 0 + StoreVectorWidth: 2 StreamK: 0 StreamKAtomic: 0 StreamKXCCMapping: 0 - SubGroup0: 4 - SubGroup1: 64 - SubGroupA: 4 - SubGroupB: 64 + SubGroup0: 8 + SubGroup1: 32 + SubGroupA: 8 + SubGroupB: 32 SuppressNoLoadLoop: false ThreadTile: [1, 1] - ThreadTile0: 64 - ThreadTile1: 3 - ThreadTileA: 64 - ThreadTileB: 3 + ThreadTile0: 24 + ThreadTile1: 4 + ThreadTileA: 24 + ThreadTileB: 4 TransposeLDS: 1 TransposeLDSMetadata: true ULSGRODoubleG2L: 0 @@ -859446,28 +889026,28 @@ UseSgprForGRO: -1 Valid: true VectorStore: -1 - VectorWidthA: 4 - VectorWidthB: 1 + VectorWidthA: 2 + VectorWidthB: 4 WaveSeparateGlobalReadA: 0 WaveSeparateGlobalReadB: 0 WaveSeparateGlobalReadMetadata: 0 WavefrontSize: 64 - WorkGroup: [64, 4, 1] - WorkGroupMapping: 16 - WorkGroupMappingXCC: 1 - WorkGroupMappingXCCGroup: -1 + WorkGroup: [32, 8, 1] + WorkGroupMapping: 8 + WorkGroupMappingXCC: 4 + WorkGroupMappingXCCGroup: 80 WorkGroupReduction: false WorkspaceCheck: [4, 0, 1] - _DepthU: 64 - _DepthUA: 64 - _DepthUB: 64 - _DepthUMetadata: 64 + _DepthU: 32 + _DepthUA: 32 + _DepthUB: 32 + _DepthUMetadata: 32 _GlobalAccumulation: MultipleBuffer _UseSgprForGRO: 1 _VectorStore: 1 _WorkspaceSizePerElemBias: 0 _WorkspaceSizePerElemC: 4 - _staggerStrideShift: 1 + _staggerStrideShift: 0 - [2, 3, 0, 1] - - - [16, 16, 1, 2048] - [1, 175.19] @@ -859532,13 +889112,13 @@ - - [224, 16, 1, 2048] - [1, 2300.99] - - [224, 16, 1, 8192] - - [2863, 0.0] + - [2841, 0.0] - - [224, 16, 1, 32768] - [11, 16595.4] - - [256, 16, 1, 2048] - [1, 2687.11] - - [256, 16, 1, 8192] - - [2947, 0.0] + - [2924, 0.0] - - [256, 16, 1, 32768] - [13, 17467.0] - - [320, 16, 1, 2048] @@ -859598,7 +889178,7 @@ - - [1280, 16, 1, 2048] - [22, 10651.8] - - [1280, 16, 1, 8192] - - [2774, 0.0] + - [2752, 0.0] - - [1280, 16, 1, 32768] - [25, 37149.0] - - [1536, 16, 1, 2048] @@ -859628,7 +889208,7 @@ - - [2560, 16, 1, 2048] - [29, 16273.8] - - [2560, 16, 1, 8192] - - [3021, 0.0] + - [2998, 0.0] - - [2560, 16, 1, 32768] - [31, 41352.8] - - [2816, 16, 1, 2048] @@ -859650,9 +889230,9 @@ - - [3584, 16, 1, 32768] - [36, 35453.9] - - [4096, 16, 1, 2048] - - [2957, 0.0] + - [2934, 0.0] - - [4096, 16, 1, 8192] - - [2880, 0.0] + - [2857, 0.0] - - [4096, 16, 1, 32768] - [37, 37866.4] - - [4608, 16, 1, 2048] @@ -859664,7 +889244,7 @@ - - [5120, 16, 1, 2048] - [37, 25812.0] - - [5120, 16, 1, 8192] - - [3040, 0.0] + - [3017, 0.0] - - [5120, 16, 1, 32768] - [37, 46389.5] - - [5632, 16, 1, 2048] @@ -859682,19 +889262,19 @@ - - [7168, 16, 1, 2048] - [38, 22267.6] - - [7168, 16, 1, 8192] - - [3050, 0.0] + - [3027, 0.0] - - [7168, 16, 1, 32768] - [40, 36735.5] - - [8192, 16, 1, 2048] - [41, 24683.6] - - [8192, 16, 1, 8192] - - [2880, 0.0] + - [2857, 0.0] - - [8192, 16, 1, 32768] - [43, 41048.7] - - [10240, 16, 1, 2048] - [41, 28398.9] - - [10240, 16, 1, 8192] - - [2831, 0.0] + - [2809, 0.0] - - [10240, 16, 1, 32768] - [42, 45071.7] - - [12288, 16, 1, 2048] @@ -859706,13 +889286,13 @@ - - [14336, 16, 1, 2048] - [44, 27985.6] - - [14336, 16, 1, 8192] - - [2989, 0.0] + - [2966, 0.0] - - [14336, 16, 1, 32768] - [42, 42841.4] - - [16384, 16, 1, 2048] - [47, 25842.9] - - [16384, 16, 1, 8192] - - [3061, 0.0] + - [3038, 0.0] - - [16384, 16, 1, 32768] - [48, 43187.8] - - [20480, 16, 1, 2048] @@ -859730,19 +889310,19 @@ - - [28672, 16, 1, 2048] - [51, 29830.4] - - [28672, 16, 1, 8192] - - [2830, 0.0] + - [2808, 0.0] - - [28672, 16, 1, 32768] - [50, 43732.3] - - [32768, 16, 1, 2048] - [52, 29743.1] - - [32768, 16, 1, 8192] - - [3000, 0.0] + - [2977, 0.0] - - [32768, 16, 1, 32768] - [54, 45910.4] - - [40960, 16, 1, 2048] - [52, 32203.4] - - [40960, 16, 1, 8192] - - [3287, 0.0] + - [3264, 0.0] - - [40960, 16, 1, 32768] - [53, 47086.5] - - [49152, 16, 1, 2048] @@ -859756,7 +889336,7 @@ - - [57344, 16, 1, 2048] - [55, 31574.2] - - [57344, 16, 1, 8192] - - [3089, 0.0] + - [3066, 0.0] - - [65536, 16, 1, 512] - [57, 24523.4] - - [65536, 16, 1, 2048] @@ -859784,9 +889364,9 @@ - - [32, 32, 1, 2048] - [58, 680.962] - - [32, 32, 1, 8192] - - [2744, 0.0] + - [2722, 0.0] - - [32, 32, 1, 32768] - - [2744, 0.0] + - [2722, 0.0] - - [48, 32, 1, 2048] - [58, 1009.94] - - [48, 32, 1, 8192] @@ -859796,7 +889376,7 @@ - - [64, 32, 1, 2048] - [58, 1350.06] - - [64, 32, 1, 8192] - - [2745, 0.0] + - [2723, 0.0] - - [64, 32, 1, 32768] - [63, 11095.1] - - [80, 32, 1, 2048] @@ -859904,7 +889484,7 @@ - - [1280, 32, 1, 2048] - [29, 18003.9] - - [1280, 32, 1, 8192] - - [2867, 0.0] + - [2844, 0.0] - - [1280, 32, 1, 32768] - [91, 58293.2] - - [1536, 32, 1, 2048] @@ -859932,9 +889512,9 @@ - - [2304, 32, 1, 32768] - [98, 58468.0] - - [2560, 32, 1, 2048] - - [2746, 0.0] + - [2724, 0.0] - - [2560, 32, 1, 8192] - - [3022, 0.0] + - [2999, 0.0] - - [2560, 32, 1, 32768] - [98, 64092.6] - - [2816, 32, 1, 2048] @@ -859956,9 +889536,9 @@ - - [3584, 32, 1, 32768] - [101, 64305.2] - - [4096, 32, 1, 2048] - - [3029, 0.0] + - [3006, 0.0] - - [4096, 32, 1, 8192] - - [2788, 0.0] + - [2766, 0.0] - - [4096, 32, 1, 32768] - [103, 64058.3] - - [4608, 32, 1, 2048] @@ -859970,7 +889550,7 @@ - - [5120, 32, 1, 2048] - [102, 45546.0] - - [5120, 32, 1, 8192] - - [2893, 0.0] + - [2870, 0.0] - - [5120, 32, 1, 32768] - [102, 69458.5] - - [5632, 32, 1, 2048] @@ -859988,19 +889568,19 @@ - - [7168, 32, 1, 2048] - [108, 45273.5] - - [7168, 32, 1, 8192] - - [2814, 0.0] + - [2792, 0.0] - - [7168, 32, 1, 32768] - [109, 68399.1] - - [8192, 32, 1, 2048] - [110, 43657.6] - - [8192, 32, 1, 8192] - - [2977, 0.0] + - [2954, 0.0] - - [8192, 32, 1, 32768] - [111, 60507.7] - - [10240, 32, 1, 2048] - [111, 51990.5] - - [10240, 32, 1, 8192] - - [2850, 0.0] + - [2828, 0.0] - - [10240, 32, 1, 32768] - [111, 75172.2] - - [12288, 32, 1, 2048] @@ -860012,13 +889592,13 @@ - - [14336, 32, 1, 2048] - [113, 52139.3] - - [14336, 32, 1, 8192] - - [2838, 0.0] + - [2816, 0.0] - - [14336, 32, 1, 32768] - [113, 71744.7] - - [16384, 32, 1, 2048] - [114, 45652.8] - - [16384, 32, 1, 8192] - - [2990, 0.0] + - [2967, 0.0] - - [16384, 32, 1, 32768] - [114, 61847.7] - - [20480, 32, 1, 2048] @@ -860030,7 +889610,7 @@ - - [24576, 32, 1, 2048] - [117, 52577.5] - - [24576, 32, 1, 8192] - - [2844, 0.0] + - [2822, 0.0] - - [24576, 32, 1, 32768] - [118, 69655.7] - - [28672, 32, 1, 512] @@ -860038,19 +889618,19 @@ - - [28672, 32, 1, 2048] - [119, 53786.9] - - [28672, 32, 1, 8192] - - [3067, 0.0] + - [3044, 0.0] - - [32768, 32, 1, 512] - [120, 37190.2] - - [32768, 32, 1, 2048] - [120, 52275.2] - - [32768, 32, 1, 8192] - - [3069, 0.0] + - [3046, 0.0] - - [40960, 32, 1, 512] - [114, 41835.0] - - [40960, 32, 1, 2048] - [120, 57017.1] - - [40960, 32, 1, 8192] - - [2937, 0.0] + - [2914, 0.0] - - [49152, 32, 1, 512] - [120, 41140.2] - - [49152, 32, 1, 2048] @@ -860062,7 +889642,7 @@ - - [57344, 32, 1, 2048] - [120, 55374.1] - - [57344, 32, 1, 8192] - - [2850, 0.0] + - [2828, 0.0] - - [65536, 32, 1, 512] - [120, 40992.1] - - [65536, 32, 1, 2048] @@ -860070,7 +889650,7 @@ - - [65536, 32, 1, 8192] - [114, 67624.5] - - [98304, 32, 1, 512] - - [2853, 0.0] + - [2831, 0.0] - - [98304, 32, 1, 2048] - [120, 58038.9] - - [98304, 32, 1, 8192] @@ -860082,19 +889662,19 @@ - - [131072, 32, 1, 8192] - [114, 72453.8] - - [16, 48, 1, 2048] - - [2743, 0.0] + - [2721, 0.0] - - [16, 48, 1, 8192] - - [3005, 0.0] + - [2982, 0.0] - - [16, 48, 1, 32768] - [122, 4767.92] - - [32, 48, 1, 2048] - [123, 877.407] - - [32, 48, 1, 8192] - - [2750, 0.0] + - [2728, 0.0] - - [32, 48, 1, 32768] - - [2744, 0.0] + - [2722, 0.0] - - [48, 48, 1, 2048] - - [2746, 0.0] + - [2724, 0.0] - - [48, 48, 1, 8192] - [121, 4260.39] - - [48, 48, 1, 32768] @@ -860240,7 +889820,7 @@ - - [2560, 48, 1, 2048] - [150, 34995.5] - - [2560, 48, 1, 8192] - - [2873, 0.0] + - [2850, 0.0] - - [2560, 48, 1, 32768] - [152, 86188.1] - - [2816, 48, 1, 2048] @@ -860262,9 +889842,9 @@ - - [3584, 48, 1, 32768] - [151, 78342.1] - - [4096, 48, 1, 2048] - - [2789, 0.0] + - [2767, 0.0] - - [4096, 48, 1, 8192] - - [3030, 0.0] + - [3007, 0.0] - - [4096, 48, 1, 32768] - [157, 74665.6] - - [4608, 48, 1, 2048] @@ -860276,7 +889856,7 @@ - - [5120, 48, 1, 2048] - [155, 54466.3] - - [5120, 48, 1, 8192] - - [2970, 0.0] + - [2947, 0.0] - - [5120, 48, 1, 32768] - [157, 92767.1] - - [5632, 48, 1, 2048] @@ -860300,7 +889880,7 @@ - - [8192, 48, 1, 2048] - [162, 59802.9] - - [8192, 48, 1, 8192] - - [2815, 0.0] + - [2793, 0.0] - - [8192, 48, 1, 32768] - [160, 86653.3] - - [10240, 48, 1, 2048] @@ -860316,7 +889896,7 @@ - - [12288, 48, 1, 32768] - [157, 76279.9] - - [14336, 48, 1, 2048] - - [2940, 0.0] + - [2917, 0.0] - - [14336, 48, 1, 8192] - [156, 75973.9] - - [14336, 48, 1, 32768] @@ -860324,7 +889904,7 @@ - - [16384, 48, 1, 2048] - [164, 62970.9] - - [16384, 48, 1, 8192] - - [2991, 0.0] + - [2968, 0.0] - - [16384, 48, 1, 32768] - [165, 81262.8] - - [20480, 48, 1, 512] @@ -860338,25 +889918,25 @@ - - [24576, 48, 1, 2048] - [166, 67495.8] - - [24576, 48, 1, 8192] - - [2995, 0.0] + - [2972, 0.0] - - [28672, 48, 1, 512] - [164, 52180.7] - - [28672, 48, 1, 2048] - [164, 73488.1] - - [28672, 48, 1, 8192] - - [2845, 0.0] + - [2823, 0.0] - - [32768, 48, 1, 512] - [166, 46216.9] - - [32768, 48, 1, 2048] - [166, 65949.2] - - [32768, 48, 1, 8192] - - [2845, 0.0] + - [2823, 0.0] - - [40960, 48, 1, 512] - [164, 56530.2] - - [40960, 48, 1, 2048] - [167, 77217.6] - - [40960, 48, 1, 8192] - - [3288, 0.0] + - [3265, 0.0] - - [49152, 48, 1, 512] - [164, 54482.2] - - [49152, 48, 1, 2048] @@ -860368,7 +889948,7 @@ - - [57344, 48, 1, 2048] - [164, 75018.9] - - [57344, 48, 1, 8192] - - [3099, 0.0] + - [3076, 0.0] - - [65536, 48, 1, 512] - [168, 48666.3] - - [65536, 48, 1, 2048] @@ -860378,11 +889958,11 @@ - - [98304, 48, 1, 512] - [168, 52233.7] - - [98304, 48, 1, 2048] - - [2940, 0.0] + - [2917, 0.0] - - [98304, 48, 1, 8192] - - [2940, 0.0] + - [2917, 0.0] - - [131072, 48, 1, 512] - - [2855, 0.0] + - [2833, 0.0] - - [131072, 48, 1, 2048] - [168, 59999.9] - - [131072, 48, 1, 8192] @@ -860420,11 +890000,11 @@ - - [96, 64, 1, 2048] - [58, 3931.46] - - [96, 64, 1, 8192] - - [2752, 0.0] + - [2730, 0.0] - - [96, 64, 1, 32768] - [177, 23711.3] - - [112, 64, 1, 2048] - - [2746, 0.0] + - [2724, 0.0] - - [112, 64, 1, 8192] - [71, 10463.5] - - [112, 64, 1, 32768] @@ -860440,7 +890020,7 @@ - - [160, 64, 1, 8192] - [74, 14878.7] - - [160, 64, 1, 32768] - - [2753, 0.0] + - [2731, 0.0] - - [192, 64, 1, 2048] - [73, 7416.08] - - [192, 64, 1, 8192] @@ -860488,7 +890068,7 @@ - - [576, 64, 1, 8192] - [190, 34496.0] - - [576, 64, 1, 32768] - - [3014, 0.0] + - [2991, 0.0] - - [640, 64, 1, 2048] - [189, 18888.9] - - [640, 64, 1, 8192] @@ -860516,7 +890096,7 @@ - - [1280, 64, 1, 2048] - [197, 30440.4] - - [1280, 64, 1, 8192] - - [2868, 0.0] + - [2845, 0.0] - - [1280, 64, 1, 32768] - [198, 94450.9] - - [1536, 64, 1, 2048] @@ -860546,7 +890126,7 @@ - - [2560, 64, 1, 2048] - [150, 46788.5] - - [2560, 64, 1, 8192] - - [2953, 0.0] + - [2930, 0.0] - - [2560, 64, 1, 32768] - [204, 105192.0] - - [2816, 64, 1, 2048] @@ -860570,7 +890150,7 @@ - - [4096, 64, 1, 2048] - [209, 56734.8] - - [4096, 64, 1, 8192] - - [2790, 0.0] + - [2768, 0.0] - - [4096, 64, 1, 32768] - [210, 102402.0] - - [4608, 64, 1, 2048] @@ -860604,9 +890184,9 @@ - - [7168, 64, 1, 32768] - [212, 99088.0] - - [8192, 64, 1, 2048] - - [2978, 0.0] + - [2955, 0.0] - - [8192, 64, 1, 8192] - - [2901, 0.0] + - [2878, 0.0] - - [8192, 64, 1, 32768] - [216, 95237.2] - - [10240, 64, 1, 2048] @@ -860622,9 +890202,9 @@ - - [12288, 64, 1, 32768] - [217, 110364.0] - - [14336, 64, 1, 512] - - [2860, 0.0] + - [2838, 0.0] - - [14336, 64, 1, 2048] - - [2768, 0.0] + - [2746, 0.0] - - [14336, 64, 1, 8192] - [218, 93329.6] - - [16384, 64, 1, 512] @@ -860632,11 +890212,11 @@ - - [16384, 64, 1, 2048] - [219, 76573.9] - - [16384, 64, 1, 8192] - - [2992, 0.0] + - [2969, 0.0] - - [20480, 64, 1, 512] - - [2780, 0.0] + - [2758, 0.0] - - [20480, 64, 1, 2048] - - [2768, 0.0] + - [2746, 0.0] - - [20480, 64, 1, 8192] - [219, 113479.0] - - [24576, 64, 1, 512] @@ -860654,15 +890234,15 @@ - - [32768, 64, 1, 512] - [223, 54331.7] - - [32768, 64, 1, 2048] - - [2768, 0.0] + - [2746, 0.0] - - [32768, 64, 1, 8192] - - [3070, 0.0] + - [3047, 0.0] - - [40960, 64, 1, 512] - [224, 66492.9] - - [40960, 64, 1, 2048] - [225, 75702.5] - - [40960, 64, 1, 8192] - - [3001, 0.0] + - [2978, 0.0] - - [49152, 64, 1, 512] - [226, 61314.9] - - [49152, 64, 1, 2048] @@ -860674,15 +890254,15 @@ - - [57344, 64, 1, 2048] - [229, 73306.8] - - [57344, 64, 1, 8192] - - [3070, 0.0] + - [3047, 0.0] - - [65536, 64, 1, 512] - [230, 58741.6] - - [65536, 64, 1, 2048] - [231, 70289.6] - - [65536, 64, 1, 8192] - - [2768, 0.0] + - [2746, 0.0] - - [98304, 64, 1, 512] - - [2780, 0.0] + - [2758, 0.0] - - [98304, 64, 1, 2048] - [231, 73958.3] - - [98304, 64, 1, 8192] @@ -860704,7 +890284,7 @@ - - [32, 80, 1, 8192] - [236, 4553.48] - - [32, 80, 1, 32768] - - [2751, 0.0] + - [2729, 0.0] - - [48, 80, 1, 2048] - [58, 2382.69] - - [48, 80, 1, 8192] @@ -860852,7 +890432,7 @@ - - [2560, 80, 1, 2048] - [270, 49289.1] - - [2560, 80, 1, 8192] - - [2789, 0.0] + - [2767, 0.0] - - [2560, 80, 1, 32768] - [274, 111403.0] - - [2816, 80, 1, 2048] @@ -860874,9 +890454,9 @@ - - [3584, 80, 1, 32768] - [272, 99611.2] - - [4096, 80, 1, 2048] - - [2881, 0.0] + - [2858, 0.0] - - [4096, 80, 1, 8192] - - [2958, 0.0] + - [2935, 0.0] - - [4096, 80, 1, 32768] - [279, 95995.3] - - [4608, 80, 1, 2048] @@ -860888,7 +890468,7 @@ - - [5120, 80, 1, 2048] - [281, 63485.5] - - [5120, 80, 1, 8192] - - [2808, 0.0] + - [2786, 0.0] - - [5120, 80, 1, 32768] - [279, 118485.0] - - [5632, 80, 1, 2048] @@ -860906,7 +890486,7 @@ - - [7168, 80, 1, 2048] - [285, 54130.1] - - [7168, 80, 1, 8192] - - [2900, 0.0] + - [2877, 0.0] - - [7168, 80, 1, 32768] - [286, 89588.6] - - [8192, 80, 1, 2048] @@ -860924,7 +890504,7 @@ - - [12288, 80, 1, 512] - [289, 44992.2] - - [12288, 80, 1, 2048] - - [2834, 0.0] + - [2812, 0.0] - - [12288, 80, 1, 8192] - [290, 85081.7] - - [14336, 80, 1, 512] @@ -860956,7 +890536,7 @@ - - [28672, 80, 1, 2048] - [298, 92147.3] - - [28672, 80, 1, 8192] - - [2851, 0.0] + - [2829, 0.0] - - [32768, 80, 1, 512] - [297, 57028.6] - - [32768, 80, 1, 2048] @@ -860988,7 +890568,7 @@ - - [65536, 80, 1, 8192] - [303, 84570.4] - - [98304, 80, 1, 512] - - [2854, 0.0] + - [2832, 0.0] - - [98304, 80, 1, 2048] - [304, 79298.7] - - [98304, 80, 1, 8192] @@ -861110,7 +890690,7 @@ - - [768, 96, 1, 2048] - [197, 28607.6] - - [768, 96, 1, 8192] - - [2746, 0.0] + - [2724, 0.0] - - [768, 96, 1, 32768] - [323, 100040.0] - - [896, 96, 1, 2048] @@ -861158,7 +890738,7 @@ - - [2560, 96, 1, 2048] - [270, 60002.0] - - [2560, 96, 1, 8192] - - [2874, 0.0] + - [2851, 0.0] - - [2560, 96, 1, 32768] - [333, 123733.0] - - [2816, 96, 1, 2048] @@ -861182,7 +890762,7 @@ - - [4096, 96, 1, 2048] - [338, 64071.1] - - [4096, 96, 1, 8192] - - [3031, 0.0] + - [3008, 0.0] - - [4096, 96, 1, 32768] - [339, 110252.0] - - [4608, 96, 1, 2048] @@ -861194,7 +890774,7 @@ - - [5120, 96, 1, 2048] - [338, 79405.0] - - [5120, 96, 1, 8192] - - [3043, 0.0] + - [3020, 0.0] - - [5120, 96, 1, 32768] - [341, 131372.0] - - [5632, 96, 1, 2048] @@ -861218,7 +890798,7 @@ - - [8192, 96, 1, 2048] - [345, 84272.1] - - [8192, 96, 1, 8192] - - [2902, 0.0] + - [2879, 0.0] - - [8192, 96, 1, 32768] - [346, 115362.0] - - [10240, 96, 1, 512] @@ -861268,17 +890848,17 @@ - - [32768, 96, 1, 2048] - [356, 90740.5] - - [32768, 96, 1, 8192] - - [3071, 0.0] + - [3048, 0.0] - - [40960, 96, 1, 512] - [357, 85241.4] - - [40960, 96, 1, 2048] - - [3002, 0.0] + - [2979, 0.0] - - [40960, 96, 1, 8192] - [359, 123305.0] - - [49152, 96, 1, 512] - [360, 81973.6] - - [49152, 96, 1, 2048] - - [2849, 0.0] + - [2827, 0.0] - - [49152, 96, 1, 8192] - [361, 119038.0] - - [57344, 96, 1, 512] @@ -861286,7 +890866,7 @@ - - [57344, 96, 1, 2048] - [358, 101021.0] - - [57344, 96, 1, 8192] - - [2851, 0.0] + - [2829, 0.0] - - [65536, 96, 1, 512] - [362, 75052.2] - - [65536, 96, 1, 2048] @@ -861462,9 +891042,9 @@ - - [2304, 112, 1, 32768] - [407, 96197.6] - - [2560, 112, 1, 2048] - - [2754, 0.0] + - [2732, 0.0] - - [2560, 112, 1, 8192] - - [2782, 0.0] + - [2760, 0.0] - - [2560, 112, 1, 32768] - [407, 106709.0] - - [2816, 112, 1, 2048] @@ -861488,7 +891068,7 @@ - - [4096, 112, 1, 2048] - [415, 64833.3] - - [4096, 112, 1, 8192] - - [2791, 0.0] + - [2769, 0.0] - - [4096, 112, 1, 32768] - [416, 108087.0] - - [4608, 112, 1, 2048] @@ -861500,7 +891080,7 @@ - - [5120, 112, 1, 2048] - [215, 80380.2] - - [5120, 112, 1, 8192] - - [2809, 0.0] + - [2787, 0.0] - - [5120, 112, 1, 32768] - [417, 113689.0] - - [5632, 112, 1, 2048] @@ -861518,7 +891098,7 @@ - - [7168, 112, 1, 2048] - [420, 63546.1] - - [7168, 112, 1, 8192] - - [2759, 0.0] + - [2737, 0.0] - - [7168, 112, 1, 32768] - [421, 98517.6] - - [8192, 112, 1, 512] @@ -861526,13 +891106,13 @@ - - [8192, 112, 1, 2048] - [420, 70861.8] - - [8192, 112, 1, 8192] - - [2809, 0.0] + - [2787, 0.0] - - [10240, 112, 1, 512] - [423, 59701.4] - - [10240, 112, 1, 2048] - [420, 85500.5] - - [10240, 112, 1, 8192] - - [2911, 0.0] + - [2888, 0.0] - - [12288, 112, 1, 512] - [424, 52771.4] - - [12288, 112, 1, 2048] @@ -861550,7 +891130,7 @@ - - [16384, 112, 1, 2048] - [428, 79993.7] - - [16384, 112, 1, 8192] - - [2839, 0.0] + - [2817, 0.0] - - [20480, 112, 1, 512] - [427, 79400.1] - - [20480, 112, 1, 2048] @@ -861562,19 +891142,19 @@ - - [24576, 112, 1, 2048] - [430, 97457.8] - - [24576, 112, 1, 8192] - - [2996, 0.0] + - [2973, 0.0] - - [28672, 112, 1, 512] - [431, 64316.4] - - [28672, 112, 1, 2048] - [432, 84273.8] - - [28672, 112, 1, 8192] - - [3104, 0.0] + - [3081, 0.0] - - [32768, 112, 1, 512] - [433, 66350.0] - - [32768, 112, 1, 2048] - [428, 81021.7] - - [32768, 112, 1, 8192] - - [2846, 0.0] + - [2824, 0.0] - - [40960, 112, 1, 512] - [434, 81677.1] - - [40960, 112, 1, 2048] @@ -861592,13 +891172,13 @@ - - [57344, 112, 1, 2048] - [428, 94745.8] - - [57344, 112, 1, 8192] - - [3105, 0.0] + - [3082, 0.0] - - [65536, 112, 1, 512] - [435, 67195.5] - - [65536, 112, 1, 2048] - - [2856, 0.0] + - [2834, 0.0] - - [65536, 112, 1, 8192] - - [2847, 0.0] + - [2825, 0.0] - - [98304, 112, 1, 512] - [437, 79672.6] - - [98304, 112, 1, 2048] @@ -861606,7 +891186,7 @@ - - [98304, 112, 1, 8192] - [436, 115967.0] - - [131072, 112, 1, 512] - - [2856, 0.0] + - [2834, 0.0] - - [131072, 112, 1, 2048] - [438, 92767.5] - - [131072, 112, 1, 8192] @@ -861616,11 +891196,11 @@ - - [16, 128, 1, 8192] - [64, 4134.0] - - [16, 128, 1, 32768] - - [2744, 0.0] + - [2722, 0.0] - - [32, 128, 1, 2048] - [58, 2572.78] - - [32, 128, 1, 8192] - - [2752, 0.0] + - [2730, 0.0] - - [32, 128, 1, 32768] - [439, 19127.1] - - [48, 128, 1, 2048] @@ -861740,7 +891320,7 @@ - - [1280, 128, 1, 2048] - [150, 47681.5] - - [1280, 128, 1, 8192] - - [3015, 0.0] + - [2992, 0.0] - - [1280, 128, 1, 32768] - [469, 108706.0] - - [1536, 128, 1, 2048] @@ -861770,7 +891350,7 @@ - - [2560, 128, 1, 2048] - [474, 76756.2] - - [2560, 128, 1, 8192] - - [2954, 0.0] + - [2931, 0.0] - - [2560, 128, 1, 32768] - [479, 131060.0] - - [2816, 128, 1, 2048] @@ -861792,9 +891372,9 @@ - - [3584, 128, 1, 32768] - [484, 131149.0] - - [4096, 128, 1, 2048] - - [2792, 0.0] + - [2770, 0.0] - - [4096, 128, 1, 8192] - - [2791, 0.0] + - [2769, 0.0] - - [4096, 128, 1, 32768] - [485, 127841.0] - - [4608, 128, 1, 2048] @@ -861802,11 +891382,11 @@ - - [4608, 128, 1, 8192] - [486, 109569.0] - - [4608, 128, 1, 32768] - - [2892, 0.0] + - [2869, 0.0] - - [5120, 128, 1, 2048] - [215, 92338.0] - - [5120, 128, 1, 8192] - - [2809, 0.0] + - [2787, 0.0] - - [5120, 128, 1, 32768] - [487, 141825.0] - - [5632, 128, 1, 2048] @@ -861826,13 +891406,13 @@ - - [7168, 128, 1, 2048] - [493, 96154.5] - - [7168, 128, 1, 8192] - - [2976, 0.0] + - [2953, 0.0] - - [8192, 128, 1, 512] - [494, 76716.7] - - [8192, 128, 1, 2048] - [495, 88880.3] - - [8192, 128, 1, 8192] - - [2809, 0.0] + - [2787, 0.0] - - [10240, 128, 1, 512] - [496, 78937.4] - - [10240, 128, 1, 2048] @@ -861866,7 +891446,7 @@ - - [24576, 128, 1, 512] - [508, 78126.4] - - [24576, 128, 1, 2048] - - [2997, 0.0] + - [2974, 0.0] - - [24576, 128, 1, 8192] - [509, 143546.0] - - [28672, 128, 1, 512] @@ -861878,9 +891458,9 @@ - - [32768, 128, 1, 512] - [513, 79657.2] - - [32768, 128, 1, 2048] - - [2847, 0.0] + - [2825, 0.0] - - [32768, 128, 1, 8192] - - [3072, 0.0] + - [3049, 0.0] - - [40960, 128, 1, 512] - [514, 98698.2] - - [40960, 128, 1, 2048] @@ -861918,13 +891498,13 @@ - - [16, 160, 1, 2048] - [58, 1618.45] - - [16, 160, 1, 8192] - - [2745, 0.0] + - [2723, 0.0] - - [16, 160, 1, 32768] - [64, 13553.5] - - [32, 160, 1, 2048] - - [2746, 0.0] + - [2724, 0.0] - - [32, 160, 1, 8192] - - [3008, 0.0] + - [2985, 0.0] - - [32, 160, 1, 32768] - [520, 22693.3] - - [48, 160, 1, 2048] @@ -862018,13 +891598,13 @@ - - [576, 160, 1, 32768] - [539, 94803.4] - - [640, 160, 1, 2048] - - [199, 33285.4] + - [3328, 20.89] - - [640, 160, 1, 8192] - [538, 67282.7] - - [640, 160, 1, 32768] - [538, 99902.1] - - [768, 160, 1, 2048] - - [199, 39633.6] + - [3328, 25.32] - - [768, 160, 1, 8192] - [540, 69105.9] - - [768, 160, 1, 32768] @@ -862074,7 +891654,7 @@ - - [2560, 160, 1, 2048] - [552, 71167.2] - - [2560, 160, 1, 8192] - - [3023, 0.0] + - [3000, 0.0] - - [2560, 160, 1, 32768] - [553, 143296.0] - - [2816, 160, 1, 2048] @@ -862110,7 +891690,7 @@ - - [5120, 160, 1, 2048] - [287, 96698.9] - - [5120, 160, 1, 8192] - - [2810, 0.0] + - [2788, 0.0] - - [5120, 160, 1, 32768] - [564, 156227.0] - - [5632, 160, 1, 2048] @@ -862134,7 +891714,7 @@ - - [8192, 160, 1, 512] - [572, 65648.0] - - [8192, 160, 1, 2048] - - [2979, 0.0] + - [2956, 0.0] - - [8192, 160, 1, 8192] - [574, 134638.0] - - [10240, 160, 1, 512] @@ -862142,7 +891722,7 @@ - - [10240, 160, 1, 2048] - [573, 116463.0] - - [10240, 160, 1, 8192] - - [2912, 0.0] + - [2889, 0.0] - - [12288, 160, 1, 512] - [575, 78041.6] - - [12288, 160, 1, 2048] @@ -862160,23 +891740,23 @@ - - [16384, 160, 1, 2048] - [580, 123131.0] - - [16384, 160, 1, 8192] - - [2840, 0.0] + - [2818, 0.0] - - [20480, 160, 1, 512] - [579, 106601.0] - - [20480, 160, 1, 2048] - [581, 141140.0] - - [20480, 160, 1, 8192] - - [2843, 0.0] + - [2821, 0.0] - - [24576, 160, 1, 512] - [582, 78363.9] - - [24576, 160, 1, 2048] - - [2924, 0.0] + - [2901, 0.0] - - [24576, 160, 1, 8192] - [583, 159400.0] - - [28672, 160, 1, 512] - - [2843, 0.0] + - [2821, 0.0] - - [28672, 160, 1, 2048] - - [2924, 0.0] + - [2901, 0.0] - - [28672, 160, 1, 8192] - [585, 146352.0] - - [32768, 160, 1, 512] @@ -862204,7 +891784,7 @@ - - [57344, 160, 1, 8192] - [589, 156772.0] - - [65536, 160, 1, 512] - - [3003, 0.0] + - [2980, 0.0] - - [65536, 160, 1, 2048] - [591, 122509.0] - - [65536, 160, 1, 8192] @@ -862218,7 +891798,7 @@ - - [131072, 160, 1, 2048] - [589, 131142.0] - - [16, 192, 1, 2048] - - [2746, 0.0] + - [2724, 0.0] - - [16, 192, 1, 8192] - [592, 5356.94] - - [16, 192, 1, 32768] @@ -862272,7 +891852,7 @@ - - [160, 192, 1, 32768] - [318, 56314.6] - - [192, 192, 1, 2048] - - [2746, 0.0] + - [2724, 0.0] - - [192, 192, 1, 8192] - [318, 37647.7] - - [192, 192, 1, 32768] @@ -862290,7 +891870,7 @@ - - [256, 192, 1, 32768] - [608, 71663.2] - - [320, 192, 1, 2048] - - [2746, 0.0] + - [2724, 0.0] - - [320, 192, 1, 8192] - [390, 53324.6] - - [320, 192, 1, 32768] @@ -862320,13 +891900,13 @@ - - [576, 192, 1, 32768] - [613, 102458.0] - - [640, 192, 1, 2048] - - [203, 36309.3] + - [3341, 25.91] - - [640, 192, 1, 8192] - [328, 70686.7] - - [640, 192, 1, 32768] - [329, 103733.0] - - [768, 192, 1, 2048] - - [150, 42834.1] + - [3276, 29.18] - - [768, 192, 1, 8192] - [328, 81862.5] - - [768, 192, 1, 32768] @@ -862376,7 +891956,7 @@ - - [2560, 192, 1, 2048] - [621, 84085.3] - - [2560, 192, 1, 8192] - - [2783, 0.0] + - [2761, 0.0] - - [2560, 192, 1, 32768] - [627, 153756.0] - - [2816, 192, 1, 2048] @@ -862414,7 +891994,7 @@ - - [5120, 192, 1, 2048] - [345, 107707.0] - - [5120, 192, 1, 8192] - - [3044, 0.0] + - [3021, 0.0] - - [5632, 192, 1, 512] - [637, 67182.4] - - [5632, 192, 1, 2048] @@ -862436,7 +892016,7 @@ - - [8192, 192, 1, 512] - [645, 73853.4] - - [8192, 192, 1, 2048] - - [2980, 0.0] + - [2957, 0.0] - - [8192, 192, 1, 8192] - [647, 140493.0] - - [10240, 192, 1, 512] @@ -862444,7 +892024,7 @@ - - [10240, 192, 1, 2048] - [646, 125238.0] - - [10240, 192, 1, 8192] - - [3058, 0.0] + - [3035, 0.0] - - [12288, 192, 1, 512] - [648, 80851.8] - - [12288, 192, 1, 2048] @@ -862490,7 +892070,7 @@ - - [40960, 192, 1, 512] - [659, 118075.0] - - [40960, 192, 1, 2048] - - [3074, 0.0] + - [3051, 0.0] - - [40960, 192, 1, 8192] - [661, 178613.0] - - [49152, 192, 1, 512] @@ -862516,13 +892096,13 @@ - - [98304, 192, 1, 2048] - [663, 150100.0] - - [131072, 192, 1, 512] - - [2879, 0.0] + - [2856, 0.0] - - [131072, 192, 1, 2048] - [663, 143528.0] - - [16, 224, 1, 2048] - [73, 2152.6] - - [16, 224, 1, 8192] - - [2747, 0.0] + - [2725, 0.0] - - [16, 224, 1, 32768] - [666, 15704.3] - - [32, 224, 1, 2048] @@ -862592,7 +892172,7 @@ - - [256, 224, 1, 32768] - [684, 64191.8] - - [320, 224, 1, 2048] - - [2746, 0.0] + - [2724, 0.0] - - [320, 224, 1, 8192] - [685, 55536.1] - - [320, 224, 1, 32768] @@ -862622,13 +892202,13 @@ - - [576, 224, 1, 32768] - [692, 109165.0] - - [640, 224, 1, 2048] - - [150, 41662.0] + - [3314, 28.65] - - [640, 224, 1, 8192] - [204, 72826.1] - - [640, 224, 1, 32768] - [693, 108861.0] - - [768, 224, 1, 2048] - - [153, 47844.1] + - [3330, 28.06] - - [768, 224, 1, 8192] - [694, 76849.7] - - [768, 224, 1, 32768] @@ -862678,7 +892258,7 @@ - - [2560, 224, 1, 2048] - [628, 83140.6] - - [2560, 224, 1, 8192] - - [3024, 0.0] + - [3001, 0.0] - - [2560, 224, 1, 32768] - [710, 147359.0] - - [2816, 224, 1, 2048] @@ -862700,7 +892280,7 @@ - - [3584, 224, 1, 32768] - [715, 156419.0] - - [4096, 224, 1, 512] - - [3032, 0.0] + - [3009, 0.0] - - [4096, 224, 1, 2048] - [717, 80384.2] - - [4096, 224, 1, 8192] @@ -862738,7 +892318,7 @@ - - [8192, 224, 1, 512] - [729, 77615.2] - - [8192, 224, 1, 2048] - - [3055, 0.0] + - [3032, 0.0] - - [8192, 224, 1, 8192] - [730, 138929.0] - - [10240, 224, 1, 512] @@ -862794,7 +892374,7 @@ - - [40960, 224, 1, 2048] - [745, 156814.0] - - [40960, 224, 1, 8192] - - [2938, 0.0] + - [2915, 0.0] - - [49152, 224, 1, 512] - [744, 97540.1] - - [49152, 224, 1, 2048] @@ -862808,7 +892388,7 @@ - - [57344, 224, 1, 8192] - [745, 167771.0] - - [65536, 224, 1, 512] - - [3004, 0.0] + - [2981, 0.0] - - [65536, 224, 1, 2048] - [749, 129583.0] - - [65536, 224, 1, 8192] @@ -863014,13 +892594,13 @@ - - [576, 256, 1, 32768] - [779, 108943.0] - - [640, 256, 1, 2048] - - [203, 47471.9] + - [3276, 32.6] - - [640, 256, 1, 8192] - [780, 83976.4] - - [640, 256, 1, 32768] - [781, 114271.0] - - [768, 256, 1, 2048] - - [401, 48348.5] + - [3330, 32.28] - - [768, 256, 1, 8192] - [470, 90164.2] - - [768, 256, 1, 32768] @@ -863036,7 +892616,7 @@ - - [512, 320, 1, 8192] - [204, 81816.4] - - [512, 320, 1, 32768] - - [2772, 0.0] + - [2750, 0.0] - - [576, 320, 1, 2048] - [401, 45523.7] - - [576, 320, 1, 8192] @@ -863044,13 +892624,13 @@ - - [576, 320, 1, 32768] - [784, 115669.0] - - [640, 320, 1, 2048] - - [270, 49675.4] + - [3330, 33.65] - - [640, 320, 1, 8192] - [273, 89487.3] - - [640, 320, 1, 32768] - [785, 119365.0] - - [768, 320, 1, 2048] - - [401, 59944.9] + - [3387, 39.48] - - [768, 320, 1, 8192] - [276, 87671.1] - - [768, 320, 1, 32768] @@ -863070,7 +892650,7 @@ - - [1280, 256, 1, 2048] - [474, 76782.5] - - [1280, 256, 1, 8192] - - [3016, 0.0] + - [2993, 0.0] - - [1280, 256, 1, 32768] - [791, 144608.0] - - [1536, 256, 1, 2048] @@ -863124,7 +892704,7 @@ - - [2560, 256, 1, 2048] - [628, 93885.5] - - [2560, 256, 1, 8192] - - [2784, 0.0] + - [2762, 0.0] - - [2560, 256, 1, 32768] - [801, 147541.0] - - [2816, 256, 1, 2048] @@ -863216,13 +892796,13 @@ - - [7168, 256, 1, 2048] - [832, 112643.0] - - [7168, 256, 1, 8192] - - [3051, 0.0] + - [3028, 0.0] - - [4096, 320, 1, 512] - - [2793, 0.0] + - [2771, 0.0] - - [4096, 320, 1, 2048] - [834, 92860.0] - - [4096, 320, 1, 8192] - - [2959, 0.0] + - [2936, 0.0] - - [4608, 320, 1, 512] - [835, 89309.7] - - [4608, 320, 1, 2048] @@ -863234,7 +892814,7 @@ - - [5120, 320, 1, 2048] - [834, 119634.0] - - [5120, 320, 1, 8192] - - [2811, 0.0] + - [2789, 0.0] - - [5632, 320, 1, 512] - [837, 80102.9] - - [5632, 320, 1, 2048] @@ -863256,7 +892836,7 @@ - - [8192, 256, 1, 512] - [843, 82380.1] - - [8192, 256, 1, 2048] - - [2818, 0.0] + - [2796, 0.0] - - [8192, 256, 1, 8192] - [844, 147330.0] - - [10240, 256, 1, 512] @@ -863264,7 +892844,7 @@ - - [10240, 256, 1, 2048] - [845, 140196.0] - - [10240, 256, 1, 8192] - - [2832, 0.0] + - [2810, 0.0] - - [12288, 256, 1, 512] - [846, 92207.8] - - [12288, 256, 1, 2048] @@ -863282,13 +892862,13 @@ - - [8192, 320, 1, 2048] - [850, 124825.0] - - [8192, 320, 1, 8192] - - [2819, 0.0] + - [2797, 0.0] - - [10240, 320, 1, 512] - [579, 106894.0] - - [10240, 320, 1, 2048] - [581, 143809.0] - - [10240, 320, 1, 8192] - - [2913, 0.0] + - [2890, 0.0] - - [12288, 320, 1, 512] - [851, 86855.9] - - [12288, 320, 1, 2048] @@ -863318,13 +892898,13 @@ - - [24576, 256, 1, 2048] - [863, 137137.0] - - [24576, 256, 1, 8192] - - [2998, 0.0] + - [2975, 0.0] - - [28672, 256, 1, 512] - [864, 97899.3] - - [28672, 256, 1, 2048] - [865, 146679.0] - - [28672, 256, 1, 8192] - - [2939, 0.0] + - [2916, 0.0] - - [16384, 320, 1, 512] - [866, 95203.7] - - [16384, 320, 1, 2048] @@ -863350,7 +892930,7 @@ - - [28672, 320, 1, 8192] - [869, 160272.0] - - [32768, 256, 1, 512] - - [2806, 0.0] + - [2784, 0.0] - - [32768, 256, 1, 2048] - [858, 142880.0] - - [32768, 256, 1, 8192] @@ -863360,7 +892940,7 @@ - - [40960, 256, 1, 2048] - [865, 141009.0] - - [40960, 256, 1, 8192] - - [3075, 0.0] + - [3052, 0.0] - - [49152, 256, 1, 512] - [872, 104317.0] - - [49152, 256, 1, 2048] @@ -863372,7 +892952,7 @@ - - [57344, 256, 1, 2048] - [865, 147138.0] - - [57344, 256, 1, 8192] - - [2939, 0.0] + - [2916, 0.0] - - [32768, 320, 1, 512] - [866, 100723.0] - - [32768, 320, 1, 2048] @@ -863406,7 +892986,7 @@ - - [131072, 256, 1, 2048] - [865, 150677.0] - - [65536, 320, 1, 512] - - [2852, 0.0] + - [2830, 0.0] - - [65536, 320, 1, 2048] - [867, 142205.0] - - [98304, 320, 1, 512] @@ -863610,13 +893190,13 @@ - - [576, 384, 1, 32768] - [913, 120771.0] - - [640, 384, 1, 2048] - - [270, 59426.9] + - [3315, 41.19] - - [640, 384, 1, 8192] - [333, 110901.0] - - [640, 384, 1, 32768] - [333, 127471.0] - - [768, 384, 1, 2048] - - [474, 68012.3] + - [3278, 45.79] - - [768, 384, 1, 8192] - [914, 115009.0] - - [768, 384, 1, 32768] @@ -863640,13 +893220,13 @@ - - [576, 448, 1, 32768] - [918, 109261.0] - - [640, 448, 1, 2048] - - [474, 66167.8] + - [3278, 44.95] - - [640, 448, 1, 8192] - [919, 111083.0] - - [640, 448, 1, 32768] - [335, 118067.0] - - [768, 448, 1, 2048] - - [619, 66903.4] + - [3331, 42.95] - - [768, 448, 1, 8192] - [920, 115382.0] - - [768, 448, 1, 32768] @@ -863778,9 +893358,9 @@ - - [3584, 448, 1, 8192] - [950, 125115.0] - - [4096, 384, 1, 512] - - [2794, 0.0] + - [2772, 0.0] - - [4096, 384, 1, 2048] - - [2882, 0.0] + - [2859, 0.0] - - [4096, 384, 1, 8192] - [951, 134376.0] - - [4608, 384, 1, 512] @@ -863794,7 +893374,7 @@ - - [5120, 384, 1, 2048] - [952, 125744.0] - - [5120, 384, 1, 8192] - - [2894, 0.0] + - [2871, 0.0] - - [5632, 384, 1, 512] - [956, 94584.1] - - [5632, 384, 1, 2048] @@ -863814,11 +893394,11 @@ - - [7168, 384, 1, 8192] - [963, 139224.0] - - [4096, 448, 1, 512] - - [2960, 0.0] + - [2937, 0.0] - - [4096, 448, 1, 2048] - - [2795, 0.0] + - [2773, 0.0] - - [4096, 448, 1, 8192] - - [3033, 0.0] + - [3010, 0.0] - - [4608, 448, 1, 512] - [964, 97335.4] - - [4608, 448, 1, 2048] @@ -863830,7 +893410,7 @@ - - [5120, 448, 1, 2048] - [965, 130544.0] - - [5120, 448, 1, 8192] - - [3045, 0.0] + - [3022, 0.0] - - [5632, 448, 1, 512] - [968, 92764.3] - - [5632, 448, 1, 2048] @@ -863860,7 +893440,7 @@ - - [10240, 384, 1, 2048] - [978, 156137.0] - - [10240, 384, 1, 8192] - - [3059, 0.0] + - [3036, 0.0] - - [12288, 384, 1, 512] - [979, 94903.3] - - [12288, 384, 1, 2048] @@ -864008,7 +893588,7 @@ - - [16, 512, 1, 2048] - [22, 4603.56] - - [16, 512, 1, 8192] - - [2748, 0.0] + - [2726, 0.0] - - [16, 512, 1, 32768] - [1009, 23349.3] - - [32, 512, 1, 2048] @@ -864114,7 +893694,7 @@ - - [64, 640, 1, 32768] - [1014, 72847.6] - - [80, 640, 1, 2048] - - [2746, 0.0] + - [2724, 0.0] - - [80, 640, 1, 8192] - [1015, 45604.1] - - [80, 640, 1, 32768] @@ -864288,13 +893868,13 @@ - - [576, 512, 1, 32768] - [477, 120720.0] - - [640, 512, 1, 2048] - - [474, 75637.4] + - [3278, 51.34] - - [640, 512, 1, 8192] - [1045, 119861.0] - - [640, 512, 1, 32768] - [1046, 118501.0] - - [768, 512, 1, 2048] - - [412, 71634.7] + - [3331, 49.41] - - [768, 512, 1, 8192] - [1047, 123675.0] - - [768, 512, 1, 32768] @@ -864348,13 +893928,13 @@ - - [576, 640, 1, 32768] - [1060, 122672.0] - - [640, 640, 1, 2048] - - [552, 75973.8] + - [3331, 50.86] - - [640, 640, 1, 8192] - [1061, 123825.0] - - [640, 640, 1, 32768] - [1062, 128042.0] - - [768, 640, 1, 2048] - - [412, 86133.4] + - [3395, 57.29] - - [768, 640, 1, 8192] - [793, 131369.0] - - [768, 640, 1, 32768] @@ -864374,7 +893954,7 @@ - - [1280, 512, 1, 2048] - [628, 104616.0] - - [1280, 512, 1, 8192] - - [2784, 0.0] + - [2762, 0.0] - - [1280, 512, 1, 32768] - [1066, 160528.0] - - [1536, 512, 1, 2048] @@ -864454,7 +894034,7 @@ - - [2560, 512, 1, 2048] - [1078, 136823.0] - - [2560, 512, 1, 8192] - - [2785, 0.0] + - [2763, 0.0] - - [2816, 512, 1, 512] - [1082, 72776.5] - - [2816, 512, 1, 2048] @@ -864512,7 +894092,7 @@ - - [2048, 640, 1, 512] - [1078, 92837.3] - - [2048, 640, 1, 2048] - - [2777, 0.0] + - [2755, 0.0] - - [2048, 640, 1, 8192] - [1100, 124662.0] - - [2304, 640, 1, 512] @@ -864546,11 +894126,11 @@ - - [3584, 640, 1, 8192] - [1105, 146775.0] - - [4096, 512, 1, 512] - - [2963, 0.0] + - [2940, 0.0] - - [4096, 512, 1, 2048] - - [2961, 0.0] + - [2938, 0.0] - - [4096, 512, 1, 8192] - - [2883, 0.0] + - [2860, 0.0] - - [4608, 512, 1, 512] - [1108, 102099.0] - - [4608, 512, 1, 2048] @@ -864562,7 +894142,7 @@ - - [5120, 512, 1, 2048] - [1109, 138300.0] - - [5120, 512, 1, 8192] - - [2971, 0.0] + - [2948, 0.0] - - [5632, 512, 1, 512] - [1112, 90768.8] - - [5632, 512, 1, 2048] @@ -864580,9 +894160,9 @@ - - [7168, 512, 1, 2048] - [1117, 128984.0] - - [7168, 512, 1, 8192] - - [3052, 0.0] + - [3029, 0.0] - - [4096, 576, 1, 512] - - [2962, 0.0] + - [2939, 0.0] - - [4096, 576, 1, 2048] - [1107, 136348.0] - - [4096, 576, 1, 8192] @@ -864618,11 +894198,11 @@ - - [7168, 576, 1, 8192] - [979, 136605.0] - - [4096, 640, 1, 512] - - [2963, 0.0] + - [2940, 0.0] - - [4096, 640, 1, 2048] - - [2796, 0.0] + - [2774, 0.0] - - [4096, 640, 1, 8192] - - [3034, 0.0] + - [3011, 0.0] - - [4608, 640, 1, 512] - [1118, 105481.0] - - [4608, 640, 1, 2048] @@ -864634,7 +894214,7 @@ - - [5120, 640, 1, 2048] - [1121, 145699.0] - - [5120, 640, 1, 8192] - - [2822, 0.0] + - [2800, 0.0] - - [5632, 640, 1, 512] - [1130, 103082.0] - - [5632, 640, 1, 2048] @@ -864664,7 +894244,7 @@ - - [10240, 512, 1, 2048] - [1008, 129355.0] - - [10240, 512, 1, 8192] - - [2833, 0.0] + - [2811, 0.0] - - [12288, 512, 1, 512] - [1137, 104528.0] - - [12288, 512, 1, 2048] @@ -864676,13 +894256,13 @@ - - [14336, 512, 1, 2048] - [1139, 143745.0] - - [14336, 512, 1, 8192] - - [3111, 0.0] + - [3088, 0.0] - - [8192, 576, 1, 512] - [992, 105440.0] - - [8192, 576, 1, 2048] - [1141, 127005.0] - - [8192, 576, 1, 8192] - - [2905, 0.0] + - [2882, 0.0] - - [10240, 576, 1, 512] - [1142, 110616.0] - - [10240, 576, 1, 2048] @@ -864706,13 +894286,13 @@ - - [8192, 640, 1, 2048] - [1138, 123841.0] - - [8192, 640, 1, 8192] - - [2982, 0.0] + - [2959, 0.0] - - [10240, 640, 1, 512] - [1142, 122340.0] - - [10240, 640, 1, 2048] - [1143, 146717.0] - - [10240, 640, 1, 8192] - - [3121, 0.0] + - [3098, 0.0] - - [12288, 640, 1, 512] - [999, 110931.0] - - [12288, 640, 1, 2048] @@ -864754,7 +894334,7 @@ - - [16384, 576, 1, 2048] - [988, 140928.0] - - [16384, 576, 1, 8192] - - [2994, 0.0] + - [2971, 0.0] - - [20480, 576, 1, 512] - [988, 126012.0] - - [20480, 576, 1, 2048] @@ -864776,7 +894356,7 @@ - - [16384, 640, 1, 2048] - [999, 135581.0] - - [16384, 640, 1, 8192] - - [3122, 0.0] + - [3099, 0.0] - - [20480, 640, 1, 512] - [1000, 135992.0] - - [20480, 640, 1, 2048] @@ -864784,7 +894364,7 @@ - - [20480, 640, 1, 8192] - [1149, 174085.0] - - [24576, 640, 1, 512] - - [2999, 0.0] + - [2976, 0.0] - - [24576, 640, 1, 2048] - [999, 151445.0] - - [28672, 640, 1, 512] @@ -864878,7 +894458,7 @@ - - [16, 768, 1, 2048] - [22, 6871.4] - - [16, 768, 1, 8192] - - [3006, 0.0] + - [2983, 0.0] - - [16, 768, 1, 32768] - [1153, 28637.4] - - [32, 768, 1, 2048] @@ -865068,13 +894648,13 @@ - - [576, 768, 1, 32768] - [1200, 138335.0] - - [640, 768, 1, 2048] - - [621, 91484.2] + - [3281, 62.49] - - [640, 768, 1, 8192] - [1201, 114792.0] - - [640, 768, 1, 32768] - [1202, 136310.0] - - [768, 768, 1, 2048] - - [628, 94405.4] + - [3283, 65.15] - - [768, 768, 1, 8192] - [1203, 120917.0] - - [768, 768, 1, 32768] @@ -865098,13 +894678,13 @@ - - [576, 896, 1, 32768] - [1208, 129070.0] - - [640, 896, 1, 2048] - - [1209, 91696.7] + - [3283, 64.1] - - [640, 896, 1, 8192] - [1210, 115867.0] - - [640, 896, 1, 32768] - [1211, 132495.0] - - [768, 896, 1, 2048] - - [631, 100647.0] + - [3377, 72.85] - - [768, 896, 1, 8192] - [631, 119648.0] - - [768, 896, 1, 32768] @@ -865130,7 +894710,7 @@ - - [1536, 768, 1, 512] - [816, 82006.8] - - [1536, 768, 1, 2048] - - [2777, 0.0] + - [2755, 0.0] - - [1536, 768, 1, 8192] - [1216, 138706.0] - - [1792, 768, 1, 512] @@ -865148,7 +894728,7 @@ - - [1280, 896, 1, 512] - [805, 80165.8] - - [1280, 896, 1, 2048] - - [2780, 0.0] + - [2758, 0.0] - - [1280, 896, 1, 8192] - [1219, 133239.0] - - [1536, 896, 1, 512] @@ -865236,7 +894816,7 @@ - - [3584, 896, 1, 8192] - [961, 154779.0] - - [4096, 768, 1, 512] - - [3035, 0.0] + - [3012, 0.0] - - [4096, 768, 1, 2048] - [1245, 133397.0] - - [4096, 768, 1, 8192] @@ -865252,7 +894832,7 @@ - - [5120, 768, 1, 2048] - [1246, 161667.0] - - [5120, 768, 1, 8192] - - [2972, 0.0] + - [2949, 0.0] - - [5632, 768, 1, 512] - [1247, 114910.0] - - [5632, 768, 1, 2048] @@ -865272,7 +894852,7 @@ - - [7168, 768, 1, 8192] - [1254, 145910.0] - - [4096, 896, 1, 512] - - [2884, 0.0] + - [2861, 0.0] - - [4096, 896, 1, 2048] - [1246, 150604.0] - - [4096, 896, 1, 8192] @@ -865312,13 +894892,13 @@ - - [8192, 768, 1, 2048] - [989, 136965.0] - - [8192, 768, 1, 8192] - - [2821, 0.0] + - [2799, 0.0] - - [10240, 768, 1, 512] - [1266, 127808.0] - - [10240, 768, 1, 2048] - [991, 161349.0] - - [10240, 768, 1, 8192] - - [3124, 0.0] + - [3101, 0.0] - - [12288, 768, 1, 512] - [1008, 122502.0] - - [12288, 768, 1, 2048] @@ -865336,13 +894916,13 @@ - - [8192, 896, 1, 2048] - [994, 157543.0] - - [8192, 896, 1, 8192] - - [2983, 0.0] + - [2960, 0.0] - - [10240, 896, 1, 512] - [995, 131430.0] - - [10240, 896, 1, 2048] - [998, 162081.0] - - [10240, 896, 1, 8192] - - [3135, 0.0] + - [3112, 0.0] - - [12288, 896, 1, 512] - [988, 119990.0] - - [12288, 896, 1, 2048] @@ -865500,7 +895080,7 @@ - - [48, 1536, 1, 8192] - [1281, 54121.5] - - [48, 1536, 1, 32768] - - [2757, 0.0] + - [2735, 0.0] - - [64, 1024, 1, 2048] - [197, 24779.4] - - [64, 1024, 1, 8192] @@ -865654,7 +895234,7 @@ - - [320, 1024, 1, 2048] - [403, 74179.7] - - [320, 1024, 1, 8192] - - [2769, 0.0] + - [2747, 0.0] - - [320, 1024, 1, 32768] - [1306, 132383.0] - - [384, 1024, 1, 2048] @@ -865672,7 +895252,7 @@ - - [256, 1280, 1, 2048] - [403, 74261.8] - - [256, 1280, 1, 8192] - - [2767, 0.0] + - [2745, 0.0] - - [256, 1280, 1, 32768] - [1305, 148273.0] - - [320, 1280, 1, 2048] @@ -865730,13 +895310,13 @@ - - [576, 1024, 1, 32768] - [1320, 139529.0] - - [640, 1024, 1, 2048] - - [1209, 103645.0] + - [3283, 73.41] - - [640, 1024, 1, 8192] - [1206, 119041.0] - - [640, 1024, 1, 32768] - [1321, 140725.0] - - [768, 1024, 1, 2048] - - [711, 106714.0] + - [3320, 73.23] - - [768, 1024, 1, 8192] - [715, 128030.0] - - [768, 1024, 1, 32768] @@ -865760,15 +895340,15 @@ - - [576, 1280, 1, 32768] - [1324, 163023.0] - - [640, 1280, 1, 2048] - - [711, 111769.0] + - [3320, 78.93] - - [640, 1280, 1, 8192] - [810, 132462.0] - - [640, 1280, 1, 32768] - [810, 166611.0] - - [768, 1280, 1, 512] - - [714, 75263.4] + - [3354, 53.17] - - [768, 1280, 1, 2048] - - [714, 117094.0] + - [3375, 85.87] - - [768, 1280, 1, 8192] - [1325, 136832.0] - - [896, 1280, 1, 512] @@ -865790,15 +895370,15 @@ - - [576, 1536, 1, 32768] - [1329, 162195.0] - - [640, 1536, 1, 512] - - [1330, 76618.8] + - [3286, 56.66] - - [640, 1536, 1, 2048] - - [928, 128020.0] + - [3286, 90.15] - - [640, 1536, 1, 8192] - [928, 140160.0] - - [768, 1536, 1, 512] - - [805, 81851.2] + - [3288, 55.57] - - [768, 1536, 1, 2048] - - [805, 121821.0] + - [3322, 72.21] - - [768, 1536, 1, 8192] - [938, 137127.0] - - [896, 1536, 1, 512] @@ -865808,305 +895388,305 @@ - - [896, 1536, 1, 8192] - [1218, 144003.0] - - [1024, 1024, 1, 512] - - [1331, 76388.1] + - [1330, 76388.1] - - [1024, 1024, 1, 2048] - - [1331, 110886.0] + - [1330, 110886.0] - - [1024, 1024, 1, 8192] - - [1332, 127810.0] + - [1331, 127810.0] - - [1280, 1024, 1, 512] - - [1331, 93564.1] + - [1330, 93564.1] - - [1280, 1024, 1, 2048] - - [1331, 138852.0] + - [1330, 138852.0] - - [1280, 1024, 1, 8192] - - [1333, 135951.0] + - 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53.06] + - - [768, 17024, 1, 128] + - [3307, 53.21] + - - [768, 17024, 1, 8192] + - [3365, 135.55] + - - [768, 19456, 1, 4096] + - [3371, 132.07] + - - [768, 24320, 1, 512] + - [3371, 92.39] + - - [768, 16, 1, 512] + - [3385, 1.54] + - - [768, 24, 1, 128] + - [3272, 0.68] + - - [768, 224, 1, 128] + - [3386, 5.52] + - - [768, 256, 1, 512] + - [3330, 17.34] + - - [768, 448, 1, 128] + - [3351, 9.74] + - - [768, 512, 1, 512] + - [3331, 28.85] + - - [768, 608, 1, 2048] + - [3331, 57.54] + - - [768, 640, 1, 4096] + - [3350, 71.96] + - - [768, 768, 1, 512] + - [3319, 40.02] + - - [768, 896, 1, 4096] + - [3377, 82.18] + - - [768, 1024, 1, 512] + - [3320, 44.96] + - - [768, 1216, 1, 4096] + - [3286, 92.59] + - - [768, 1280, 1, 128] + - [3352, 22.81] + - - [768, 1792, 1, 128] + - [3345, 25.85] + - - [768, 1824, 1, 2048] + - [3377, 80.54] + - - [768, 2048, 1, 128] + - [3345, 28.8] + - - [768, 2432, 1, 2048] + - [3286, 90.04] + - - [768, 2560, 1, 128] + - [3380, 33.28] + - - [768, 3040, 1, 4096] + - [3294, 104.69] + - - [768, 3584, 1, 128] + - [3390, 35.54] + - - [768, 3648, 1, 4096] + - [3363, 114.1] + - - [768, 4256, 1, 128] + - [3391, 40.69] + - - [768, 4256, 1, 8192] + - [3365, 126.88] + - - [768, 4864, 1, 2048] + - [3366, 103.55] + - - [768, 5120, 1, 128] + - [3381, 45.04] + - - [768, 6080, 1, 4096] + - [3359, 113.97] + - - [768, 7296, 1, 128] + - [3299, 49.9] + - - [768, 7296, 1, 8192] + - [3363, 127.7] + - - [768, 8192, 1, 4096] + - [3364, 126.15] + - - [768, 8512, 1, 2048] + - [3365, 116.99] + - - [768, 9728, 1, 512] + - [3384, 86.8] + - - [768, 10240, 1, 128] + - [3383, 51.62] + - - [768, 12160, 1, 128] + - [3299, 52.4] + - - [768, 12160, 1, 8192] + - [3364, 132.61] + - - [768, 12288, 1, 4096] + - [3364, 129.17] + - - [768, 14336, 1, 4096] + - [3371, 128.63] + - - [768, 14592, 1, 4096] + - [3371, 131.06] + - - [768, 17024, 1, 2048] + - [3365, 120.71] + - - [768, 19456, 1, 512] + - [3371, 91.67] + - - [768, 20480, 1, 128] + - [3383, 58.02] + - - [768, 20480, 1, 8192] + - [3369, 143.38] + - - [768, 24320, 1, 4096] + - [3371, 132.8] + - - [768, 24576, 1, 4096] + - [3369, 133.62] + - - [768, 16, 1, 128] + - [3272, 0.47] + - - [768, 40, 1, 512] + - [3273, 3.71] + - - [768, 48, 1, 512] + - [3273, 4.59] + - - [768, 56, 1, 512] + - [3309, 4.9] + - - [768, 64, 1, 512] + - [3338, 5.69] + - - [768, 80, 1, 512] + - [3309, 7.16] + - - [768, 96, 1, 512] + - [3338, 8.45] + - - [768, 112, 1, 512] + - [3329, 8.47] + - - [768, 128, 1, 512] + - [3393, 9.96] + - - [768, 160, 1, 512] + - [3393, 12.39] + - - [768, 256, 1, 128] + - [3277, 6.23] + - - [768, 320, 1, 512] + - [3330, 21.62] + - - [768, 512, 1, 128] + - [3351, 11.02] + - - [768, 608, 1, 512] + - [3394, 32.12] + - - [768, 768, 1, 128] + - [3376, 15.81] + - - [768, 1024, 1, 128] + - [3352, 18.8] + - - [768, 1216, 1, 2048] + - [3286, 83.46] + - - [768, 1280, 1, 4096] + - [3375, 95.56] + - - [768, 1792, 1, 4096] + - [3396, 88.27] + - - [768, 1824, 1, 512] + - [3355, 61.12] + - - [768, 2048, 1, 4096] + - [3345, 91.56] + - - [768, 2432, 1, 512] + - [3380, 70.25] + - - [768, 2560, 1, 4096] + - [3375, 102.16] + - - [768, 3040, 1, 2048] + - [3359, 95.74] + - - [768, 3072, 1, 128] + - [3293, 36.71] + - - [768, 3584, 1, 4096] + - [3296, 109.36] + - - [768, 3648, 1, 2048] + - [3363, 106.21] + - - [768, 4096, 1, 128] + - [3390, 39.52] + - - [768, 4256, 1, 4096] + - [3365, 118.94] + - - [768, 4864, 1, 512] + - [3369, 85.7] + - - [768, 5120, 1, 4096] + - [3366, 126.91] + - - [768, 6080, 1, 2048] + - [3359, 105.44] + - - [768, 7168, 1, 128] + - [3398, 49.41] + - - [768, 7296, 1, 4096] + - [3363, 121.59] + - - [768, 8512, 1, 512] + - [3365, 85.98] + - - [768, 9728, 1, 128] + - [3304, 49.4] + - - [768, 9728, 1, 8192] + - [3369, 134.16] + - - [768, 10240, 1, 4096] + - [3369, 134.61] + - - [768, 12160, 1, 4096] + - [3364, 127.89] + - - [768, 14592, 1, 2048] + - [3371, 123.86] + - - [768, 17024, 1, 512] + - [3383, 90.03] + - - [768, 19456, 1, 128] + - [3299, 56.1] + - - [768, 19456, 1, 8192] + - [3369, 136.65] + - - [768, 20480, 1, 4096] + - [3369, 137.89] + - - [768, 24320, 1, 2048] + - [3369, 125.1] - null - null - DeviceEfficiency